Commit Graph

7 Commits

Author SHA1 Message Date
Scott Wood
e9326dea3f powerpc/qman: Change fsl,qman-channel-id to cell-index
It turns out that existing U-Boots will dereference NULL pointers
if the device tree does not have cell-index in the portal nodes.

No patch has yet been merged adding device tree nodes for this binding
(except a dtsi that has not yet been referenced), nor has any driver
yet been merged making use of the binding, so it's not too late to
change the binding in order to keep compatibility with existing
U-Boots.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Cc: Madalin-Cristian Bucur <madalin.bucur@freescale.com>
2015-06-02 21:37:24 -05:00
Emil Medve
7af98c7c4d dt/bindings: b/qman: Add phandle to the portals
This supports SoC(s) with multiple B/QMan instances

Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2015-01-29 22:57:44 -06:00
Emil Medve
1ee9df499b dt/bindings: b/qman: Fix the alloc-ranges in the example(s)
'ranges' are specified as <base size> not as <start end>

Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2015-01-29 22:57:44 -06:00
Emil Medve
f3f6743d1b dt/bindings: Introduce the FSL QorIQ DPAA QMan portal(s)
Portals are memory mapped interfaces to QMan that allow low-latency,
lock-less interaction by software running on processor cores,
accelerators and network interfaces with the QMan

Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Change-Id: I29764fa8093b5ce65460abc879446795c50d7185
Signed-off-by: Scott Wood <scottwood@freescale.com>
2014-11-12 23:53:47 -06:00
Emil Medve
76a4f03f3e dt/bindings: Introduce the FSL QorIQ DPAA QMan
The Queue Manager is part of the Data-Path Acceleration Architecture
(DPAA).  QMan supports queuing and QoS scheduling of frames to CPUs,
network interfaces and DPAA logic modules, maintains packet ordering
within flows.  Besides providing flow-level queuing, is also
responsible for congestion management functions such as RED/WRED,
congestion notifications and tail discards.  This binding covers the
CCSR space programming model

Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Change-Id: I3acb223893e42003d6c9dc061db568ec0b10d29b
Signed-off-by: Scott Wood <scottwood@freescale.com>
2014-11-12 23:53:44 -06:00
Emil Medve
5f3af4008b dt/bindings: Introduce the FSL QorIQ DPAA BMan portal(s)
Portals are memory mapped interfaces to BMan that allow low-latency,
lock-less interaction by software running on processor cores,
accelerators and network interfaces with the BMan

Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Change-Id: I6d245ffc14ba3d0e91d403ac7c3b91b75a9e6a95
Signed-off-by: Scott Wood <scottwood@freescale.com>
2014-11-12 23:53:41 -06:00
Emil Medve
31ceb157f2 dt/bindings: Introduce the FSL QorIQ DPAA BMan
The Buffer Manager is part of the Data-Path Acceleration Architecture
(DPAA).  BMan supports hardware allocation and deallocation of buffers
belonging to pools originally created by software with configurable
depletion thresholds.  This binding covers the CCSR space programming
model

Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Change-Id: I3ec479bfb3c91951e96902f091f5d7d2adbef3b2
Signed-off-by: Scott Wood <scottwood@freescale.com>
2014-11-12 23:53:36 -06:00