This patch enables rx8581 on I2C0
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Register Ether device from bockw_init(), passing the platform data to it, adding
only the RMII pin group to bockw_pinctrl_map[]. Although the LINK signal exists
on the board, it's connected to the link/activity LED output of the PHY, thus
the link disappears and reappears after each packet. We'd be better off ignoring
such signal and getting the link state from the PHY indirectly.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
[horms+renesas@verge.net.au: manually applied]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch is directly accessing to PUPR4 register which can
control SDHI0 CD/WP pin pull-up setting.
It should be replaced in the future.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
SMSC driver will try to get regulator if .config had CONFIG_REGULATOR,
and, shmobile_defconfig has it.
SMSC driver on Bock-W board will be failed if it doens't have
dummy regulator settings.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Debug serial (= SCIF0) is connected to CN9 upper side,
and it is shared by RCAN.
This patch adds SCIF/RCAN dipswitch explanation on
comment area for developers.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Bock-W board will needs more board specific ioremap() method.
This patch tidyup current FPGA specific settings
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adds SMSC ethernet support on Bock-W
Bock-W SMSC needs FPGA settings which enables interrupt.
This patch does it on bockw_init() function.
As notes for future, this FPGA settings should be updated,
since this FPGA is using cascaded interrupt.
Current code is assuming that this FPGA interrupt user is only SMSC.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add basic Bock-W board support
More devices will be added on top of this patch after
PICNTRL and clock framework are in better shape.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
