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Author SHA1 Message Date
Linus Torvalds
102178108e ARM: SoC driver updates for v4.3 
Some releases this branch is nearly empty, others we have more stuff. It
 tends to gather drivers that need SoC modification or dependencies such
 that they have to (also) go in through our tree.
 
 For this release, we have merged in part of the reset controller tree
 (with handshake that the parts we have merged in will remain stable),
 as well as dependencies on a few clock branches.
 
 In general, new items here are:
 
 - Qualcomm driver for SMM/SMD, which is how they communicate with the
   coprocessors on (some) of their platforms
 - Memory controller work for ARM's PL172 memory controller
 - Reset drivers for various platforms
 - PMU power domain support for Marvell platforms
 - Tegra support for T132/T210 SoCs: PMC, fuse, memory controller per-SoC support
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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver updates from Olof Johansson:
 "Some releases this branch is nearly empty, others we have more stuff.
  It tends to gather drivers that need SoC modification or dependencies
  such that they have to (also) go in through our tree.

  For this release, we have merged in part of the reset controller tree
  (with handshake that the parts we have merged in will remain stable),
  as well as dependencies on a few clock branches.

  In general, new items here are:

   - Qualcomm driver for SMM/SMD, which is how they communicate with the
     coprocessors on (some) of their platforms

   - memory controller work for ARM's PL172 memory controller

   - reset drivers for various platforms

   - PMU power domain support for Marvell platforms

   - Tegra support for T132/T210 SoCs: PMC, fuse, memory controller
     per-SoC support"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (49 commits)
  ARM: tegra: cpuidle: implement cpuidle_state.enter_freeze()
  ARM: tegra: Disable cpuidle if PSCI is available
  soc/tegra: pmc: Use existing pclk reference
  soc/tegra: pmc: Remove unnecessary return statement
  soc: tegra: Remove redundant $(CONFIG_ARCH_TEGRA) in Makefile
  memory: tegra: Add Tegra210 support
  memory: tegra: Add support for a variable-size client ID bitfield
  clk: shmobile: rz: Add CPG/MSTP Clock Domain support
  clk: shmobile: rcar-gen2: Add CPG/MSTP Clock Domain support
  clk: shmobile: r8a7779: Add CPG/MSTP Clock Domain support
  clk: shmobile: r8a7778: Add CPG/MSTP Clock Domain support
  clk: shmobile: Add CPG/MSTP Clock Domain support
  ARM: dove: create a proper PMU driver for power domains, PMU IRQs and resets
  reset: reset-zynq: Adding support for Xilinx Zynq reset controller.
  docs: dts: Added documentation for Xilinx Zynq Reset Controller bindings.
  MIPS: ath79: Add the reset controller to the AR9132 dtsi
  reset: Add a driver for the reset controller on the AR71XX/AR9XXX
  devicetree: Add bindings for the ATH79 reset controller
  reset: socfpga: Update reset-socfpga to read the altr,modrst-offset property
  doc: dt: add documentation for lpc1850-rgu reset driver
  ...
 2015-09-01 13:00:04 -07:00
Tomeu Vizoso
1ec0e115f8 ARM: tegra: cpuidle: implement cpuidle_state.enter_freeze() 
This callback is expected to do the same as enter() but it has to
guarantee that interrupts aren't enabled at any point in its execution,
as the tick is frozen.

It will be called when the system goes to suspend-to-idle and will
reduce power usage because CPUs won't be awaken for unnecessary IRQs.

By setting the CPUIDLE_FLAG_TIMER_STOP flag, we can reuse the same code
for both the enter() and enter_freeze() callbacks.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Cc: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
 2015-08-13 16:53:38 +02:00
Thierry Reding
fc0cf17734 ARM: tegra: Disable cpuidle if PSCI is available 
This is only relevant on Tegra114 and Tegra124, because earlier Tegra
generations used Cortex-A9 without secure extensions.

Signed-off-by: Thierry Reding <treding@nvidia.com>
 2015-08-13 16:51:28 +02:00
Thierry Reding
7e939de1b2 soc/tegra: fuse: Unify Tegra20 and Tegra30 drivers 
Unifying the drivers makes it easier to restrict the legacy probing
paths to 32-bit ARM. This in turn will come in handy as support for
new 64-bit ARM SoCs is added.

Signed-off-by: Thierry Reding <treding@nvidia.com>
 2015-07-16 10:38:28 +02:00
Tuomas Tynkkynen
fa63aa3dea clk: tegra: Add functions for parsing CVB tables 
Tegra CVB tables encode the relationship between operating voltage
and optimal frequency as a function of the so-called speedo value.
The speedo value is written to the on-chip fuses at the factory,
which allows the voltage-frequency operating points to be calculated
on an per-chip basis.

Add utility functions to parse the Tegra-specific tables and export the
voltage-frequency pairs to the generic OPP framework for other drivers
to use.

Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Signed-off-by: Mikko Perttunen <mikko.perttunen@kapsi.fi>
Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Michael Turquette <mturquette@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
 2015-07-16 09:32:47 +02:00
Linus Torvalds
4aa705b18b ARM: SoC: platform support for v4.2 
Our SoC branch usually contains expanded support for new SoCs and
 other core platform code. Some highlights from this round:
 
 - sunxi: SMP support for A23 SoC
 - socpga: big-endian support
 - pxa: conversion to common clock framework
 - bcm: SMP support for BCM63138
 - imx: support new I.MX7D SoC
 - zte: basic support for ZX296702 SoC
 
  Conflicts:
 	arch/arm/mach-socfpga/core.h
 
 Trivial remove/remove conflict with our cleanup branch.
 Resolution: remove both sides
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Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC platform support updates from Kevin Hilman:
 "Our SoC branch usually contains expanded support for new SoCs and
  other core platform code.  Some highlights from this round:

   - sunxi: SMP support for A23 SoC
   - socpga: big-endian support
   - pxa: conversion to common clock framework
   - bcm: SMP support for BCM63138
   - imx: support new I.MX7D SoC
   - zte: basic support for ZX296702 SoC"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (134 commits)
  ARM: zx: Add basic defconfig support for ZX296702
  ARM: dts: zx: add an initial zx296702 dts and doc
  clk: zx: add clock support to zx296702
  dt-bindings: Add #defines for ZTE ZX296702 clocks
  ARM: socfpga: fix build error due to secondary_startup
  MAINTAINERS: ARM64: EXYNOS: Extend entry for ARM64 DTS
  ARM: ep93xx: simone: support for SPI-based MMC/SD cards
  MAINTAINERS: update Shawn's email to use kernel.org one
  ARM: socfpga: support suspend to ram
  ARM: socfpga: add CPU_METHOD_OF_DECLARE for Arria 10
  ARM: socfpga: use CPU_METHOD_OF_DECLARE for socfpga_cyclone5
  ARM: EXYNOS: register power domain driver from core_initcall
  ARM: EXYNOS: use PS_HOLD based poweroff for all supported SoCs
  ARM: SAMSUNG: Constify platform_device_id
  ARM: EXYNOS: Constify irq_domain_ops
  ARM: EXYNOS: add coupled cpuidle support for Exynos3250
  ARM: EXYNOS: add exynos_get_boot_addr() helper
  ARM: EXYNOS: add exynos_set_boot_addr() helper
  ARM: EXYNOS: make exynos_core_restart() less verbose
  ARM: EXYNOS: fix exynos_boot_secondary() return value on timeout
  ...
 2015-06-26 11:34:35 -07:00
Kevin Hilman
e75ea4569d Merge branch 'for-arm-soc' of http://ftp.arm.linux.org.uk/pub/armlinux/kernel/git-cur/linux-2.6-arm into next/cleanup 
* 'for-arm-soc' of http://ftp.arm.linux.org.uk/pub/armlinux/kernel/git-cur/linux-2.6-arm:
  ARM: fix EFM32 build breakage caused by cpu_resume_arm
  ARM: 8389/1: Add cpu_resume_arm() for firmwares that resume in ARM state
  ARM: v7 setup function should invalidate L1 cache
 2015-06-12 13:40:12 -07:00
Russell King
02b4e2756e ARM: v7 setup function should invalidate L1 cache 
All ARMv5 and older CPUs invalidate their caches in the early assembly
setup function, prior to enabling the MMU.  This is because the L1
cache should not contain any data relevant to the execution of the
kernel at this point; all data should have been flushed out to memory.

This requirement should also be true for ARMv6 and ARMv7 CPUs - indeed,
these typically do not search their caches when caching is disabled (as
it needs to be when the MMU is disabled) so this change should be safe.

ARMv7 allows there to be CPUs which search their caches while caching is
disabled, and it's permitted that the cache is uninitialised at boot;
for these, the architecture reference manual requires that an
implementation specific code sequence is used immediately after reset
to ensure that the cache is placed into a sane state.  Such
functionality is definitely outside the remit of the Linux kernel, and
must be done by the SoC's firmware before _any_ CPU gets to the Linux
kernel.

Changing the data cache clean+invalidate to a mere invalidate allows us
to get rid of a lot of platform specific hacks around this issue for
their secondary CPU bringup paths - some of which were buggy.

Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Tested-by: Florian Fainelli <f.fainelli@gmail.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Wei Xu <xuwei5@hisilicon.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
 2015-06-01 11:30:26 +01:00
David Riley
7892158a96 soc/tegra: pmc: move to using a restart handler 
The pmc driver was previously exporting tegra_pmc_restart, which was
assigned to machine_desc.init_machine, taking precedence over the
restart handlers registered through register_restart_handler().

Signed-off-by: David Riley <davidriley@chromium.org>
[tomeu.vizoso@collabora.com: Rebased]
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
[treding@nvidia.com: minor cleanups]
Signed-off-by: Thierry Reding <treding@nvidia.com>
 2015-05-04 14:21:45 +02:00
Thierry Reding
85aa5047e3 ARM: tegra: Fix typo (reset -> rest) in comment 
Easy typo to make when you're working in this area of the code.

Signed-off-by: Thierry Reding <treding@nvidia.com>
 2015-05-04 13:25:19 +02:00
Dmitry Osipenko
4d48edb3c3 ARM: tegra20: Store CPU "resettable" status in IRAM 
Commit 7232398abc ("ARM: tegra: Convert PMC to a driver") changed tegra_resume()
location storing from late to early and, as a result, broke suspend on Tegra20.
PMC scratch register 41 is used by tegra LP1 resume code for retrieving stored
physical memory address of common resume function and in the same time used by
tegra20_cpu_shutdown() (shared by Tegra20 cpuidle driver and platform SMP code),
which is storing CPU1 "resettable" status. It implies strict order of scratch
register usage, otherwise resume function address is lost on Tegra20 after
disabling non-boot CPU's on suspend. Fix it by storing "resettable" status in
IRAM instead of PMC scratch register.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Fixes: 7232398abc (ARM: tegra: Convert PMC to a driver)
Cc: <stable@vger.kernel.org> # v3.17+
Signed-off-by: Thierry Reding <treding@nvidia.com>
 2015-05-04 12:58:19 +02:00
Linus Torvalds
2481bc7528 Power management and ACPI updates for v4.1-rc1 
- Generic PM domains support update including new PM domain
    callbacks to handle device initialization better (Russell King,
    Rafael J Wysocki, Kevin Hilman).
 
  - Unified device properties API update including a new mechanism
    for accessing data provided by platform initialization code
    (Rafael J Wysocki, Adrian Hunter).
 
  - ARM cpuidle update including ARM32/ARM64 handling consolidation
    (Daniel Lezcano).
 
  - intel_idle update including support for the Silvermont Core in
    the Baytrail SOC and for the Airmont Core in the Cherrytrail and
    Braswell SOCs (Len Brown, Mathias Krause).
 
  - New cpufreq driver for Hisilicon ACPU (Leo Yan).
 
  - intel_pstate update including support for the Knights Landing
    chip (Dasaratharaman Chandramouli, Kristen Carlson Accardi).
 
  - QorIQ cpufreq driver update (Tang Yuantian, Arnd Bergmann).
 
  - powernv cpufreq driver update (Shilpasri G Bhat).
 
  - devfreq update including Tegra support changes (Tomeu Vizoso,
    MyungJoo Ham, Chanwoo Choi).
 
  - powercap RAPL (Running-Average Power Limit) driver update
    including support for Intel Broadwell server chips (Jacob Pan,
    Mathias Krause).
 
  - ACPI device enumeration update related to the handling of the
    special PRP0001 device ID allowing DT-style 'compatible' property
    to be used for ACPI device identification (Rafael J Wysocki).
 
  - ACPI EC driver update including limited _DEP support (Lan Tianyu,
    Lv Zheng).
 
  - ACPI backlight driver update including a new mechanism to allow
    native backlight handling to be forced on non-Windows 8 systems
    and a new quirk for Lenovo Ideapad Z570 (Aaron Lu, Hans de Goede).
 
  - New Windows Vista compatibility quirk for Sony VGN-SR19XN (Chen Yu).
 
  - Assorted ACPI fixes and cleanups (Aaron Lu, Martin Kepplinger,
    Masanari Iida, Mika Westerberg, Nan Li, Rafael J Wysocki).
 
  - Fixes related to suspend-to-idle for the iTCO watchdog driver and
    the ACPI core system suspend/resume code (Rafael J Wysocki, Chen Yu).
 
  - PM tracing support for the suspend phase of system suspend/resume
    transitions (Zhonghui Fu).
 
  - Configurable delay for the system suspend/resume testing facility
    (Brian Norris).
 
  - PNP subsystem cleanups (Peter Huewe, Rafael J Wysocki).
 
 /
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Merge tag 'pm+acpi-4.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm

Pull power management and ACPI updates from Rafael Wysocki:
 "These are mostly fixes and cleanups all over, although there are a few
  items that sort of fall into the new feature category.

  First off, we have new callbacks for PM domains that should help us to
  handle some issues related to device initialization in a better way.

  There also is some consolidation in the unified device properties API
  area allowing us to use that inferface for accessing data coming from
  platform initialization code in addition to firmware-provided data.

  We have some new device/CPU IDs in a few drivers, support for new
  chips and a new cpufreq driver too.

  Specifics:

   - Generic PM domains support update including new PM domain callbacks
     to handle device initialization better (Russell King, Rafael J
     Wysocki, Kevin Hilman)

   - Unified device properties API update including a new mechanism for
     accessing data provided by platform initialization code (Rafael J
     Wysocki, Adrian Hunter)

   - ARM cpuidle update including ARM32/ARM64 handling consolidation
     (Daniel Lezcano)

   - intel_idle update including support for the Silvermont Core in the
     Baytrail SOC and for the Airmont Core in the Cherrytrail and
     Braswell SOCs (Len Brown, Mathias Krause)

   - New cpufreq driver for Hisilicon ACPU (Leo Yan)

   - intel_pstate update including support for the Knights Landing chip
     (Dasaratharaman Chandramouli, Kristen Carlson Accardi)

   - QorIQ cpufreq driver update (Tang Yuantian, Arnd Bergmann)

   - powernv cpufreq driver update (Shilpasri G Bhat)

   - devfreq update including Tegra support changes (Tomeu Vizoso,
     MyungJoo Ham, Chanwoo Choi)

   - powercap RAPL (Running-Average Power Limit) driver update including
     support for Intel Broadwell server chips (Jacob Pan, Mathias Krause)

   - ACPI device enumeration update related to the handling of the
     special PRP0001 device ID allowing DT-style 'compatible' property
     to be used for ACPI device identification (Rafael J Wysocki)

   - ACPI EC driver update including limited _DEP support (Lan Tianyu,
     Lv Zheng)

   - ACPI backlight driver update including a new mechanism to allow
     native backlight handling to be forced on non-Windows 8 systems and
     a new quirk for Lenovo Ideapad Z570 (Aaron Lu, Hans de Goede)

   - New Windows Vista compatibility quirk for Sony VGN-SR19XN (Chen Yu)

   - Assorted ACPI fixes and cleanups (Aaron Lu, Martin Kepplinger,
     Masanari Iida, Mika Westerberg, Nan Li, Rafael J Wysocki)

   - Fixes related to suspend-to-idle for the iTCO watchdog driver and
     the ACPI core system suspend/resume code (Rafael J Wysocki, Chen Yu)

   - PM tracing support for the suspend phase of system suspend/resume
     transitions (Zhonghui Fu)

   - Configurable delay for the system suspend/resume testing facility
     (Brian Norris)

   - PNP subsystem cleanups (Peter Huewe, Rafael J Wysocki)"

* tag 'pm+acpi-4.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (74 commits)
  ACPI / scan: Fix NULL pointer dereference in acpi_companion_match()
  ACPI / scan: Rework modalias creation when "compatible" is present
  intel_idle: mark cpu id array as __initconst
  powercap / RAPL: mark rapl_ids array as __initconst
  powercap / RAPL: add ID for Broadwell server
  intel_pstate: Knights Landing support
  intel_pstate: remove MSR test
  cpufreq: fix qoriq uniprocessor build
  ACPI / scan: Take the PRP0001 position in the list of IDs into account
  ACPI / scan: Simplify acpi_match_device()
  ACPI / scan: Generalize of_compatible matching
  device property: Introduce firmware node type for platform data
  device property: Make it possible to use secondary firmware nodes
  PM / watchdog: iTCO: stop watchdog during system suspend
  cpufreq: hisilicon: add acpu driver
  ACPI / EC: Call acpi_walk_dep_device_list() after installing EC opregion handler
  cpufreq: powernv: Report cpu frequency throttling
  intel_idle: Add support for the Airmont Core in the Cherrytrail and Braswell SOCs
  intel_idle: Update support for Silvermont Core in Baytrail SOC
  PM / devfreq: tegra: Register governor on module init
  ...
 2015-04-14 20:21:54 -07:00
Linus Torvalds
8954672d86 Merge branch 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 
Pull irq core updates from Thomas Gleixner:
 "Managerial summary:

  Core code:
   - final removal of IRQF_DISABLED
   - new state save/restore functions for virtualization support
   - wakeup support for stacked irqdomains
   - new function to solve the netpoll synchronization problem

 irqchips:
   - new driver for STi based devices
   - new driver for Vybrid MSCM
   - massive cleanup of the GIC driver by moving the GIC-addons to
     stacked irqdomains
   - the usual pile of fixes and updates to the various chip drivers"

* 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (44 commits)
  irqchip: GICv3: Add support for irq_[get, set]_irqchip_state()
  irqchip: GIC: Add support for irq_[get, set]_irqchip_state()
  genirq: Allow the irqchip state of an IRQ to be save/restored
  genirq: MSI: Fix freeing of unallocated MSI
  irqchip: renesas-irqc: Add wake-up support
  irqchip: armada-370-xp: Allow using wakeup source
  irqchip: mips-gic: Add new functions to start/stop the GIC counter
  irqchip: tegra: Add Tegra210 support
  irqchip: digicolor: Move digicolor_set_gc to init section
  irqchip: renesas-irqc: Add functional clock to bindings
  irqchip: renesas-irqc: Add minimal runtime PM support
  irqchip: renesas-irqc: Add more register documentation
  DT: exynos: update PMU binding
  ARM: exynos4/5: convert pmu wakeup to stacked domains
  irqchip: gic: Don't complain in gic_get_cpumask() if UP system
  ARM: zynq: switch from gic_arch_extn to gic_set_irqchip_flags
  ARM: ux500: switch from gic_arch_extn to gic_set_irqchip_flags
  ARM: shmobile: remove use of gic_arch_extn.irq_set_wake
  irqchip: gic: Add an entry point to set up irqchip flags
  ARM: omap: convert wakeupgen to stacked domains
  ...
 2015-04-13 15:54:50 -07:00
Thomas Gleixner
a0b4122447 ARM: Tegra: Use explicit broadcast oneshot control function 
Replace the clockevents_notify() call with an explicit function call.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Link: http://lkml.kernel.org/r/2131111.rjxRLX1eZB@vostro.rjw.lan
Signed-off-by: Ingo Molnar <mingo@kernel.org>
 2015-04-03 08:44:35 +02:00
Daniel Lezcano
eeebc3bb4d ARM: cpuidle: Remove duplicate header inclusion 
The cpu_do_idle() function is always used by the cpuidle drivers.

That led to have each driver including cpuidle.h and proc-fns.h, they are
always paired. That makes a lot of duplicate headers inclusion. Instead of
including both in each .c file, move the proc-fns.h header inclusion in the
cpuidle.h header file directly, so we can save some line of code.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Kevin Hilman <khilman@linaro.org>
Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
 2015-03-23 18:03:11 +01:00
Marc Zyngier
1a703bffd8 ARM: tegra: remove old LIC support 
Now that all DTs have been updated, entierely drop support for
the non-DT code.

This is likely to break platforms that do not update their DT,
so print a warning at boot time.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Link: https://lkml.kernel.org/r/1426088583-15097-7-git-send-email-marc.zyngier@arm.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
 2015-03-15 00:40:52 +00:00
Marc Zyngier
e9479e0e83 ARM: tegra: skip gic_arch_extn setup if DT has a LIC node 
If we detect that our DT has a LIC node, don't setup gic_arch_extn,
and skip tegra_legacy_irq_syscore_init as well.

This is only a temporary measure until that code is removed for good.

Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Link: https://lkml.kernel.org/r/1426088583-15097-4-git-send-email-marc.zyngier@arm.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
 2015-03-15 00:40:39 +00:00
Marc Zyngier
b3aa14c399 ARM: tegra: irq: nuke leftovers from non-DT support 
The GIC is now always initialized from DT on tegra, and there is
no point in keeping non-DT init code.

Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Link: https://lkml.kernel.org/r/1426088583-15097-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
 2015-03-15 00:39:56 +00:00
Linus Torvalds
18a8d49973 The clock framework changes for 3.20 contain the usual driver additions, 
enhancements and fixes mostly for ARM32, ARM64, MIPS and Power-based
 devices. Additionaly the framework core underwent a bit of surgery with
 two major changes. The boundary between the clock core and clock
 providers (e.g clock drivers) is now more well defined with dedicated
 provider helper functions. struct clk no longer maps 1:1 with the
 hardware clock but is a true per-user cookie which helps us tracker
 users of hardware clocks and debug bad behavior. The second major change
 is the addition of rate constraints for clocks. Rate ranges are now
 supported which are analogous to the voltage ranges in the regulator
 framework. Unfortunately these changes to the core created some
 breakeage. We think we fixed it all up but for this reason there are
 lots of last minute commits trying to undo the damage.
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Merge tag 'clk-for-linus-3.20' of git://git.linaro.org/people/mike.turquette/linux

Pull clock framework updates from Mike Turquette:
 "The clock framework changes contain the usual driver additions,
  enhancements and fixes mostly for ARM32, ARM64, MIPS and Power-based
  devices.

  Additionally the framework core underwent a bit of surgery with two
  major changes:

   - The boundary between the clock core and clock providers (e.g clock
     drivers) is now more well defined with dedicated provider helper
     functions.  struct clk no longer maps 1:1 with the hardware clock
     but is a true per-user cookie which helps us tracker users of
     hardware clocks and debug bad behavior.

   - The addition of rate constraints for clocks.  Rate ranges are now
     supported which are analogous to the voltage ranges in the
     regulator framework.

  Unfortunately these changes to the core created some breakeage.  We
  think we fixed it all up but for this reason there are lots of last
  minute commits trying to undo the damage"

* tag 'clk-for-linus-3.20' of git://git.linaro.org/people/mike.turquette/linux: (113 commits)
  clk: Only recalculate the rate if needed
  Revert "clk: mxs: Fix invalid 32-bit access to frac registers"
  clk: qoriq: Add support for the platform PLL
  powerpc/corenet: Enable CLK_QORIQ
  clk: Replace explicit clk assignment with __clk_hw_set_clk
  clk: Add __clk_hw_set_clk helper function
  clk: Don't dereference parent clock if is NULL
  MIPS: Alchemy: Remove bogus args from alchemy_clk_fgcs_detr
  clkdev: Always allocate a struct clk and call __clk_get() w/ CCF
  clk: shmobile: div6: Avoid division by zero in .round_rate()
  clk: mxs: Fix invalid 32-bit access to frac registers
  clk: omap: compile legacy omap3 clocks conditionally
  clkdev: Export clk_register_clkdev
  clk: Add rate constraints to clocks
  clk: remove clk-private.h
  pci: xgene: do not use clk-private.h
  arm: omap2+ remove dead clock code
  clk: Make clk API return per-user struct clk instances
  clk: tegra: Define PLLD_DSI and remove dsia(b)_mux
  clk: tegra: Add support for the Tegra132 CAR IP block
  ...
 2015-02-21 12:30:30 -08:00
Peter De Schrijver
d0a57bd5b5 clk: tegra: make tegra_clocks_apply_init_table() arch_initcall 
tegra_clocks_apply_init_table() needs to be called after the udelay
loop has been calibrated (see commit
441f199a37 ("clk: tegra: defer
application of init table") for why that is).  On existing Tegra SoCs
this was done by calling tegra_clocks_apply_init_table() from
tegra_dt_init(). To make this also work on ARM64, we need to change
this into an initcall. tegra_dt_init() is called from
customize_machine which is an arch_initcall. Therefore this should
also work on existing 32bit Tegra SoCs.

Tested on Tegra20 (ventana), Tegra30 (beaverboard), Tegra124 (jetson TK1) and
Tegra132.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
[paul@pwsan.com: tweaked the commit message]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Paul Walmsley <pwalmsley@nvidia.com>
Cc: Thierry Reding <treding@nvidia.com>
Cc: Prashant Gaikwad <pgaikwad@nvidia.com>
Cc: Mike Turquette <mturquette@linaro.org>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Alexandre Courbot <gnurou@gmail.com>
 2015-02-02 15:47:28 +02:00
Thierry Reding
910978e753 clocksource: Build Tegra timer on 32-bit ARM only 
Instead of directly using the ARCH_TEGRA Kconfig symbol to enable this
driver, add a new, non-user-visible Kconfig symbol (TEGRA_TIMER) which
can be selected by the various SoCs.

This is useful to disable building the driver on Tegra132 (64-bit ARM)
where it doesn't currently compile but also isn't needed (yet).

Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
 2015-01-09 14:45:43 +01:00
Linus Torvalds
92a578b064 ACPI and power management updates for 3.19-rc1 
This time we have some more new material than we used to have during
 the last couple of development cycles.
 
 The most important part of it to me is the introduction of a unified
 interface for accessing device properties provided by platform
 firmware.  It works with Device Trees and ACPI in a uniform way and
 drivers using it need not worry about where the properties come
 from as long as the platform firmware (either DT or ACPI) makes
 them available.  It covers both devices and "bare" device node
 objects without struct device representation as that turns out to
 be necessary in some cases.  This has been in the works for quite
 a few months (and development cycles) and has been approved by
 all of the relevant maintainers.
 
 On top of that, some drivers are switched over to the new interface
 (at25, leds-gpio, gpio_keys_polled) and some additional changes are
 made to the core GPIO subsystem to allow device drivers to manipulate
 GPIOs in the "canonical" way on platforms that provide GPIO information
 in their ACPI tables, but don't assign names to GPIO lines (in which
 case the driver needs to do that on the basis of what it knows about
 the device in question).  That also has been approved by the GPIO
 core maintainers and the rfkill driver is now going to use it.
 
 Second is support for hardware P-states in the intel_pstate driver.
 It uses CPUID to detect whether or not the feature is supported by
 the processor in which case it will be enabled by default.  However,
 it can be disabled entirely from the kernel command line if necessary.
 
 Next is support for a platform firmware interface based on ACPI
 operation regions used by the PMIC (Power Management Integrated
 Circuit) chips on the Intel Baytrail-T and Baytrail-T-CR platforms.
 That interface is used for manipulating power resources and for
 thermal management: sensor temperature reporting, trip point setting
 and so on.
 
 Also the ACPI core is now going to support the _DEP configuration
 information in a limited way.  Basically, _DEP it supposed to reflect
 off-the-hierarchy dependencies between devices which may be very
 indirect, like when AML for one device accesses locations in an
 operation region handled by another device's driver (usually, the
 device depended on this way is a serial bus or GPIO controller).
 The support added this time is sufficient to make the ACPI battery
 driver work on Asus T100A, but it is general enough to be able to
 cover some other use cases in the future.
 
 Finally, we have a new cpufreq driver for the Loongson1B processor.
 
 In addition to the above, there are fixes and cleanups all over the
 place as usual and a traditional ACPICA update to a recent upstream
 release.
 
 As far as the fixes go, the ACPI LPSS (Low-power Subsystem) driver
 for Intel platforms should be able to handle power management of
 the DMA engine correctly, the cpufreq-dt driver should interact
 with the thermal subsystem in a better way and the ACPI backlight
 driver should handle some more corner cases, among other things.
 
 On top of the ACPICA update there are fixes for race conditions
 in the ACPICA's interrupt handling code which might lead to some
 random and strange looking failures on some systems.
 
 In the cleanups department the most visible part is the series
 of commits targeted at getting rid of the CONFIG_PM_RUNTIME
 configuration option.  That was triggered by a discussion
 regarding the generic power domains code during which we realized
 that trying to support certain combinations of PM config options
 was painful and not really worth it, because nobody would use them
 in production anyway.  For this reason, we decided to make
 CONFIG_PM_SLEEP select CONFIG_PM_RUNTIME and that lead to the
 conclusion that the latter became redundant and CONFIG_PM could
 be used instead of it.  The material here makes that replacement
 in a major part of the tree, but there will be at least one more
 batch of that in the second part of the merge window.
 
 Specifics:
 
  - Support for retrieving device properties information from ACPI
    _DSD device configuration objects and a unified device properties
    interface for device drivers (and subsystems) on top of that.
    As stated above, this works with Device Trees and ACPI and allows
    device drivers to be written in a platform firmware (DT or ACPI)
    agnostic way.  The at25, leds-gpio and gpio_keys_polled drivers
    are now going to use this new interface and the GPIO subsystem
    is additionally modified to allow device drivers to assign names
    to GPIO resources returned by ACPI _CRS objects (in case _DSD is
    not present or does not provide the expected data).  The changes
    in this set are mostly from Mika Westerberg, Rafael J Wysocki,
    Aaron Lu, and Darren Hart with some fixes from others (Fabio Estevam,
    Geert Uytterhoeven).
 
  - Support for Hardware Managed Performance States (HWP) as described
    in Volume 3, section 14.4, of the Intel SDM in the intel_pstate
    driver.  CPUID is used to detect whether or not the feature is
    supported by the processor.  If supported, it will be enabled
    automatically unless the intel_pstate=no_hwp switch is present in
    the kernel command line.  From Dirk Brandewie.
 
  - New Intel Broadwell-H ID for intel_pstate (Dirk Brandewie).
 
  - Support for firmware interface based on ACPI operation regions
    used by the PMIC chips on the Intel Baytrail-T and Baytrail-T-CR
    platforms for power resource control and thermal management
    (Aaron Lu).
 
  - Limited support for retrieving off-the-hierarchy dependencies
    between devices from ACPI _DEP device configuration objects
    and deferred probing support for the ACPI battery driver based
    on the _DEP information to make that driver work on Asus T100A
    (Lan Tianyu).
 
  - New cpufreq driver for the Loongson1B processor (Kelvin Cheung).
 
  - ACPICA update to upstream revision 20141107 which only affects
    tools (Bob Moore).
 
  - Fixes for race conditions in the ACPICA's interrupt handling
    code and in the ACPI code related to system suspend and resume
    (Lv Zheng and Rafael J Wysocki).
 
  - ACPI core fix for an RCU-related issue in the ioremap() regions
    management code that slowed down significantly after CPUs had
    been allowed to enter idle states even if they'd had RCU callbakcs
    queued and triggered some problems in certain proprietary graphics
    driver (and elsewhere).  The fix replaces synchronize_rcu() in
    that code with synchronize_rcu_expedited() which makes the issue
    go away.  From Konstantin Khlebnikov.
 
  - ACPI LPSS (Low-Power Subsystem) driver fix to handle power
    management of the DMA engine included into the LPSS correctly.
    The problem is that the DMA engine doesn't have ACPI PM support
    of its own and it simply is turned off when the last LPSS device
    having ACPI PM support goes into D3cold.  To work around that,
    the PM domain used by the ACPI LPSS driver is redesigned so at
    least one device with ACPI PM support will be on as long as the
    DMA engine is in use.  From Andy Shevchenko.
 
  - ACPI backlight driver fix to avoid using it on "Win8-compatible"
    systems where it doesn't work and where it was used by default by
    mistake (Aaron Lu).
 
  - Assorted minor ACPI core fixes and cleanups from Tomasz Nowicki,
    Sudeep Holla, Huang Rui, Hanjun Guo, Fabian Frederick, and
    Ashwin Chaugule (mostly related to the upcoming ARM64 support).
 
  - Intel RAPL (Running Average Power Limit) power capping driver
    fixes and improvements including new processor IDs (Jacob Pan).
 
  - Generic power domains modification to power up domains after
    attaching devices to them to meet the expectations of device
    drivers and bus types assuming devices to be accessible at
    probe time (Ulf Hansson).
 
  - Preliminary support for controlling device clocks from the
    generic power domains core code and modifications of the
    ARM/shmobile platform to use that feature (Ulf Hansson).
 
  - Assorted minor fixes and cleanups of the generic power
    domains core code (Ulf Hansson, Geert Uytterhoeven).
 
  - Assorted minor fixes and cleanups of the device clocks control
    code in the PM core (Geert Uytterhoeven, Grygorii Strashko).
 
  - Consolidation of device power management Kconfig options by making
    CONFIG_PM_SLEEP select CONFIG_PM_RUNTIME and removing the latter
    which is now redundant (Rafael J Wysocki and Kevin Hilman).  That
    is the first batch of the changes needed for this purpose.
 
  - Core device runtime power management support code cleanup related
    to the execution of callbacks (Andrzej Hajda).
 
  - cpuidle ARM support improvements (Lorenzo Pieralisi).
 
  - cpuidle cleanup related to the CPUIDLE_FLAG_TIME_VALID flag and
    a new MAINTAINERS entry for ARM Exynos cpuidle (Daniel Lezcano and
    Bartlomiej Zolnierkiewicz).
 
  - New cpufreq driver callback (->ready) to be executed when the
    cpufreq core is ready to use a given policy object and cpufreq-dt
    driver modification to use that callback for cooling device
    registration (Viresh Kumar).
 
  - cpufreq core fixes and cleanups (Viresh Kumar, Vince Hsu,
    James Geboski, Tomeu Vizoso).
 
  - Assorted fixes and cleanups in the cpufreq-pcc, intel_pstate,
    cpufreq-dt, pxa2xx cpufreq drivers (Lenny Szubowicz, Ethan Zhao,
    Stefan Wahren, Petr Cvek).
 
  - OPP (Operating Performance Points) framework modification to
    allow OPPs to be removed too and update of a few cpufreq drivers
    (cpufreq-dt, exynos5440, imx6q, cpufreq) to remove OPPs (added
    during initialization) on driver removal (Viresh Kumar).
 
  - Hibernation core fixes and cleanups (Tina Ruchandani and
    Markus Elfring).
 
  - PM Kconfig fix related to CPU power management (Pankaj Dubey).
 
  - cpupower tool fix (Prarit Bhargava).
 
 /
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Merge tag 'pm+acpi-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm

Pull ACPI and power management updates from Rafael Wysocki:
 "This time we have some more new material than we used to have during
  the last couple of development cycles.

  The most important part of it to me is the introduction of a unified
  interface for accessing device properties provided by platform
  firmware.  It works with Device Trees and ACPI in a uniform way and
  drivers using it need not worry about where the properties come from
  as long as the platform firmware (either DT or ACPI) makes them
  available.  It covers both devices and "bare" device node objects
  without struct device representation as that turns out to be necessary
  in some cases.  This has been in the works for quite a few months (and
  development cycles) and has been approved by all of the relevant
  maintainers.

  On top of that, some drivers are switched over to the new interface
  (at25, leds-gpio, gpio_keys_polled) and some additional changes are
  made to the core GPIO subsystem to allow device drivers to manipulate
  GPIOs in the "canonical" way on platforms that provide GPIO
  information in their ACPI tables, but don't assign names to GPIO lines
  (in which case the driver needs to do that on the basis of what it
  knows about the device in question).  That also has been approved by
  the GPIO core maintainers and the rfkill driver is now going to use
  it.

  Second is support for hardware P-states in the intel_pstate driver.
  It uses CPUID to detect whether or not the feature is supported by the
  processor in which case it will be enabled by default.  However, it
  can be disabled entirely from the kernel command line if necessary.

  Next is support for a platform firmware interface based on ACPI
  operation regions used by the PMIC (Power Management Integrated
  Circuit) chips on the Intel Baytrail-T and Baytrail-T-CR platforms.
  That interface is used for manipulating power resources and for
  thermal management: sensor temperature reporting, trip point setting
  and so on.

  Also the ACPI core is now going to support the _DEP configuration
  information in a limited way.  Basically, _DEP it supposed to reflect
  off-the-hierarchy dependencies between devices which may be very
  indirect, like when AML for one device accesses locations in an
  operation region handled by another device's driver (usually, the
  device depended on this way is a serial bus or GPIO controller).  The
  support added this time is sufficient to make the ACPI battery driver
  work on Asus T100A, but it is general enough to be able to cover some
  other use cases in the future.

  Finally, we have a new cpufreq driver for the Loongson1B processor.

  In addition to the above, there are fixes and cleanups all over the
  place as usual and a traditional ACPICA update to a recent upstream
  release.

  As far as the fixes go, the ACPI LPSS (Low-power Subsystem) driver for
  Intel platforms should be able to handle power management of the DMA
  engine correctly, the cpufreq-dt driver should interact with the
  thermal subsystem in a better way and the ACPI backlight driver should
  handle some more corner cases, among other things.

  On top of the ACPICA update there are fixes for race conditions in the
  ACPICA's interrupt handling code which might lead to some random and
  strange looking failures on some systems.

  In the cleanups department the most visible part is the series of
  commits targeted at getting rid of the CONFIG_PM_RUNTIME configuration
  option.  That was triggered by a discussion regarding the generic
  power domains code during which we realized that trying to support
  certain combinations of PM config options was painful and not really
  worth it, because nobody would use them in production anyway.  For
  this reason, we decided to make CONFIG_PM_SLEEP select
  CONFIG_PM_RUNTIME and that lead to the conclusion that the latter
  became redundant and CONFIG_PM could be used instead of it.  The
  material here makes that replacement in a major part of the tree, but
  there will be at least one more batch of that in the second part of
  the merge window.

  Specifics:

   - Support for retrieving device properties information from ACPI _DSD
     device configuration objects and a unified device properties
     interface for device drivers (and subsystems) on top of that.  As
     stated above, this works with Device Trees and ACPI and allows
     device drivers to be written in a platform firmware (DT or ACPI)
     agnostic way.  The at25, leds-gpio and gpio_keys_polled drivers are
     now going to use this new interface and the GPIO subsystem is
     additionally modified to allow device drivers to assign names to
     GPIO resources returned by ACPI _CRS objects (in case _DSD is not
     present or does not provide the expected data).  The changes in
     this set are mostly from Mika Westerberg, Rafael J Wysocki, Aaron
     Lu, and Darren Hart with some fixes from others (Fabio Estevam,
     Geert Uytterhoeven).

   - Support for Hardware Managed Performance States (HWP) as described
     in Volume 3, section 14.4, of the Intel SDM in the intel_pstate
     driver.  CPUID is used to detect whether or not the feature is
     supported by the processor.  If supported, it will be enabled
     automatically unless the intel_pstate=no_hwp switch is present in
     the kernel command line.  From Dirk Brandewie.

   - New Intel Broadwell-H ID for intel_pstate (Dirk Brandewie).

   - Support for firmware interface based on ACPI operation regions used
     by the PMIC chips on the Intel Baytrail-T and Baytrail-T-CR
     platforms for power resource control and thermal management (Aaron
     Lu).

   - Limited support for retrieving off-the-hierarchy dependencies
     between devices from ACPI _DEP device configuration objects and
     deferred probing support for the ACPI battery driver based on the
     _DEP information to make that driver work on Asus T100A (Lan
     Tianyu).

   - New cpufreq driver for the Loongson1B processor (Kelvin Cheung).

   - ACPICA update to upstream revision 20141107 which only affects
     tools (Bob Moore).

   - Fixes for race conditions in the ACPICA's interrupt handling code
     and in the ACPI code related to system suspend and resume (Lv Zheng
     and Rafael J Wysocki).

   - ACPI core fix for an RCU-related issue in the ioremap() regions
     management code that slowed down significantly after CPUs had been
     allowed to enter idle states even if they'd had RCU callbakcs
     queued and triggered some problems in certain proprietary graphics
     driver (and elsewhere).  The fix replaces synchronize_rcu() in that
     code with synchronize_rcu_expedited() which makes the issue go
     away.  From Konstantin Khlebnikov.

   - ACPI LPSS (Low-Power Subsystem) driver fix to handle power
     management of the DMA engine included into the LPSS correctly.  The
     problem is that the DMA engine doesn't have ACPI PM support of its
     own and it simply is turned off when the last LPSS device having
     ACPI PM support goes into D3cold.  To work around that, the PM
     domain used by the ACPI LPSS driver is redesigned so at least one
     device with ACPI PM support will be on as long as the DMA engine is
     in use.  From Andy Shevchenko.

   - ACPI backlight driver fix to avoid using it on "Win8-compatible"
     systems where it doesn't work and where it was used by default by
     mistake (Aaron Lu).

   - Assorted minor ACPI core fixes and cleanups from Tomasz Nowicki,
     Sudeep Holla, Huang Rui, Hanjun Guo, Fabian Frederick, and Ashwin
     Chaugule (mostly related to the upcoming ARM64 support).

   - Intel RAPL (Running Average Power Limit) power capping driver fixes
     and improvements including new processor IDs (Jacob Pan).

   - Generic power domains modification to power up domains after
     attaching devices to them to meet the expectations of device
     drivers and bus types assuming devices to be accessible at probe
     time (Ulf Hansson).

   - Preliminary support for controlling device clocks from the generic
     power domains core code and modifications of the ARM/shmobile
     platform to use that feature (Ulf Hansson).

   - Assorted minor fixes and cleanups of the generic power domains core
     code (Ulf Hansson, Geert Uytterhoeven).

   - Assorted minor fixes and cleanups of the device clocks control code
     in the PM core (Geert Uytterhoeven, Grygorii Strashko).

   - Consolidation of device power management Kconfig options by making
     CONFIG_PM_SLEEP select CONFIG_PM_RUNTIME and removing the latter
     which is now redundant (Rafael J Wysocki and Kevin Hilman).  That
     is the first batch of the changes needed for this purpose.

   - Core device runtime power management support code cleanup related
     to the execution of callbacks (Andrzej Hajda).

   - cpuidle ARM support improvements (Lorenzo Pieralisi).

   - cpuidle cleanup related to the CPUIDLE_FLAG_TIME_VALID flag and a
     new MAINTAINERS entry for ARM Exynos cpuidle (Daniel Lezcano and
     Bartlomiej Zolnierkiewicz).

   - New cpufreq driver callback (->ready) to be executed when the
     cpufreq core is ready to use a given policy object and cpufreq-dt
     driver modification to use that callback for cooling device
     registration (Viresh Kumar).

   - cpufreq core fixes and cleanups (Viresh Kumar, Vince Hsu, James
     Geboski, Tomeu Vizoso).

   - Assorted fixes and cleanups in the cpufreq-pcc, intel_pstate,
     cpufreq-dt, pxa2xx cpufreq drivers (Lenny Szubowicz, Ethan Zhao,
     Stefan Wahren, Petr Cvek).

   - OPP (Operating Performance Points) framework modification to allow
     OPPs to be removed too and update of a few cpufreq drivers
     (cpufreq-dt, exynos5440, imx6q, cpufreq) to remove OPPs (added
     during initialization) on driver removal (Viresh Kumar).

   - Hibernation core fixes and cleanups (Tina Ruchandani and Markus
     Elfring).

   - PM Kconfig fix related to CPU power management (Pankaj Dubey).

   - cpupower tool fix (Prarit Bhargava)"

* tag 'pm+acpi-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (120 commits)
  i2c-omap / PM: Drop CONFIG_PM_RUNTIME from i2c-omap.c
  dmaengine / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
  tools: cpupower: fix return checks for sysfs_get_idlestate_count()
  drivers: sh / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
  e1000e / igb / PM: Eliminate CONFIG_PM_RUNTIME
  MMC / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
  MFD / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
  misc / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
  media / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
  input / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
  leds: leds-gpio: Fix multiple instances registration without 'label' property
  iio / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
  hsi / OMAP / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
  i2c-hid / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
  drm / exynos / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
  gpio / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
  hwrandom / exynos / PM: Use CONFIG_PM in #ifdef
  block / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
  USB / PM: Drop CONFIG_PM_RUNTIME from the USB core
  PM: Merge the SET*_RUNTIME_PM_OPS() macros
  ...
 2014-12-10 21:17:00 -08:00
Linus Torvalds
3a647c1d7a ARM: SoC driver updates for 3.19 
These are changes for drivers that are intimately tied to some SoC
 and for some reason could not get merged through the respective
 subsystem maintainer tree.
 
 The largest single change here this time around is the Tegra
 iommu/memory controller driver, which gets updated to the new
 iommu DT binding. More drivers like this are likely to follow
 for the following merge window, but we should be able to do
 those through the iommu maintainer.
 
 Other notable changes are:
 * reset controller drivers from the reset maintainer (socfpga, sti, berlin)
 * fixes for the keystone navigator driver merged last time
 * at91 rtc driver changes related to the at91 cleanups
 * ARM perf driver changes from Will Deacon
 * updates for the brcmstb_gisb driver
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Merge tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "These are changes for drivers that are intimately tied to some SoC and
  for some reason could not get merged through the respective subsystem
  maintainer tree.

  The largest single change here this time around is the Tegra
  iommu/memory controller driver, which gets updated to the new iommu DT
  binding.  More drivers like this are likely to follow for the
  following merge window, but we should be able to do those through the
  iommu maintainer.

  Other notable changes are:
   - reset controller drivers from the reset maintainer (socfpga, sti,
     berlin)
   - fixes for the keystone navigator driver merged last time
   - at91 rtc driver changes related to the at91 cleanups
   - ARM perf driver changes from Will Deacon
   - updates for the brcmstb_gisb driver"

* tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (53 commits)
  clocksource: arch_timer: Allow the device tree to specify uninitialized timer registers
  clocksource: arch_timer: Fix code to use physical timers when requested
  memory: Add NVIDIA Tegra memory controller support
  bus: brcmstb_gisb: Add register offset tables for older chips
  bus: brcmstb_gisb: Look up register offsets in a table
  bus: brcmstb_gisb: Introduce wrapper functions for MMIO accesses
  bus: brcmstb_gisb: Make the driver buildable on MIPS
  of: Add NVIDIA Tegra memory controller binding
  ARM: tegra: Move AHB Kconfig to drivers/amba
  amba: Add Kconfig file
  clk: tegra: Implement memory-controller clock
  serial: samsung: Fix serial config dependencies for exynos7
  bus: brcmstb_gisb: resolve section mismatch
  ARM: common: edma: edma_pm_resume may be unused
  ARM: common: edma: add suspend resume hook
  powerpc/iommu: Rename iommu_[un]map_sg functions
  rtc: at91sam9: add DT bindings documentation
  rtc: at91sam9: use clk API instead of relying on AT91_SLOW_CLOCK
  ARM: at91: add clk_lookup entry for RTT devices
  rtc: at91sam9: rework the Kconfig description
  ...
 2014-12-09 14:48:22 -08:00
Linus Torvalds
6cd94d5e57 ARM: SoC platform changes for 3.19 
New and updated SoC support, notable changes include:
 
 * bcm: brcmstb SMP support
 * bcm: initial iproc/cygnus support
 * exynos: Exynos4415 SoC support
 * exynos: PMU and suspend support for Exynos5420
 * exynos: PMU support for Exynos3250
 * exynos: pm related maintenance
 * imx: new LS1021A SoC support
 * imx: vybrid 610 global timer support
 * integrator: convert to using multiplatform configuration
 * mediatek: earlyprintk support for mt8127/mt8135
 * meson: meson8 soc and l2 cache controller support
 * mvebu: Armada 38x CPU hotplug support
 * mvebu: drop support for prerelease Armada 375 Z1 stepping
 * mvebu: extended suspend support, now works on Armada 370/XP
 * omap: hwmod related maintenance
 * omap: prcm cleanup
 * pxa: initial pxa27x DT handling
 * rockchip: SMP support for rk3288
 * rockchip: add cpu frequency scaling support
 * shmobile: r8a7740 power domain support
 * shmobile: various small restart, timer, pci apmu changes
 * sunxi: Allwinner A80 (sun9i) earlyprintk support
 * ux500: power domain support
 
 Overall, a significant chunk of changes, coming mostly from
 the usual suspects: omap, shmobile, samsung and mvebu, all of
 which already contain a lot of platform specific code in
 arch/arm.
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Merge tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC platform changes from Arnd Bergmann:
 "New and updated SoC support, notable changes include:

   - bcm:
        brcmstb SMP support
        initial iproc/cygnus support
   - exynos:
        Exynos4415 SoC support
        PMU and suspend support for Exynos5420
        PMU support for Exynos3250
        pm related maintenance
   - imx:
        new LS1021A SoC support
        vybrid 610 global timer support
   - integrator:
        convert to using multiplatform configuration
   - mediatek:
        earlyprintk support for mt8127/mt8135
   - meson:
        meson8 soc and l2 cache controller support
   - mvebu:
        Armada 38x CPU hotplug support
        drop support for prerelease Armada 375 Z1 stepping
        extended suspend support, now works on Armada 370/XP
   - omap:
        hwmod related maintenance
        prcm cleanup
   - pxa:
        initial pxa27x DT handling
   - rockchip:
        SMP support for rk3288
        add cpu frequency scaling support
   - shmobile:
        r8a7740 power domain support
        various small restart, timer, pci apmu changes
   - sunxi:
        Allwinner A80 (sun9i) earlyprintk support
   - ux500:
        power domain support

  Overall, a significant chunk of changes, coming mostly from the usual
  suspects: omap, shmobile, samsung and mvebu, all of which already
  contain a lot of platform specific code in arch/arm"

* tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (187 commits)
  ARM: mvebu: use the cpufreq-dt platform_data for independent clocks
  soc: integrator: Add terminating entry for integrator_cm_match
  ARM: mvebu: add SDRAM controller description for Armada XP
  ARM: mvebu: adjust mbus controller description on Armada 370/XP
  ARM: mvebu: add suspend/resume DT information for Armada XP GP
  ARM: mvebu: synchronize secondary CPU clocks on resume
  ARM: mvebu: make sure MMU is disabled in armada_370_xp_cpu_resume
  ARM: mvebu: Armada XP GP specific suspend/resume code
  ARM: mvebu: reserve the first 10 KB of each memory bank for suspend/resume
  ARM: mvebu: implement suspend/resume support for Armada XP
  clk: mvebu: add suspend/resume for gatable clocks
  bus: mvebu-mbus: provide a mechanism to save SDRAM window configuration
  bus: mvebu-mbus: suspend/resume support
  clocksource: time-armada-370-xp: add suspend/resume support
  irqchip: armada-370-xp: Add suspend/resume support
  ARM: add lolevel debug support for asm9260
  ARM: add mach-asm9260
  ARM: EXYNOS: use u8 for val[] in struct exynos_pmu_conf
  power: reset: imx-snvs-poweroff: add power off driver for i.mx6
  ARM: imx: temporarily remove CONFIG_SOC_FSL from LS1021A
  ...
 2014-12-09 14:38:28 -08:00
Linus Torvalds
0a9e0acddb ARM: SoC non-critical bug fixes for 3.19 
These are bug fixes for harmless problems that were not important
 enough to get fixed in 3.19. This contains updates to the MAINTAINERS
 file, in particular:
 
 - Ben Dooks stepped down as Samsung co-maintainer (thanks Ben for
   long years of maintaining this). Kukjin Kim, who has been
   doing the work de-facto by himself recently is now the
   only maintainer.
 - Liviu, Sudeep and Lorenzo from ARM now officially maintain the
   Versatile Express platform, which was orphaned (thanks for
 - Gregory Fong and Florian Fainelli help out on the Broadcom BCM7XXX
   platform
 - Ray Jui and Scott Branden are the future maintainers for the
   newly merged Broadcom Cygnus platform. Welcome!
 
 In terms of actual fixes, we have the usual set of OMAP bug fixes,
 which Tony Lindgren separates out well from the other OMAP changes,
 one really ep93xx regression fix against 3.11 that didn't make it for
 3.18, a few GIC changes from Marc Zyngier as a preparation for
 later rework (the current code is wrong in a harmless way), on
 Tegra regression and one samsung spelling fix.
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Merge tag 'fixes-nc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC non-critical bug fixes from Arnd Bergmann:
 "These are bug fixes for harmless problems that were not important
  enough to get fixed in 3.19.  This contains updates to the MAINTAINERS
  file, in particular:

   - Ben Dooks stepped down as Samsung co-maintainer (thanks Ben for
     long years of maintaining this).  Kukjin Kim, who has been doing
     the work de-facto by himself recently is now the only maintainer.

   - Liviu, Sudeep and Lorenzo from ARM now officially maintain the
     Versatile Express platform, which was orphaned (thanks for

   - Gregory Fong and Florian Fainelli help out on the Broadcom BCM7XXX
     platform

   - Ray Jui and Scott Branden are the future maintainers for the newly
     merged Broadcom Cygnus platform.  Welcome!

  In terms of actual fixes, we have the usual set of OMAP bug fixes,
  which Tony Lindgren separates out well from the other OMAP changes,
  one really ep93xx regression fix against 3.11 that didn't make it for
  3.18, a few GIC changes from Marc Zyngier as a preparation for later
  rework (the current code is wrong in a harmless way), on Tegra
  regression and one samsung spelling fix"

* tag 'fixes-nc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: imx6: fix bogus use of irq_get_irq_data
  ARM: imx: irq: fix buggy usage of irq_data irq field
  MAINTAINERS: ARM Versatile Express platform, add missing pattern
  MAINTAINERS: ARM Versatile Express platform
  arm: ep93xx: add dma_masks for the M2P and M2M DMA controllers
  MAINTAINERS: Add ahci_st.c to ARCH/STI architecture
  MAINTAINERS: add entry for the GISB arbiter driver
  MAINTAINERS: update brcmstb entries
  MAINTAINERS: update email address and cleanup for exynos entry
  ARM: tegra: Re-add removed SoC id macro to tegra_resume()
  MAINTAINERS: Entry for Cygnus/iproc arm architecture
  ARM: OMAP: serial: remove last vestige of DTR_gpio support.
  ARM: OMAP2+: gpmc: Get rid of "ti,elm-id not found" warning
  ARM: EXYNOS: fix typo in static struct name "exynos5_list_diable_wfi_wfe"
  ARM: OMAP2: Remove unnecessary KERN_* in omap_phy_internal.c
  ARM: OMAP4+: Remove unused omap_l3_noc platform init
  ARM: dts: Add twl keypad map for omap3 EVM
  ARM: dts: Add twl keypad map for LDP
  ARM: dts: Fix NAND last partition size on LDP
  ARM: OMAP3: Fix errors for omap_l3_smx when booted with device tree
 2014-12-09 14:14:47 -08:00
Rafael J. Wysocki
648fcab2b0 Merge branch 'pm-cpuidle' 
* pm-cpuidle:
  cpuidle: add MAINTAINERS entry for ARM Exynos cpuidle driver
  drivers: cpuidle: Remove cpuidle-arm64 duplicate error messages
  drivers: cpuidle: Add idle-state-name description to ARM idle states
  drivers: cpuidle: Add status property to ARM idle states
  cpuidle: Invert CPUIDLE_FLAG_TIME_VALID logic
 2014-12-08 20:00:09 +01:00
Marc Zyngier
9a343b9eb8 ARM: tegra: irq: fix buggy usage of irq_data irq field 
The crazy gic_arch_extn thing that Tegra uses contains multiple
references to the irq field in struct irq_data, and uses this
to directly poke hardware register.

But irq is the *virtual* irq number, something that has nothing
to do with the actual HW irq (stored in the hwirq field). And once
we put the stacked domain code in action, the whole thing explodes,
as these two values are *very* different:

root@bacon-fat:~# cat /proc/interrupts
            CPU0       CPU1
 16:      25801       2075       GIC  29  twd
 17:          0          0       GIC  73  timer0
112:          0          0      GPIO  58  c8000600.sdhci cd
123:          0          0      GPIO  69  c8000200.sdhci cd
279:       1126          0       GIC 122  serial
281:          0          0       GIC  70  7000c000.i2c
282:          0          0       GIC 116  7000c400.i2c
283:          0          0       GIC 124  7000c500.i2c
284:        300          0       GIC  85  7000d000.i2c
[...]

Just replacing all instances of irq with hwirq fixes the issue.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2014-11-27 14:01:55 +01:00
Thierry Reding
bd968d59ad ARM: tegra: Move AHB Kconfig to drivers/amba 
This will allow the Kconfig option to be shared among 32-bit and 64-bit
ARM.

Signed-off-by: Thierry Reding <treding@nvidia.com>
 2014-11-26 09:43:25 +01:00
Dmitry Osipenko
e4a680099a ARM: tegra: Re-add removed SoC id macro to tegra_resume() 
Commit d127e9c ("ARM: tegra: make tegra_resume can work with current and later
chips") removed tegra_get_soc_id macro leaving used cpu register corrupted after
branching to v7_invalidate_l1() and as result causing execution of unintended
code on tegra20. Possibly it was expected that r6 would be SoC id func argument
since common cpu reset handler is setting r6 before branching to tegra_resume(),
but neither tegra20_lp1_reset() nor tegra30_lp1_reset() aren't setting r6
register before jumping to resume function. Fix it by re-adding macro.

Fixes: d127e9c (ARM: tegra: make tegra_resume can work with current and later chips)
Cc: <stable@vger.kernel.org> # v3.13+
Reviewed-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
 2014-11-17 11:43:21 +01:00
Daniel Lezcano
b82b6cca48 cpuidle: Invert CPUIDLE_FLAG_TIME_VALID logic 
The only place where the time is invalid is when the ACPI_CSTATE_FFH entry
method is not set. Otherwise for all the drivers, the time can be correctly
measured.

Instead of duplicating the CPUIDLE_FLAG_TIME_VALID flag in all the drivers
for all the states, just invert the logic by replacing it by the flag
CPUIDLE_FLAG_TIME_INVALID, hence we can set this flag only for the acpi idle
driver, remove the former flag from all the drivers and invert the logic with
this flag in the different governor.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
 2014-11-12 21:17:27 +01:00
Bartlomiej Zolnierkiewicz
0b7778a801 ARM: firmware: add AFTR mode support to firmware do_idle method 
On some platforms (i.e. EXYNOS ones) more than one idle mode is
available and we need to distinguish them in firmware do_idle method.

Add mode parameter to do_idle firmware method and AFTR mode support
to EXYNOS do_idle implementation.

This change is a preparation for adding secure firmware support to
EXYNOS cpuidle driver.

This patch shouldn't cause any functionality changes.

Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
 2014-10-21 00:06:35 +09:00
Thierry Reding
783944feaa ARM: tegra: Initialize flow controller from DT 
Use a matching device tree node to initialize the flow controller driver
instead of hard-coding the I/O address. This is necessary to get rid of
the iomap.h include, which in turn make it easier to share this code
with 64-bit Tegra SoCs.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
 2014-08-26 11:43:55 -06:00
Linus Torvalds
06b49ea43c This is the bulk of GPIO changes for the v3.17 development 
cycle, and this time we got a lot of action going on and
 it will continue:
 
 - The core GPIO library implementation has been split up in
   three different files:
   - gpiolib.c for the latest and greatest and shiny GPIO
     library code using GPIO descriptors only
   - gpiolib-legacy.c for the old integer number space API
     that we are phasing out gradually
   - gpiolib-sysfs.c for the sysfs interface that we are
     not entirely happy with, but has to live on for
     ABI compatibility
 
 - Add a flags argument to *gpiod_get* functions, with some
   backward-compatibility macros to ease transitions. We
   should have had the flags there from the beginning it
   seems, now we need to clean up the mess. There is a plan
   on how to move forward here devised by Alexandre Courbot
   and Mark Brown.
 
 - Split off a special <linux/gpio/machine.h> header for the
   board gpio table registration, as per example from the
   regulator subsystem.
 
 - Start to kill off the return value from gpiochip_remove()
   by removing the __must_check attribute and removing all
   checks inside the drivers/gpio directory. The rationale
   is: well what were we supposed to do if there is an error
   code? Not much: print an error message. And gpiolib already
   does that. So make this function return void eventually.
 
 - Some cleanups of hairy gpiolib code, make some functions
   not to be used outside the library private and make sure
   they are not exported, remove gpiod_lock/unlock_as_irq()
   as the existing function is for driver-internal use and
   fine as it is, delete gpio_ensure_requested() as it is
   not meaningful anymore.
 
 - Support the GPIOF_ACTIVE_LOW flag from gpio_request_one()
   function calls, which is logical since this is already
   supported when referencing GPIOs from e.g. device trees.
 
 - Switch STMPE, intel-mid, lynxpoint and ACPI (!) to use
   the gpiolib irqchip helpers cutting down on GPIO irqchip
   boilerplate a bit more.
 
 - New driver for the Zynq GPIO block.
 
 - The usual incremental improvements around a bunch of
   drivers.
 
 - Janitorial syntactic and semantic cleanups by Jingoo Han,
   and Rickard Strandqvist especially.
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Merge tag 'gpio-v3.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio

Pull GPIO update from Linus Walleij:
 "This is the bulk of GPIO changes for the v3.17 development cycle, and
  this time we got a lot of action going on and it will continue:

   - The core GPIO library implementation has been split up in three
     different files:
     - gpiolib.c for the latest and greatest and shiny GPIO library code
       using GPIO descriptors only
     - gpiolib-legacy.c for the old integer number space API that we are
       phasing out gradually
     - gpiolib-sysfs.c for the sysfs interface that we are not entirely
       happy with, but has to live on for ABI compatibility

   - Add a flags argument to *gpiod_get* functions, with some
     backward-compatibility macros to ease transitions.  We should have
     had the flags there from the beginning it seems, now we need to
     clean up the mess.  There is a plan on how to move forward here
     devised by Alexandre Courbot and Mark Brown

   - Split off a special <linux/gpio/machine.h> header for the board
     gpio table registration, as per example from the regulator
     subsystem

   - Start to kill off the return value from gpiochip_remove() by
     removing the __must_check attribute and removing all checks inside
     the drivers/gpio directory.  The rationale is: well what were we
     supposed to do if there is an error code? Not much: print an error
     message.  And gpiolib already does that.  So make this function
     return void eventually

   - Some cleanups of hairy gpiolib code, make some functions not to be
     used outside the library private and make sure they are not
     exported, remove gpiod_lock/unlock_as_irq() as the existing
     function is for driver-internal use and fine as it is, delete
     gpio_ensure_requested() as it is not meaningful anymore

   - Support the GPIOF_ACTIVE_LOW flag from gpio_request_one() function
     calls, which is logical since this is already supported when
     referencing GPIOs from e.g. device trees

   - Switch STMPE, intel-mid, lynxpoint and ACPI (!) to use the gpiolib
     irqchip helpers cutting down on GPIO irqchip boilerplate a bit more

   - New driver for the Zynq GPIO block

   - The usual incremental improvements around a bunch of drivers

   - Janitorial syntactic and semantic cleanups by Jingoo Han, and
     Rickard Strandqvist especially"

* tag 'gpio-v3.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (37 commits)
  MAINTAINERS: update GPIO include files
  gpio: add missing includes in machine.h
  gpio: add flags argument to gpiod_get*() functions
  MAINTAINERS: Update Samsung pin control entry
  gpio / ACPI: Move event handling registration to gpiolib irqchip helpers
  gpio: lynxpoint: Convert to use gpiolib irqchip
  gpio: split gpiod board registration into machine header
  gpio: remove gpio_ensure_requested()
  gpio: remove useless check in gpiolib_sysfs_init()
  gpiolib: Export gpiochip_request_own_desc and gpiochip_free_own_desc
  gpio: move gpio_ensure_requested() into legacy C file
  gpio: remove gpiod_lock/unlock_as_irq()
  gpio: make gpiochip_get_desc() gpiolib-private
  gpio: simplify gpiochip_export()
  gpio: remove export of private of_get_named_gpio_flags()
  gpio: Add support for GPIOF_ACTIVE_LOW to gpio_request_one functions
  gpio: zynq: Clear pending interrupt when enabling a IRQ
  gpio: drop retval check enforcing from gpiochip_remove()
  gpio: remove all usage of gpio_remove retval in driver/gpio
  devicetree: Add Zynq GPIO devicetree bindings documentation
  ...
 2014-08-08 18:00:35 -07:00
Linus Torvalds
44c916d58b ARM: SoC cleanups for 3.17 
This merge window brings a good size of cleanups on various
 platforms. Among the bigger ones:
 
 * Removal of Samsung s5pc100 and s5p64xx platforms. Both of these have
   lacked active support for quite a while, and after asking around nobody
   showed interest in keeping them around. If needed, they could be
   resurrected in the future but it's more likely that we would prefer
   reintroduction of them as DT and multiplatform-enabled platforms
   instead.
 * OMAP4 controller code register define diet. They defined a lot of registers
   that were never actually used, etc.
 * Move of some of the Tegra platform code (PMC, APBIO, fuse, powergate)
   to drivers/soc so it can be shared with 64-bit code. This also converts them
   over to traditional driver models where possible.
 * Removal of legacy gpio-samsung driver, since the last users have been
   removed (moved to pinctrl)
 
 Plus a bunch of smaller changes for various platforms that sort of
 dissapear in the diffstat for the above. clps711x cleanups, shmobile
 header file refactoring/moves for multiplatform friendliness, some misc
 cleanups, etc.
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Merge tag 'cleanup-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC cleanups from Olof Johansson:
 "This merge window brings a good size of cleanups on various platforms.
  Among the bigger ones:

   - Removal of Samsung s5pc100 and s5p64xx platforms.  Both of these
     have lacked active support for quite a while, and after asking
     around nobody showed interest in keeping them around.  If needed,
     they could be resurrected in the future but it's more likely that
     we would prefer reintroduction of them as DT and
     multiplatform-enabled platforms instead.

   - OMAP4 controller code register define diet.  They defined a lot of
     registers that were never actually used, etc.

   - Move of some of the Tegra platform code (PMC, APBIO, fuse,
     powergate) to drivers/soc so it can be shared with 64-bit code.
     This also converts them over to traditional driver models where
     possible.

   - Removal of legacy gpio-samsung driver, since the last users have
     been removed (moved to pinctrl)

  Plus a bunch of smaller changes for various platforms that sort of
  dissapear in the diffstat for the above.  clps711x cleanups, shmobile
  header file refactoring/moves for multiplatform friendliness, some
  misc cleanups, etc"

* tag 'cleanup-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (117 commits)
  drivers: CCI: Correct use of ! and &
  video: clcd-versatile: Depend on ARM
  video: fix up versatile CLCD helper move
  MAINTAINERS: Add sdhci-st file to ARCH/STI architecture
  ARM: EXYNOS: Fix build breakge with PM_SLEEP=n
  MAINTAINERS: Remove Kirkwood
  ARM: tegra: Convert PMC to a driver
  soc/tegra: fuse: Set up in early initcall
  ARM: tegra: Always lock the CPU reset vector
  ARM: tegra: Setup CPU hotplug in a pure initcall
  soc/tegra: Implement runtime check for Tegra SoCs
  soc/tegra: fuse: fix dummy functions
  soc/tegra: fuse: move APB DMA into Tegra20 fuse driver
  soc/tegra: Add efuse and apbmisc bindings
  soc/tegra: Add efuse driver for Tegra
  ARM: tegra: move fuse exports to soc/tegra/fuse.h
  ARM: tegra: export apb dma readl/writel
  ARM: tegra: Use a function to get the chip ID
  ARM: tegra: Sort includes alphabetically
  ARM: tegra: Move includes to include/soc/tegra
  ...
 2014-08-08 11:00:26 -07:00
Linus Walleij
0a6d315827 gpio: split gpiod board registration into machine header 
As per example from the regulator subsystem: put all defines and
functions related to registering board info for GPIO descriptors
into a separate <linux/gpio/machine.h> header.

Cc: Andrew Victor <linux@maxim.org.za>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Alexandre Courbot <gnurou@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 2014-07-28 12:23:35 +02:00
Olof Johansson
c6b659c005 ARM: tegra: core code changes for 3.17 
Some of the code that's currently called from the Tegra machine setup
 code is moved to regular initcalls. To catch dependency violations, the
 various code paths now WARN if they're called to early. Not all of the
 potential candidates are converted yet, but those that were have been
 verified to work across all supported Tegra generations.
 
 A new function, soc_is_tegra(), is also provided to make sure that the
 initcalls can abort early if they aren't run on Tegra, which can happen
 for multi-platform builds.
 
 Finally this also moves out the PMC driver to drivers/soc/tegra so that
 it can be shared with 64-bit ARM.
 
 This is based on the for-3.17/fuse-move branch. The split is somewhat
 arbitrary but allows the dependents of the for-3.17/fuse-move to pull
 in as little code as necessary.
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Merge tag 'tegra-for-3.17-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/cleanup

Merge "ARM: tegra: core code changes for 3.17" from Thierry Reding:

Some of the code that's currently called from the Tegra machine setup
code is moved to regular initcalls. To catch dependency violations, the
various code paths now WARN if they're called to early. Not all of the
potential candidates are converted yet, but those that were have been
verified to work across all supported Tegra generations.

A new function, soc_is_tegra(), is also provided to make sure that the
initcalls can abort early if they aren't run on Tegra, which can happen
for multi-platform builds.

Finally this also moves out the PMC driver to drivers/soc/tegra so that
it can be shared with 64-bit ARM.

This is based on the for-3.17/fuse-move branch. The split is somewhat
arbitrary but allows the dependents of the for-3.17/fuse-move to pull
in as little code as necessary.

* tag 'tegra-for-3.17-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  ARM: tegra: Convert PMC to a driver
  soc/tegra: fuse: Set up in early initcall
  ARM: tegra: Always lock the CPU reset vector
  ARM: tegra: Setup CPU hotplug in a pure initcall
  soc/tegra: Implement runtime check for Tegra SoCs

Signed-off-by: Olof Johansson <olof@lixom.net>
 2014-07-19 12:31:22 -07:00
Olof Johansson
23e892929e ARM: tegra: move fuse code out of arch/arm 
This branch moves code related to the Tegra fuses out of arch/arm and
 into a centralized location which could be shared with ARM64. It also
 adds support for reading the fuse data through sysfs.
 
 Included is also some preparatory work that moves Tegra-related header
 files from include/linux to include/soc/tegra as suggested by Arnd.
 
 Furthermore the Tegra chip ID is now retrieved using a function rather
 than a variable so that sanity checks can be done. This is convenient
 in subsequent patches that will move some of the code that's currently
 called from Tegra machine setup into regular initcalls so that it can
 be reused on 64-bit ARM. The sanity checks help with verifying that no
 code tries to obtain the Tegra chip ID before the underlying driver is
 properly initialized.
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Merge tag 'tegra-for-3.17-fuse-move' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/cleanup

Merge "ARM: tegra: move fuse code out of arch/arm" from Thierry Reding:

This branch moves code related to the Tegra fuses out of arch/arm and
into a centralized location which could be shared with ARM64. It also
adds support for reading the fuse data through sysfs.

Included is also some preparatory work that moves Tegra-related header
files from include/linux to include/soc/tegra as suggested by Arnd.

Furthermore the Tegra chip ID is now retrieved using a function rather
than a variable so that sanity checks can be done. This is convenient
in subsequent patches that will move some of the code that's currently
called from Tegra machine setup into regular initcalls so that it can
be reused on 64-bit ARM. The sanity checks help with verifying that no
code tries to obtain the Tegra chip ID before the underlying driver is
properly initialized.

* tag 'tegra-for-3.17-fuse-move' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  soc/tegra: fuse: fix dummy functions
  soc/tegra: fuse: move APB DMA into Tegra20 fuse driver
  soc/tegra: Add efuse and apbmisc bindings
  soc/tegra: Add efuse driver for Tegra
  ARM: tegra: move fuse exports to soc/tegra/fuse.h
  ARM: tegra: export apb dma readl/writel
  ARM: tegra: Use a function to get the chip ID
  ARM: tegra: Sort includes alphabetically
  ARM: tegra: Move includes to include/soc/tegra

Signed-off-by: Olof Johansson <olof@lixom.net>
 2014-07-19 12:29:11 -07:00
Russell King
6ebbf2ce43 ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+ 
ARMv6 and greater introduced a new instruction ("bx") which can be used
to return from function calls.  Recent CPUs perform better when the
"bx lr" instruction is used rather than the "mov pc, lr" instruction,
and this sequence is strongly recommended to be used by the ARM
architecture manual (section A.4.1.1).

We provide a new macro "ret" with all its variants for the condition
code which will resolve to the appropriate instruction.

Rather than doing this piecemeal, and miss some instances, change all
the "mov pc" instances to use the new macro, with the exception of
the "movs" instruction and the kprobes code.  This allows us to detect
the "mov pc, lr" case and fix it up - and also gives us the possibility
of deploying this for other registers depending on the CPU selection.

Reported-by: Will Deacon <will.deacon@arm.com>
Tested-by: Stephen Warren <swarren@nvidia.com> # Tegra Jetson TK1
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr> # mioa701_bootresume.S
Tested-by: Andrew Lunn <andrew@lunn.ch> # Kirkwood
Tested-by: Shawn Guo <shawn.guo@freescale.com>
Tested-by: Tony Lindgren <tony@atomide.com> # OMAPs
Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> # Armada XP, 375, 385
Acked-by: Sekhar Nori <nsekhar@ti.com> # DaVinci
Acked-by: Christoffer Dall <christoffer.dall@linaro.org> # kvm/hyp
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com> # PXA3xx
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> # Xen
Tested-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> # ARMv7M
Tested-by: Simon Horman <horms+renesas@verge.net.au> # Shmobile
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
 2014-07-18 12:29:04 +01:00
Thierry Reding
7232398abc ARM: tegra: Convert PMC to a driver 
This commit converts the PMC support code to a platform driver. Because
the boot process needs to call into this driver very early, also set up
a minimal environment via an early initcall.

Signed-off-by: Thierry Reding <treding@nvidia.com>
 2014-07-17 14:58:43 +02:00
Thierry Reding
24fa5af810 soc/tegra: fuse: Set up in early initcall 
Rather than rely on explicit initialization order called from SoC setup
code, use a plain initcall and rely on initcall ordering to take care of
dependencies.

This driver exposes some functionality (querying the chip ID) needed at
very early stages of the boot process. An early initcall is good enough
provided that some of the dependencies are deferred to later stages. To
make sure any abuses are easily caught, output a warning message if the
chip ID is queried while it can't be read yet.

Signed-off-by: Thierry Reding <treding@nvidia.com>
 2014-07-17 14:58:42 +02:00
Thierry Reding
c090e11163 ARM: tegra: Always lock the CPU reset vector 
Currently the reset vector is not locked on Tegra20 because the hardware
doesn't support it. However in order not to depend on the chip ID, which
becomes available only later in the boot process, we set the bit anyway.

Signed-off-by: Thierry Reding <treding@nvidia.com>
 2014-07-17 14:58:42 +02:00
Thierry Reding
05ccf19602 ARM: tegra: Setup CPU hotplug in a pure initcall 
CPU hotplug support doesn't have to be set up until fairly late in the
boot process, so it can be done in a regular initcall. To make sure that
we don't miss any ordering problems in the future, output a warning if
any of the functions are called before initialization has completed.

This is part of untangling the boot order dependencies on Tegra so that
more code can be shared between 32-bit and 64-bit ARM.

Signed-off-by: Thierry Reding <treding@nvidia.com>
 2014-07-17 14:58:41 +02:00
Peter De Schrijver
0d827a4343 soc/tegra: fuse: move APB DMA into Tegra20 fuse driver 
The Tegra20 fuse driver is the only user of tegra_apb_readl_using_dma().
Therefore we can simply the code by incorporating the APB DMA handling into
the driver directly. tegra_apb_writel_using_dma() is dropped because there
are no users.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
 2014-07-17 14:37:12 +02:00
Peter De Schrijver
783c8f4c84 soc/tegra: Add efuse driver for Tegra 
Implement fuse driver for Tegra20, Tegra30, Tegra114 and Tegra124. This
replaces functionality previously provided in arch/arm/mach-tegra, which
is removed in this patch.

While at it, move the only user of the global tegra_revision variable
over to tegra_sku_info.revision and export tegra_fuse_readl() to allow
drivers to read calibration fuses.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
 2014-07-17 14:36:01 +02:00
Peter De Schrijver
35874f3617 ARM: tegra: move fuse exports to soc/tegra/fuse.h 
All fuse related functionality will move to a driver in the following
patches. To prepare for this, export all the required functionality in a
global header file and move all users of fuse.h to soc/tegra/fuse.h.

While we're at it, remove tegra_bct_strapping, as its only user was
removed in Commit a7cbe92cef ("ARM: tegra: remove tegra EMC scaling
driver").

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
 2014-07-17 14:32:51 +02:00
Peter De Schrijver
3f394f8064 ARM: tegra: export apb dma readl/writel 
Export APB DMA readl and writel. These are needed because we can't
access the fuses directly on Tegra20 without potentially causing a
system hang. Also have the APB DMA readl and writel return an error in
case of a read failure instead of just returning zero or ignore write
failures.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
 2014-07-17 13:36:44 +02:00
Thierry Reding
304664eab9 ARM: tegra: Use a function to get the chip ID 
Instead of using a simple variable access to get at the Tegra chip ID,
use a function so that we can run additional code. This can be used to
determine where the chip ID is being accessed without being available.
That in turn will be handy for resolving boot sequence dependencies in
order to convert more code to regular initcalls rather than a sequence
fixed by Tegra SoC setup code.

Signed-off-by: Thierry Reding <treding@nvidia.com>
 2014-07-17 13:36:41 +02:00
Thierry Reding
a0524acc94 ARM: tegra: Sort includes alphabetically 
If these aren't sorted alphabetically, then the logical choice is to
append new ones, however that creates a lot of potential for conflicts
because every change will then add new includes in the same location.

Signed-off-by: Thierry Reding <treding@nvidia.com>
 2014-07-17 13:29:57 +02:00
Thierry Reding
306a7f9139 ARM: tegra: Move includes to include/soc/tegra 
In order to not clutter the include/linux directory with SoC specific
headers, move the Tegra-specific headers out into a separate directory.

Signed-off-by: Thierry Reding <treding@nvidia.com>
 2014-07-17 13:26:47 +02:00
Linus Torvalds
58c72f94ef ARM: SoC fixes for 3.16 
A first set of bug fixes that didn't make it for the merge window, and
 two Kconfig cleanups that still make sense at this point. Unfortunately,
 one of the two cleanups caused an unintended change in the original
 version, so we had to revert one part of it and do some more testing
 to ensure the rest is really fine. There was also a last-minute
 rebase of the patches to remove another bad commit.
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Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Arnd Bergmann:
 "A first set of bug fixes that didn't make it for the merge window, and
  two Kconfig cleanups that still make sense at this point.

  Unfortunately, one of the two cleanups caused an unintended change in
  the original version, so we had to revert one part of it and do some
  more testing to ensure the rest is really fine.  There was also a
  last-minute rebase of the patches to remove another bad commit"

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: use menuconfig for sub-arch menus
  ARM: multi_v7_defconfig: re-enable SDHCI drivers
  ARM: EXYNOS: Fix compilation warning
  ARM: exynos: move sysram info to exynos.c
  ARM: dts: Specify the NAND ECC scheme explicitly on Armada 385 DB board
  ARM: dts: Specify the NAND ECC scheme explicitly on Armada 375 DB board
  ARM: exynos: cleanup kconfig option display
  misc: vexpress: fix error handling vexpress_syscfg_regmap_init()
  ARM: Remove ARCH_HAS_CPUFREQ config option
  ARM: integrator: fix section mismatch problem
  ARM: mvebu: DT: fix OpenBlocks AX3-4 RAM size
  ARM: samsung: make SAMSUNG_DMADEV optional
  remoteproc: da8xx: don't select CMA on no-MMU
  bus/arm-cci: add dependency on OF && CPU_V7
  ARM: keystone requires ARM_PATCH_PHYS_VIRT
  ARM: omap2: fix am43xx dependency on l2x0 cache
 2014-06-19 17:53:20 -10:00