Commit Graph

4185 Commits

Author SHA1 Message Date
Peter Ujfalusi
e3b9fef8dd dmaengine: ti: edma: Remove 'Assignment in if condition'
While the compiler does not have problem with how it is implemented,
checkpatch does give en ERROR for this arrangement.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Link: https://lore.kernel.org/r/20190730132006.2790-1-peter.ujfalusi@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-09-04 10:06:15 +05:30
Andy Shevchenko
f5e84eae79 dmaengine: dw: platform: Split OF helpers to separate module
For better maintenance split OF helpers to the separate module.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20190820131546.75744-11-andriy.shevchenko@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-08-21 09:41:28 +05:30
Andy Shevchenko
b685fe26e9 dmaengine: dw: platform: Split ACPI helpers to separate module
For better maintenance split ACPI helpers to the separate module.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20190820131546.75744-10-andriy.shevchenko@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-08-21 09:41:28 +05:30
Andy Shevchenko
84da042e70 dmaengine: dw: platform: Move handle check to dw_dma_acpi_controller_register()
Move ACPI handle check to the dw_dma_acpi_controller_register().

While here, convert it to has_acpi_companion() which is recommended way.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20190820131546.75744-9-andriy.shevchenko@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-08-21 09:41:28 +05:30
Andy Shevchenko
e7b8514e4d dmaengine: dw: platform: Switch to acpi_dma_controller_register()
There is a possibility to have registered ACPI DMA controller
while it has been gone already.

To avoid the potential crash, move to non-managed
acpi_dma_controller_register().

Fixes: 42c91ee71d ("dw_dmac: add ACPI support")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20190820131546.75744-8-andriy.shevchenko@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-08-21 09:41:28 +05:30
Andy Shevchenko
a9c56721d6 dmaengine: dw: platform: Use devm_platform_ioremap_resource()
Use the new helper that wraps the calls to platform_get_resource()
and devm_ioremap_resource() together.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20190820131546.75744-7-andriy.shevchenko@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-08-21 09:41:28 +05:30
Andy Shevchenko
f8d9ddbc28 dmaengine: dw: platform: Enable iDMA 32-bit on Intel Elkhart Lake
Intel® PSE (Programmable Services Engine) provides few DMA controllers
to the host on Intel Elkhart Lake. Enable them in the ACPI glue driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20190820131546.75744-6-andriy.shevchenko@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-08-21 09:41:27 +05:30
Andy Shevchenko
b3757413b9 dmaengine: dw: platform: Use struct dw_dma_chip_pdata
Now, when we have a generic structure for the chip and platform data,
use it in the platform glue driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20190820131546.75744-5-andriy.shevchenko@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-08-21 09:41:27 +05:30
Andy Shevchenko
ae923c91aa dmaengine: dw: Export struct dw_dma_chip_pdata for wider use
We are expecting some devices can be enumerated either as PCI or ACPI.
Nevertheless, they will share same information, thus, provide a generic
struct dw_dma_chip_pdata for all glue drivers.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20190820131546.75744-4-andriy.shevchenko@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-08-21 09:41:27 +05:30
Andy Shevchenko
4b8584bac0 dmaengine: acpi: Add kernel doc parameter descriptions
Kernel documentation script is not happy about absence of function parameter
descriptions:

drivers/dma/acpi-dma.c:163: warning: Function parameter or member 'data' not described in 'acpi_dma_controller_register'
drivers/dma/acpi-dma.c:247: warning: Function parameter or member 'data' not described in 'devm_acpi_dma_controller_register'
drivers/dma/acpi-dma.c:274: warning: Function parameter or member 'dev' not described in 'devm_acpi_dma_controller_free'

Append the descriptions of above mentioned function parameters.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20190820131546.75744-3-andriy.shevchenko@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-08-21 09:41:27 +05:30
Andy Shevchenko
a6bc332373 dmaengine: acpi: Set up DMA mask based on CSRT
CSRT has an information about address width, which is supported by
the certain DMA controller.

Use information from CSRT to set up DMA mask for shared controller.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20190820131546.75744-2-andriy.shevchenko@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-08-21 09:41:27 +05:30
Mao Wenan
d071fd294f dmaengine: change alignment of mux_configure32 and fsl_edma_chan_mux
The alignment of mux_configure32() and fsl_edma_chan_mux() need
to be adjusted, it must start precisely at the first column after
the openning parenthesis of the first line.

Fixes: 9d831528a6 ("dmaengine: fsl-edma: extract common fsl-edma code (no changes in behavior intended)")
Signed-off-by: Mao Wenan <maowenan@huawei.com>
Link: https://lore.kernel.org/r/20190814072105.144107-3-maowenan@huawei.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-08-20 17:09:34 +05:30
Mao Wenan
4f48e29f76 dmaengine: make mux_configure32 static
There is one sparse warning in drivers/dma/fsl-edma-common.c:
drivers/dma/fsl-edma-common.c:93:6: warning: symbol 'mux_configure32'
was not declared. Should it be static?

Fix it by setting mux_configure32() as static.

Fixes: 232a7f18cf ("dmaengine: fsl-edma: add i.mx7ulp edma2 version support")
Signed-off-by: Mao Wenan <maowenan@huawei.com>
Link: https://lore.kernel.org/r/20190814072105.144107-2-maowenan@huawei.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-08-20 17:09:34 +05:30
Nathan Huckleberry
698f7a9be9 dmaengine: mv_xor_v2: Fix -Wshift-negative-value
Clang produces the following warning

drivers/dma/mv_xor_v2.c:264:40: warning: shifting a negative signed value
	is undefined [-Wshift-negative-value]
        reg &= (~MV_XOR_V2_DMA_IMSG_THRD_MASK <<
	MV_XOR_V2_DMA_IMSG_THRD_SHIFT);
                ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ^
drivers/dma/mv_xor_v2.c:271:46: warning: shifting a negative signed value
	is undefined [-Wshift-negative-value]
        reg &= (~MV_XOR_V2_DMA_IMSG_TIMER_THRD_MASK <<
                ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ^

Upon further investigation MV_XOR_V2_DMA_IMSG_THRD_SHIFT and
MV_XOR_V2_DMA_IMSG_TIMER_THRD_SHIFT are both 0. Since shifting by 0 does
nothing, these variables can be removed.

Cc: clang-built-linux@googlegroups.com
Link: https://github.com/ClangBuiltLinux/linux/issues/521
Signed-off-by: Nathan Huckleberry <nhuck@google.com>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Link: https://lore.kernel.org/r/20190813173448.109859-1-nhuck@google.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-08-20 17:06:36 +05:30
Jarkko Nikula
b48b8bc45a dmaengine: dw: Update Intel Elkhart Lake Service Engine acronym
Intel Elkhart Lake Offload Service Engine (OSE) will be called as
Intel(R) Programmable Services Engine (Intel(R) PSE) in documentation.

Update the comment here accordingly.

Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Link: https://lore.kernel.org/r/20190813080602.15376-1-jarkko.nikula@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-08-20 16:39:18 +05:30
Gustavo A. R. Silva
7607a121f4 dmaengine: fsldma: Mark expected switch fall-through
Mark switch cases where we are expecting to fall through.

Fix the following warning (Building: powerpc-ppa8548_defconfig powerpc):

drivers/dma/fsldma.c: In function ‘fsl_dma_chan_probe’:
drivers/dma/fsldma.c:1165:26: warning: this statement may fall through [-Wimplicit-fallthrough=]
   chan->toggle_ext_pause = fsl_chan_toggle_ext_pause;
   ~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/dma/fsldma.c:1166:2: note: here
  case FSL_DMA_IP_83XX:
  ^~~~

Reported-by: kbuild test robot <lkp@intel.com>
Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Acked-by: Li Yang <leoyang.li@nxp.com>
Link: https://lore.kernel.org/r/20190812002159.GA26899@embeddedor
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-08-13 10:07:53 +05:30
Arnd Bergmann
069e4a19f4 dmaengine: ti: unexport filter functions
The two filter functions are now marked static, but still exported,
which triggers a coming build-time check:

WARNING: "omap_dma_filter_fn" [vmlinux] is a static EXPORT_SYMBOL_GPL
WARNING: "edma_filter_fn" [vmlinux] is a static EXPORT_SYMBOL

Remove the unneeded exports as well, as originally intended.

Fixes: 9c71b9eb3c ("dmaengine: omap-dma: make omap_dma_filter_fn private")
Fixes: d2bfe7b5d1 ("dmaengine: edma: make edma_filter_fn private")
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20190812101155.997721-1-arnd@arndb.de
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-08-13 10:06:04 +05:30
Andrey Smirnov
ba1cab79cf dmaengine: fsl-edma: implement .device_synchronize callback
Implement .device_synchronize callback in order to be able to use
dmaengine_terminate_sync() and other primitives relying on said
callback.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Stefan Agner <stefan@agner.ch>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Vinod Koul <vkoul@kernel.org>
Cc: linux-imx@nxp.com
Cc: dmaengine@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Link: https://lore.kernel.org/r/20190731173659.14778-1-andrew.smirnov@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-08-08 19:01:58 +05:30
Fuqian Huang
d1b622f68d dmaengine: pl330: use the same attributes when freeing pl330->mcode_cpu
In function dmac_alloc_resources(), pl330->mcode_cpu is allocated using
dma_alloc_attrs() but freed with dma_free_coherent().
Use the correct dma_free_attrs() function to free pl330->mcode_cpu.

Signed-off-by: Fuqian Huang <huangfq.daxian@gmail.com>
Link: https://lore.kernel.org/r/20190726105947.25342-1-huangfq.daxian@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-08-08 18:49:43 +05:30
Nishka Dasgupta
057b05d5ac dmaengine: qcom: hidma_mgmt: Add of_node_put() before goto
Each iteration of for_each_available_child_of_node puts the previous
node, but in the case of a goto from the middle of the loop, there is
no put, thus causing a memory leak.
Hence add an of_node_put under the label that the gotos point to.
In order to avoid decrementing an already-decremented refcount, copy the
original contents of the label (including the return statement) to just
above the label, so that the code under the label is executed only when
a goto exit from the loop occurs.
Additionally, remove an unnecessary get/put pair from the loop, as the
loop itself already keeps track of refcount.
Issue found with Coccinelle.

Signed-off-by: Nishka Dasgupta <nishkadg.linux@gmail.com>
Acked-by: Sinan Kaya <okaya@kernel.org>
Link: https://lore.kernel.org/r/20190724081609.9724-1-nishkadg.linux@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-08-08 17:56:50 +05:30
Robin Gong
232a7f18cf dmaengine: fsl-edma: add i.mx7ulp edma2 version support
Add edma2 for i.mx7ulp by version v3, since v2 has already
been used by mcf-edma.
The big changes based on v1 are belows:
1. only one dmamux.
2. another clock dma_clk except dmamux clk.
3. 16 independent interrupts instead of only one interrupt for
all channels.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Link: https://lore.kernel.org/r/1563952834-7731-1-git-send-email-yibin.gong@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-08-08 17:54:36 +05:30
Fuqian Huang
719e25dba4 dmaengine: qcom_hidma: Remove call to memset after dmam_alloc_coherent
In commit 518a2f1925
("dma-mapping: zero memory returned from dma_alloc_*"),
dma_alloc_coherent has already zeroed the memory.
So memset is not needed.

Signed-off-by: Fuqian Huang <huangfq.daxian@gmail.com>
Acked-by: Sinan Kaya <okaya@kernel.org>
Link: https://lore.kernel.org/r/20190715031723.6375-1-huangfq.daxian@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-08-08 17:51:56 +05:30
Fuqian Huang
9603a7ab60 dmaengine: imx-sdma: Remove call to memset after dma_alloc_coherent
In commit 518a2f1925
("dma-mapping: zero memory returned from dma_alloc_*"),
dma_alloc_coherent has already zeroed the memory.
So memset is not needed.

Signed-off-by: Fuqian Huang <huangfq.daxian@gmail.com>
Link: https://lore.kernel.org/r/20190715031716.6328-1-huangfq.daxian@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-08-08 17:51:43 +05:30
Stephen Boyd
e17be6e1b7 dmaengine: Remove dev_err() usage after platform_get_irq()
We don't need dev_err() messages when platform_get_irq() fails now that
platform_get_irq() prints an error message itself when something goes
wrong. Let's remove these prints with a simple semantic patch.

// <smpl>
@@
expression ret;
struct platform_device *E;
@@

ret =
(
platform_get_irq(E, ...)
|
platform_get_irq_byname(E, ...)
);

if ( \( ret < 0 \| ret <= 0 \) )
{
(
-if (ret != -EPROBE_DEFER)
-{ ...
-dev_err(...);
-... }
|
...
-dev_err(...);
)
...
}
// </smpl>

While we're here, remove braces on if statements that only have one
statement (manually).

Cc: Vinod Koul <vkoul@kernel.org>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: dmaengine@vger.kernel.org
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20190730181557.90391-11-swboyd@chromium.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-07-31 20:50:53 +05:30
Gustavo A. R. Silva
7f5d742574 dmaengine: imx-dma: Mark expected switch fall-through
Mark switch cases where we are expecting to fall through.

This patch fixes the following warning (Building: arm):

drivers/dma/imx-dma.c: In function ‘imxdma_xfer_desc’:
drivers/dma/imx-dma.c:542:6: warning: this statement may fall through [-Wimplicit-fallthrough=]
   if (slot == IMX_DMA_2D_SLOT_A) {
      ^
drivers/dma/imx-dma.c:559:2: note: here
  case IMXDMA_DESC_MEMCPY:
  ^~~~

Notice that, in this particular case, the code comment is
modified in accordance with what GCC is expecting to find.

Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Link: https://lore.kernel.org/r/20190729225221.GA24269@embeddedor
Reviewed-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-07-31 20:49:04 +05:30
Jonathan Hunter
a9afc9ea93 dmaengine: tegra210-adma: Don't program FIFO threshold
The Tegra210 ADMA supports two modes for transferring data to a FIFO
which are ...

1. Transfer data to/from the FIFO as soon as a single burst can be
   transferred.
2. Transfer data to/from the FIFO based upon FIFO thresholds, where
   the FIFO threshold is specified in terms on multiple bursts.

Currently, the ADMA driver programs the FIFO threshold values in the
FIFO_CTRL register, but never enables the transfer mode that uses
these threshold values. Given that these have never been used so far,
simplify the ADMA driver by removing the programming of these threshold
values.

Signed-off-by: Jonathan Hunter <jonathanh@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20190731101639.22755-1-jonathanh@nvidia.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-07-31 20:47:24 +05:30
Andy Shevchenko
57dbd0e4b9 dmaengine: stm32-mdma: Switch to use device_property_count_u32()
Use use device_property_count_u32() directly, that makes code neater.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20190723190757.67351-2-andriy.shevchenko@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-07-29 12:25:21 +05:30
Andy Shevchenko
2cb114c4fa dmaengine: stm32-dmamux: Switch to use device_property_count_u32()
Use use device_property_count_u32() directly, that makes code neater.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20190723190757.67351-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-07-29 12:25:21 +05:30
Peter Ujfalusi
aa3c6ce4ea dmaengine: ti: edma: Support for polled (memcpy) completion
When a DMA client driver does not set the DMA_PREP_INTERRUPT because it
does not want to use interrupts for DMA completion or because it can not
rely on DMA interrupts due to executing the memcpy when interrupts are
disabled it will poll the status of the transfer.

Since we can not tell from any EDMA register that the transfer is
completed, we can only know that the paRAM set has been sent to TPTC for
processing we need to check the residue of the transfer, if it is 0 then
the transfer is completed.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Link: https://lore.kernel.org/r/20190716082655.1620-4-peter.ujfalusi@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-07-29 12:11:38 +05:30
Peter Ujfalusi
097ffdc752 dmaengine: ti: edma: Correct the residue calculation (fix for memcpy)
For memcpy we never stored the start address of the transfer for the pset
which rendered the memcpy residue calculation completely broken.

In the edma_residue() function we also need to to some correction for the
calculations:
Instead waiting for all EDMA channels to be idle (in a busy system it can
take few iteration to hit a point when all queues are idle) wait for the
event pending on the given channel (SH_ER for hw synchronized channels,
SH_ESR for manually triggered channels).

If the position returned by EMDA is 0 it implies that the last paRAM set
has been consumed and we are at the closing dummy set, thus we can conclude
that the transfer is completed and we can return 0 as residue.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
[vkoul: fixed typo in commit log]
Link: https://lore.kernel.org/r/20190716082655.1620-3-peter.ujfalusi@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-07-29 12:11:38 +05:30
Peter Ujfalusi
e96b1f64ee dmaengine: ti: edma: Clean up the 2x32bit array register accesses
Introduce defines for getting the array index and the bit number within the
64bit array register pairs.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Link: https://lore.kernel.org/r/20190716082655.1620-2-peter.ujfalusi@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-07-29 12:11:38 +05:30
Peter Ujfalusi
4689d35c76 dmaengine: ti: omap-dma: Improved memcpy polling support
When a DMA client driver does not set the DMA_PREP_INTERRUPT because it
does not want to use interrupts for DMA completion or because it can not
rely on DMA interrupts due to executing the memcpy when interrupts are
disabled it will poll the status of the transfer.

If the interrupts are enabled then the cookie will be set completed in the
interrupt handler so only check in HW completion when the polling is really
needed.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Link: https://lore.kernel.org/r/20190716082459.1222-3-peter.ujfalusi@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-07-29 12:05:01 +05:30
Peter Ujfalusi
aac8670369 dmaengine: ti: omap-dma: Readability cleanup in omap_dma_tx_status()
The tx_status is most likely going to be asked for the current transfer, so
check that first then try to fall back to lookup of non started transfers.

In this way the code is a bit more readable and in most cases we will avoid
to run vchan_find_desc() all the time.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Link: https://lore.kernel.org/r/20190716082459.1222-2-peter.ujfalusi@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-07-29 12:05:01 +05:30
Paul Cercueil
f4c255f1a7 dmaengine: dma-jz4780: Break descriptor chains on JZ4740
The current driver works perfectly fine on every generation of the
JZ47xx SoCs, except on the JZ4740.

There, when hardware descriptors are chained together (with the LINK
bit set), the next descriptor isn't automatically fetched as it should -
instead, an interrupt is raised, even if the TIE bit (Transfer Interrupt
Enable) bit is cleared. When it happens, the DMA transfer seems to be
stopped (it doesn't chain), and it's uncertain how many bytes have
actually been transferred.

Until somebody smarter than me can figure out how to make chained
descriptors work on the JZ4740, we now disable chained descriptors on
that particular SoC.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Link: https://lore.kernel.org/r/20190714215504.10877-1-paul@crapouillou.net
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-07-25 18:57:58 +05:30
Dmitry Osipenko
156a599b07 dmaengine: tegra-apb: Support per-burst residue granularity
Tegra's APB DMA engine updates words counter after each transferred burst
of data, hence it can report transfer's residual with more fidelity which
may be required in cases like audio playback. In particular this fixes
audio stuttering during playback in a chromium web browser. The patch is
based on the original work that was made by Ben Dooks and a patch from
downstream kernel. It was tested on Tegra20 and Tegra30 devices.

Link: https://lore.kernel.org/lkml/20190424162348.23692-1-ben.dooks@codethink.co.uk/
Link: https://nv-tegra.nvidia.com/gitweb/?p=linux-4.4.git;a=commit;h=c7bba40c6846fbf3eaad35c4472dcc7d8bbc02e5
Inspired-by: Ben Dooks <ben.dooks@codethink.co.uk>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Link: https://lore.kernel.org/r/20190705150519.18171-1-digetx@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-07-25 15:55:51 +05:30
Stefan Wahren
72503b25ee dmaengine: bcm2835: Print error in case setting DMA mask fails
During enabling of the RPi 4, we found out that the driver doesn't provide
a helpful error message in case setting DMA mask fails. So add one.

Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
Link: https://lore.kernel.org/r/1563297318-4900-1-git-send-email-wahrenst@gmx.net
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-07-22 20:57:15 +05:30
Arnd Bergmann
d2bfe7b5d1 dmaengine: edma: make edma_filter_fn private
With the audio driver no longer referring to this function, it
can be made private to the dmaengine driver itself, and the
header file removed.

Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20190722081705.2084961-2-arnd@arndb.de
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-07-22 20:57:04 +05:30
Arnd Bergmann
9c71b9eb3c dmaengine: omap-dma: make omap_dma_filter_fn private
With the audio driver no longer referring to this function, it
can be made private to the dmaengine driver itself, and the
header file removed.

Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Link: https://lore.kernel.org/lkml/20190307151646.1016966-1-arnd@arndb.de/
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20190722081705.2084961-1-arnd@arndb.de
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-07-22 20:56:37 +05:30
Linus Torvalds
47ebe00b68 dmaengine updates for v5.3-rc1
- Add support in dmaengine core to do device node checks for DT devices and
    update bunch of drivers to use that and remove open coding from drivers
  - New driver/driver support for new hardware, namely:
    - MediaTek UART APDMA
    - Freescale i.mx7ulp edma2
    - Synopsys eDMA IP core version 0
    - Allwinner H6 DMA
  - Updates to axi-dma and support for interleaved cyclic transfers
  - Greg's debugfs return value check removals on drivers
  - Updates to stm32-dma, hsu, dw, pl330, tegra drivers
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Merge tag 'dmaengine-5.3-rc1' of git://git.infradead.org/users/vkoul/slave-dma

Pull dmaengine updates from Vinod Koul:

 - Add support in dmaengine core to do device node checks for DT devices
   and update bunch of drivers to use that and remove open coding from
   drivers

 - New driver/driver support for new hardware, namely:
     - MediaTek UART APDMA
     - Freescale i.mx7ulp edma2
     - Synopsys eDMA IP core version 0
     - Allwinner H6 DMA

 - Updates to axi-dma and support for interleaved cyclic transfers

 - Greg's debugfs return value check removals on drivers

 - Updates to stm32-dma, hsu, dw, pl330, tegra drivers

* tag 'dmaengine-5.3-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (68 commits)
  dmaengine: Revert "dmaengine: fsl-edma: add i.mx7ulp edma2 version support"
  dmaengine: at_xdmac: check for non-empty xfers_list before invoking callback
  Documentation: dmaengine: clean up description of dmatest usage
  dmaengine: tegra210-adma: remove PM_CLK dependency
  dmaengine: fsl-edma: add i.mx7ulp edma2 version support
  dt-bindings: dma: fsl-edma: add new i.mx7ulp-edma
  dmaengine: fsl-edma-common: version check for v2 instead
  dmaengine: fsl-edma-common: move dmamux register to another single function
  dmaengine: fsl-edma: add drvdata for fsl-edma
  dmaengine: Revert "dmaengine: fsl-edma: support little endian for edma driver"
  dmaengine: rcar-dmac: Reject zero-length slave DMA requests
  dmaengine: dw: Enable iDMA 32-bit on Intel Elkhart Lake
  dmaengine: dw-edma: fix semicolon.cocci warnings
  dmaengine: sh: usb-dmac: Use [] to denote a flexible array member
  dmaengine: dmatest: timeout value of -1 should specify infinite wait
  dmaengine: dw: Distinguish ->remove() between DW and iDMA 32-bit
  dmaengine: fsl-edma: support little endian for edma driver
  dmaengine: hsu: Revert "set HSU_CH_MTSR to memory width"
  dmagengine: pl330: add code to get reset property
  dt-bindings: pl330: document the optional resets property
  ...
2019-07-17 09:55:43 -07:00
Linus Torvalds
3f06962273 This pull-request contains the following changes for MTD:
MTD core changes:
 - New Hyperbus framework
 - New _is_locked (concat) implementation
 - Various cleanups
 
 NAND core changes:
 - use longest matching pattern in ->exec_op() default parser
 - export NAND operation tracer
 - add flag to indicate panic_write in MTD
 - use kzalloc() instead of kmalloc() and memset()
 
 Raw NAND controller drivers changes:
 - brcmnand:
   * fix BCH ECC layout for large page NAND parts
   * fallback to detected ecc-strength, ecc-step-size
   * when oops in progress use pio and interrupt polling
   * code refactor code to introduce helper functions
   * add support for v7.3 controller
 - FSMC:
   * use nand_op_trace for operation tracing
 - GPMI:
   * move all driver code into single file
   * various cleanups (including dmaengine changes)
   * use runtime PM to manage clocks
   * implement exec_op
 - MTK:
   * correct low level time calculation of r/w cycle
   * improve data sampling timing for read cycle
   * add validity check for CE# pin setting
   * fix wrongly assigned OOB buffer pointer issue
   * re-license MTK NAND driver as Dual MIT/GPL
 - STM32:
   * manage the get_irq error case
   * increase DMA completion timeouts
 
 Raw NAND chips drivers changes:
 - Macronix: add read-retry support
 
 Onenand driver changes:
 - add support for 8Gb datasize chips
 - avoid fall-through warnings
 
 SPI-NAND changes:
 - define macros for page-read ops with three-byte addresses
 - add support for two-byte device IDs and then for GigaDevice
   GD5F1GQ4UFxxG
 - add initial support for Paragon PN26G0xA
 - handle the case where the last page read has bitflips
 
 SPI-NOR core changes:
 - add support for the mt25ql02g and w25q16jv flashes
 - print error in case of jedec read id fails
 - is25lp256: add post BFPT fix to correct the addr_width
 
 SPI NOR controller drivers changes:
 - intel-spi: Add support for Intel Elkhart Lake SPI serial flash
 - smt32: remove the driver as the driver was replaced by spi-stm32-qspi.c
 - cadence-quadspi: add reset control
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Merge tag 'mtd/for-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux

Pull MTD updates from Miquel Raynal:
 "This contains the following changes for MTD:

  MTD core changes:
   - New Hyperbus framework
   - New _is_locked (concat) implementation
   - Various cleanups

  NAND core changes:
   - use longest matching pattern in ->exec_op() default parser
   - export NAND operation tracer
   - add flag to indicate panic_write in MTD
   - use kzalloc() instead of kmalloc() and memset()

  Raw NAND controller drivers changes:
   - brcmnand:
       - fix BCH ECC layout for large page NAND parts
       - fallback to detected ecc-strength, ecc-step-size
       - when oops in progress use pio and interrupt polling
       - code refactor code to introduce helper functions
       - add support for v7.3 controller
   - FSMC:
       - use nand_op_trace for operation tracing
   - GPMI:
       - move all driver code into single file
       - various cleanups (including dmaengine changes)
       - use runtime PM to manage clocks
       - implement exec_op
   - MTK:
       - correct low level time calculation of r/w cycle
       - improve data sampling timing for read cycle
       - add validity check for CE# pin setting
       - fix wrongly assigned OOB buffer pointer issue
       - re-license MTK NAND driver as Dual MIT/GPL
   - STM32:
       - manage the get_irq error case
       - increase DMA completion timeouts

  Raw NAND chips drivers changes:
   - Macronix: add read-retry support

  Onenand driver changes:
   - add support for 8Gb datasize chips
   - avoid fall-through warnings

  SPI-NAND changes:
   - define macros for page-read ops with three-byte addresses
   - add support for two-byte device IDs and then for GigaDevice
     GD5F1GQ4UFxxG
   - add initial support for Paragon PN26G0xA
   - handle the case where the last page read has bitflips

  SPI-NOR core changes:
   - add support for the mt25ql02g and w25q16jv flashes
   - print error in case of jedec read id fails
   - is25lp256: add post BFPT fix to correct the addr_width

  SPI NOR controller drivers changes:
   - intel-spi: Add support for Intel Elkhart Lake SPI serial flash
   - smt32: remove the driver as the driver was replaced by spi-stm32-qspi.c
   - cadence-quadspi: add reset control"

* tag 'mtd/for-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (60 commits)
  mtd: concat: implement _is_locked mtd operation
  mtd: concat: refactor concat_lock/concat_unlock
  mtd: abi: do not use C++ style comments in uapi header
  mtd: afs: remove unneeded NULL check
  mtd: rawnand: stm32_fmc2: increase DMA completion timeouts
  mtd: rawnand: Use kzalloc() instead of kmalloc() and memset()
  mtd: hyperbus: Add driver for TI's HyperBus memory controller
  mtd: spinand: read returns badly if the last page has bitflips
  mtd: spinand: Add initial support for Paragon PN26G0xA
  mtd: rawnand: mtk: Re-license MTK NAND driver as Dual MIT/GPL
  mtd: rawnand: gpmi: remove double assignment to block_size
  dt-bindings: mtd: brcmnand: Add brcmnand, brcmnand-v7.3 support
  mtd: rawnand: brcmnand: Add support for v7.3 controller
  mtd: rawnand: brcmnand: Refactored code to introduce helper functions
  mtd: rawnand: brcmnand: When oops in progress use pio and interrupt polling
  mtd: Add flag to indicate panic_write
  mtd: rawnand: Add Macronix NAND read retry support
  mtd: onenand: Avoid fall-through warnings
  mtd: spinand: Add support for GigaDevice GD5F1GQ4UFxxG
  mtd: spinand: Add support for two-byte device IDs
  ...
2019-07-13 15:42:44 -07:00
Vinod Koul
5c274ca4cf dmaengine: Revert "dmaengine: fsl-edma: add i.mx7ulp edma2 version support"
This reverts commit 7144afd025 ("dmaengine: fsl-edma: add i.mx7ulp
edma2 version support") as this fails to build with module option due to
usage of of_irq_count() which is not an exported symbol as kernel
drivers are *not* expected to use it (rightly so).

Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-07-08 09:44:45 +05:30
Raag Jadav
b7f5b656ff dmaengine: at_xdmac: check for non-empty xfers_list before invoking callback
tx descriptor retrieved from an empty xfers_list may not have valid
pointers to the callback functions.
Avoid calling dmaengine_desc_get_callback_invoke if xfers_list is empty.

Signed-off-by: Raag Jadav <raagjadav@gmail.com>
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-07-07 22:46:43 +05:30
Linus Torvalds
2692982b08 dmaengine fixes for v5.2
The fixes for 5.2 are:
  - bam_dma fix for completed descriptor count
  - fix for imx-sdma remove BD_INTR for channel0 and use-after-free on
    probe error path
  - endian bug fix in jz4780 IRQ handler
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Merge tag 'dmaengine-fix-5.2' of git://git.infradead.org/users/vkoul/slave-dma

Pull dmaengine fixes from Vinod Koul:

 - bam_dma fix for completed descriptor count

 - fix for imx-sdma remove BD_INTR for channel0 and use-after-free on
   probe error path

 - endian bug fix in jz4780 IRQ handler

* tag 'dmaengine-fix-5.2' of git://git.infradead.org/users/vkoul/slave-dma:
  dmaengine: qcom: bam_dma: Fix completed descriptors count
  dmaengine: imx-sdma: remove BD_INTR for channel0
  dmaengine: imx-sdma: fix use-after-free on probe error path
  dmaengine: jz4780: Fix an endian bug in IRQ handler
2019-07-06 10:06:37 -07:00
Sricharan R
f603422544 dmaengine: qcom: bam_dma: Fix completed descriptors count
One space is left unused in circular FIFO to differentiate
'full' and 'empty' cases. So take that in to account while
counting for the descriptors completed.

Fixes the issue reported here,
	https://lkml.org/lkml/2019/6/18/669

Cc: stable@vger.kernel.org
Reported-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Tested-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-07-05 13:18:27 +05:30
Robin Gong
3f93a4f297 dmaengine: imx-sdma: remove BD_INTR for channel0
It is possible for an irq triggered by channel0 to be received later
after clks are disabled once firmware loaded during sdma probe. If
that happens then clearing them by writing to SDMA_H_INTR won't work
and the kernel will hang processing infinite interrupts. Actually,
don't need interrupt triggered on channel0 since it's pollling
SDMA_H_STATSTOP to know channel0 done rather than interrupt in
current code, just clear BD_INTR to disable channel0 interrupt to
avoid the above case.
This issue was brought by commit 1d069bfa3c ("dmaengine: imx-sdma:
ack channel 0 IRQ in the interrupt handler") which didn't take care
the above case.

Fixes: 1d069bfa3c ("dmaengine: imx-sdma: ack channel 0 IRQ in the interrupt handler")
Cc: stable@vger.kernel.org #5.0+
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reported-by: Sven Van Asbroeck <thesven73@gmail.com>
Tested-by: Sven Van Asbroeck <thesven73@gmail.com>
Reviewed-by: Michael Olbrich <m.olbrich@pengutronix.de>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-07-05 13:15:37 +05:30
Sven Van Asbroeck
2b8066c3de dmaengine: imx-sdma: fix use-after-free on probe error path
If probe() fails anywhere beyond the point where
sdma_get_firmware() is called, then a kernel oops may occur.

Problematic sequence of events:
1. probe() calls sdma_get_firmware(), which schedules the
   firmware callback to run when firmware becomes available,
   using the sdma instance structure as the context
2. probe() encounters an error, which deallocates the
   sdma instance structure
3. firmware becomes available, firmware callback is
   called with deallocated sdma instance structure
4. use after free - kernel oops !

Solution: only attempt to load firmware when we're certain
that probe() will succeed. This guarantees that the firmware
callback's context will remain valid.

Note that the remove() path is unaffected by this issue: the
firmware loader will increment the driver module's use count,
ensuring that the module cannot be unloaded while the
firmware callback is pending or running.

Signed-off-by: Sven Van Asbroeck <TheSven73@gmail.com>
Reviewed-by: Robin Gong <yibin.gong@nxp.com>
[vkoul: fixed braces for if condition]
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-07-05 12:58:54 +05:30
Dan Carpenter
4c89cc73d1 dmaengine: jz4780: Fix an endian bug in IRQ handler
The "pending" variable was a u32 but we cast it to an unsigned long
pointer when we do the for_each_set_bit() loop.  The problem is that on
big endian 64bit systems that results in an out of bounds read.

Fixes: 4e4106f5e9 ("dmaengine: jz4780: Fix transfers being ACKed too soon")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-07-05 12:45:56 +05:30
Sameer Pujar
3145d73e69 dmaengine: tegra210-adma: remove PM_CLK dependency
Tegra ADMA does not use pm-clk interface now and hence the dependency
is removed from Kconfig.

Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-07-05 12:00:47 +05:30
Robin Gong
7144afd025 dmaengine: fsl-edma: add i.mx7ulp edma2 version support
Add edma2 for i.mx7ulp by version v3, since v2 has already
been used by mcf-edma.
The big changes based on v1 are belows:
1. only one dmamux.
2. another clock dma_clk except dmamux clk.
3. 16 independent interrupts instead of only one interrupt for
all channels.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Tested-by: Angelo Dureghello <angelo@sysam.it>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-07-03 13:28:23 +05:30
Robin Gong
b12650cc51 dmaengine: fsl-edma-common: version check for v2 instead
The next v3 i.mx7ulp edma is based on v1, so change version
check logic for v2 instead.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Tested-by: Angelo Dureghello <angelo@sysam.it>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-07-03 13:28:23 +05:30