Commit Graph

323653 Commits

Author SHA1 Message Date
Yaniv Rosner
5cd75f0c0f bnx2x: correct advertisement of pause capabilities
This patch propagates users' requested flow-control into the link layer,
which will later be used to advertise this flow-control for auto-negotiation
(until now these values were ignored).

Signed-off-by: Yaniv Rosner <yaniv.rosner@broadcom.com>
Signed-off-by: Yuval Mintz <yuvalmin@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2012-09-13 16:37:52 -04:00
Yaniv Rosner
430d172a63 bnx2x: display the correct duplex value
Prior to this fix, the driver reported the chip's active duplex state
is always 'full', even if using half-duplex mode.

Signed-off-by: Yaniv Rosner <yaniv.rosner@broadcom.com>
Signed-off-by: Yuval Mintz <yuvalmin@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2012-09-13 16:37:52 -04:00
Yaniv Rosner
375944cb7c bnx2x: prevent timeouts when using PFC
Prevent updating the xmac PFC configuration when using a link speed
slower than 10G -the umac block is responsible for 1G or slower connections,
therefore it is possible the xmac block is reset when connection is slower.

Signed-off-by: Yaniv Rosner <yaniv.rosner@broadcom.com>
Signed-off-by: Yuval Mintz <yuvalmin@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2012-09-13 16:37:52 -04:00
Yuval Mintz
217aeb896a bnx2x: fix stats copying logic
FW needs the driver statistics for management. Current logic is broken
in that the function that gathers the port statistics does not copy
its own statistics to a place where the FW can use it.
This patch causes every function that can pass statistics to the FW to
do so.

Signed-off-by: Yuval Mintz <yuvalmin@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2012-09-13 16:37:51 -04:00
Dmitry Kravkov
bef05406ac bnx2x: Avoid sending multiple statistics queries
During traffic when DCB is enabled, it is possible for multiple instances
of statistics queries to be sent to the chip - this may cause the FW to assert.

This patch prevents the sending of an additional instance of statistics query
while the previous query hasn't completed.

Signed-off-by: Dmitry Kravkov <dmitry@broadcom.com>
Signed-off-by: Yuval Mintz <yuvalmin@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2012-09-13 16:37:51 -04:00
Christian König
f492c171a3 drm/radeon: make 64bit fences more robust v3
Only increase the higher 32bits if we really detect a wrap around.

v2: instead of increasing the higher 32bits just use the higher
    32bits from the last emitted fence.
v3: also use last emitted fence value as upper limit.

The intention of this patch is to make fences as robust as
they where before introducing 64bit fences. This is
necessary because on older systems it looks like the fence
value gets corrupted on initialization.

Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=51344

Should also fix:
https://bugs.freedesktop.org/show_bug.cgi?id=54129
https://bugs.freedesktop.org/show_bug.cgi?id=54662
https://bugzilla.redhat.com/show_bug.cgi?id=846505
https://bugzilla.redhat.com/show_bug.cgi?id=845639

3.5 needs a separate patch due to changes in the
fence code.  Will send that out separately.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-09-13 16:17:49 -04:00
Alex Deucher
985f61f7ee drm/radeon: rework pll selection (v3)
For DP we can use the same PPLL for all active DP
encoders.  Take advantage of that to prevent cases
where we may end up sharing a PPLL between DP and
non-DP which won't work.  Also clean up the code
a bit.

v2: - fix missing pll_id assignment in crtc init
v3: - fix DP PPLL check
    - document functions
    - break in main encoder search loop after matching.
      no need to keep checking additional encoders.

fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=54471

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2012-09-13 16:17:49 -04:00
Bjørn Mork
8624dd2a3e net: qmi_wwan: call subdriver with control intf only
This fixes a hang on suspend due to calling wdm_suspend on
the unregistered data interface. The hang should have been
a NULL pointer reference had it not been for a logic error
in the cdc_wdm code.

  commit 230718bd net: qmi_wwan: bind to both control and data interface

changed qmi_wwan to use cdc_wdm as a subdriver for devices with
a two-interface QMI/wwan function.  The commit failed to update
qmi_wwan_suspend and qmi_wwan_resume, which were written to handle
either a single combined interface function, or no subdriver at all.

The result was that we called into the subdriver both when the
control interface was suspended and when the data interface was
suspended.  Calling the subdriver suspend function with an
unregistered interface is not supported and will make the
subdriver bug out.

Signed-off-by: Bjørn Mork <bjorn@mork.no>
Signed-off-by: David S. Miller <davem@davemloft.net>
2012-09-13 16:11:51 -04:00
David Ward
ba1bf474ea net_sched: gred: actually perform idling in WRED mode
gred_dequeue() and gred_drop() do not seem to get called when the
queue is empty, meaning that we never start idling while in WRED
mode. And since qidlestart is not stored by gred_store_wred_set(),
we would never stop idling while in WRED mode if we ever started.
This messes up the average queue size calculation that influences
packet marking/dropping behavior.

Now, we start WRED mode idling as we are removing the last packet
from the queue. Also we now actually stop WRED mode idling when we
are enqueuing a packet.

Cc: Bruce Osler <brosler@cisco.com>
Signed-off-by: David Ward <david.ward@ll.mit.edu>
Acked-by: Jamal Hadi Salim <jhs@mojatatu.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2012-09-13 16:10:13 -04:00
David Ward
1fe37b106b net_sched: gred: fix qave reporting via netlink
q->vars.qavg is a Wlog scaled value, but q->backlog is not. In order
to pass q->vars.qavg as the backlog value, we need to un-scale it.
Additionally, the qave value returned via netlink should not be Wlog
scaled, so we need to un-scale the result of red_calc_qavg().

This caused artificially high values for "Average Queue" to be shown
by 'tc -s -d qdisc', but did not affect the actual operation of GRED.

Signed-off-by: David Ward <david.ward@ll.mit.edu>
Acked-by: Jamal Hadi Salim <jhs@mojatatu.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2012-09-13 16:10:13 -04:00
David Ward
c22e464022 net_sched: gred: eliminate redundant DP prio comparisons
Each pair of DPs only needs to be compared once when searching for
a non-unique prio value.

Signed-off-by: David Ward <david.ward@ll.mit.edu>
Acked-by: Jamal Hadi Salim <jhs@mojatatu.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2012-09-13 16:10:13 -04:00
David Ward
e29fe837bf net_sched: gred: correct comment about qavg calculation in RIO mode
Signed-off-by: David Ward <david.ward@ll.mit.edu>
Acked-by: Jamal Hadi Salim <jhs@mojatatu.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2012-09-13 16:10:13 -04:00
Karsten Keil
4b921eda53 mISDN: Fix wrong usage of flush_work_sync while holding locks
It is a bad idea to hold a spinlock and call flush_work_sync.
Move the workqueue cleanup outside the spinlock and use cancel_work_sync,
on closing the channel this seems to be the more correct function.
Remove the never used and constant return value of mISDN_freebchannel.

Signed-off-by: Karsten Keil <keil@b1-systems.de>
Cc: <stable@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2012-09-13 14:58:54 -04:00
Stephen Boyd
0607fa5884 ARM: msm: Remove non-DT targets from 8960
Remove the non-DT targets supported by 8960. This makes 8960 a
device tree only target.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
2012-09-13 11:17:01 -07:00
Stephen Boyd
c446407c09 ARM: msm: Add DT support for 8960
Add basic support to boot 8960 with device tree. For now just
support a basic machine with a uart device.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
[davidb@codeaurora.org: Remove leading zeros]
Signed-off-by: David Brown <davidb@codeaurora.org>
2012-09-13 11:16:47 -07:00
Stephen Boyd
85a9f0f576 ARM: msm: Move io mapping prototypes to common.h
Consolidate the handful of iomapping functions into common.h so
that board files don't need to include mach/msm_iomap.h if they
don't need static virtual mapping addresses.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
2012-09-13 11:16:26 -07:00
Stephen Boyd
5a6e814f5d ARM: msm: Rename board-msm8x60 to signify its DT only status
Rename this file to signify that this board is only supported via
devicetree.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
2012-09-13 11:15:14 -07:00
Stephen Boyd
5b67bfbae6 ARM: msm: Make 8660 a DT only target
We don't plan to support anything besides devicetree on these
targets so remove all other machine support.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
2012-09-13 11:15:06 -07:00
Stephen Boyd
8407116075 ARM: msm: Move 8660 to DT timer
Add the timer entry and point the machine descriptor to the
device tree based msm timer.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
[davidb@codeaurora.org: Remove leading zeros]
Signed-off-by: David Brown <davidb@codeaurora.org>
2012-09-13 11:14:54 -07:00
Stephen Boyd
6e3321631a ARM: msm: Add DT support to msm_timer
Add support to setup the MSM timer via information obtained from
the devicetree.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
[davidb@codeaurora.org: Remove leading zeros]
Signed-off-by: David Brown <davidb@codeaurora.org>
2012-09-13 11:14:46 -07:00
Stephen Boyd
4312a7ef9c ARM: msm: Allow timer.c to compile on multiple targets
The timer code relies on #defines from mach/iomap.h, cpu_is_*()
checks, and a global irq #define. All this makes this file
impossible to compile in a mult-target build. Therefore, make a
sys_timer struct for each SoC so that machine descriptors can
reference the correct timer. Then go through and replace all the
defines with raw values that are passed to a common
initialization function.

This paves the way to adding DT support to this code as well as
allows us to compile this file on multiple targets at the same
time.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
2012-09-13 11:14:37 -07:00
Stephen Boyd
66a8950949 ARM: msm: Don't touch GIC registers outside of GIC code
The MSM code has some antiquated register writes to set up the
PPIs to be edge triggered. Now that we have the percpu irq
interface we don't need this code so let's remove it and update
the percpu irq user (msm_timer) to set the irq type.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
2012-09-13 11:14:29 -07:00
Stephen Boyd
e63770acb3 ARM: msm: Remove uncompiled board-msm7x27
This board file has never been compiled. Let's just remove it
along with the one Kconfig reference to it in io.c.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
2012-09-13 11:13:08 -07:00
Stephen Boyd
07901bb037 ARM: msm: Remove unused acpuclock-arm11
This is dead code that isn't initialized or setup (although it is
compiled). Remove it and the data structures it references.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
2012-09-13 11:12:56 -07:00
Wei Yongjun
6eebf2de9e ARM: msm: dma: use list_move_tail instead of list_del/list_add_tail
Using list_move_tail() instead of list_del() + list_add_tail().

spatch with a semantic match is used to found this problem.
(http://coccinelle.lip6.fr/)

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: David Brown <davidb@codeaurora.org>
2012-09-13 11:12:50 -07:00
David S. Miller
930521695c Merge branch 'master' of git://1984.lsi.us.es/nf
Pablo Neira Ayuso say:

====================
The following patchset contains four updates for your net tree, they are:

* Fix crash on timewait sockets, since the TCP early demux was added,
  in nfnetlink_log, from Eric Dumazet.

* Fix broken syslog log-level for xt_LOG and ebt_log since printk format was
  converted from <.> to a 2 bytes pattern using ASCII SOH, from Joe Perches.

* Two security fixes for the TCP connection tracking targeting off-path attacks,
  from Jozsef Kadlecsik. The problem was discovered by Jan Wrobel and it is
  documented in: http://mixedbit.org/reflection_scan/reflection_scan.pdf.
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
2012-09-13 13:53:06 -04:00
Stephen Boyd
3b5909deb3 ARM: msm: Fix sparse warnings due to incorrect type
arch/arm/mach-msm/timer.c:153:3: warning: incorrect type in initializer (different address spaces)
arch/arm/mach-msm/timer.c:153:3:    expected void const [noderef] <asn:3>*__vpp_verify
arch/arm/mach-msm/timer.c:153:3:    got struct clock_event_device [noderef] <asn:3>**<noident>
arch/arm/mach-msm/timer.c:153:38: warning: incorrect type in assignment (different address spaces)
arch/arm/mach-msm/timer.c:153:38:    expected struct clock_event_device [noderef] <asn:3>*<noident>
arch/arm/mach-msm/timer.c:153:38:    got struct clock_event_device *evt
arch/arm/mach-msm/timer.c:191:22: warning: incorrect type in assignment (different address spaces)
arch/arm/mach-msm/timer.c:191:22:    expected struct clock_event_device [noderef] <asn:3>**static [toplevel] percpu_evt
arch/arm/mach-msm/timer.c:191:22:    got struct clock_event_device *[noderef] <asn:3>*<noident>
arch/arm/mach-msm/timer.c:196:4: warning: incorrect type in initializer (different address spaces)
arch/arm/mach-msm/timer.c:196:4:    expected void const [noderef] <asn:3>*__vpp_verify
arch/arm/mach-msm/timer.c:196:4:    got struct clock_event_device [noderef] <asn:3>**<noident>
arch/arm/mach-msm/timer.c:196:39: warning: incorrect type in assignment (different address spaces)
arch/arm/mach-msm/timer.c:196:39:    expected struct clock_event_device [noderef] <asn:3>*<noident>
arch/arm/mach-msm/timer.c:196:39:    got struct clock_event_device *ce
arch/arm/mach-msm/timer.c:198:24: warning: incorrect type in argument 4 (different address spaces)
arch/arm/mach-msm/timer.c:198:24:    expected void [noderef] <asn:3>*percpu_dev_id
arch/arm/mach-msm/timer.c:198:24:    got struct clock_event_device [noderef] <asn:3>**static [toplevel] percpu_evt

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
2012-09-13 10:52:59 -07:00
Stephen Boyd
e8ea1ea90b ARM: msm: Add msm8660-surf.dts to Makefile.boot
Add this entry to the Makefile so that we can build the dtb
automatically with 'make dtbs'.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
2012-09-13 10:51:52 -07:00
Stephen Boyd
63c86c9501 ARM: msm: Add handle_irq handler for 8660 DT machine
Commit 041f777 (ARM: msm: convert SMP platforms to
CONFIG_MULTI_IRQ_HANDLER, 2011-09-06) forgot to add the
.handle_irq for the DT machine record. Add it so we get
interrupts instead of panics on DT enabled bootloaders.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
2012-09-13 10:51:47 -07:00
Stephen Boyd
10717e04d3 ARM: msm: Fix early debug uart mapping on some memory configs
The uart mapping runs into the space allocated for lowmem on some
8960 boards when we have more than 512Mb of memory. We were
getting lucky before and our mapping wasn't part of DDR. Move the
mapping up into the vmalloc area which will always be outside of
the lowmem mapping regardless of how much lowmem actually exists.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
2012-09-13 10:48:35 -07:00
Stephen Boyd
b07609cf88 ARM: msm: Remove unused idle.c
Forcing arm_pm_idle to be msm_idle() doesn't make sense in
configurations that don't have CONFIG_MSM7X00A_IDLE=y (i.e. any
targets that aren't 7x00a). Furthermore, that config doesn't even
exist, so this entire file is dead code. Just remove it so we can
use the default idle support on MSM.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
2012-09-13 10:47:07 -07:00
Stephen Boyd
5641705662 ARM: msm: clock-pcom: Mark functions static
These functions are only used within clock-pcom.c, therefore mark
them as static.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
2012-09-13 10:45:02 -07:00
Stephen Boyd
085eea143e ARM: msm: Remove msm_hw_reset_hook
This reset hook is never assigned and is dead code. Remove it so
we have one less header file in the mach directory.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
2012-09-13 10:43:57 -07:00
Rohit Vaswani
90eb385fd1 ARM: msm: io: Change the default static iomappings to be shared
With 3.4 kernel the static iomappings can be shared with the ioremap
mappings. If ioremap is called with an address for which a static
mapping already exists, then that mapping should be used instead
of creating a new one.

However, the MT_DEVICE_NONSHARED flag prevents this. Hence, get rid
of this flag. Some targets (7X00) that require the static iomappings
to be NONSHARED use the MSM_DEVICE_TYPE and MSM_CHIP_DEVICE_TYPE macros.

Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
2012-09-13 10:42:55 -07:00
Rohit Vaswani
460709a6f1 ARM: msm: io: Remove 7x30 iomap region from 7x00
This is redundant code.

Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
2012-09-13 10:42:49 -07:00
Joseph Lo
453689e407 ARM: tegra20: add CPU hotplug support
Hotplug function put CPU in offline or online mode at runtime.
When the CPU been put into offline, it was been clock gated. The
offline CPU can be power gated, when the remaining CPU goes into
LP2.

Based on the worked by:
Colin Cross <ccross@android.com>
Gary King <gking@nvidia.com>

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-09-13 11:41:06 -06:00
Joseph Lo
59b0f6825c ARM: tegra30: add CPU hotplug support
Hotplug function put CPUs in offline or online state at runtime.
When the CPU been put in the offline state, it was been clock and
power gated. Except primary CPU other CPUs can be hotplugged.

Based on the work by:
Scott Williams <scwilliams@nvidia.com>
Colin Cross <ccross@android.com>
Gary King <gking@nvidia.com>

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-09-13 11:41:06 -06:00
Joseph Lo
c2be5bfcc9 ARM: tegra: clean up the common assembly macros into sleep.h
There are some common macros for Tegra low-level assembly code. Clean
up them into one header file and move the definitions that will be
re-used into it as well.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-09-13 11:41:06 -06:00
Joseph Lo
bb6032776d ARM: tegra: replace the CPU CAR access code by tegra_cpu_car_ops
Replacing the code that directly access to CAR registers with
tegra_cpu_car_ops. This ops hides CPU CAR access inside and
provides control interface for it.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-09-13 11:41:05 -06:00
Joseph Lo
dab403ef23 ARM: tegra: introduce tegra_cpu_car_ops structures
The tegra_cpu_car_ops provide the interface for CPU to control
it's clock gating and reset status. The other drivers should use
this for CPU control. And should not directly access CAR registers
to control CPU.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-09-13 11:41:05 -06:00
David Brown
49b26e0dfd ARM: msm: Remove call to missing FPGA init on 8660
A previous patch[1] added code to initialize an FPGA register on the
8660 "SURF" development platform.  Since this development platform is
not widely available, and there is now a more available device "the
Dragonboard" based on the same core SOC, this change was dropped.

However, the DT code kept a lingering call to this FPGA init function.
Remove it.

[1] https://lkml.org/lkml/2011/8/12/357

Signed-off-by: David Brown <davidb@codeaurora.org>
2012-09-13 10:38:55 -07:00
Prashant Gaikwad
b4350f40f7 ARM: Tegra: Add smp_twd clock for Tegra20
Clockevent's frequency is changed upon cpufreq change
notification. It fetches local timer's rate to update the
clockevent frequency. This patch adds local timer clock
for Tegra20.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-09-13 11:34:29 -06:00
Takashi Iwai
64f1e00d8e ALSA: hda - Yet another position_fix quirk for ASUS machines
ASUS X53S also suffers from the same issue as in commit c302d6133.
Use POS_FIX_POSBUF for this hardware, too.

Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=47461

Signed-off-by: Takashi Iwai <tiwai@suse.de>
2012-09-13 16:56:13 +02:00
Marc Zyngier
a17257322f ARM: SoC: convert Tegra to SMP operations
Convert Tegra to use struct smp_operations to provide its SMP
and CPU hotplug operations.

Tested on Harmony.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-09-13 15:35:49 +02:00
Marc Zyngier
06915321e7 ARM: SoC: convert OMAP4 to SMP operations
Convert OMAP4 to use struct smp_operations to provide its SMP
and CPU hotplug operations.

Tested on both Panda and IGEPv2 (MULTI_OMAP kernel)

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-09-13 15:34:57 +02:00
Marc Zyngier
3695adc2fd ARM: SoC: convert VExpress/RealView to SMP operations
Convert both Realview and VExpress to use struct smp_operations to
provide their SMP and CPU hotplug operation.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Nicolas Pitre <nico@fluxnic.net>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-09-13 15:34:50 +02:00
Linus Torvalds
fbcbe2b3c9 Sound fixes for 3.6-rc6
Just a few small / trivial regression fixes at this time.
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Merge tag 'sound-3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound

Pull sound fixes from Takashi Iwai:
 "Just a few small / trivial regression fixes at this time."

* tag 'sound-3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound:
  ALSA: ice1724: Use linear scale for AK4396 volume control.
  ALSA: hda_intel: add position_fix quirk for Asus K53E
  ALSA: compress_core: fix open flags test in snd_compr_open()
  ALSA: hda - Fix Oops at codec reset/reconfig
  ALSA: usb-audio: Fix bogus error messages for delay accounting
  ALSA: hda - Fix missing Master volume for STAC9200/925x
2012-09-13 19:51:41 +08:00
Marc Zyngier
abcee5fb0d ARM: SoC: add per-platform SMP operations
This adds a 'struct smp_operations' to abstract the CPU initialization
and hot plugging functions on SMP systems, which otherwise conflict
in a multiplatform kernel. This also helps shmobile and potentially
others that have more than one method to do these.

To allow the kernel to continue building, the platform hooks are
defined as weak symbols which are overrided by the platform code.
Once all platforms are converted, the "weak" attribute will be
removed and the function made static.

Unlike the original version from Marc, this new version from Arnd
does not use a generalized abstraction for per-soc data structures
but only tries to solve the problem for the SMP operations. This
way, we can collapse the previous four data structures into a
single struct, which is less systematic but also easier to follow
as a causal reader.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Nicolas Pitre <nico@fluxnic.net>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-09-13 13:49:33 +02:00
Linus Torvalds
6a2a2b85db arm-soc: bug fixes for v3.6-rc
- A set of OMAP fixes, about half of them PM/clock related, the rest
   scattered over the platform code but all small and targeted to real bugs.
 - Two small i.MX fixes for SSI device clock setup.
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Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull arm-soc bug fixes from Olof Johansson:

 - A set of OMAP fixes, about half of them PM/clock related, the rest
   scattered over the platform code but all small and targeted to real
   bugs.
 - Two small i.MX fixes for SSI device clock setup.

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: clk-imx35: Fix SSI clock registration
  ARM: clk-imx25: Fix SSI clock registration
  ARM: OMAP4: Fix array size for irq_target_cpu
  ARM: OMAP4: hwmod data: temporarily comment out data for the sl2if IP block
  ARM: OMAP: hwmod code: Disable module when hwmod enable fails
  ARM: OMAP3: hwmod data: fix iva2 reset info
  ARM: OMAP3xxx: clockdomain: fix software supervised wakeup/sleep
  ARM: OMAP2+: am33xx: Fix the timer fck clock naming convention
  ARM: OMAP: Config fix for omap3-touchbook board
  ARM: OMAP: sram: skip the first 16K on OMAP3 HS
  ARM: OMAP: sram: fix OMAP4 errata handling
  ARM: OMAP: timer: obey the !CONFIG_OMAP_32K_TIMER
2012-09-13 19:10:50 +08:00
Linus Torvalds
5e88083f40 Additional AHCI PCI IDs.
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Merge tag 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev

Pull additional AHCI PCI IDs from Jeff Garzik.

* tag 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev:
  ahci: Add identifiers for ASM106x devices
  ahci: Add alternate identifier for the 88SE9172
  ahci: Add JMicron 362 device IDs
2012-09-13 19:07:15 +08:00