Commit Graph

31 Commits

Author SHA1 Message Date
Wang Dongsheng
3a0f880160 powerpc/8544ds: add partition table for norflash
create partition table for norflash.

Signed-off-by: Wang Dongsheng <Dongsheng.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-09-12 14:57:11 -05:00
Kumar Gala
b7f817547d powerpc/85xx: Rework MPC8544DS device tree
Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.

Other changes include:
* Moved to a standard 2 #address-cells & #size-cells at top-level
* Moved to specifying interrupt-parent for mpic at root
* Moved to 4-cell mpic interrupt cells to support MPIC timers
* Removed CPU properties setup by u-boot to match other .dts
* Added localbus node, but no chipselect details at this point
* Reworked PCIe nodes to allow supportin IRQs for controller (errors)
  and moved PCI device IRQs down to virtual bridge level
* Moved mdio nodes up one level instead of under tsec nodes
* Updated ethernet 'model' to 'eTSEC' as that's what on MPC8544
* Dropping "fsl,mpc8544-IP..." from compatibles for standard blocks

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-24 02:01:36 -06:00
Bradley Hughes
8a4ab218ef powerpc/85xx: Change deprecated binding for 85xx-based boards
The "fsl,85..." style compatible binding was to be deprecated
some time ago.  This patch corrects existing occurrences of
the incorrect binding.  The memory-controller and
l2-cache-controller are the only affected nodes.

Signed-off-by: Bradley Hughes <bhughes@silicontkx.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-08-04 14:22:04 -05:00
Kumar Gala
b1b6802586 powerpc/fsl: Removed reg property from 85xx/86xx soc node
Between the addition of the ecm/mcm law nodes and the fact that the
get_immrbase() has been using the range property of the SoC to determine
the base address of CCSR space we no longer need the reg property at
the soc node level.  It has been ill specified and varied between device
trees to cover either the {e,m}cm-law node, some odd subset of CCSR
space or all of CCSR space.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-05-19 00:50:29 -05:00
Kumar Gala
e1a2289736 powerpc/85xx: Add new LAW & ECM device tree nodes for all 85xx systems
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-05-19 00:46:19 -05:00
Kumar Gala
28eac2b74c powerpc/fsl: Remove cell-index from PCI nodes
The cell-index property isn't used on PCI nodes and is ill defined.
Remove it for now and if someone comes up with a good reason and
consistent definition for it we can add it back

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-05-19 00:46:14 -05:00
Anton Vorontsov
84ba4a5899 powerpc/85xx: Move gianfar mdio nodes under the ethernet nodes
Currently it doesn't matter where the mdio nodes are placed, but with
power management support (i.e. when sleep = <> properties will take
effect), mdio nodes placement will become important: mdio controller
is a part of the ethernet block, so the mdio nodes should be placed
correctly. Otherwise we may wrongly assume that MDIO controllers are
available during sleep.

Suggested-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-03-24 08:35:13 -05:00
Kumar Gala
be122d6d8b powerpc/85xx: Fix PCIe error interrupts
The PCIe interrupts for 8544ds and 8572ds were incorrect.  The 8572 case
was found by Liu Yu.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-01-07 09:18:52 -06:00
Andy Fleming
b31a1d8b41 gianfar: Convert gianfar to an of_platform_driver
Does the same for the accompanying MDIO driver, and then modifies the TBI
configuration method.  The old way used fields in einfo, which no longer
exists.  The new way is to create an MDIO device-tree node for each instance
of gianfar, and create a tbi-handle property to associate ethernet controllers
with the TBI PHYs they are connected to.

Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-12-16 15:29:15 -08:00
Kim Phillips
cf0d19fb30 powerpc/fsl: proliferate simple-bus compatibility to soc nodes
add simple-bus compatible property to soc nodes for 83xx/85xx platforms
that were missing them.  Add same to platform probe code.

This fixes SoC device drivers (such as talitos) to succeed in matching
devices present in the soc node.

also update mpc836x_rdk dts to new SEC bindings (overlooked in commit
3fd4473: powerpc/fsl: update crypto node definition and device tree
instances).

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-29 17:48:35 -05:00
Kim Phillips
3fd44736db powerpc/fsl: update crypto node definition and device tree instances
delete obsolete device-type property, delete model property
(use compatible property instead), prepend "fsl," to Freescale
specific properties. Add nodes to device trees that are missing them,
and fix broken property values in other trees.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-14 07:55:47 -05:00
Kumar Gala
c054065bc1 [POWERPC] 85xx: Add next-level-cache property
Added next-level-cache to the L1 and a reference to the new L2 label.
This is per the ePAPR 0.94 spec.  Since we are't really dependent on this
today we aren't supporting the "legacy" l2-cache phandle that is specified
in the PPC v2.1 OF Binding spec.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-06-02 14:44:25 -05:00
Kumar Gala
acd4b715ec [POWERPC] Cleanup mpic nodes in .dts
Removed clock-frequency, big-endian, and built-in props as they aren't
specified anywhere.  Also added compatible = "chrp,open-pic" in the
places it was missing.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-06-02 14:44:25 -05:00
Jason Jin
741edc4949 [POWERPC] 85xx: Enable MSI support for 85xxds board
This patch enabled MSI on 8544ds and 8572ds board.
So far only one MSI interrupt can generate on 8544 board.

Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-06-02 14:44:24 -05:00
Kumar Gala
280bb34bc0 [POWERPC] 85xx: minor .dts cleanups
* remove #cpus from mpc8544ds.dts (not used anywhere else)
* remove memreserve from mpc8568mds.dts (not needed)

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-04-17 01:29:14 -05:00
Kumar Gala
32f960e943 [POWERPC] 85xx: Convert dts to v1 syntax
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-04-17 01:28:15 -05:00
Sebastian Siewior
1028d4f162 [POWERPC] 85xx: Enable DMA engine on the MPC8544 DS
Add the device tree node for the DMA engine on 8544, publish
the device and enable the driver in the defconfig.

Signed-off-by: Sebastian Siewior <bigeasy@linutronix.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-04-17 01:01:36 -05:00
Kumar Gala
93967ae20a [POWERPC] Fix incorrect interrupt map on FSL reference boards
The ULI based boards had the interrupt maps for USB on the ULI incorrectly
set.

Also, the MPC8572DS was missing the interrupt-map-mask for the 3rd PCIe
controller.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-23 19:32:56 -06:00
Kumar Gala
ea082fa94e [POWERPC] FSL: Added aliases node to device trees
Added aliases nodes for kurobox, 83xx, 85xx, and 86xx platforms.
This included added labels and cell-index properties for serial and
pci nodes.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-12-12 01:51:03 -06:00
Kumar Gala
e77b28eb19 [POWERPC] FSL: enet device tree cleanups
* Removed address fields in ethernet nodes
* Removed #address-cells, #size-cells from gianfar nodes
* Added cell-index to gianfar and ucc ethernet nodes
* Added enet[0..3] labels
* Renamed compatible node for gianfar mdio to "fsl,gianfar-mdio"
* Removed device_type = "mdio"

The matching for gianfar mdio still supports the old "mdio"/"gianfar" combo
but it is now considered deprecated.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-12-12 01:50:45 -06:00
Kumar Gala
ec9686c4a5 [POWERPC] FSL: I2C device tree cleanups
* Removed device_type = "i2c"
* Added missing second I2C controller on MPC8548 CDS, MPC8544 DS
* Added #address-cells, #size-cells, and cell-index where missing

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-12-11 23:17:24 -06:00
Kumar Gala
bebfa06c61 [POWERPC] Fix device tree interrupt map for Freescale ULI1575 boards
The interrupt map for the PCI PHB that had the ULI1575 was not correct
on the boards that have it.

* 8544 DS:
   - Fix interrupt mask
   - Be explicit about use of INTA for on chip peripherals

* 8572 DS/8641 HPCN:
   - Fix interrupt mask
   - Expand interrupt map for PCI slots to cover all functions
   - Be explicit about use of INTA for on chip peripherals

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-11-19 23:49:28 -06:00
Kumar Gala
1b3c5cdab4 [POWERPC] Move PCI nodes to be sibilings with SOC nodes
Updated the device trees to have the PCI nodes be at the same level as
the SOC node.  This is to make it so that the SOC nodes children address
space is just on chip registers and not other bus memory as well.

Also, for PCIe nodes added a P2P bridge to handle the virtual P2P bridge
that exists in the PHB.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-09-14 08:53:22 -05:00
Kumar Gala
f0c8ac8083 [POWERPC] DTS cleanup
Removed the following cruft from .dts files:
* 32-bit in cpu node -- doesn't exist in any spec and not used by kernel
* removed built-in (chrp legacy)
* Removed #interrupt-cells in places they don't need to be set
* Fixed ranges on lite5200*
* Removed clock-frequency from i8259 pic node, not sure where this came from
* Removed big-endian from i8259 pic nodes, this was just bogus

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-09-14 08:53:16 -05:00
Kumar Gala
b66510cb99 [POWERPC] Fix interrupt routing and setup of ULI M1575 on FSL boards
The interrupt routing in the device trees for the ULI M1575 was
inproperly using the interrupt line field as pci function.  Fixed
up the device tree's to actual conform for to specification and
changed the interrupt mapping code so it just uses a static mapping
setup as follows:

PIRQA - IRQ9
PIRQB - IRQ10
PIRQC - IRQ11
PIRQD - IRQ12
USB 1.1 OCHI (1c.0) - IRQ12
USB 1.1 OCHI (1c.1) - IRQ9
USB 1.1 OCHI (1c.2) - IRQ10
USB 1.1 ECHI (1c.3) - IRQ11
LAN (1b.0) - IRQ6
AC97 (1d.0) - IRQ6
Modem (1d.1) - IRQ6
HD Audio (1d.2) - IRQ6
SATA (1f.1) - IRQ5
SMB (1e.1) - IRQ7
PMU (1e.2) - IRQ7
PATA (1f.0) - IRQ14/15

Took the oppurtunity to refactor the code into a single file so we
don't have to duplicate these fixes on the two current boards in the
tree and several forth coming boards that will also need the code.

Fixed RTC support that requires a dummy memory read on the P2P bridge
to unlock the RTC and setup the default of the RTC alarm registers to
match with a basic x86 style CMOS RTC.

Moved code that poked ISA registers to a FIXUP_FINAL quirk to ensure
the PCI IO space has been setup properly before we start poking ISA
registers at random locations.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-08-17 13:22:16 -05:00
Roy Zang
10ce8c69d0 [POWERPC] Fix the ability to reset on MPC8544 DS and MPC8568 MDS boards
Add global-utilities node with has-rstcr on MPC8544 DS and MPC8568 MDS
boards so they are able to reset properly.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-26 00:19:57 -05:00
Kumar Gala
9a9bcf4e00 [POWERPC] Fix ethernet PHY support on MPC8544 DS
The MPC8544 dts needed to set the new phy-connection-type to rgmii-id
for the Vitesse PHY on the board to work properly.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-26 00:07:36 -05:00
Roy Zang
f16dab981a [POWERPC] Add basic PCI/PCI Express support for 8544DS board
Add basic support for the PCIe PHB and enable the ULI bridge.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23 22:30:02 -05:00
Kumar Gala
b533f8ae79 [POWERPC] Reworked interrupt numbers for OpenPIC based Freescale chips
Make the interrupt numbers match the OpenPIC spec intead of the
Freescale docs which distinguish between internal and external interrupts.

Now we can use the interrupt number directly to find the register offset
associated with it.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-03 02:35:35 -05:00
Kumar Gala
4da421d620 [POWERPC] 85xx: Add device nodes for error reporting devices used by EDAC
Adding memory-controller and l2-cache-controller entries to be used by EDAC
as of_devices for MPC8541 CDS, MPC8544 DS, MPC8555 CDS, and MPC8568 MDS.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-05-17 21:10:17 +10:00
Jon Loeliger
d93daf8481 [POWERPC] 85xx: Add initial MPC8544 DS platform files.
This patch provides the basic MPC8544 DS platform code and config.
Follow-up patches will add peripherals such as PCI and SATA.

Signed-off-by: Xianghua Xiao <x.xiao@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-03-29 19:39:27 -05:00