forked from Minki/linux
e2e927c823
1009 Commits
Author | SHA1 | Message | Date | |
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Linus Torvalds
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4aa705b18b |
ARM: SoC: platform support for v4.2
Our SoC branch usually contains expanded support for new SoCs and other core platform code. Some highlights from this round: - sunxi: SMP support for A23 SoC - socpga: big-endian support - pxa: conversion to common clock framework - bcm: SMP support for BCM63138 - imx: support new I.MX7D SoC - zte: basic support for ZX296702 SoC Conflicts: arch/arm/mach-socfpga/core.h Trivial remove/remove conflict with our cleanup branch. Resolution: remove both sides -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJVi4RMAAoJEFk3GJrT+8Zl6/kP/1Rv9O++1Kxua6R54Og6AF1J 0miFr2fnUrUWUYg/NVbseRH5bBe6N6ir3SQMfde8W2/QibEjOoEwSwrle+mC/eiq CE0x0gtyRvXMrMU/FWkOvbmmw9uv5oz1z3IHZV6AiecNuSMLUBPfamryikQ8C+d1 O/QZtX543tJQJDOBihO5cuhoVVM37UX0unNmqGsyswlyqTPF8FxcIJAYVNtnxjmj AFaOB0nDJKLKFTiX2Ype2wOxxJX1lrLatNo4W4T+YaaK+i1uCOhgTdSN+n49K7YA KNDFEgZFQqT8VMJyG+eJVeYF+cI7yWQ7lBzIftPUjPk/7+dIHBjWPz2QdjVz3U38 kxncf4S9xGAF5G2rcKe4mFrfT3Y8QLWQpA/jFs06yLwW1O3Hlfq3DzMdGNcF7hth 17LOP8namn9+NepZEp/vAlFzRRypxWWtbkPNBIItkImC6zn0IiGjBy50DE1io27W hmQcnMb7d+0wWl2Y8OmR2lZSB97JiRZkRYMCVHVt+0zGJzp4prLvl9wbjh1VXkPv ERCDJ9nCmZsl7ZVmIXMI7KNXYuPNp7R/QAzCvuSUueswF0qxTAQ0VSSBwRMqvQsQ UUNC6p63VnjUeMUdn2EBsUQZ0Uqw3t2U5TtvooHNt9FkiGsSpwjWrvVD+LItaPoJ GPeeJrJaYQsDvTrO8wjU =ZtPK -----END PGP SIGNATURE----- Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform support updates from Kevin Hilman: "Our SoC branch usually contains expanded support for new SoCs and other core platform code. Some highlights from this round: - sunxi: SMP support for A23 SoC - socpga: big-endian support - pxa: conversion to common clock framework - bcm: SMP support for BCM63138 - imx: support new I.MX7D SoC - zte: basic support for ZX296702 SoC" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (134 commits) ARM: zx: Add basic defconfig support for ZX296702 ARM: dts: zx: add an initial zx296702 dts and doc clk: zx: add clock support to zx296702 dt-bindings: Add #defines for ZTE ZX296702 clocks ARM: socfpga: fix build error due to secondary_startup MAINTAINERS: ARM64: EXYNOS: Extend entry for ARM64 DTS ARM: ep93xx: simone: support for SPI-based MMC/SD cards MAINTAINERS: update Shawn's email to use kernel.org one ARM: socfpga: support suspend to ram ARM: socfpga: add CPU_METHOD_OF_DECLARE for Arria 10 ARM: socfpga: use CPU_METHOD_OF_DECLARE for socfpga_cyclone5 ARM: EXYNOS: register power domain driver from core_initcall ARM: EXYNOS: use PS_HOLD based poweroff for all supported SoCs ARM: SAMSUNG: Constify platform_device_id ARM: EXYNOS: Constify irq_domain_ops ARM: EXYNOS: add coupled cpuidle support for Exynos3250 ARM: EXYNOS: add exynos_get_boot_addr() helper ARM: EXYNOS: add exynos_set_boot_addr() helper ARM: EXYNOS: make exynos_core_restart() less verbose ARM: EXYNOS: fix exynos_boot_secondary() return value on timeout ... |
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Kevin Hilman
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e75ea4569d |
Merge branch 'for-arm-soc' of http://ftp.arm.linux.org.uk/pub/armlinux/kernel/git-cur/linux-2.6-arm into next/cleanup
* 'for-arm-soc' of http://ftp.arm.linux.org.uk/pub/armlinux/kernel/git-cur/linux-2.6-arm: ARM: fix EFM32 build breakage caused by cpu_resume_arm ARM: 8389/1: Add cpu_resume_arm() for firmwares that resume in ARM state ARM: v7 setup function should invalidate L1 cache |
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Russell King
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02b4e2756e |
ARM: v7 setup function should invalidate L1 cache
All ARMv5 and older CPUs invalidate their caches in the early assembly setup function, prior to enabling the MMU. This is because the L1 cache should not contain any data relevant to the execution of the kernel at this point; all data should have been flushed out to memory. This requirement should also be true for ARMv6 and ARMv7 CPUs - indeed, these typically do not search their caches when caching is disabled (as it needs to be when the MMU is disabled) so this change should be safe. ARMv7 allows there to be CPUs which search their caches while caching is disabled, and it's permitted that the cache is uninitialised at boot; for these, the architecture reference manual requires that an implementation specific code sequence is used immediately after reset to ensure that the cache is placed into a sane state. Such functionality is definitely outside the remit of the Linux kernel, and must be done by the SoC's firmware before _any_ CPU gets to the Linux kernel. Changing the data cache clean+invalidate to a mere invalidate allows us to get rid of a lot of platform specific hacks around this issue for their secondary CPU bringup paths - some of which were buggy. Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Tested-by: Florian Fainelli <f.fainelli@gmail.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Michal Simek <michal.simek@xilinx.com> Tested-by: Wei Xu <xuwei5@hisilicon.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> |
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David Riley
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7892158a96 |
soc/tegra: pmc: move to using a restart handler
The pmc driver was previously exporting tegra_pmc_restart, which was assigned to machine_desc.init_machine, taking precedence over the restart handlers registered through register_restart_handler(). Signed-off-by: David Riley <davidriley@chromium.org> [tomeu.vizoso@collabora.com: Rebased] Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Acked-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> [treding@nvidia.com: minor cleanups] Signed-off-by: Thierry Reding <treding@nvidia.com> |
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Thierry Reding
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85aa5047e3 |
ARM: tegra: Fix typo (reset -> rest) in comment
Easy typo to make when you're working in this area of the code. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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Dmitry Osipenko
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4d48edb3c3 |
ARM: tegra20: Store CPU "resettable" status in IRAM
Commit |
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Linus Torvalds
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2481bc7528 |
Power management and ACPI updates for v4.1-rc1
- Generic PM domains support update including new PM domain callbacks to handle device initialization better (Russell King, Rafael J Wysocki, Kevin Hilman). - Unified device properties API update including a new mechanism for accessing data provided by platform initialization code (Rafael J Wysocki, Adrian Hunter). - ARM cpuidle update including ARM32/ARM64 handling consolidation (Daniel Lezcano). - intel_idle update including support for the Silvermont Core in the Baytrail SOC and for the Airmont Core in the Cherrytrail and Braswell SOCs (Len Brown, Mathias Krause). - New cpufreq driver for Hisilicon ACPU (Leo Yan). - intel_pstate update including support for the Knights Landing chip (Dasaratharaman Chandramouli, Kristen Carlson Accardi). - QorIQ cpufreq driver update (Tang Yuantian, Arnd Bergmann). - powernv cpufreq driver update (Shilpasri G Bhat). - devfreq update including Tegra support changes (Tomeu Vizoso, MyungJoo Ham, Chanwoo Choi). - powercap RAPL (Running-Average Power Limit) driver update including support for Intel Broadwell server chips (Jacob Pan, Mathias Krause). - ACPI device enumeration update related to the handling of the special PRP0001 device ID allowing DT-style 'compatible' property to be used for ACPI device identification (Rafael J Wysocki). - ACPI EC driver update including limited _DEP support (Lan Tianyu, Lv Zheng). - ACPI backlight driver update including a new mechanism to allow native backlight handling to be forced on non-Windows 8 systems and a new quirk for Lenovo Ideapad Z570 (Aaron Lu, Hans de Goede). - New Windows Vista compatibility quirk for Sony VGN-SR19XN (Chen Yu). - Assorted ACPI fixes and cleanups (Aaron Lu, Martin Kepplinger, Masanari Iida, Mika Westerberg, Nan Li, Rafael J Wysocki). - Fixes related to suspend-to-idle for the iTCO watchdog driver and the ACPI core system suspend/resume code (Rafael J Wysocki, Chen Yu). - PM tracing support for the suspend phase of system suspend/resume transitions (Zhonghui Fu). - Configurable delay for the system suspend/resume testing facility (Brian Norris). - PNP subsystem cleanups (Peter Huewe, Rafael J Wysocki). / -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.22 (GNU/Linux) iQIcBAABCAAGBQJVLbO+AAoJEILEb/54YlRx5N4QAJXsmEW1FL2l6mMAyTQkEsVj nbqjF9I6aJgYM9+i8GKaZJxpN17SAZ7Ii7aCAXjPwX8AvjT70+gcZr+KDWtPir61 B75VNVEcUYOR4vOF5Z6rQcQMlhGPkfMOJYXFMahpOG6DdPbVh1x2/tuawfc6IC0V a6S/fln6WqHrXQ+8swDSv1KuZsav6+8AQaTlNUQkkuXdY9b3k/3xiy5C2K26APP8 x1B39iAF810qX6ipnK0gEOC3Vs29dl7hvNmgOVmmkBGVS7+pqTuy5n1/9M12cDRz 78IQ7DXB0NcSwr5tdrmGVUyH0Q6H9lnD3vO7MJkYwKDh5a/2MiBr2GZc4KHDKDWn E1sS27f1Pdn9qnpWLzTcY+yYNV3EEyre56L2fc+sh+Xq9sNOjUah+Y/eAej/IxYD XYRf+GAj768yCJgNP+Y3PJES/PRh+0IZ/dn5k0Qq2iYvc8mcObyG6zdQIvCucv/i 70uV1Z2GWEb31cI9TUV8o5GrMW3D0KI9EsCEEpiFFUnhjNog3AWcerGgFQMHxu7X ZnNSzudvek+XJ3NtpbPgTiJAmnMz8bDvBQm3G1LUO2TQdjYTU6YMUHsfzXs8DL6c aIMWO4stkVuDtWrlT/hfzIXepliccyXmSP6sbH+zNNCepulXe5C4M2SftaDi4l/B uIctXWznvHoGys+EFL+v =erd3 -----END PGP SIGNATURE----- Merge tag 'pm+acpi-4.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm Pull power management and ACPI updates from Rafael Wysocki: "These are mostly fixes and cleanups all over, although there are a few items that sort of fall into the new feature category. First off, we have new callbacks for PM domains that should help us to handle some issues related to device initialization in a better way. There also is some consolidation in the unified device properties API area allowing us to use that inferface for accessing data coming from platform initialization code in addition to firmware-provided data. We have some new device/CPU IDs in a few drivers, support for new chips and a new cpufreq driver too. Specifics: - Generic PM domains support update including new PM domain callbacks to handle device initialization better (Russell King, Rafael J Wysocki, Kevin Hilman) - Unified device properties API update including a new mechanism for accessing data provided by platform initialization code (Rafael J Wysocki, Adrian Hunter) - ARM cpuidle update including ARM32/ARM64 handling consolidation (Daniel Lezcano) - intel_idle update including support for the Silvermont Core in the Baytrail SOC and for the Airmont Core in the Cherrytrail and Braswell SOCs (Len Brown, Mathias Krause) - New cpufreq driver for Hisilicon ACPU (Leo Yan) - intel_pstate update including support for the Knights Landing chip (Dasaratharaman Chandramouli, Kristen Carlson Accardi) - QorIQ cpufreq driver update (Tang Yuantian, Arnd Bergmann) - powernv cpufreq driver update (Shilpasri G Bhat) - devfreq update including Tegra support changes (Tomeu Vizoso, MyungJoo Ham, Chanwoo Choi) - powercap RAPL (Running-Average Power Limit) driver update including support for Intel Broadwell server chips (Jacob Pan, Mathias Krause) - ACPI device enumeration update related to the handling of the special PRP0001 device ID allowing DT-style 'compatible' property to be used for ACPI device identification (Rafael J Wysocki) - ACPI EC driver update including limited _DEP support (Lan Tianyu, Lv Zheng) - ACPI backlight driver update including a new mechanism to allow native backlight handling to be forced on non-Windows 8 systems and a new quirk for Lenovo Ideapad Z570 (Aaron Lu, Hans de Goede) - New Windows Vista compatibility quirk for Sony VGN-SR19XN (Chen Yu) - Assorted ACPI fixes and cleanups (Aaron Lu, Martin Kepplinger, Masanari Iida, Mika Westerberg, Nan Li, Rafael J Wysocki) - Fixes related to suspend-to-idle for the iTCO watchdog driver and the ACPI core system suspend/resume code (Rafael J Wysocki, Chen Yu) - PM tracing support for the suspend phase of system suspend/resume transitions (Zhonghui Fu) - Configurable delay for the system suspend/resume testing facility (Brian Norris) - PNP subsystem cleanups (Peter Huewe, Rafael J Wysocki)" * tag 'pm+acpi-4.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (74 commits) ACPI / scan: Fix NULL pointer dereference in acpi_companion_match() ACPI / scan: Rework modalias creation when "compatible" is present intel_idle: mark cpu id array as __initconst powercap / RAPL: mark rapl_ids array as __initconst powercap / RAPL: add ID for Broadwell server intel_pstate: Knights Landing support intel_pstate: remove MSR test cpufreq: fix qoriq uniprocessor build ACPI / scan: Take the PRP0001 position in the list of IDs into account ACPI / scan: Simplify acpi_match_device() ACPI / scan: Generalize of_compatible matching device property: Introduce firmware node type for platform data device property: Make it possible to use secondary firmware nodes PM / watchdog: iTCO: stop watchdog during system suspend cpufreq: hisilicon: add acpu driver ACPI / EC: Call acpi_walk_dep_device_list() after installing EC opregion handler cpufreq: powernv: Report cpu frequency throttling intel_idle: Add support for the Airmont Core in the Cherrytrail and Braswell SOCs intel_idle: Update support for Silvermont Core in Baytrail SOC PM / devfreq: tegra: Register governor on module init ... |
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Linus Torvalds
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8954672d86 |
Merge branch 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull irq core updates from Thomas Gleixner: "Managerial summary: Core code: - final removal of IRQF_DISABLED - new state save/restore functions for virtualization support - wakeup support for stacked irqdomains - new function to solve the netpoll synchronization problem irqchips: - new driver for STi based devices - new driver for Vybrid MSCM - massive cleanup of the GIC driver by moving the GIC-addons to stacked irqdomains - the usual pile of fixes and updates to the various chip drivers" * 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (44 commits) irqchip: GICv3: Add support for irq_[get, set]_irqchip_state() irqchip: GIC: Add support for irq_[get, set]_irqchip_state() genirq: Allow the irqchip state of an IRQ to be save/restored genirq: MSI: Fix freeing of unallocated MSI irqchip: renesas-irqc: Add wake-up support irqchip: armada-370-xp: Allow using wakeup source irqchip: mips-gic: Add new functions to start/stop the GIC counter irqchip: tegra: Add Tegra210 support irqchip: digicolor: Move digicolor_set_gc to init section irqchip: renesas-irqc: Add functional clock to bindings irqchip: renesas-irqc: Add minimal runtime PM support irqchip: renesas-irqc: Add more register documentation DT: exynos: update PMU binding ARM: exynos4/5: convert pmu wakeup to stacked domains irqchip: gic: Don't complain in gic_get_cpumask() if UP system ARM: zynq: switch from gic_arch_extn to gic_set_irqchip_flags ARM: ux500: switch from gic_arch_extn to gic_set_irqchip_flags ARM: shmobile: remove use of gic_arch_extn.irq_set_wake irqchip: gic: Add an entry point to set up irqchip flags ARM: omap: convert wakeupgen to stacked domains ... |
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Thomas Gleixner
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a0b4122447 |
ARM: Tegra: Use explicit broadcast oneshot control function
Replace the clockevents_notify() call with an explicit function call. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Thierry Reding <thierry.reding@gmail.com> Link: http://lkml.kernel.org/r/2131111.rjxRLX1eZB@vostro.rjw.lan Signed-off-by: Ingo Molnar <mingo@kernel.org> |
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Daniel Lezcano
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eeebc3bb4d |
ARM: cpuidle: Remove duplicate header inclusion
The cpu_do_idle() function is always used by the cpuidle drivers. That led to have each driver including cpuidle.h and proc-fns.h, they are always paired. That makes a lot of duplicate headers inclusion. Instead of including both in each .c file, move the proc-fns.h header inclusion in the cpuidle.h header file directly, so we can save some line of code. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Kevin Hilman <khilman@linaro.org> Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> |
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Marc Zyngier
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1a703bffd8 |
ARM: tegra: remove old LIC support
Now that all DTs have been updated, entierely drop support for the non-DT code. This is likely to break platforms that do not update their DT, so print a warning at boot time. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Link: https://lkml.kernel.org/r/1426088583-15097-7-git-send-email-marc.zyngier@arm.com Signed-off-by: Jason Cooper <jason@lakedaemon.net> |
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Marc Zyngier
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e9479e0e83 |
ARM: tegra: skip gic_arch_extn setup if DT has a LIC node
If we detect that our DT has a LIC node, don't setup gic_arch_extn, and skip tegra_legacy_irq_syscore_init as well. This is only a temporary measure until that code is removed for good. Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Link: https://lkml.kernel.org/r/1426088583-15097-4-git-send-email-marc.zyngier@arm.com Signed-off-by: Jason Cooper <jason@lakedaemon.net> |
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Marc Zyngier
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b3aa14c399 |
ARM: tegra: irq: nuke leftovers from non-DT support
The GIC is now always initialized from DT on tegra, and there is no point in keeping non-DT init code. Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Link: https://lkml.kernel.org/r/1426088583-15097-2-git-send-email-marc.zyngier@arm.com Signed-off-by: Jason Cooper <jason@lakedaemon.net> |
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Linus Torvalds
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18a8d49973 |
The clock framework changes for 3.20 contain the usual driver additions,
enhancements and fixes mostly for ARM32, ARM64, MIPS and Power-based devices. Additionaly the framework core underwent a bit of surgery with two major changes. The boundary between the clock core and clock providers (e.g clock drivers) is now more well defined with dedicated provider helper functions. struct clk no longer maps 1:1 with the hardware clock but is a true per-user cookie which helps us tracker users of hardware clocks and debug bad behavior. The second major change is the addition of rate constraints for clocks. Rate ranges are now supported which are analogous to the voltage ranges in the regulator framework. Unfortunately these changes to the core created some breakeage. We think we fixed it all up but for this reason there are lots of last minute commits trying to undo the damage. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJU54D5AAoJEDqPOy9afJhJs6AQAK5YuUwjDchdpNZx9p7OnT1q +poehuUwE/gYjmdACqYFyaPrI/9f43iNCfFAgKGLQqmB5ZK4sm4ktzfBEhjWINR2 iiCx9QYMQVGiKwC8KU0ddeBciglE2b/DwxB45m9TsJEjowucUeBzwLEIj5DsGxf7 teXRoOWgXdz1MkQJ4pnA09Q3qEPQgmu8prhMfka/v75/yn7nb9VWiJ6seR2GqTKY sIKL9WbKjN4AzctggdqHnMSIqZoq6vew850bv2C1fPn7GiYFQfWW+jvMlVY40dp8 nNa2ixSQSIXVw4fCtZhTIZcIvZ8puc7WVLcl8fz3mUe3VJn1VaGs0E+Yd3GexpIV 7bwkTOIdS8gSRlsUaIPiMnUob5TUMmMqjF4KIh/AhP4dYrmVbU7Ie8ccvSxe31Ku lK7ww6BFv3KweTnW/58856ZXDlXLC6x3KT+Fw58L23VhPToFgYOdTxn8AVtE/LKP YR3UnY9BqFx6WHXVoNvg3Piyej7RH8fYmE9om8tyWc/Ab8Eo501SHs9l3b2J8snf w/5STd2CYxyKf1/9JLGnBvGo754O9NvdzBttRlygB14gCCtS/SDk/ELG2Ae+/a9P YgRk2+257h8PMD3qlp94dLidEZN4kYxP/J6oj0t1/TIkERWfZjzkg5tKn3/hEcU9 qM97ZBTplTm6FM+Dt/Vk =zCVK -----END PGP SIGNATURE----- Merge tag 'clk-for-linus-3.20' of git://git.linaro.org/people/mike.turquette/linux Pull clock framework updates from Mike Turquette: "The clock framework changes contain the usual driver additions, enhancements and fixes mostly for ARM32, ARM64, MIPS and Power-based devices. Additionally the framework core underwent a bit of surgery with two major changes: - The boundary between the clock core and clock providers (e.g clock drivers) is now more well defined with dedicated provider helper functions. struct clk no longer maps 1:1 with the hardware clock but is a true per-user cookie which helps us tracker users of hardware clocks and debug bad behavior. - The addition of rate constraints for clocks. Rate ranges are now supported which are analogous to the voltage ranges in the regulator framework. Unfortunately these changes to the core created some breakeage. We think we fixed it all up but for this reason there are lots of last minute commits trying to undo the damage" * tag 'clk-for-linus-3.20' of git://git.linaro.org/people/mike.turquette/linux: (113 commits) clk: Only recalculate the rate if needed Revert "clk: mxs: Fix invalid 32-bit access to frac registers" clk: qoriq: Add support for the platform PLL powerpc/corenet: Enable CLK_QORIQ clk: Replace explicit clk assignment with __clk_hw_set_clk clk: Add __clk_hw_set_clk helper function clk: Don't dereference parent clock if is NULL MIPS: Alchemy: Remove bogus args from alchemy_clk_fgcs_detr clkdev: Always allocate a struct clk and call __clk_get() w/ CCF clk: shmobile: div6: Avoid division by zero in .round_rate() clk: mxs: Fix invalid 32-bit access to frac registers clk: omap: compile legacy omap3 clocks conditionally clkdev: Export clk_register_clkdev clk: Add rate constraints to clocks clk: remove clk-private.h pci: xgene: do not use clk-private.h arm: omap2+ remove dead clock code clk: Make clk API return per-user struct clk instances clk: tegra: Define PLLD_DSI and remove dsia(b)_mux clk: tegra: Add support for the Tegra132 CAR IP block ... |
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Peter De Schrijver
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d0a57bd5b5 |
clk: tegra: make tegra_clocks_apply_init_table() arch_initcall
tegra_clocks_apply_init_table() needs to be called after the udelay
loop has been calibrated (see commit
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Thierry Reding
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910978e753 |
clocksource: Build Tegra timer on 32-bit ARM only
Instead of directly using the ARCH_TEGRA Kconfig symbol to enable this driver, add a new, non-user-visible Kconfig symbol (TEGRA_TIMER) which can be selected by the various SoCs. This is useful to disable building the driver on Tegra132 (64-bit ARM) where it doesn't currently compile but also isn't needed (yet). Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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Linus Torvalds
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92a578b064 |
ACPI and power management updates for 3.19-rc1
This time we have some more new material than we used to have during the last couple of development cycles. The most important part of it to me is the introduction of a unified interface for accessing device properties provided by platform firmware. It works with Device Trees and ACPI in a uniform way and drivers using it need not worry about where the properties come from as long as the platform firmware (either DT or ACPI) makes them available. It covers both devices and "bare" device node objects without struct device representation as that turns out to be necessary in some cases. This has been in the works for quite a few months (and development cycles) and has been approved by all of the relevant maintainers. On top of that, some drivers are switched over to the new interface (at25, leds-gpio, gpio_keys_polled) and some additional changes are made to the core GPIO subsystem to allow device drivers to manipulate GPIOs in the "canonical" way on platforms that provide GPIO information in their ACPI tables, but don't assign names to GPIO lines (in which case the driver needs to do that on the basis of what it knows about the device in question). That also has been approved by the GPIO core maintainers and the rfkill driver is now going to use it. Second is support for hardware P-states in the intel_pstate driver. It uses CPUID to detect whether or not the feature is supported by the processor in which case it will be enabled by default. However, it can be disabled entirely from the kernel command line if necessary. Next is support for a platform firmware interface based on ACPI operation regions used by the PMIC (Power Management Integrated Circuit) chips on the Intel Baytrail-T and Baytrail-T-CR platforms. That interface is used for manipulating power resources and for thermal management: sensor temperature reporting, trip point setting and so on. Also the ACPI core is now going to support the _DEP configuration information in a limited way. Basically, _DEP it supposed to reflect off-the-hierarchy dependencies between devices which may be very indirect, like when AML for one device accesses locations in an operation region handled by another device's driver (usually, the device depended on this way is a serial bus or GPIO controller). The support added this time is sufficient to make the ACPI battery driver work on Asus T100A, but it is general enough to be able to cover some other use cases in the future. Finally, we have a new cpufreq driver for the Loongson1B processor. In addition to the above, there are fixes and cleanups all over the place as usual and a traditional ACPICA update to a recent upstream release. As far as the fixes go, the ACPI LPSS (Low-power Subsystem) driver for Intel platforms should be able to handle power management of the DMA engine correctly, the cpufreq-dt driver should interact with the thermal subsystem in a better way and the ACPI backlight driver should handle some more corner cases, among other things. On top of the ACPICA update there are fixes for race conditions in the ACPICA's interrupt handling code which might lead to some random and strange looking failures on some systems. In the cleanups department the most visible part is the series of commits targeted at getting rid of the CONFIG_PM_RUNTIME configuration option. That was triggered by a discussion regarding the generic power domains code during which we realized that trying to support certain combinations of PM config options was painful and not really worth it, because nobody would use them in production anyway. For this reason, we decided to make CONFIG_PM_SLEEP select CONFIG_PM_RUNTIME and that lead to the conclusion that the latter became redundant and CONFIG_PM could be used instead of it. The material here makes that replacement in a major part of the tree, but there will be at least one more batch of that in the second part of the merge window. Specifics: - Support for retrieving device properties information from ACPI _DSD device configuration objects and a unified device properties interface for device drivers (and subsystems) on top of that. As stated above, this works with Device Trees and ACPI and allows device drivers to be written in a platform firmware (DT or ACPI) agnostic way. The at25, leds-gpio and gpio_keys_polled drivers are now going to use this new interface and the GPIO subsystem is additionally modified to allow device drivers to assign names to GPIO resources returned by ACPI _CRS objects (in case _DSD is not present or does not provide the expected data). The changes in this set are mostly from Mika Westerberg, Rafael J Wysocki, Aaron Lu, and Darren Hart with some fixes from others (Fabio Estevam, Geert Uytterhoeven). - Support for Hardware Managed Performance States (HWP) as described in Volume 3, section 14.4, of the Intel SDM in the intel_pstate driver. CPUID is used to detect whether or not the feature is supported by the processor. If supported, it will be enabled automatically unless the intel_pstate=no_hwp switch is present in the kernel command line. From Dirk Brandewie. - New Intel Broadwell-H ID for intel_pstate (Dirk Brandewie). - Support for firmware interface based on ACPI operation regions used by the PMIC chips on the Intel Baytrail-T and Baytrail-T-CR platforms for power resource control and thermal management (Aaron Lu). - Limited support for retrieving off-the-hierarchy dependencies between devices from ACPI _DEP device configuration objects and deferred probing support for the ACPI battery driver based on the _DEP information to make that driver work on Asus T100A (Lan Tianyu). - New cpufreq driver for the Loongson1B processor (Kelvin Cheung). - ACPICA update to upstream revision 20141107 which only affects tools (Bob Moore). - Fixes for race conditions in the ACPICA's interrupt handling code and in the ACPI code related to system suspend and resume (Lv Zheng and Rafael J Wysocki). - ACPI core fix for an RCU-related issue in the ioremap() regions management code that slowed down significantly after CPUs had been allowed to enter idle states even if they'd had RCU callbakcs queued and triggered some problems in certain proprietary graphics driver (and elsewhere). The fix replaces synchronize_rcu() in that code with synchronize_rcu_expedited() which makes the issue go away. From Konstantin Khlebnikov. - ACPI LPSS (Low-Power Subsystem) driver fix to handle power management of the DMA engine included into the LPSS correctly. The problem is that the DMA engine doesn't have ACPI PM support of its own and it simply is turned off when the last LPSS device having ACPI PM support goes into D3cold. To work around that, the PM domain used by the ACPI LPSS driver is redesigned so at least one device with ACPI PM support will be on as long as the DMA engine is in use. From Andy Shevchenko. - ACPI backlight driver fix to avoid using it on "Win8-compatible" systems where it doesn't work and where it was used by default by mistake (Aaron Lu). - Assorted minor ACPI core fixes and cleanups from Tomasz Nowicki, Sudeep Holla, Huang Rui, Hanjun Guo, Fabian Frederick, and Ashwin Chaugule (mostly related to the upcoming ARM64 support). - Intel RAPL (Running Average Power Limit) power capping driver fixes and improvements including new processor IDs (Jacob Pan). - Generic power domains modification to power up domains after attaching devices to them to meet the expectations of device drivers and bus types assuming devices to be accessible at probe time (Ulf Hansson). - Preliminary support for controlling device clocks from the generic power domains core code and modifications of the ARM/shmobile platform to use that feature (Ulf Hansson). - Assorted minor fixes and cleanups of the generic power domains core code (Ulf Hansson, Geert Uytterhoeven). - Assorted minor fixes and cleanups of the device clocks control code in the PM core (Geert Uytterhoeven, Grygorii Strashko). - Consolidation of device power management Kconfig options by making CONFIG_PM_SLEEP select CONFIG_PM_RUNTIME and removing the latter which is now redundant (Rafael J Wysocki and Kevin Hilman). That is the first batch of the changes needed for this purpose. - Core device runtime power management support code cleanup related to the execution of callbacks (Andrzej Hajda). - cpuidle ARM support improvements (Lorenzo Pieralisi). - cpuidle cleanup related to the CPUIDLE_FLAG_TIME_VALID flag and a new MAINTAINERS entry for ARM Exynos cpuidle (Daniel Lezcano and Bartlomiej Zolnierkiewicz). - New cpufreq driver callback (->ready) to be executed when the cpufreq core is ready to use a given policy object and cpufreq-dt driver modification to use that callback for cooling device registration (Viresh Kumar). - cpufreq core fixes and cleanups (Viresh Kumar, Vince Hsu, James Geboski, Tomeu Vizoso). - Assorted fixes and cleanups in the cpufreq-pcc, intel_pstate, cpufreq-dt, pxa2xx cpufreq drivers (Lenny Szubowicz, Ethan Zhao, Stefan Wahren, Petr Cvek). - OPP (Operating Performance Points) framework modification to allow OPPs to be removed too and update of a few cpufreq drivers (cpufreq-dt, exynos5440, imx6q, cpufreq) to remove OPPs (added during initialization) on driver removal (Viresh Kumar). - Hibernation core fixes and cleanups (Tina Ruchandani and Markus Elfring). - PM Kconfig fix related to CPU power management (Pankaj Dubey). - cpupower tool fix (Prarit Bhargava). / -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.22 (GNU/Linux) iQIcBAABCAAGBQJUhj6JAAoJEILEb/54YlRxTM4P/j5g5SfqvY0QKsn7sR7MGZ6v nsgCBhJAqTw3ocNC7EAs8z9h2GWy1KbKpakKYWAh9Fs1yZoey7tFSlcv/Rgjlp70 uU5sDQHtpE9mHKiymdsowiQuWgpl962L4k+k8hUslhlvgk1PvVbpajR6OqG8G+pD asuIW9eh1APNkLyXmRJ3ZPomzs0VmRdZJ0NEs0lKX9mJskqEvxPIwdaxq3iaJq9B Fo0J345zUDcJnxWblDRdHlOigCimglElfN5qJwaC4KpwUKuBvLRKbp4f69+wfT0c kYFiR29X5KjJ2kLfP/wKsLyuDCYYXRq3tCia5M1tAqOjZ+UA89H/GDftx/5lntmv qUlBa35VfdS1SX4HyApZitOHiLgo+It/hl8Z9bJnhyVw66NxmMQ8JYN2imb8Lhqh XCLR7BxLTah82AapLJuQ0ZDHPzZqMPG2veC2vAzRMYzVijict/p4Y2+qBqONltER 4rs9uRVn+hamX33lCLg8BEN8zqlnT3rJFIgGaKjq/wXHAU/zpE9CjOrKMQcAg9+s t51XMNPwypHMAYyGVhEL89ImjXnXxBkLRuquhlmEpvQchIhR+mR3dLsarGn7da44 WPIQJXzcsojXczcwwfqsJCR4I1FTFyQIW+UNh02GkDRgRovQqo+Jk762U7vQwqH+ LBdhvVaS1VW4v+FWXEoZ =5dox -----END PGP SIGNATURE----- Merge tag 'pm+acpi-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm Pull ACPI and power management updates from Rafael Wysocki: "This time we have some more new material than we used to have during the last couple of development cycles. The most important part of it to me is the introduction of a unified interface for accessing device properties provided by platform firmware. It works with Device Trees and ACPI in a uniform way and drivers using it need not worry about where the properties come from as long as the platform firmware (either DT or ACPI) makes them available. It covers both devices and "bare" device node objects without struct device representation as that turns out to be necessary in some cases. This has been in the works for quite a few months (and development cycles) and has been approved by all of the relevant maintainers. On top of that, some drivers are switched over to the new interface (at25, leds-gpio, gpio_keys_polled) and some additional changes are made to the core GPIO subsystem to allow device drivers to manipulate GPIOs in the "canonical" way on platforms that provide GPIO information in their ACPI tables, but don't assign names to GPIO lines (in which case the driver needs to do that on the basis of what it knows about the device in question). That also has been approved by the GPIO core maintainers and the rfkill driver is now going to use it. Second is support for hardware P-states in the intel_pstate driver. It uses CPUID to detect whether or not the feature is supported by the processor in which case it will be enabled by default. However, it can be disabled entirely from the kernel command line if necessary. Next is support for a platform firmware interface based on ACPI operation regions used by the PMIC (Power Management Integrated Circuit) chips on the Intel Baytrail-T and Baytrail-T-CR platforms. That interface is used for manipulating power resources and for thermal management: sensor temperature reporting, trip point setting and so on. Also the ACPI core is now going to support the _DEP configuration information in a limited way. Basically, _DEP it supposed to reflect off-the-hierarchy dependencies between devices which may be very indirect, like when AML for one device accesses locations in an operation region handled by another device's driver (usually, the device depended on this way is a serial bus or GPIO controller). The support added this time is sufficient to make the ACPI battery driver work on Asus T100A, but it is general enough to be able to cover some other use cases in the future. Finally, we have a new cpufreq driver for the Loongson1B processor. In addition to the above, there are fixes and cleanups all over the place as usual and a traditional ACPICA update to a recent upstream release. As far as the fixes go, the ACPI LPSS (Low-power Subsystem) driver for Intel platforms should be able to handle power management of the DMA engine correctly, the cpufreq-dt driver should interact with the thermal subsystem in a better way and the ACPI backlight driver should handle some more corner cases, among other things. On top of the ACPICA update there are fixes for race conditions in the ACPICA's interrupt handling code which might lead to some random and strange looking failures on some systems. In the cleanups department the most visible part is the series of commits targeted at getting rid of the CONFIG_PM_RUNTIME configuration option. That was triggered by a discussion regarding the generic power domains code during which we realized that trying to support certain combinations of PM config options was painful and not really worth it, because nobody would use them in production anyway. For this reason, we decided to make CONFIG_PM_SLEEP select CONFIG_PM_RUNTIME and that lead to the conclusion that the latter became redundant and CONFIG_PM could be used instead of it. The material here makes that replacement in a major part of the tree, but there will be at least one more batch of that in the second part of the merge window. Specifics: - Support for retrieving device properties information from ACPI _DSD device configuration objects and a unified device properties interface for device drivers (and subsystems) on top of that. As stated above, this works with Device Trees and ACPI and allows device drivers to be written in a platform firmware (DT or ACPI) agnostic way. The at25, leds-gpio and gpio_keys_polled drivers are now going to use this new interface and the GPIO subsystem is additionally modified to allow device drivers to assign names to GPIO resources returned by ACPI _CRS objects (in case _DSD is not present or does not provide the expected data). The changes in this set are mostly from Mika Westerberg, Rafael J Wysocki, Aaron Lu, and Darren Hart with some fixes from others (Fabio Estevam, Geert Uytterhoeven). - Support for Hardware Managed Performance States (HWP) as described in Volume 3, section 14.4, of the Intel SDM in the intel_pstate driver. CPUID is used to detect whether or not the feature is supported by the processor. If supported, it will be enabled automatically unless the intel_pstate=no_hwp switch is present in the kernel command line. From Dirk Brandewie. - New Intel Broadwell-H ID for intel_pstate (Dirk Brandewie). - Support for firmware interface based on ACPI operation regions used by the PMIC chips on the Intel Baytrail-T and Baytrail-T-CR platforms for power resource control and thermal management (Aaron Lu). - Limited support for retrieving off-the-hierarchy dependencies between devices from ACPI _DEP device configuration objects and deferred probing support for the ACPI battery driver based on the _DEP information to make that driver work on Asus T100A (Lan Tianyu). - New cpufreq driver for the Loongson1B processor (Kelvin Cheung). - ACPICA update to upstream revision 20141107 which only affects tools (Bob Moore). - Fixes for race conditions in the ACPICA's interrupt handling code and in the ACPI code related to system suspend and resume (Lv Zheng and Rafael J Wysocki). - ACPI core fix for an RCU-related issue in the ioremap() regions management code that slowed down significantly after CPUs had been allowed to enter idle states even if they'd had RCU callbakcs queued and triggered some problems in certain proprietary graphics driver (and elsewhere). The fix replaces synchronize_rcu() in that code with synchronize_rcu_expedited() which makes the issue go away. From Konstantin Khlebnikov. - ACPI LPSS (Low-Power Subsystem) driver fix to handle power management of the DMA engine included into the LPSS correctly. The problem is that the DMA engine doesn't have ACPI PM support of its own and it simply is turned off when the last LPSS device having ACPI PM support goes into D3cold. To work around that, the PM domain used by the ACPI LPSS driver is redesigned so at least one device with ACPI PM support will be on as long as the DMA engine is in use. From Andy Shevchenko. - ACPI backlight driver fix to avoid using it on "Win8-compatible" systems where it doesn't work and where it was used by default by mistake (Aaron Lu). - Assorted minor ACPI core fixes and cleanups from Tomasz Nowicki, Sudeep Holla, Huang Rui, Hanjun Guo, Fabian Frederick, and Ashwin Chaugule (mostly related to the upcoming ARM64 support). - Intel RAPL (Running Average Power Limit) power capping driver fixes and improvements including new processor IDs (Jacob Pan). - Generic power domains modification to power up domains after attaching devices to them to meet the expectations of device drivers and bus types assuming devices to be accessible at probe time (Ulf Hansson). - Preliminary support for controlling device clocks from the generic power domains core code and modifications of the ARM/shmobile platform to use that feature (Ulf Hansson). - Assorted minor fixes and cleanups of the generic power domains core code (Ulf Hansson, Geert Uytterhoeven). - Assorted minor fixes and cleanups of the device clocks control code in the PM core (Geert Uytterhoeven, Grygorii Strashko). - Consolidation of device power management Kconfig options by making CONFIG_PM_SLEEP select CONFIG_PM_RUNTIME and removing the latter which is now redundant (Rafael J Wysocki and Kevin Hilman). That is the first batch of the changes needed for this purpose. - Core device runtime power management support code cleanup related to the execution of callbacks (Andrzej Hajda). - cpuidle ARM support improvements (Lorenzo Pieralisi). - cpuidle cleanup related to the CPUIDLE_FLAG_TIME_VALID flag and a new MAINTAINERS entry for ARM Exynos cpuidle (Daniel Lezcano and Bartlomiej Zolnierkiewicz). - New cpufreq driver callback (->ready) to be executed when the cpufreq core is ready to use a given policy object and cpufreq-dt driver modification to use that callback for cooling device registration (Viresh Kumar). - cpufreq core fixes and cleanups (Viresh Kumar, Vince Hsu, James Geboski, Tomeu Vizoso). - Assorted fixes and cleanups in the cpufreq-pcc, intel_pstate, cpufreq-dt, pxa2xx cpufreq drivers (Lenny Szubowicz, Ethan Zhao, Stefan Wahren, Petr Cvek). - OPP (Operating Performance Points) framework modification to allow OPPs to be removed too and update of a few cpufreq drivers (cpufreq-dt, exynos5440, imx6q, cpufreq) to remove OPPs (added during initialization) on driver removal (Viresh Kumar). - Hibernation core fixes and cleanups (Tina Ruchandani and Markus Elfring). - PM Kconfig fix related to CPU power management (Pankaj Dubey). - cpupower tool fix (Prarit Bhargava)" * tag 'pm+acpi-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (120 commits) i2c-omap / PM: Drop CONFIG_PM_RUNTIME from i2c-omap.c dmaengine / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM tools: cpupower: fix return checks for sysfs_get_idlestate_count() drivers: sh / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM e1000e / igb / PM: Eliminate CONFIG_PM_RUNTIME MMC / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM MFD / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM misc / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM media / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM input / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM leds: leds-gpio: Fix multiple instances registration without 'label' property iio / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM hsi / OMAP / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM i2c-hid / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM drm / exynos / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM gpio / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM hwrandom / exynos / PM: Use CONFIG_PM in #ifdef block / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM USB / PM: Drop CONFIG_PM_RUNTIME from the USB core PM: Merge the SET*_RUNTIME_PM_OPS() macros ... |
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Linus Torvalds
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3a647c1d7a |
ARM: SoC driver updates for 3.19
These are changes for drivers that are intimately tied to some SoC and for some reason could not get merged through the respective subsystem maintainer tree. The largest single change here this time around is the Tegra iommu/memory controller driver, which gets updated to the new iommu DT binding. More drivers like this are likely to follow for the following merge window, but we should be able to do those through the iommu maintainer. Other notable changes are: * reset controller drivers from the reset maintainer (socfpga, sti, berlin) * fixes for the keystone navigator driver merged last time * at91 rtc driver changes related to the at91 cleanups * ARM perf driver changes from Will Deacon * updates for the brcmstb_gisb driver -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIVAwUAVIcj4mCrR//JCVInAQIvWg//WD72+2q0RmEvu8r/YN4SDfg5iY7OMzgy Jyt6rN1IhXBY5GJL5Hil1q2JP/7o8vypekllohmBYWzXO3ZJ2VK6NPIXEMuzaiCz D9gmb+N6FdR2L2iYPv7B/3uOf55pHjBu525+vLspCTOgcWBrLgCnA9e9Yg462AEf VP3x+kV0AH25lovEi3mPrc2e46jnl0Mzp3f3PCkPqRSEMn7sxu9ipii+elxvArYp jYYCB03ZEBFa7T0e4HD38gnVLbC6dTj47AcSCWYP9WhxJ2RmCQKRBEnJre02hgar NPg8z+OrUACIAkvJHzg3WccmXdi0aqQ2JDsl46Tkl7pA6NdyMLfizT3OiZnMRmgc 34H0ZSxclW+j25aI8OmDpv2ypZev+UAzkbRobcvF+aV/zJeAX88tPgcshfCUVZll ZIqO7oJB73nCl1XBLv2ZrLV2tcOox6jL/5LQt0WYA5Szg5upo7D1fZl8v5jXX7eJ C62ychuABs6hsmH5jEy+73kdpHbYft7dZfGZxdgq1AIOkdWoynCze/R7Vj24xoXR 118cTNN9ZTPHmN5yxUvuGoqA3FWOqkJXaTS4W0hRD6OxOGTsTV4FIlRnD+K7feOW ng1yfIcvKR1Dx7tsySTHQK+bZGNnovA/ENPK6VDuhbwE62Lx7N5hcbsSIKKwRI9C D1m1fC+AIcQ= =MwMG -----END PGP SIGNATURE----- Merge tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver updates from Arnd Bergmann: "These are changes for drivers that are intimately tied to some SoC and for some reason could not get merged through the respective subsystem maintainer tree. The largest single change here this time around is the Tegra iommu/memory controller driver, which gets updated to the new iommu DT binding. More drivers like this are likely to follow for the following merge window, but we should be able to do those through the iommu maintainer. Other notable changes are: - reset controller drivers from the reset maintainer (socfpga, sti, berlin) - fixes for the keystone navigator driver merged last time - at91 rtc driver changes related to the at91 cleanups - ARM perf driver changes from Will Deacon - updates for the brcmstb_gisb driver" * tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (53 commits) clocksource: arch_timer: Allow the device tree to specify uninitialized timer registers clocksource: arch_timer: Fix code to use physical timers when requested memory: Add NVIDIA Tegra memory controller support bus: brcmstb_gisb: Add register offset tables for older chips bus: brcmstb_gisb: Look up register offsets in a table bus: brcmstb_gisb: Introduce wrapper functions for MMIO accesses bus: brcmstb_gisb: Make the driver buildable on MIPS of: Add NVIDIA Tegra memory controller binding ARM: tegra: Move AHB Kconfig to drivers/amba amba: Add Kconfig file clk: tegra: Implement memory-controller clock serial: samsung: Fix serial config dependencies for exynos7 bus: brcmstb_gisb: resolve section mismatch ARM: common: edma: edma_pm_resume may be unused ARM: common: edma: add suspend resume hook powerpc/iommu: Rename iommu_[un]map_sg functions rtc: at91sam9: add DT bindings documentation rtc: at91sam9: use clk API instead of relying on AT91_SLOW_CLOCK ARM: at91: add clk_lookup entry for RTT devices rtc: at91sam9: rework the Kconfig description ... |
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Linus Torvalds
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6cd94d5e57 |
ARM: SoC platform changes for 3.19
New and updated SoC support, notable changes include: * bcm: brcmstb SMP support * bcm: initial iproc/cygnus support * exynos: Exynos4415 SoC support * exynos: PMU and suspend support for Exynos5420 * exynos: PMU support for Exynos3250 * exynos: pm related maintenance * imx: new LS1021A SoC support * imx: vybrid 610 global timer support * integrator: convert to using multiplatform configuration * mediatek: earlyprintk support for mt8127/mt8135 * meson: meson8 soc and l2 cache controller support * mvebu: Armada 38x CPU hotplug support * mvebu: drop support for prerelease Armada 375 Z1 stepping * mvebu: extended suspend support, now works on Armada 370/XP * omap: hwmod related maintenance * omap: prcm cleanup * pxa: initial pxa27x DT handling * rockchip: SMP support for rk3288 * rockchip: add cpu frequency scaling support * shmobile: r8a7740 power domain support * shmobile: various small restart, timer, pci apmu changes * sunxi: Allwinner A80 (sun9i) earlyprintk support * ux500: power domain support Overall, a significant chunk of changes, coming mostly from the usual suspects: omap, shmobile, samsung and mvebu, all of which already contain a lot of platform specific code in arch/arm. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIVAwUAVIcjyGCrR//JCVInAQJJCRAA1Tm+HZGiAiTvXEAcm/T9tIA08uqtawHt cqyEAUyrnE8QxE4EhUd2pTw4EunVusqKF5EsDxOzw7b3ukUdLAWZE7bqBOSIJLqn hrfsQQ8dXLbyC7T/CHPnBVeM+pn9LiIc9qzpZ0YToiMnHBBI4vKFQntBjd31yoRE hN08I6AmDjQolOzzlqR1fuM0uZaKiHIcytdauTt3Vfqgg7FTHcTy3u1kClHTR1Lp m/KuDothGpR5OKjSnUQz7EO5V3KJEnaKey8z2xM1a7DLLAvJ6r2+DUaDopv9Dbz1 W/V3H7fi5tLvillVa8xmlmzqWZbPc1xw8MWqvHZSWIMRZqloAHpC1VWKn0ZuH4SW 5Bj4ubSrpYjJxjKYfrxtjmuzru3A2jWBNTSP5A4nsny0C3AUsXkfRmRS0VNdegF8 sUdQ1MF8vEMpQT3QPH88+ccFHeIgqbcayhKqLPf7r8q0kwlym5N7Y2amU2A/O6qz +324r+yzfSA70VgJZ5EhXxWVDOPB4Lc8EtoWnH6T/kjncIMwzEsbEbyB3X1OaREW pVn3PNo06VjHLYoiHX+8G99pOFR/JZvaQs6jGCXLs+Orjp5WfP+kafkWqcB5GAKU Pfd3AQsl6rKAITdu0XsTdPiICNS4CmBiWYPepQsTa3pQaNgB7fwZNQKelNRIdGc+ dF1lnQ7CXLQ= =lFoH -----END PGP SIGNATURE----- Merge tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform changes from Arnd Bergmann: "New and updated SoC support, notable changes include: - bcm: brcmstb SMP support initial iproc/cygnus support - exynos: Exynos4415 SoC support PMU and suspend support for Exynos5420 PMU support for Exynos3250 pm related maintenance - imx: new LS1021A SoC support vybrid 610 global timer support - integrator: convert to using multiplatform configuration - mediatek: earlyprintk support for mt8127/mt8135 - meson: meson8 soc and l2 cache controller support - mvebu: Armada 38x CPU hotplug support drop support for prerelease Armada 375 Z1 stepping extended suspend support, now works on Armada 370/XP - omap: hwmod related maintenance prcm cleanup - pxa: initial pxa27x DT handling - rockchip: SMP support for rk3288 add cpu frequency scaling support - shmobile: r8a7740 power domain support various small restart, timer, pci apmu changes - sunxi: Allwinner A80 (sun9i) earlyprintk support - ux500: power domain support Overall, a significant chunk of changes, coming mostly from the usual suspects: omap, shmobile, samsung and mvebu, all of which already contain a lot of platform specific code in arch/arm" * tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (187 commits) ARM: mvebu: use the cpufreq-dt platform_data for independent clocks soc: integrator: Add terminating entry for integrator_cm_match ARM: mvebu: add SDRAM controller description for Armada XP ARM: mvebu: adjust mbus controller description on Armada 370/XP ARM: mvebu: add suspend/resume DT information for Armada XP GP ARM: mvebu: synchronize secondary CPU clocks on resume ARM: mvebu: make sure MMU is disabled in armada_370_xp_cpu_resume ARM: mvebu: Armada XP GP specific suspend/resume code ARM: mvebu: reserve the first 10 KB of each memory bank for suspend/resume ARM: mvebu: implement suspend/resume support for Armada XP clk: mvebu: add suspend/resume for gatable clocks bus: mvebu-mbus: provide a mechanism to save SDRAM window configuration bus: mvebu-mbus: suspend/resume support clocksource: time-armada-370-xp: add suspend/resume support irqchip: armada-370-xp: Add suspend/resume support ARM: add lolevel debug support for asm9260 ARM: add mach-asm9260 ARM: EXYNOS: use u8 for val[] in struct exynos_pmu_conf power: reset: imx-snvs-poweroff: add power off driver for i.mx6 ARM: imx: temporarily remove CONFIG_SOC_FSL from LS1021A ... |
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Linus Torvalds
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0a9e0acddb |
ARM: SoC non-critical bug fixes for 3.19
These are bug fixes for harmless problems that were not important enough to get fixed in 3.19. This contains updates to the MAINTAINERS file, in particular: - Ben Dooks stepped down as Samsung co-maintainer (thanks Ben for long years of maintaining this). Kukjin Kim, who has been doing the work de-facto by himself recently is now the only maintainer. - Liviu, Sudeep and Lorenzo from ARM now officially maintain the Versatile Express platform, which was orphaned (thanks for - Gregory Fong and Florian Fainelli help out on the Broadcom BCM7XXX platform - Ray Jui and Scott Branden are the future maintainers for the newly merged Broadcom Cygnus platform. Welcome! In terms of actual fixes, we have the usual set of OMAP bug fixes, which Tony Lindgren separates out well from the other OMAP changes, one really ep93xx regression fix against 3.11 that didn't make it for 3.18, a few GIC changes from Marc Zyngier as a preparation for later rework (the current code is wrong in a harmless way), on Tegra regression and one samsung spelling fix. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIVAwUAVIcj22CrR//JCVInAQJyXg/9EPrOpgNBpcCE2pfprc2JmoBqM11C8IDX 1qCP1hMbIhqfgWpoR3DptmiDpUpck5Fwn8L7M1+bIxVvSK0AAgD0n5hQI/GnmeN5 qk2jdAoUlz7tIADb3/1Yc2X8D6ZiYLakhzyi0LVcWfmsmgW1E+bcbuS4XG9RMccR 6gzuqkZqLSzneiKLN3Dqwela8Q3gHYSMFTETFaRxu7gvPkYgc622ePGvGafD7i+u MYs/sfPwsfuNFMQ/fsdmpGQxNFghwb8Cg0VaEkSBztjV2WiDBD0GMo4Ww5UNr8e7 LvHcoHiYjtnbXHW/b5L5Uswk8BCtWp2udgDHigEbZvj2BfmMlq+qXJ72BwmQb0Nf ow2R67yOiZ2HhG+776OcMI2BpeY6D0jFcHSNjc2Q14tgns3bhfP23taDb5rFJ8G1 5aCHoACTL6X7TkX9W2iwZ5/KWW+Ftx2ardbdzCHWtjTlD/KaK624YRWeXlLASsE1 fMpNMJidDygQHirbk7Byj2Y5IpVtvALAesyoh+VCGblzenREvdH3YE4D0onM5jWz T1kRsv6vgiIodbYNAlgPdNXNNb134fMrYOJkWmeblHV0WIddZTcNlHjgAHK2quRJ bAIER/A+IWKcN6sTgPfvHURcxpW8nhKsPUaSQQqqhdk1tLZquKGAg72eFW12A72f VDMJ+337XD0= =J1gB -----END PGP SIGNATURE----- Merge tag 'fixes-nc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC non-critical bug fixes from Arnd Bergmann: "These are bug fixes for harmless problems that were not important enough to get fixed in 3.19. This contains updates to the MAINTAINERS file, in particular: - Ben Dooks stepped down as Samsung co-maintainer (thanks Ben for long years of maintaining this). Kukjin Kim, who has been doing the work de-facto by himself recently is now the only maintainer. - Liviu, Sudeep and Lorenzo from ARM now officially maintain the Versatile Express platform, which was orphaned (thanks for - Gregory Fong and Florian Fainelli help out on the Broadcom BCM7XXX platform - Ray Jui and Scott Branden are the future maintainers for the newly merged Broadcom Cygnus platform. Welcome! In terms of actual fixes, we have the usual set of OMAP bug fixes, which Tony Lindgren separates out well from the other OMAP changes, one really ep93xx regression fix against 3.11 that didn't make it for 3.18, a few GIC changes from Marc Zyngier as a preparation for later rework (the current code is wrong in a harmless way), on Tegra regression and one samsung spelling fix" * tag 'fixes-nc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: imx6: fix bogus use of irq_get_irq_data ARM: imx: irq: fix buggy usage of irq_data irq field MAINTAINERS: ARM Versatile Express platform, add missing pattern MAINTAINERS: ARM Versatile Express platform arm: ep93xx: add dma_masks for the M2P and M2M DMA controllers MAINTAINERS: Add ahci_st.c to ARCH/STI architecture MAINTAINERS: add entry for the GISB arbiter driver MAINTAINERS: update brcmstb entries MAINTAINERS: update email address and cleanup for exynos entry ARM: tegra: Re-add removed SoC id macro to tegra_resume() MAINTAINERS: Entry for Cygnus/iproc arm architecture ARM: OMAP: serial: remove last vestige of DTR_gpio support. ARM: OMAP2+: gpmc: Get rid of "ti,elm-id not found" warning ARM: EXYNOS: fix typo in static struct name "exynos5_list_diable_wfi_wfe" ARM: OMAP2: Remove unnecessary KERN_* in omap_phy_internal.c ARM: OMAP4+: Remove unused omap_l3_noc platform init ARM: dts: Add twl keypad map for omap3 EVM ARM: dts: Add twl keypad map for LDP ARM: dts: Fix NAND last partition size on LDP ARM: OMAP3: Fix errors for omap_l3_smx when booted with device tree |
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Rafael J. Wysocki
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648fcab2b0 |
Merge branch 'pm-cpuidle'
* pm-cpuidle: cpuidle: add MAINTAINERS entry for ARM Exynos cpuidle driver drivers: cpuidle: Remove cpuidle-arm64 duplicate error messages drivers: cpuidle: Add idle-state-name description to ARM idle states drivers: cpuidle: Add status property to ARM idle states cpuidle: Invert CPUIDLE_FLAG_TIME_VALID logic |
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Marc Zyngier
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9a343b9eb8 |
ARM: tegra: irq: fix buggy usage of irq_data irq field
The crazy gic_arch_extn thing that Tegra uses contains multiple references to the irq field in struct irq_data, and uses this to directly poke hardware register. But irq is the *virtual* irq number, something that has nothing to do with the actual HW irq (stored in the hwirq field). And once we put the stacked domain code in action, the whole thing explodes, as these two values are *very* different: root@bacon-fat:~# cat /proc/interrupts CPU0 CPU1 16: 25801 2075 GIC 29 twd 17: 0 0 GIC 73 timer0 112: 0 0 GPIO 58 c8000600.sdhci cd 123: 0 0 GPIO 69 c8000200.sdhci cd 279: 1126 0 GIC 122 serial 281: 0 0 GIC 70 7000c000.i2c 282: 0 0 GIC 116 7000c400.i2c 283: 0 0 GIC 124 7000c500.i2c 284: 300 0 GIC 85 7000d000.i2c [...] Just replacing all instances of irq with hwirq fixes the issue. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Thierry Reding
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bd968d59ad |
ARM: tegra: Move AHB Kconfig to drivers/amba
This will allow the Kconfig option to be shared among 32-bit and 64-bit ARM. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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Dmitry Osipenko
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e4a680099a |
ARM: tegra: Re-add removed SoC id macro to tegra_resume()
Commit |
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Daniel Lezcano
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b82b6cca48 |
cpuidle: Invert CPUIDLE_FLAG_TIME_VALID logic
The only place where the time is invalid is when the ACPI_CSTATE_FFH entry method is not set. Otherwise for all the drivers, the time can be correctly measured. Instead of duplicating the CPUIDLE_FLAG_TIME_VALID flag in all the drivers for all the states, just invert the logic by replacing it by the flag CPUIDLE_FLAG_TIME_INVALID, hence we can set this flag only for the acpi idle driver, remove the former flag from all the drivers and invert the logic with this flag in the different governor. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> |
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Bartlomiej Zolnierkiewicz
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0b7778a801 |
ARM: firmware: add AFTR mode support to firmware do_idle method
On some platforms (i.e. EXYNOS ones) more than one idle mode is available and we need to distinguish them in firmware do_idle method. Add mode parameter to do_idle firmware method and AFTR mode support to EXYNOS do_idle implementation. This change is a preparation for adding secure firmware support to EXYNOS cpuidle driver. This patch shouldn't cause any functionality changes. Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> |
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Thierry Reding
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783944feaa |
ARM: tegra: Initialize flow controller from DT
Use a matching device tree node to initialize the flow controller driver instead of hard-coding the I/O address. This is necessary to get rid of the iomap.h include, which in turn make it easier to share this code with 64-bit Tegra SoCs. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> |
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Linus Torvalds
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06b49ea43c |
This is the bulk of GPIO changes for the v3.17 development
cycle, and this time we got a lot of action going on and it will continue: - The core GPIO library implementation has been split up in three different files: - gpiolib.c for the latest and greatest and shiny GPIO library code using GPIO descriptors only - gpiolib-legacy.c for the old integer number space API that we are phasing out gradually - gpiolib-sysfs.c for the sysfs interface that we are not entirely happy with, but has to live on for ABI compatibility - Add a flags argument to *gpiod_get* functions, with some backward-compatibility macros to ease transitions. We should have had the flags there from the beginning it seems, now we need to clean up the mess. There is a plan on how to move forward here devised by Alexandre Courbot and Mark Brown. - Split off a special <linux/gpio/machine.h> header for the board gpio table registration, as per example from the regulator subsystem. - Start to kill off the return value from gpiochip_remove() by removing the __must_check attribute and removing all checks inside the drivers/gpio directory. The rationale is: well what were we supposed to do if there is an error code? Not much: print an error message. And gpiolib already does that. So make this function return void eventually. - Some cleanups of hairy gpiolib code, make some functions not to be used outside the library private and make sure they are not exported, remove gpiod_lock/unlock_as_irq() as the existing function is for driver-internal use and fine as it is, delete gpio_ensure_requested() as it is not meaningful anymore. - Support the GPIOF_ACTIVE_LOW flag from gpio_request_one() function calls, which is logical since this is already supported when referencing GPIOs from e.g. device trees. - Switch STMPE, intel-mid, lynxpoint and ACPI (!) to use the gpiolib irqchip helpers cutting down on GPIO irqchip boilerplate a bit more. - New driver for the Zynq GPIO block. - The usual incremental improvements around a bunch of drivers. - Janitorial syntactic and semantic cleanups by Jingoo Han, and Rickard Strandqvist especially. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJT5Ji9AAoJEEEQszewGV1zch8QAKp67+8ScxRBf/7RCSV6U/dy i7kt+nP4au/TScwtjbX264DM8hroW7BzN+GqF10NEFeGkYDR+42lMav9PrNjtKtk ojQPWdoGWzwwL0wa4j9rsuG/pRnbAEgDWPb+EkFdHQsLl6h71fyVoLOK+gKwJFyn aPYGXyNbT1FN38oj1rarENiOUxM7VMXvcJFfvDYFdDDhCS4PLYPOMw0lrsGtsHMZ epDa4z3yt4zHgYiUIT578nQ7EkIbGN3goywk3NQ+9WDQG+sLFHh4BdqcRKg6b9VM I64+47uNQxkyvWCvcLma5ziqvtNQk113986g+cv5YeTh18Ajyio1kxEIZM181eBk ITUPGrAorWHPLGNbe3psLmtK3+/BwmWIurPmHpckuW8d2JWWSVe0oepkUuqDwu/w lUB5KtM0joFOr5k61fj5tCKxH344jc1zvHJ/N+bVYilbOMvunWzuMJlc4hADIGC2 1uxUAcPbYUAphGaxhdMBca9ellm0lWG19Gj5TtdGbRtNgp6R2qrwI66DDzk+1kLR 8Szx6KHQdEHFTlCLKSIAMv33p1ClfmNikhdicT3urwR8PeXmmTR1pD7kGmVTDDZa gXSU5EilgGpak+77j/GZ2Ivp0Qt5M97UwWlZ7zTp++T1ZY+wwTHJI/09qcoWYjdz IpZRIqrQchalbscpn3LY =e+d6 -----END PGP SIGNATURE----- Merge tag 'gpio-v3.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio Pull GPIO update from Linus Walleij: "This is the bulk of GPIO changes for the v3.17 development cycle, and this time we got a lot of action going on and it will continue: - The core GPIO library implementation has been split up in three different files: - gpiolib.c for the latest and greatest and shiny GPIO library code using GPIO descriptors only - gpiolib-legacy.c for the old integer number space API that we are phasing out gradually - gpiolib-sysfs.c for the sysfs interface that we are not entirely happy with, but has to live on for ABI compatibility - Add a flags argument to *gpiod_get* functions, with some backward-compatibility macros to ease transitions. We should have had the flags there from the beginning it seems, now we need to clean up the mess. There is a plan on how to move forward here devised by Alexandre Courbot and Mark Brown - Split off a special <linux/gpio/machine.h> header for the board gpio table registration, as per example from the regulator subsystem - Start to kill off the return value from gpiochip_remove() by removing the __must_check attribute and removing all checks inside the drivers/gpio directory. The rationale is: well what were we supposed to do if there is an error code? Not much: print an error message. And gpiolib already does that. So make this function return void eventually - Some cleanups of hairy gpiolib code, make some functions not to be used outside the library private and make sure they are not exported, remove gpiod_lock/unlock_as_irq() as the existing function is for driver-internal use and fine as it is, delete gpio_ensure_requested() as it is not meaningful anymore - Support the GPIOF_ACTIVE_LOW flag from gpio_request_one() function calls, which is logical since this is already supported when referencing GPIOs from e.g. device trees - Switch STMPE, intel-mid, lynxpoint and ACPI (!) to use the gpiolib irqchip helpers cutting down on GPIO irqchip boilerplate a bit more - New driver for the Zynq GPIO block - The usual incremental improvements around a bunch of drivers - Janitorial syntactic and semantic cleanups by Jingoo Han, and Rickard Strandqvist especially" * tag 'gpio-v3.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (37 commits) MAINTAINERS: update GPIO include files gpio: add missing includes in machine.h gpio: add flags argument to gpiod_get*() functions MAINTAINERS: Update Samsung pin control entry gpio / ACPI: Move event handling registration to gpiolib irqchip helpers gpio: lynxpoint: Convert to use gpiolib irqchip gpio: split gpiod board registration into machine header gpio: remove gpio_ensure_requested() gpio: remove useless check in gpiolib_sysfs_init() gpiolib: Export gpiochip_request_own_desc and gpiochip_free_own_desc gpio: move gpio_ensure_requested() into legacy C file gpio: remove gpiod_lock/unlock_as_irq() gpio: make gpiochip_get_desc() gpiolib-private gpio: simplify gpiochip_export() gpio: remove export of private of_get_named_gpio_flags() gpio: Add support for GPIOF_ACTIVE_LOW to gpio_request_one functions gpio: zynq: Clear pending interrupt when enabling a IRQ gpio: drop retval check enforcing from gpiochip_remove() gpio: remove all usage of gpio_remove retval in driver/gpio devicetree: Add Zynq GPIO devicetree bindings documentation ... |
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Linus Torvalds
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44c916d58b |
ARM: SoC cleanups for 3.17
This merge window brings a good size of cleanups on various platforms. Among the bigger ones: * Removal of Samsung s5pc100 and s5p64xx platforms. Both of these have lacked active support for quite a while, and after asking around nobody showed interest in keeping them around. If needed, they could be resurrected in the future but it's more likely that we would prefer reintroduction of them as DT and multiplatform-enabled platforms instead. * OMAP4 controller code register define diet. They defined a lot of registers that were never actually used, etc. * Move of some of the Tegra platform code (PMC, APBIO, fuse, powergate) to drivers/soc so it can be shared with 64-bit code. This also converts them over to traditional driver models where possible. * Removal of legacy gpio-samsung driver, since the last users have been removed (moved to pinctrl) Plus a bunch of smaller changes for various platforms that sort of dissapear in the diffstat for the above. clps711x cleanups, shmobile header file refactoring/moves for multiplatform friendliness, some misc cleanups, etc. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQIcBAABAgAGBQJT5DYPAAoJEIwa5zzehBx37egQAIiatNiLLqZnfo3rwGADRz/a POfPovktj68aPcobyzoyhFtToMqGvi9PpysyFTIQD2HJFG+5BtiIAuqtg0875zDe EpBWgsfugrm0YktJWAtUerj60oAmNPbKfaEm1cOOWuM2lb2mV+QkRrwSTAgsqkT7 927BzMXKKBRPOVLL0RYhoF8EXa0Eg8kCqAHP8fJrzVYkRp+UrZJDnGiUP1XmWJN+ VXQMu5SEjcPMtqT7+tfX455RfREHJfBcJ1ZN/dPF8HMWDwClQG0lyc6hifh1MxwO 8DjIZNkfZeKqgDqVyC17re7pc7p8md5HL8WXbrKpK0A9vQ5bRexbPHxcwJ1T/C2Y 465H+st5XXbuzV1gbMwjK1/ycsH0tCyffckk8Yl/2e1Fs7GgPNbAELtTdl+5vV1Y xmDXkyo/9WlRM3LQ23IGKwW7VzN86EfWVuShssfro0fO7xDdb4OOYLdQI+4bCG+h ytQYun1vU32OEyNik5RVNQuZaMrv2c93a3bID4owwuPHPmYOPVUQaqnRX/0E51eA aHZYbk2GlUOV3Kq5aSS4iyLg1Yj+I9/NeH9U+A4nc+PQ5FlgGToaVSCuYuw4DqbP AAG+sqQHbkBMvDPobQz/yd1qZbAb4eLhGy11XK1t5S65rApWI55GwNXnvbyxqt8x wpmxJTASGxcfuZZgKXm7 =gbcE -----END PGP SIGNATURE----- Merge tag 'cleanup-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC cleanups from Olof Johansson: "This merge window brings a good size of cleanups on various platforms. Among the bigger ones: - Removal of Samsung s5pc100 and s5p64xx platforms. Both of these have lacked active support for quite a while, and after asking around nobody showed interest in keeping them around. If needed, they could be resurrected in the future but it's more likely that we would prefer reintroduction of them as DT and multiplatform-enabled platforms instead. - OMAP4 controller code register define diet. They defined a lot of registers that were never actually used, etc. - Move of some of the Tegra platform code (PMC, APBIO, fuse, powergate) to drivers/soc so it can be shared with 64-bit code. This also converts them over to traditional driver models where possible. - Removal of legacy gpio-samsung driver, since the last users have been removed (moved to pinctrl) Plus a bunch of smaller changes for various platforms that sort of dissapear in the diffstat for the above. clps711x cleanups, shmobile header file refactoring/moves for multiplatform friendliness, some misc cleanups, etc" * tag 'cleanup-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (117 commits) drivers: CCI: Correct use of ! and & video: clcd-versatile: Depend on ARM video: fix up versatile CLCD helper move MAINTAINERS: Add sdhci-st file to ARCH/STI architecture ARM: EXYNOS: Fix build breakge with PM_SLEEP=n MAINTAINERS: Remove Kirkwood ARM: tegra: Convert PMC to a driver soc/tegra: fuse: Set up in early initcall ARM: tegra: Always lock the CPU reset vector ARM: tegra: Setup CPU hotplug in a pure initcall soc/tegra: Implement runtime check for Tegra SoCs soc/tegra: fuse: fix dummy functions soc/tegra: fuse: move APB DMA into Tegra20 fuse driver soc/tegra: Add efuse and apbmisc bindings soc/tegra: Add efuse driver for Tegra ARM: tegra: move fuse exports to soc/tegra/fuse.h ARM: tegra: export apb dma readl/writel ARM: tegra: Use a function to get the chip ID ARM: tegra: Sort includes alphabetically ARM: tegra: Move includes to include/soc/tegra ... |
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Linus Walleij
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0a6d315827 |
gpio: split gpiod board registration into machine header
As per example from the regulator subsystem: put all defines and functions related to registering board info for GPIO descriptors into a separate <linux/gpio/machine.h> header. Cc: Andrew Victor <linux@maxim.org.za> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Thierry Reding <thierry.reding@gmail.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Reviewed-by: Alexandre Courbot <gnurou@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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Olof Johansson
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c6b659c005 |
ARM: tegra: core code changes for 3.17
Some of the code that's currently called from the Tegra machine setup code is moved to regular initcalls. To catch dependency violations, the various code paths now WARN if they're called to early. Not all of the potential candidates are converted yet, but those that were have been verified to work across all supported Tegra generations. A new function, soc_is_tegra(), is also provided to make sure that the initcalls can abort early if they aren't run on Tegra, which can happen for multi-platform builds. Finally this also moves out the PMC driver to drivers/soc/tegra so that it can be shared with 64-bit ARM. This is based on the for-3.17/fuse-move branch. The split is somewhat arbitrary but allows the dependents of the for-3.17/fuse-move to pull in as little code as necessary. -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIbBAABAgAGBQJTySPxAAoJEN0jrNd/PrOhVIAP+N6yVxQa/8sMYpy7ohr2b/ZP IcevK+9Q3mZYzxVoI1am1p11louZgGFE11yuvI2kmjTLg9UcFC+O6iEc05XvIIIC nVLg4V1F5VWyv0BtnqTAuMX+hOqj9ZFx5Xuq0rpulKLs9aygkKEJnI0eOyMDbnAN OsGmhOeblZkgS0Gk9Dg9NiFPpQ/sl6LRZDoVpYA+fKEb6SCxei5Z48aaUhhHwq2k IVQUcMWz9k4mPjWO9OcO2gkDaq79OYWzk/DP4hFk5telZAkGjJg+UdNWIXSPg9A/ sjMxpkRpTR8sDVPZ3n1YnxJ9sUV3Q88SmN+x78W0QGNbLxELU8Fhd2xPVrA2PAIG +uP0DKkrDi+AV3euEBOIOKTMptrgGDPigT+b127vxUigbQ3D90SV9xN0+/+NaLcv J3msHcjFo9IW03a5q8DBdkeIy4xs7uZW9uR72ie1uUtv2oLkoS/qrwxauj3x8J52 dqtY98xCPtFQnR2HyT7VRLBibGq0zelQ9aYENy5Su+3UI73AIG15ztzrOcEvN8Cc DAbBKgix63TlJF51VlCCLGUMpt1StDoia8A3iMIqNEu/CJqXaqQ/77im4KGybqgm JoH7OHVhewDBxVg2XfwcDX8TnmMQjLTMkzLG8oSg7uAqyrJm0xkC7ttx4gPRlSJX kEQrfqyjbL3C42+4lgc= =w/53 -----END PGP SIGNATURE----- Merge tag 'tegra-for-3.17-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/cleanup Merge "ARM: tegra: core code changes for 3.17" from Thierry Reding: Some of the code that's currently called from the Tegra machine setup code is moved to regular initcalls. To catch dependency violations, the various code paths now WARN if they're called to early. Not all of the potential candidates are converted yet, but those that were have been verified to work across all supported Tegra generations. A new function, soc_is_tegra(), is also provided to make sure that the initcalls can abort early if they aren't run on Tegra, which can happen for multi-platform builds. Finally this also moves out the PMC driver to drivers/soc/tegra so that it can be shared with 64-bit ARM. This is based on the for-3.17/fuse-move branch. The split is somewhat arbitrary but allows the dependents of the for-3.17/fuse-move to pull in as little code as necessary. * tag 'tegra-for-3.17-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: ARM: tegra: Convert PMC to a driver soc/tegra: fuse: Set up in early initcall ARM: tegra: Always lock the CPU reset vector ARM: tegra: Setup CPU hotplug in a pure initcall soc/tegra: Implement runtime check for Tegra SoCs Signed-off-by: Olof Johansson <olof@lixom.net> |
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Olof Johansson
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23e892929e |
ARM: tegra: move fuse code out of arch/arm
This branch moves code related to the Tegra fuses out of arch/arm and into a centralized location which could be shared with ARM64. It also adds support for reading the fuse data through sysfs. Included is also some preparatory work that moves Tegra-related header files from include/linux to include/soc/tegra as suggested by Arnd. Furthermore the Tegra chip ID is now retrieved using a function rather than a variable so that sanity checks can be done. This is convenient in subsequent patches that will move some of the code that's currently called from Tegra machine setup into regular initcalls so that it can be reused on 64-bit ARM. The sanity checks help with verifying that no code tries to obtain the Tegra chip ID before the underlying driver is properly initialized. -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABAgAGBQJTyR7HAAoJEN0jrNd/PrOhXRoQAKIs/o8Xf6aTb48OOODFt8g0 3GiKaYfVPk6VzkrhywmulOndmYy9BjLwhX2jnPgPzFbM5h2jk39/PK3RtssD92Wm sHbDflbCj+gaLvjETbTWtYbbYmejqp2xhte/F+MMT0QJKl8BjmyO6WOoUL1+QEyW p+OUYRgasmyAiq7qov1MeMW+edNqFHhHpmnsva62NUbcOaKTJ6U6antm79PoAA9M Da3UScoX9BxqsyuxBteLdcpgSgOHjW/eLz9xHVf5gtG4ZsTjkWFRyP9wwY6rCxij +6cMvKs8OT2y+TjQ6qv5/Zu+XbXGbo2yujnK2oFkLsST/LWobGfuGXUp/K7CkkKJ 0wgZS1t2iT3RXSQn/Fz8zJx9j0q3GJmvMFmdrOAh8Vx6ucP1m8DZ4noms37D0+Wn 2HSW55sAXIUFALZgOiVRq0GXtw/iA76S9GtjfFWkCkyGV4WLH6C1NSoojvmXWQ3U QQWlpGODQFYUTDUhwh6/T3cP7Ip12W9OU2eTNfdgn8D+PU16CPSfdXN6JWxBI13L vVUxWMm9JG+QkbSjfw4q2A0dHEu6lssmOSvMjU6pm5v6xCfry6Fn6m3vBBU3OpLx mOge6U696hwL3tNMuwfsIVFNQpoHJT+2Saq71jS+XZeGn+5wC3ovejREls0HIzze kwHNIuMygB78uVwWyMJr =XyRE -----END PGP SIGNATURE----- Merge tag 'tegra-for-3.17-fuse-move' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/cleanup Merge "ARM: tegra: move fuse code out of arch/arm" from Thierry Reding: This branch moves code related to the Tegra fuses out of arch/arm and into a centralized location which could be shared with ARM64. It also adds support for reading the fuse data through sysfs. Included is also some preparatory work that moves Tegra-related header files from include/linux to include/soc/tegra as suggested by Arnd. Furthermore the Tegra chip ID is now retrieved using a function rather than a variable so that sanity checks can be done. This is convenient in subsequent patches that will move some of the code that's currently called from Tegra machine setup into regular initcalls so that it can be reused on 64-bit ARM. The sanity checks help with verifying that no code tries to obtain the Tegra chip ID before the underlying driver is properly initialized. * tag 'tegra-for-3.17-fuse-move' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: soc/tegra: fuse: fix dummy functions soc/tegra: fuse: move APB DMA into Tegra20 fuse driver soc/tegra: Add efuse and apbmisc bindings soc/tegra: Add efuse driver for Tegra ARM: tegra: move fuse exports to soc/tegra/fuse.h ARM: tegra: export apb dma readl/writel ARM: tegra: Use a function to get the chip ID ARM: tegra: Sort includes alphabetically ARM: tegra: Move includes to include/soc/tegra Signed-off-by: Olof Johansson <olof@lixom.net> |
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Russell King
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6ebbf2ce43 |
ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+
ARMv6 and greater introduced a new instruction ("bx") which can be used to return from function calls. Recent CPUs perform better when the "bx lr" instruction is used rather than the "mov pc, lr" instruction, and this sequence is strongly recommended to be used by the ARM architecture manual (section A.4.1.1). We provide a new macro "ret" with all its variants for the condition code which will resolve to the appropriate instruction. Rather than doing this piecemeal, and miss some instances, change all the "mov pc" instances to use the new macro, with the exception of the "movs" instruction and the kprobes code. This allows us to detect the "mov pc, lr" case and fix it up - and also gives us the possibility of deploying this for other registers depending on the CPU selection. Reported-by: Will Deacon <will.deacon@arm.com> Tested-by: Stephen Warren <swarren@nvidia.com> # Tegra Jetson TK1 Tested-by: Robert Jarzmik <robert.jarzmik@free.fr> # mioa701_bootresume.S Tested-by: Andrew Lunn <andrew@lunn.ch> # Kirkwood Tested-by: Shawn Guo <shawn.guo@freescale.com> Tested-by: Tony Lindgren <tony@atomide.com> # OMAPs Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> # Armada XP, 375, 385 Acked-by: Sekhar Nori <nsekhar@ti.com> # DaVinci Acked-by: Christoffer Dall <christoffer.dall@linaro.org> # kvm/hyp Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com> # PXA3xx Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> # Xen Tested-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> # ARMv7M Tested-by: Simon Horman <horms+renesas@verge.net.au> # Shmobile Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> |
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Thierry Reding
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7232398abc |
ARM: tegra: Convert PMC to a driver
This commit converts the PMC support code to a platform driver. Because the boot process needs to call into this driver very early, also set up a minimal environment via an early initcall. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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Thierry Reding
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24fa5af810 |
soc/tegra: fuse: Set up in early initcall
Rather than rely on explicit initialization order called from SoC setup code, use a plain initcall and rely on initcall ordering to take care of dependencies. This driver exposes some functionality (querying the chip ID) needed at very early stages of the boot process. An early initcall is good enough provided that some of the dependencies are deferred to later stages. To make sure any abuses are easily caught, output a warning message if the chip ID is queried while it can't be read yet. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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Thierry Reding
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c090e11163 |
ARM: tegra: Always lock the CPU reset vector
Currently the reset vector is not locked on Tegra20 because the hardware doesn't support it. However in order not to depend on the chip ID, which becomes available only later in the boot process, we set the bit anyway. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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Thierry Reding
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05ccf19602 |
ARM: tegra: Setup CPU hotplug in a pure initcall
CPU hotplug support doesn't have to be set up until fairly late in the boot process, so it can be done in a regular initcall. To make sure that we don't miss any ordering problems in the future, output a warning if any of the functions are called before initialization has completed. This is part of untangling the boot order dependencies on Tegra so that more code can be shared between 32-bit and 64-bit ARM. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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Peter De Schrijver
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0d827a4343 |
soc/tegra: fuse: move APB DMA into Tegra20 fuse driver
The Tegra20 fuse driver is the only user of tegra_apb_readl_using_dma(). Therefore we can simply the code by incorporating the APB DMA handling into the driver directly. tegra_apb_writel_using_dma() is dropped because there are no users. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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Peter De Schrijver
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783c8f4c84 |
soc/tegra: Add efuse driver for Tegra
Implement fuse driver for Tegra20, Tegra30, Tegra114 and Tegra124. This replaces functionality previously provided in arch/arm/mach-tegra, which is removed in this patch. While at it, move the only user of the global tegra_revision variable over to tegra_sku_info.revision and export tegra_fuse_readl() to allow drivers to read calibration fuses. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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Peter De Schrijver
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35874f3617 |
ARM: tegra: move fuse exports to soc/tegra/fuse.h
All fuse related functionality will move to a driver in the following
patches. To prepare for this, export all the required functionality in a
global header file and move all users of fuse.h to soc/tegra/fuse.h.
While we're at it, remove tegra_bct_strapping, as its only user was
removed in Commit
|
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Peter De Schrijver
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3f394f8064 |
ARM: tegra: export apb dma readl/writel
Export APB DMA readl and writel. These are needed because we can't access the fuses directly on Tegra20 without potentially causing a system hang. Also have the APB DMA readl and writel return an error in case of a read failure instead of just returning zero or ignore write failures. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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Thierry Reding
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304664eab9 |
ARM: tegra: Use a function to get the chip ID
Instead of using a simple variable access to get at the Tegra chip ID, use a function so that we can run additional code. This can be used to determine where the chip ID is being accessed without being available. That in turn will be handy for resolving boot sequence dependencies in order to convert more code to regular initcalls rather than a sequence fixed by Tegra SoC setup code. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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Thierry Reding
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a0524acc94 |
ARM: tegra: Sort includes alphabetically
If these aren't sorted alphabetically, then the logical choice is to append new ones, however that creates a lot of potential for conflicts because every change will then add new includes in the same location. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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Thierry Reding
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306a7f9139 |
ARM: tegra: Move includes to include/soc/tegra
In order to not clutter the include/linux directory with SoC specific headers, move the Tegra-specific headers out into a separate directory. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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Linus Torvalds
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58c72f94ef |
ARM: SoC fixes for 3.16
A first set of bug fixes that didn't make it for the merge window, and two Kconfig cleanups that still make sense at this point. Unfortunately, one of the two cleanups caused an unintended change in the original version, so we had to revert one part of it and do some more testing to ensure the rest is really fine. There was also a last-minute rebase of the patches to remove another bad commit. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIVAwUAU6BdV2CrR//JCVInAQJHhRAAuBdFsBo1TuP/s45PHzcldEcmrlMa2aNx 5t+qGxaYJW3DppW5Ql4L3O/74au77AcPpto8CwTRzshb2peXYwJ40RQXAyxPyE4z a2yjtz7VwX5P/BNjQZJ1OZLuMiMbVVz3ObIpNiPzooXm/y52ZZQ20AALmJcX7mor tAmdw3qmvy0L9SYikKd8qKuDTMLV6MWexa/fZn5AA5w11V3DWr/++/6+3g4+tQs8 N8l5vk9Ok/5l+f67Ta0+R4Vh9OIcLnwYSzOKKhKebwMvxXcwPEz5HfmOSH/m3Zu1 /dC4jWwB6Z95bevhJCoNaIf9b6s29EYy2lHw3nVRiQEFTmFACNgWjqFjiKa0aune 2cKAPZAf3w8R15LveT9SuSwtuH8yVFVHqOyzUlxmbFszIqgzKxF933R7SSxQpLTn od5QVOqxMAMd4s6Jij7xgoF5GkvlKpfqEERKSz/Gt7I+ZINcxRhXXL55emy6IGmx jjhQa83mMgFS70Ys4ARB0Fcd1Em4v/fCPJE8UpSQHQOG3fq3QcdyxsKG0cHUJNK6 ubS8W/XpQWvowJZ1YcnpYs3zAYchwueNPyCXVX9Hs3BTx7/3wnFfUNbdduD2GRVu iruBt+B/4KLHmiLQyt1TqZO1elel/CT/ARGvRjo8zMFoo2WXbopv1pjm7AQQ0SSb CtK7u+xxUa8= =/Ylr -----END PGP SIGNATURE----- Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC fixes from Arnd Bergmann: "A first set of bug fixes that didn't make it for the merge window, and two Kconfig cleanups that still make sense at this point. Unfortunately, one of the two cleanups caused an unintended change in the original version, so we had to revert one part of it and do some more testing to ensure the rest is really fine. There was also a last-minute rebase of the patches to remove another bad commit" * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: use menuconfig for sub-arch menus ARM: multi_v7_defconfig: re-enable SDHCI drivers ARM: EXYNOS: Fix compilation warning ARM: exynos: move sysram info to exynos.c ARM: dts: Specify the NAND ECC scheme explicitly on Armada 385 DB board ARM: dts: Specify the NAND ECC scheme explicitly on Armada 375 DB board ARM: exynos: cleanup kconfig option display misc: vexpress: fix error handling vexpress_syscfg_regmap_init() ARM: Remove ARCH_HAS_CPUFREQ config option ARM: integrator: fix section mismatch problem ARM: mvebu: DT: fix OpenBlocks AX3-4 RAM size ARM: samsung: make SAMSUNG_DMADEV optional remoteproc: da8xx: don't select CMA on no-MMU bus/arm-cci: add dependency on OF && CPU_V7 ARM: keystone requires ARM_PATCH_PHYS_VIRT ARM: omap2: fix am43xx dependency on l2x0 cache |
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Rob Herring
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21278aeafb |
ARM: use menuconfig for sub-arch menus
The System Type menu is getting quite long with platforms and is inconsistent in handling of sub-arch specific options. Tidy up the menu by making platform options a menuconfig entry containing any platform specific config items. [arnd: change OMAP part according to suggestion from Tony Lindgren <tony@atomide.com>] Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Stephen Boyd
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19682f72f5 |
ARM: Remove ARCH_HAS_CPUFREQ config option
This config exists entirely to hide the cpufreq menu from the kernel configuration unless a platform has selected it. Nothing is actually built if this config is 'Y' and it just leads to more patches that add a select under a platform Kconfig so that some other CPUfreq option can be chosen. Let's remove the option so that we can always enable CPUfreq drivers on ARM platforms. Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Linus Torvalds
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f9da455b93 |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next
Pull networking updates from David Miller: 1) Seccomp BPF filters can now be JIT'd, from Alexei Starovoitov. 2) Multiqueue support in xen-netback and xen-netfront, from Andrew J Benniston. 3) Allow tweaking of aggregation settings in cdc_ncm driver, from Bjørn Mork. 4) BPF now has a "random" opcode, from Chema Gonzalez. 5) Add more BPF documentation and improve test framework, from Daniel Borkmann. 6) Support TCP fastopen over ipv6, from Daniel Lee. 7) Add software TSO helper functions and use them to support software TSO in mvneta and mv643xx_eth drivers. From Ezequiel Garcia. 8) Support software TSO in fec driver too, from Nimrod Andy. 9) Add Broadcom SYSTEMPORT driver, from Florian Fainelli. 10) Handle broadcasts more gracefully over macvlan when there are large numbers of interfaces configured, from Herbert Xu. 11) Allow more control over fwmark used for non-socket based responses, from Lorenzo Colitti. 12) Do TCP congestion window limiting based upon measurements, from Neal Cardwell. 13) Support busy polling in SCTP, from Neal Horman. 14) Allow RSS key to be configured via ethtool, from Venkata Duvvuru. 15) Bridge promisc mode handling improvements from Vlad Yasevich. 16) Don't use inetpeer entries to implement ID generation any more, it performs poorly, from Eric Dumazet. * git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next: (1522 commits) rtnetlink: fix userspace API breakage for iproute2 < v3.9.0 tcp: fixing TLP's FIN recovery net: fec: Add software TSO support net: fec: Add Scatter/gather support net: fec: Increase buffer descriptor entry number net: fec: Factorize feature setting net: fec: Enable IP header hardware checksum net: fec: Factorize the .xmit transmit function bridge: fix compile error when compiling without IPv6 support bridge: fix smatch warning / potential null pointer dereference via-rhine: fix full-duplex with autoneg disable bnx2x: Enlarge the dorq threshold for VFs bnx2x: Check for UNDI in uncommon branch bnx2x: Fix 1G-baseT link bnx2x: Fix link for KR with swapped polarity lane sctp: Fix sk_ack_backlog wrap-around problem net/core: Add VF link state control policy net/fsl: xgmac_mdio is dependent on OF_MDIO net/fsl: Make xgmac_mdio read error message useful net_sched: drr: warn when qdisc is not work conserving ... |
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Linus Torvalds
|
eb3d3ec567 |
Merge branch 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm into next
Pull ARM updates from Russell King: - Major clean-up of the L2 cache support code. The existing mess was becoming rather unmaintainable through all the additions that others have done over time. This turns it into a much nicer structure, and implements a few performance improvements as well. - Clean up some of the CP15 control register tweaks for alignment support, moving some code and data into alignment.c - DMA properties for ARM, from Santosh and reviewed by DT people. This adds DT properties to specify bus translations we can't discover automatically, and to indicate whether devices are coherent. - Hibernation support for ARM - Make ftrace work with read-only text in modules - add suspend support for PJ4B CPUs - rework interrupt masking for undefined instruction handling, which allows us to enable interrupts earlier in the handling of these exceptions. - support for big endian page tables - fix stacktrace support to exclude stacktrace functions from the trace, and add save_stack_trace_regs() implementation so that kprobes can record stack traces. - Add support for the Cortex-A17 CPU. - Remove last vestiges of ARM710 support. - Removal of ARM "meminfo" structure, finally converting us solely to memblock to handle the early memory initialisation. * 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: (142 commits) ARM: ensure C page table setup code follows assembly code (part II) ARM: ensure C page table setup code follows assembly code ARM: consolidate last remaining open-coded alignment trap enable ARM: remove global cr_no_alignment ARM: remove CPU_CP15 conditional from alignment.c ARM: remove unused adjust_cr() function ARM: move "noalign" command line option to alignment.c ARM: provide common method to clear bits in CPU control register ARM: 8025/1: Get rid of meminfo ARM: 8060/1: mm: allow sub-architectures to override PCI I/O memory type ARM: 8066/1: correction for ARM patch 8031/2 ARM: 8049/1: ftrace/add save_stack_trace_regs() implementation ARM: 8065/1: remove last use of CONFIG_CPU_ARM710 ARM: 8062/1: Modify ldrt fixup handler to re-execute the userspace instruction ARM: 8047/1: rwsem: use asm-generic rwsem implementation ARM: l2c: trial at enabling some Cortex-A9 optimisations ARM: l2c: add warnings for stuff modifying aux_ctrl register values ARM: l2c: print a warning with L2C-310 caches if the cache size is modified ARM: l2c: remove old .set_debug method ARM: l2c: kill L2X0_AUX_CTRL_MASK before anyone else makes use of this ... |
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Linus Torvalds
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825f4e0271 |
ARM: SoC updates for 3.16 (part 1)
A quite large set of SoC updates this cycle. In no particular order: - Multi-cluster power management for Samsung Exynos, adding support for big.LITTLE CPU switching on EXYNOS5 - SMP support for Marvell Armada 375 and 38x - SMP rework on Allwinner A31 - Xilinx Zynq support for SOC_BUS, big endian - Marvell orion5x platform cleanup, modernizing the implementation and moving to DT. - _Finally_ moving Samsung Exynos over to support MULTIPLATFORM, so that their platform can be enabled in the same kernel binary as most of the other v7 platforms in the tree. \o/ The work isn't quite complete, there's some driver fixes still needed, but the basics now work. New SoC support added: - Freescale i.MX6SX - LSI Axxia AXM55xx SoCs - Samsung EXYNOS 3250, 5260, 5410, 5420 and 5800 - STi STIH407 Plus a large set of various smaller updates for different platforms. I'm probably missing some important one here. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQIcBAABAgAGBQJTjOKWAAoJEIwa5zzehBx36aEP/2vTD7x9FC59FACNHJ8iO7aw 0ebTgBBjI1Np6X18O+M7URbxV5TaBgwpUm/NDN86p03MpQ2eOXr8r47qVxe/HhZs AdlTvzgE6QwxcVL/HeCKKUEN3BPH74+TZgFl9I5aSzNjpR39xETeK1aWP/ZiAl/q /lGRZAQ59+c7Ung00Hg0g2YDxH9WFpK50Nj90ROnyjKSFkhIYngXYVpZB3maOypq Pgib/U8IraKZ52oGJw3yinSoORr7FdcUdAGWGTz/lQdNL/jYDfQ6GkRW2oblWXdt 3Xvj9UW6NmkbMICucMvFuuW1nXAgutZuTp9w7mBxsiUlYepxPv/DXM6yiI1WGlEb BeVOmOreNeN2nT6avv/uUhk3Osq63Jn9x8cz5y+7/lgWQwllh3/c+G01RotvgJEQ vpQq5ps9fMxIAMaNP6N/YqMJI1IOrBj0iXxaZEDw3VYM/k4lSvtb3VXP9c/rqApu U4i6hpSIGzrraU4NrjndYPndcLeNOVZbByETQKosZXuCo6G1sb7FstNSkzI9vSo8 O/pujIVUfYyBW82GzZGDw+aa7DWA29FPeUQ3p+sj5MSCg051xXT8h6QwqMo2K/zY 5ATs/qo6w7zH/Ou9rtHTRynCIb0GQJThDSlWtuXFedUF9quEltS+TDz/2o+dWtGJ yBFGKDRuBB20D36w9xqg =6LYI -----END PGP SIGNATURE----- Merge tag 'soc-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc into next Pull part one of ARM SoC updates from Olof Johansson: "A quite large set of SoC updates this cycle. In no particular order: - Multi-cluster power management for Samsung Exynos, adding support for big.LITTLE CPU switching on EXYNOS5 - SMP support for Marvell Armada 375 and 38x - SMP rework on Allwinner A31 - Xilinx Zynq support for SOC_BUS, big endian - Marvell orion5x platform cleanup, modernizing the implementation and moving to DT. - _Finally_ moving Samsung Exynos over to support MULTIPLATFORM, so that their platform can be enabled in the same kernel binary as most of the other v7 platforms in the tree. \o/ The work isn't quite complete, there's some driver fixes still needed, but the basics now work. New SoC support added: - Freescale i.MX6SX - LSI Axxia AXM55xx SoCs - Samsung EXYNOS 3250, 5260, 5410, 5420 and 5800 - STi STIH407 plus a large set of various smaller updates for different platforms. I'm probably missing some important one here" * tag 'soc-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (281 commits) ARM: exynos: don't run exynos4 l2x0 setup on other platforms ARM: exynos: Fix "allmodconfig" build errors in mcpm and hotplug ARM: EXYNOS: mcpm rename the power_down_finish ARM: EXYNOS: Enable mcpm for dual-cluster exynos5800 SoC ARM: EXYNOS: Enable multi-platform build support ARM: EXYNOS: Consolidate Kconfig entries ARM: EXYNOS: Add support for EXYNOS5410 SoC ARM: EXYNOS: Support secondary CPU boot of Exynos3250 ARM: EXYNOS: Add Exynos3250 SoC ID ARM: EXYNOS: Add 5800 SoC support ARM: EXYNOS: initial board support for exynos5260 SoC clk: exynos5410: register clocks using common clock framework ARM: debug: qcom: add UART addresses to Kconfig help for APQ8084 ARM: sunxi: allow building without reset controller Documentation: devicetree: arm: sort enable-method entries ARM: rockchip: convert smp bringup to CPU_METHOD_OF_DECLARE clk: exynos5250: Add missing sysmmu clocks for DISP and ISP blocks ARM: dts: axxia: Add reset controller power: reset: Add Axxia system reset driver ARM: axxia: Adding defconfig for AXM55xx ... |