Commit Graph

17 Commits

Author SHA1 Message Date
Marcin Slusarz
9e7f96aa3a drm/nv50: fix page faulting for 128MB page table sizes
This seems to be a typo...

Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-12-21 19:01:31 +10:00
Ben Skeggs
b79181cbad drm/nv50-nvc0/vm: don't touch chan_vm
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23 15:58:40 +10:00
Ben Skeggs
2703c21a82 drm/nv50/gr: move to exec engine interfaces
This needs a massive cleanup, but to catch bugs from the interface changes
vs the engine code cleanup, this will be done later.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:48:06 +10:00
Ben Skeggs
6dfdd7a61e drm/nouveau: working towards a common way to represent engines
There's lots of more-or-less independant engines present on NVIDIA GPUs
these days, and we generally want to perform the same operations on them.
Implementing new ones requires hooking into lots of different places,
the aim of this work is to make this simpler and cleaner.

NV84:NV98 PCRYPT moved over as a test.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:48:01 +10:00
Ben Skeggs
04eb34a43c drm/nouveau: split ramin_lock into two locks, one hardirq safe
Fixes a possible lock ordering reversal between context_switch_lock
and ramin_lock.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2011-04-20 08:50:14 +10:00
Dave Airlie
38f1cff086 Merge commit '5359533801e3dd3abca5b7d3d985b0b33fd9fe8b' into drm-core-next
This commit changed an internal radeon structure, that meant a new driver
in -next had to be fixed up, merge in the commit and fix up the driver.

Also fixes a trivial nouveau merge.

Conflicts:
	drivers/gpu/drm/nouveau/nouveau_mem.c
2011-03-16 11:34:41 +10:00
Ben Skeggs
6f70a4c3d1 drm/nv50-nvc0: prevent multiple vm/bar flushes occuring simultanenously
The per-vm mutex doesn't prevent this completely, a flush coming from the
BAR VM could potentially happen at the same time as one for the channel
VM.  Not to mention that if/when we get per-client/channel VM, this will
happen far more frequently.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-03-08 07:03:08 +10:00
Ben Skeggs
8f7286f8e4 drm/nv50: support for compression
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-02-25 06:46:07 +10:00
Ben Skeggs
26c0c9e33a drm/nv50-nvc0: delay GART binding until move_notify time
The immediate benefit of doing this is that on NV50 and up, the GPU
virtual address of any buffer is now constant, regardless of what
memtype they're placed in.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-02-25 06:46:01 +10:00
Ben Skeggs
d5f423947a drm/nouveau: rename nouveau_vram to nouveau_mem
This structure will also be used for GART in the near future.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-02-25 06:45:55 +10:00
Ben Skeggs
ea5f2786a0 drm/nouveau: silence some compiler warnings
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-02-25 06:44:22 +10:00
Ben Skeggs
153e019ff3 drm/nv50: fix regression on IGPs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-01-28 11:10:34 +10:00
Ben Skeggs
3ee0128140 drm/nouveau: modify vm to accomodate dual page tables for nvc0
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-21 17:17:01 +10:00
Ben Skeggs
910d1b3a8c drm/nv50: fix smatch warning in nv50_vram.c
Reported-by: Dan Carpenter <error27@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-21 11:53:38 +10:00
Ben Skeggs
4c13614298 drm/nv50: implement global channel address space on new VM code
As of this commit, it's guaranteed that if an object is in VRAM that its
GPU virtual address will be constant.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08 13:48:13 +10:00
Ben Skeggs
f869ef8823 drm/nv50: implement BAR1/BAR3 management on top of new VM code
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08 13:48:12 +10:00
Ben Skeggs
a11c3198c9 drm/nv50: import new vm code
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08 13:48:10 +10:00