Commit Graph

4 Commits

Author SHA1 Message Date
Nishanth Menon
ea827ad5ff ARM: DRA7: Provide proper IO map table
DRA7 uses OMAP5 IO table at the moment. This is purely spurious since
the OMAP5 and DRA7 register maps are different in many aspects.

AM57xx/DRA7 TRM Reference: http://www.ti.com/lit/ug/spruhz6/spruhz6.pdf

NOTE: Most of the drivers are already doing ioremap, so, there should'nt
be any functional improvement involved here, other than making the
initial iotable more accurate.

Fixes: a3a9384a11 ("ARM: DRA7: Reuse io tables and add a new .init_early")
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-07-16 00:06:05 -07:00
R Sricharan
a3a9384a11 ARM: DRA7: Reuse io tables and add a new .init_early
The IO descriptor tables for DRA7 are a complete reuse from OMAP5.
A new dra7xx_init_early() does the base address inits.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
2013-08-13 11:00:35 +05:30
Santosh Shilimkar
da0e02a1e4 ARM: OMAP5: Update SAR RAM base address
Update SAR RAM base address for OMAP5 based devices.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2013-03-19 12:57:01 +05:30
Tony Lindgren
c49f34bc25 ARM: OMAP2+ Move SoC specific headers to be local to mach-omap2
These can now be moved to be local headers in mach-omap2.

Note that this patch removes arch/arm/plat-omap/devices.c as it
will get removed anyways with Paul Walmsley's patch
"ARM: OMAP: split OMAP1, OMAP2+ RNG device registration".

Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-09-12 18:06:31 -07:00