Commit Graph

5 Commits

Author SHA1 Message Date
huang lin
08db7e5cbf phy: rockchip-usb: power down phy when rockchip phy probe
rockchip phy are enable when soc reset, to save power consumption,
we disable it when probe, and enable each phy when it use

Signed-off-by: huang lin <hl@rock-chips.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2015-09-25 17:01:14 +05:30
Axel Lin
4a9e5ca1a5 phy: Constify struct phy_ops variables
The phy_ops variables are never modified after initialized in these
drivers, so make them const.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2015-08-03 18:35:09 +05:30
Krzysztof Kozlowski
219bf1599e phy: Drop owner assignment from platform_driver
platform_driver does not need to set an owner because
platform_driver_register() will set it.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2015-07-25 15:45:48 +05:30
Axel Lin
6b08e36ba3 phy: rockchip-usb: Fixup rockchip_usb_phy_power_on failure path
If rockchip_usb_phy_power() fails, we need to call clk_disable_unprepare()
before return. This is to ensure we have balanced clk_enable/disable calls.
Also remove unneeded ret checking in rockchip_usb_phy_power_off.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2015-03-12 11:01:17 +05:30
Yunzhi Li
64d11406de phy: add a driver for the Rockchip SoC internal USB2.0 PHY
This patch to add a generic PHY driver for ROCKCHIP usb PHYs,
currently this driver can support RK3288. The RK3288 SoC have
three independent USB PHY IPs which are all configured through a
set of registers located in the GRF (general register files)
module.

Signed-off-by: Yunzhi Li <lyz@rock-chips.com>
Tested-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2015-01-30 16:06:47 +05:30