Commit Graph

2225 Commits

Author SHA1 Message Date
Stephen Boyd
a57aa18539 clk: Silence warnings about lock imbalances
The recursive spinlock implementation trips up sparse and it
complains that these functions have lock imbalances. That isn't
really true though, so add some __acquires() and __releases()
information so that sparse is quiet.

drivers/clk/clk.c:116:22: warning: context imbalance in 'clk_enable_lock' - wrong count at exit
drivers/clk/clk.c:141:9: warning: context imbalance in 'clk_enable_unlock' - unexpected unlock

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-28 11:59:30 -07:00
Stephen Boyd
661e2180cf clk: basic-type: Silence warnings about lock imbalances
The basic clock types use conditional locking for the register
accessor spinlocks. Add __acquire() and __release() markings in
the right locations so that sparse isn't tripped up on the
conditional locking.

drivers/clk/clk-mux.c:68:12: warning: context imbalance in 'clk_mux_set_parent' - different lock contexts for basic block
drivers/clk/clk-divider.c:379:12: warning: context imbalance in 'clk_divider_set_rate' - different lock contexts for basic block
drivers/clk/clk-gate.c:71:9: warning: context imbalance in 'clk_gate_endisable' - different lock contexts for basic block
drivers/clk/clk-fractional-divider.c:36:9: warning: context imbalance in 'clk_fd_recalc_rate' - different lock contexts for basic block
drivers/clk/clk-fractional-divider.c:68:12: warning: context imbalance in 'clk_fd_set_rate' - different lock contexts for basic block

Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-28 11:59:28 -07:00
Stephen Boyd
169f05e805 clk: qcom: Give clk-qcom.ko module a GPLv2 license
The missing license causes the clk-qcom.ko module to taint the
kernel. Add the appropriate license to avoid taint.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-28 11:59:26 -07:00
Stephen Boyd
37bff2c159 clk: gpio: Mark parent_names array const
Let's encourage const arrays of parent names like other basic
clock types.

Cc: Sergej Sawazki <ce3a@gmx.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-28 11:59:24 -07:00
Michael Turquette
1db92e54f5 Merge branch 'v4.3-topic/clk-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into clk-next 2015-07-28 11:59:21 -07:00
Jim Quinlan
afe76c8fd0 clk: allow a clk divider with max divisor when zero
This commit allows certain Broadcom STB clock dividers to be used with
clk-divider.c.  It allows for a clock whose field value is the equal
to the divisor, execpt when the field value is zero, in which case the
divisor is 2^width.  For example, consider a divisor clock with a two
bit field:

value		divisor
0		4
1		1
2		2
3		3

Signed-off-by: Jim Quinlan <jim2101024@gmail.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2015-07-28 11:59:19 -07:00
Andy Shevchenko
25d4d341d3 clk: socfpga: switch to GENMASK()
Convert the code to use GENMASK() helper instead of div_mask() macro.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-28 11:59:16 -07:00
Robert Jarzmik
4b5fb7dc90 clk: pxa: fix core frequency reporting unit
Legacy drivers which are not yet ported, such as cpufreq-pxa[23]xx, rely
on pxaXXx_get_clk_frequency_khz() to find the CPU core frequency.

This reporting was broken because the expected unit is kHz and not
Hz. Fix the reporting for pxa25x, pxa27x and pxa3xx.

Fixes: fe7710fae4 ("clk: add pxa25x clock drivers")
Fixes: d40670dc61 ("clk: add pxa27x clock drivers")
Fixes: 9bbb8a338f ("clk: pxa: add pxa3xx clock driver")
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-28 11:59:14 -07:00
Douglas Anderson
2bbfe00147 clk: rockchip: Fix PLL bandwidth
In the TRM we see that BWADJ is "a 12-bit bus that selects the values
1-4096 for the bandwidth divider (NB)":
 NB = BWADJ[11:0] + 1
The recommended setting of NB: NB = NF / 2.

So:
  NB = NF / 2
  BWADJ[11:0] + 1 = NF / 2
  BWADJ[11:0] = NF / 2 - 1

Right now, we have:

{                                               \
        .rate   = _rate##U,                     \
        .nr = _nr,                              \
        .nf = _nf,                              \
        .no = _no,                              \
        .bwadj = (_nf >> 1),                    \
}

That means we set bwadj to NF / 2, not NF / 2 - 1

All of this is a bit confusing because we specify "NR" (the 1-based
value), "NF" (the 1-based value), "NO" (the 1-based value), but
"BWADJ" (the 0-based value) instead of "NB" (the 1-based value).

Let's change to working with "NB" and fix the off by one error.  This
may affect PLL jitter in a small way (hopefully for the better).

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-28 11:59:12 -07:00
Stephen Boyd
9cfad9bc47 Merge branch 'cleanup-clk-h-includes' into clk-next
* cleanup-clk-h-includes: (62 commits)
  clk: Remove clk.h from clk-provider.h
  clk: h8300: Remove clk.h and clkdev.h includes
  clk: at91: Include clk.h and slab.h
  clk: ti: Switch clk-provider.h include to clk.h
  clk: pistachio: Include clk.h
  clk: ingenic: Include clk.h
  clk: si570: Include clk.h
  clk: moxart: Include clk.h
  clk: cdce925: Include clk.h
  clk: Include clk.h in clk.c
  clk: zynq: Include clk.h
  clk: ti: Include clk.h
  clk: sunxi: Include clk.h and remove unused clkdev.h includes
  clk: st: Include clk.h
  clk: qcom: Include clk.h
  clk: highbank: Include clk.h
  clk: bcm: Include clk.h
  clk: versatile: Remove clk.h and clkdev.h includes
  clk: ux500: Remove clk.h and clkdev.h includes
  clk: tegra: Properly include clk.h
  ...
2015-07-28 11:59:09 -07:00
Dinh Nguyen
9da9e76127 clk: ti: make use of of_clk_parent_fill helper function
Use of_clk_parent_fill to fill in the parent clock names' array.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-28 11:59:07 -07:00
Dinh Nguyen
8a53fb2bce clk: sunxi: make use of of_clk_parent_fill helper function
Use of_clk_parent_fill to fill in the parent clock names' array.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: "Emilio López" <emilio@elopez.com.ar>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-28 11:59:05 -07:00
Dinh Nguyen
0b4e7f0842 clk: st: make use of of_clk_parent_fill helper function
Use of_clk_parent_fill to fill in the parent clock names' array.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Tested-by Gabriel Fernandez <gabriel.fernandez@st.com>
Cc: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-28 11:59:03 -07:00
Dinh Nguyen
5f23eff7af clk: keystone: make use of of_clk_parent_fill helper function
Use of_clk_parent_fill to fill in the parent clock names' array.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-28 11:59:01 -07:00
Dinh Nguyen
f0557fbe13 clk: at91: make use of of_clk_parent_fill helper function
Use of_clk_parent_fill to fill in the parent clock names' array.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-28 11:58:59 -07:00
James Liao
75ce0cdb62 clk: mediatek: Add MT8173 MMPLL change rate support
MT8173 MMPLL frequency settings are different from common PLLs.
It needs different post divider settings for some ranges of frequency.
This patch add support for MT8173 MMPLL frequency setting by adding
div-rate table to lookup suitable post divider setting under a
specified frequency.

Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-28 11:58:57 -07:00
James Liao
196de71a9d clk: mediatek: Fix calculation of PLL rate settings
Avoid u32 overflow when calculate post divider setting, and
increase the max post divider setting from 3 (/8) to 4 (/16).

Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-28 11:58:54 -07:00
James Liao
b3be457e58 clk: mediatek: Fix PLL registers setting flow
Write postdiv and pcw settings at the same time for PLLs if postdiv
and pcw settings are on the same register.

This is need by PLLs such as MT8173 MMPLL and ARM*PLL.

Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-28 11:58:52 -07:00
Stephen Boyd
9783c0d985 clk: Allow providers to configure min/max rates
clk providers are using the consumer APIs to set min/max rates on
the clock they're providing. To encourage clk providers to move
away from the consumer APIs, add a provider API to set the
min/max rate of a clock. The assumption is that this is done
before the clock can be requested via clk_get() and that the
clock rate is already within the boundaries of the min/max that's
configured.

Tested-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-28 11:58:50 -07:00
Axel Lin
5c757456c1 clk: twl6040: Convert to use devm_clk_register
Use devm_clk_register() to simplify the code by removing
twl6040_clk_remove().

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-28 11:58:48 -07:00
Axel Lin
264e3b75de clk: s2mps11: Simplify s2mps11_clk_probe unwind paths
The devm_clk_unregister() in .probe error case is not necessary as it will
be automatically called when probe fails.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-28 11:58:46 -07:00
Geert Uytterhoeven
5a1cfafaea clk: shmobile: Remove unneeded #include <linux/clkdev.h>
The CCF implementations for the various shmobile SoCs don't use clkdev
functionality, hence drop the inclusion of <linux/clkdev.h>.

Add the missing #include <linux/slab.h>, which was included implicitly
through <asm/clkdev.h> before.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-28 11:58:44 -07:00
Stephen Boyd
14cc4e9578 clk: ti: Force pointer to be __iomem
Add __force here so that sparse doesn't complain about us playing
tricks with __iomem.

Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-28 11:58:41 -07:00
Stephen Boyd
76642eb4cb clk: ti: clk-3xxx: Remove unused structures
Sparse complains about these structures missing static, but they
also don't look to be used. Remove them.

drivers/clk/ti/clk-3xxx.c:74:30: warning: symbol 'clkhwops_omap3430es2_ssi_wait' was not declared. Should it be static?
drivers/clk/ti/clk-3xxx.c:157:30: warning: symbol 'clkhwops_omap3430es2_hsotgusb_wait' was not declared. Should it be static?

Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-28 11:58:39 -07:00
Stephen Boyd
3fe6d69742 clk: ti: Mark ti_clk_features static
This variable isn't exported outside of this file so mark it
static. Silences the following sparse warning:

drivers/clk/ti/clk.c:36:24: warning: symbol 'ti_clk_features' was not declared. Should it be static?

Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-28 11:58:37 -07:00
Stephen Boyd
f645f72d87 clk: ti: Check kzalloc() for failures
smatch reports a failure to check kzalloc() here:

drivers/clk/ti/clk.c:232
omap2_clk_provider_init() error: potential null dereference 'io'.
(kzalloc returns null)

Check for an allocation failure and return -ENOMEM.

Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-28 11:58:35 -07:00
Stephen Boyd
4d34105620 Merge branch 'for-4.2/ti-clk-move' of https://github.com/t-kristo/linux-pm into clk-next
From Tero Kristo:
  "This pull request contains the TI clock driver set to move the
   clock implementations under clock driver. Some small portions of
   the clock driver code still remain under mach-omap2 after this,
   it should be decided whether this code is now obsolete and should
   be deleted or should someone try to fix it."

Slight merge conflicts with determine_rate prototype changes.
2015-07-28 11:58:26 -07:00
Axel Lin
e306479ac2 clk: h8300: Fix signness bug
of_clk_get_parent_count() may return negative error code, so num_parents
needs to be int rather than unsigned int.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-28 11:53:20 -07:00
Stephen Boyd
d7a304e9d0 clk: qcom: Set CLK_SET_RATE_PARENT on ce1 clocks
The other ce clocks have the flag set, but ce1 doesn't, so
clk_set_rate() doesn't propagate up the tree to the ce1_src_clk.
Set the flag as this is supported.

Reported-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Tested-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Fixes: 0282465320 ("clk: qcom: Add APQ8084 Global Clock Controller support")
Fixes: d33faa9ead ("clk: qcom: Add support for MSM8974's global clock controller (GCC)")
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-28 11:51:40 -07:00
Stephen Boyd
c5e857a46a clk: gpio: Unlock mutex on error path
We don't unlock the mutex if we fail to allocate the parent names
array. Unlock it and return an error in this case as well.

Reported-by: kbuild test robot <fengguang.wu@intel.com>
Acked-by: Julia Lawall <julia.lawall@lip6.fr>
Cc: Sergej Sawazki <ce3a@gmx.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-28 11:51:39 -07:00
Stephen Boyd
006cb8b66e clk: h8300: Use standard Linux I/O accessors
There doesn't seem to be any reason why we can't use the standard
readb()/writeb() accessors here because ctrl_inb() and
ctrl_outb() match the generic implementation of readb() and
writeb() that the h8300 architecture uses. This allows us to test
compile this driver on other architectures besides h8300.

Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-28 11:51:38 -07:00
Stephen Boyd
9298f0267c clk: h8300: Drop allocation printk and cleanup sizeof style
We don't need to print an error on allocation failures, drop it.
While we're here, change the sizeof() to be sizeof(*<ptr>) to
make code more future proof.

Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-28 11:51:36 -07:00
Stephen Boyd
19aab27308 Merge branch 'clk-determine-rate-struct' into clk-next
* clk-determine-rate-struct:
  clk: fix some determine_rate implementations
  clk: change clk_ops' ->determine_rate() prototype
2015-07-28 11:51:30 -07:00
Boris Brezillon
57d866e606 clk: fix some determine_rate implementations
Some determine_rate implementations are not returning an error
when they failed to adapt the rate according to the rate request.
Fix them so that they return an error instead of silently
returning 0.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
CC: Jonathan Corbet <corbet@lwn.net>
CC: Tony Lindgren <tony@atomide.com>
CC: Ralf Baechle <ralf@linux-mips.org>
CC: "Emilio López" <emilio@elopez.com.ar>
CC: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Tero Kristo <t-kristo@ti.com>
CC: Peter De Schrijver <pdeschrijver@nvidia.com>
CC: Prashant Gaikwad <pgaikwad@nvidia.com>
CC: Stephen Warren <swarren@wwwdotorg.org>
CC: Thierry Reding <thierry.reding@gmail.com>
CC: Alexandre Courbot <gnurou@gmail.com>
CC: linux-doc@vger.kernel.org
CC: linux-kernel@vger.kernel.org
CC: linux-arm-kernel@lists.infradead.org
CC: linux-omap@vger.kernel.org
CC: linux-mips@linux-mips.org
CC: linux-tegra@vger.kernel.org
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-27 18:13:32 -07:00
Boris Brezillon
0817b62cc0 clk: change clk_ops' ->determine_rate() prototype
Clock rates are stored in an unsigned long field, but ->determine_rate()
(which returns a rounded rate from a requested one) returns a long
value (errors are reported using negative error codes), which can lead
to long overflow if the clock rate exceed 2Ghz.

Change ->determine_rate() prototype to return 0 or an error code, and pass
a pointer to a clk_rate_request structure containing the expected target
rate and the rate constraints imposed by clk users.

The clk_rate_request structure might be extended in the future to contain
other kind of constraints like the rounding policy, the maximum clock
inaccuracy or other things that are not yet supported by the CCF
(power consumption constraints ?).

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
CC: Jonathan Corbet <corbet@lwn.net>
CC: Tony Lindgren <tony@atomide.com>
CC: Ralf Baechle <ralf@linux-mips.org>
CC: "Emilio López" <emilio@elopez.com.ar>
CC: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
CC: Peter De Schrijver <pdeschrijver@nvidia.com>
CC: Prashant Gaikwad <pgaikwad@nvidia.com>
CC: Stephen Warren <swarren@wwwdotorg.org>
CC: Thierry Reding <thierry.reding@gmail.com>
CC: Alexandre Courbot <gnurou@gmail.com>
CC: linux-doc@vger.kernel.org
CC: linux-kernel@vger.kernel.org
CC: linux-arm-kernel@lists.infradead.org
CC: linux-omap@vger.kernel.org
CC: linux-mips@linux-mips.org
CC: linux-tegra@vger.kernel.org
[sboyd@codeaurora.org: Fix parent dereference problem in
__clk_determine_rate()]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Tested-by: Romain Perier <romain.perier@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[sboyd@codeaurora.org: Folded in fix from Heiko for fixed-rate
clocks without parents or a rate determining op]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-27 18:12:01 -07:00
Chanwoo Choi
7c9422ef55 clk: exynos3250: Add cpu clock configuration data and instaniate cpu clock
This patch add CPU clock configuration data and instantiate the CPU
clock type for Exynos3250 to support Samsung specific cpu-clock type.

Cc: Sylwester Nawrocki <s.nawrocki@samsung.com>
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: Michael Turquette <mturquette@baylibre.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
2015-07-24 12:52:58 +09:00
Thomas Abraham
d7cc4c8165 clk: exynos5250: add cpu clock configuration data and instantiate cpu clock
With the addition of the new Samsung specific cpu-clock type, the
arm clock can be represented as a cpu-clock type. Add the CPU clock
configuration data and instantiate the CPU clock type for Exynos5250.

Cc: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
[b.zolnierkie: split exynos5250 support from the original patch]
[b.zolnierkie: moved E5250_CPU_DIV[0,1] macros to clk-exynos5250.c]
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org>
Tested-by: Javier Martinez Canillas <javier@dowhile0.org>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Michael Turquette <mturquette@baylibre.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
2015-07-24 12:41:48 +09:00
Stephen Boyd
6acc63b502 clk: h8300: Remove clk.h and clkdev.h includes
Neither of these includes are used in these files, remove them.

Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 11:11:41 -07:00
Stephen Boyd
6a8ce8c96c clk: at91: Include clk.h and slab.h
This clock provider uses the consumer API, so include clk.h
explicitly. Also include slab.h instead of relying on clkdev.h
for it.

Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 11:11:40 -07:00
Stephen Boyd
27df3ee278 clk: ti: Switch clk-provider.h include to clk.h
This file isn't a clock provider but uses the consumer API, so
include clk.h instead of clk-provider.h.

Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 11:11:38 -07:00
Stephen Boyd
cb58e14efb clk: pistachio: Include clk.h
This clock provider uses the consumer API, so include clk.h
explicitly.

Cc: Andrew Bresticker <abrestic@chromium.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 11:11:37 -07:00
Stephen Boyd
e2a657090a clk: ingenic: Include clk.h
This clock provider uses the consumer API, so include clk.h
explicitly.

Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Paul Cercueil <paul@crapouillou.net>
Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 11:11:36 -07:00
Stephen Boyd
530b544ebf clk: si570: Include clk.h
This clock provider uses the consumer API, so include clk.h
explicitly.

Cc: Guenter Roeck <linux@roeck-us.net>
Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 11:11:35 -07:00
Stephen Boyd
67bb5408a8 clk: moxart: Include clk.h
This clock provider uses the consumer API, so include clk.h
explicitly.

Cc: Jonas Jensen <jonas.jensen@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 11:11:33 -07:00
Stephen Boyd
a826a1a421 clk: cdce925: Include clk.h
This clock provider uses the consumer API, so include clk.h
explicitly.

Cc: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 11:11:32 -07:00
Stephen Boyd
3c37311730 clk: Include clk.h in clk.c
This file implements the clk API and so it should include clk.h
directly instead of indirectly including it through
clk-provider.h.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 11:11:30 -07:00
Stephen Boyd
5402494f9b clk: zynq: Include clk.h
This clock provider uses the consumer API, so include clk.h
explicitly.

Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 11:11:29 -07:00
Stephen Boyd
1b29e60157 clk: ti: Include clk.h
This clock provider uses the consumer API, so include clk.h
explicitly.

Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 11:11:28 -07:00
Stephen Boyd
9dfefe8c76 clk: sunxi: Include clk.h and remove unused clkdev.h includes
This clock provider uses the consumer API, so include clk.h
explicitly. Also remove clkdev.h in files that aren't using it
and include slab.h when clkdev.h was being used to implicitly
include it.

Cc: Chen-Yu Tsai <wens@csie.org>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 11:11:26 -07:00
Stephen Boyd
d5f728acd9 clk: st: Include clk.h
This clock provider uses the consumer API, so include clk.h
explicitly.

Cc: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 11:11:25 -07:00
Stephen Boyd
8803609082 clk: qcom: Include clk.h
This clock provider uses the consumer API, so include clk.h
explicitly.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 11:11:24 -07:00
Stephen Boyd
9bd6314c2e clk: highbank: Include clk.h
This clock provider uses the consumer API, so include clk.h
explicitly.

Cc: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 11:11:22 -07:00
Stephen Boyd
d4945ab647 clk: bcm: Include clk.h
This clock provider uses the consumer API, so include clk.h
explicitly.

Acked-by: Alex Elder <elder@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 11:11:21 -07:00
Stephen Boyd
6d31e3b22e clk: versatile: Remove clk.h and clkdev.h includes
Clock provider drivers generally shouldn't include clk.h because
it's the consumer API. Remove the include here because this is a
provider driver. Also remove clkdev.h in files that aren't using
it and replace them with slab.h in files that were relying on the
implicit include of slab.h in clkdev.h.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 11:11:20 -07:00
Stephen Boyd
a162ca912c clk: ux500: Remove clk.h and clkdev.h includes
Clock provider drivers generally shouldn't include clk.h because
it's the consumer API. Remove the include here because this is a
provider driver. Also remove clkdev.h in files that aren't using
it.

Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 11:11:18 -07:00
Stephen Boyd
584ac4e935 clk: tegra: Properly include clk.h
Clock provider drivers generally shouldn't include clk.h because
it's the consumer API. Only include clk.h in files that are using
it. Also add in a clkdev.h include that was missing in a file
using clkdev APIs.

Cc: Peter De Schrijver <pdeschrijver@nvidia.com>
Cc: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 11:11:17 -07:00
Stephen Boyd
c302e1e280 clk: spear: Remove clk.h include
Clock provider drivers generally shouldn't include clk.h because
it's the consumer API. Remove the include here because this is a
provider driver.

Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 11:11:15 -07:00
Stephen Boyd
b0af24b523 clk: socfpga: Remove clk.h and clkdev.h includes
Clock provider drivers generally shouldn't include clk.h because
it's the consumer API. Remove the include here because this is a
provider driver. The clkdev.h include isn't used either, remove
it and add in slab.h to make sure things keep compiling.

Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 11:11:14 -07:00
Stephen Boyd
fdb94059d8 clk: sirf: Properly include clk.h
Clock provider drivers generally shouldn't include clk.h because
it's the consumer API. Move the include of clk.h into
clk-common.c because that's the only file that's really using
clk.h, even if it's included into the atlas6 and prima2 files.

Cc: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 11:11:13 -07:00
Stephen Boyd
6f1ed07a14 clk: samsung: Properly include clk.h and clkdev.h
Clock provider drivers generally shouldn't include clk.h because
it's the consumer API. Only include clk.h in files that are
using it. The clkdev.h header isn't always used either, so remove
it and add in slab.h where files were relying on it to include
slab for them.

Cc: Chanwoo Choi <cw00.choi@samsung.com>
Cc: Sylwester Nawrocki <s.nawrocki@samsung.com>
Cc: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 11:11:11 -07:00
Stephen Boyd
f684ff8b67 clk: rockchip: Properly include clk.h
Clock provider drivers generally shouldn't include clk.h because
it's the consumer API. Only include clk.h if it's actually used.

Cc: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 11:11:10 -07:00
Stephen Boyd
39482a1331 clk: nxp: Remove clk.h include
Clock provider drivers generally shouldn't include clk.h because
it's the consumer API. Remove the include here because this is a
provider driver.

Acked-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 11:11:08 -07:00
Stephen Boyd
bb0bf35452 clk: mxs: Include clk.h in C files that use it
Clock provider drivers generally shouldn't include clk.h because
it's the consumer API. The clk.h include is being included in all
mxs files because it's part of mxs/clk.h even though nothing
actually requires it in that file. Move the clk.h include to the
C files that are actually using it and remove the clk.h include
from the header file. The clkdev.h include isn't used either, so
drop it too.

Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 11:11:07 -07:00
Stephen Boyd
db00c3e595 clk: mvebu: Remove clk.h include
Clock provider drivers generally shouldn't include clk.h because
it's the consumer API. Only include the header if necessary. The
clkdev.h include isn't used here either, so drop it and add in
slab.h to keep things compiling.

Cc: Boris Brezillon <boris.brezillon@free-electrons.com>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Cc: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 11:10:40 -07:00
Stephen Boyd
528b76976f clk: mmp: Remove clk.h include
Clock provider drivers generally shouldn't include clk.h because
it's the consumer API. Remove the include here because this is a
provider driver. The clkdev.h include isn't used either, so drop
it and add in slab.h to keep things compiling.

Cc: Chao Xie <chao.xie@marvell.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 10:53:12 -07:00
Stephen Boyd
c0eb1dfffc clk: meson8b: Properly include clk.h
Clock provider drivers generally shouldn't include clk.h because
it's the consumer API. Only include clk.h if it's actually used.

Cc: Carlo Caione <carlo@endlessm.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 10:53:10 -07:00
Stephen Boyd
c726639bbe clk: mediatek: Properly include clk.h
We don't need to include clk.h in header files, just forward
declare struct clk here. This leads us to a few places where the
include of clk.h was missing in C files. Add them.

Cc: James Liao <jamesjj.liao@mediatek.com>
Cc: Henry Chen <henryc.chen@mediatek.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 10:53:09 -07:00
Stephen Boyd
059a1aa7eb clk: keystone: Remove clk.h include
Clock provider drivers generally shouldn't include clk.h because
it's the consumer API. Remove the include here because this is a
provider driver.

Cc: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Cc: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 10:53:08 -07:00
Stephen Boyd
593438e44c clk: hisilicon: Remove clk.h include
Clock provider drivers generally shouldn't include clk.h because
it's the consumer API. Remove the include here because this is a
provider driver. Also drop the clkdev.h include in files that
aren't using it.

Cc: Bintian Wang <bintian.wang@huawei.com>
Cc: Zhangfei Gao <zhangfei.gao@linaro.org>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 10:53:06 -07:00
Stephen Boyd
6063b663e8 clk: wm831x: Remove clk.h include
Clock provider drivers generally shouldn't include clk.h because
it's the consumer API. Remove the include here because this is a
provider driver.

Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 10:53:05 -07:00
Stephen Boyd
e266847013 clk: u300: Remove clk.h include
Clock provider drivers generally shouldn't include clk.h because
it's the consumer API. Remove the include here because this is a
provider driver. Also add in slab.h because without clkdev.h
compilation of this file would fail.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 10:53:04 -07:00
Stephen Boyd
e873473cbc clk: twl6040: Remove clk.h include
Clock provider drivers generally shouldn't include clk.h because
it's the consumer API. Remove the include here because this is a
provider driver.

Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 10:53:02 -07:00
Stephen Boyd
608f9b6e15 clk: si5351: Include clk.h
This clock provider uses the consumer API, so include clk.h
explicitly.

Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 10:53:01 -07:00
Stephen Boyd
d74f864fec clk: rk808: Remove clk.h include
Clock provider drivers generally shouldn't include clk.h because
it's the consumer API. Remove the include here because this is a
provider driver.

Cc: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 10:53:00 -07:00
Stephen Boyd
39a3891576 clk: palmas: Remove clkdev.h includes
This driver includes clkdev.h even though it isn't used, so drop
it.

Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc: Nishanth Menon <nm@ti.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 10:52:58 -07:00
Stephen Boyd
aa1a7fc4a9 clk: nomadik: Remove clk.h and clkdev.h includes
Clock provider drivers generally shouldn't include clk.h because
it's the consumer API. Remove the include here because this is a
provider driver. This driver also includes clkdev.h even though
it isn't used, so drop it too and add slab.h to make sure
everything still compiles.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 10:52:57 -07:00
Stephen Boyd
e715e2b1a6 clk: mux: Remove clk.h include
Clock provider drivers generally shouldn't include clk.h because
it's the consumer API. Remove the include here because this is a
provider driver.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 10:52:56 -07:00
Stephen Boyd
893418e407 clk: efm32gg: Remove clk.h include
Clock provider drivers generally shouldn't include clk.h because
it's the consumer API. Remove the include here because this is a
provider driver.

Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 10:52:54 -07:00
Stephen Boyd
a87b6866a0 clk: clps711x: Remove clk.h include
Clock provider drivers generally shouldn't include clk.h because
it's the consumer API. Remove the include here because this is a
provider driver.

Cc: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 10:52:53 -07:00
Stephen Boyd
fc1699c802 clk: cdce706: Include clk.h
This clock provider uses the consumer API, so include clk.h
explicitly.

Cc: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 10:52:52 -07:00
Stephen Boyd
a1ff4588d7 clk: axi-clkgen: Remove clk.h include
Clock provider drivers generally shouldn't include clk.h because
it's the consumer API. Remove the include here because this is a
provider driver.

Cc: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 10:52:50 -07:00
Stephen Boyd
663724f990 clk: i.MX: Remove clk.h include
Clock provider drivers generally shouldn't include clk.h because
it's the consumer API. Remove the include here because this is a
provider driver.

Cc: Alexander Shiyan <shc_work@mail.ru>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 10:52:49 -07:00
Viresh Kumar
da89947b47 Update Viresh Kumar's email address
Switch to my kernel.org alias instead of a badly named gmail address,
which I rarely use.

Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2015-07-17 16:39:53 -07:00
Tony Lindgren
9cf705de06 ARM: OMAP2+: Add support for initializing dm814x clocks
Let's add a minimal clocks for dm814x to get it booted. This is
mostly a placeholder and relies on the PLLs being on from the
bootloader.

Note that the divider clocks work the same way as on dm816x and
am335x.

Cc: Matthijs van Duin <matthijsvanduin@gmail.com>
Cc: Mike Turquette <mturquette@linaro.org>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Tero Kristo <t-kristo@ti.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-07-16 02:09:33 -07:00
Tuomas Tynkkynen
79cf95c763 clk: tegra: Add the DFLL as a possible parent of the cclk_g clock
The DFLL clocksource was missing from the list of possible parents for
the fast CPU cluster. Add it to the list.

Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Signed-off-by: Mikko Perttunen <mikko.perttunen@kapsi.fi>
Acked-by: Michael Turquette <mturquette@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-07-16 10:40:20 +02:00
Tuomas Tynkkynen
c38864a703 clk: tegra: Save/restore CCLKG_BURST_POLICY on suspend
Save and restore this register since the LP1 restore assembly routines
fiddle with it. Otherwise the CPU would keep running on PLLX after
resume from suspend even when DFLL was the original clocksource.

Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Signed-off-by: Mikko Perttunen <mikko.perttunen@kapsi.fi>
Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Michael Turquette <mturquette@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-07-16 10:40:19 +02:00
Tuomas Tynkkynen
62a8a094b0 clk: tegra: Add Tegra124 DFLL clocksource platform driver
Add basic platform driver support for the fast CPU cluster DFLL
clocksource found on Tegra124 SoCs. This small driver selects the
appropriate Tegra124-specific characterization data and integration
code. It relies on the DFLL common code to do most of the work.

Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Signed-off-by: Mikko Perttunen <mikko.perttunen@kapsi.fi>
Acked-by: Michael Turquette <mturquette@linaro.org>
[treding@nvidia.com: move setup code into ->probe()]
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-07-16 10:39:45 +02:00
Paul Walmsley
a3c83ff20c clk: tegra: Add DFLL DVCO reset control for Tegra124
The DVCO present in the DFLL IP block has a separate reset line,
exposed via the CAR IP block.  This reset line is asserted upon SoC
reset.  Unless something (such as the DFLL driver) deasserts this
line, the DVCO will not oscillate, although reads and writes to the
DFLL IP block will complete.

Thanks to Aleksandr Frid <afrid@nvidia.com> for identifying this and
saving hours of debugging time.

Signed-off-by: Paul Walmsley <pwalmsley@nvidia.com>
[ttynkkynen: ported to tegra124 from tegra114]
Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
[mikko.perttunen: ported to special reset callback]
Signed-off-by: Mikko Perttunen <mikko.perttunen@kapsi.fi>
Acked-by: Michael Turquette <mturquette@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-07-16 09:32:48 +02:00
Mikko Perttunen
66b6f3d074 clk: tegra: Introduce ability for SoC-specific reset control callbacks
This patch allows SoC-specific CAR initialization routines to register
their own reset_assert and reset_deassert callbacks with the common Tegra
CAR code. If defined, the common code will call these callbacks when a
reset control with number >= num_periph_banks * 32 is attempted to be asserted
or deasserted respectively. Numbers greater than or equal to num_periph_banks * 32
are used to avoid clashes with low numbers that are automatically mapped to
standard CAR reset lines.

Each SoC with these special resets should specify the defined reset control
numbers in a device tree header file.

Signed-off-by: Mikko Perttunen <mikko.perttunen@kapsi.fi>
Acked-by: Michael Turquette <mturquette@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-07-16 09:32:47 +02:00
Tuomas Tynkkynen
fa63aa3dea clk: tegra: Add functions for parsing CVB tables
Tegra CVB tables encode the relationship between operating voltage
and optimal frequency as a function of the so-called speedo value.
The speedo value is written to the on-chip fuses at the factory,
which allows the voltage-frequency operating points to be calculated
on an per-chip basis.

Add utility functions to parse the Tegra-specific tables and export the
voltage-frequency pairs to the generic OPP framework for other drivers
to use.

Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Signed-off-by: Mikko Perttunen <mikko.perttunen@kapsi.fi>
Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Michael Turquette <mturquette@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-07-16 09:32:47 +02:00
Tuomas Tynkkynen
c4fe70ada4 clk: tegra: Add closed loop support for the DFLL
With closed loop support, the clock rate of the DFLL can be adjusted.

The oscillator itself in the DFLL is a free-running oscillator whose
rate is directly determined the supply voltage. However, the DFLL
module contains logic to compare the DFLL output rate to a fixed
reference clock (51 MHz) and make a decision to either lower or raise
the DFLL supply voltage. The DFLL module can then autonomously change
the supply voltage by communicating with an off-chip PMIC via either I2C
or PWM signals. This driver currently supports only I2C.

Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Signed-off-by: Mikko Perttunen <mikko.perttunen@kapsi.fi>
Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Michael Turquette <mturquette@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-07-16 09:32:46 +02:00
Tuomas Tynkkynen
d8d7a08fa8 clk: tegra: Add library for the DFLL clock source (open-loop mode)
Add shared code to support the Tegra DFLL clocksource in open-loop
mode. This root clocksource is present on the Tegra124 SoCs. The
DFLL is the intended primary clock source for the fast CPU cluster.

This code is very closely based on a patch by Paul Walmsley from
December (http://comments.gmane.org/gmane.linux.ports.tegra/15273),
which in turn comes from the internal driver by originally created
by Aleksandr Frid <afrid@nvidia.com>.

Subsequent patches will add support for closed loop mode and drivers
for the Tegra124 fast CPU cluster DFLL devices, which rely on this
code.

Signed-off-by: Paul Walmsley <pwalmsley@nvidia.com>
Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Signed-off-by: Mikko Perttunen <mikko.perttunen@kapsi.fi>
Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Michael Turquette <mturquette@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-07-16 09:32:44 +02:00
Frank Li
787b4271a6 clk: imx: add imx6ul clk tree support
Add imx6ul clock driver support.

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Bai Ping <b51503@freescale.com>
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Frank Li <Frank.Li@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-07-14 15:02:13 +08:00
Stephen Boyd
86665d2897 clk: st: Fix error paths and allocation style
The error paths in this file leak memory and mappings and test
for pointers being valid after dereferencing them. Fix these
problems and properly free resources on errors. Fix some
stylistic things too like using sizeof(*ptr) and fitting more
code on a single line. Note that we don't unregister clocks here.
That needs a clk_composite_unregister() API that we don't have
right now.

Acked-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Cc: Pankaj Dev <pankaj.dev@st.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-13 17:12:31 -07:00
Fabio Estevam
05e062f92c clk: imx: clk-imx6q: Provide initial IPU clock settings for mx6dl
Currently it is not possible to use HDMI and LVDS at the same time on a
imx6dl-sabresd board.

Fix this usecase by setting IMX6QDL_CLK_PLL3_PFD1_540M to 540MHz and
also by setting it as the parent of IMX6QDL_CLK_IPU1_SEL.

Based on the configuration done in the FSL kernel.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-07-13 16:35:30 +08:00
Linus Torvalds
4322f02847 A small set of fixes for problems found by smatch in new drivers
that we added this rc and a handful of driver fixes that came in
 during the merge window.
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Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk fixes from Stephen Boyd:
 "A small set of fixes for problems found by smatch in new drivers that
  we added this rc and a handful of driver fixes that came in during the
  merge window"

* tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
  drivers: clk: st: Incorrect register offset used for lock_status
  clk: mediatek: mt8173: Fix enabling of critical clocks
  drivers: clk: st: Fix mux bit-setting for Cortex A9 clocks
  drivers: clk: st: Add CLK_GET_RATE_NOCACHE flag to clocks
  drivers: clk: st: Fix flexgen lock init
  drivers: clk: st: Fix FSYN channel values
  drivers: clk: st: Remove unused code
  clk: qcom: Use parent rate when set rate to pixel RCG clock
  clk: at91: do not leak resources
  clk: stm32: Fix out-by-one error path in the index lookup
  clk: iproc: fix bit manipulation arithmetic
  clk: iproc: fix memory leak from clock name
2015-07-11 11:08:21 -07:00
Kevin Hilman
d024bae2c4 Allwinner late changes for 4.2
A bunch of defconfig changes, and some patches to make the Allwinner H3 and
 A33 boot properly.
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Merge tag 'sunxi-late-for-4.2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into fixes

Merge "Allwinner late changes for 4.2" from Maxime Ripard:

Allwinner late changes for 4.2

A bunch of defconfig changes, and some patches to make the Allwinner H3 and
A33 boot properly.

* tag 'sunxi-late-for-4.2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
  ARM: sunxi: Enable simplefb in the defconfig
  ARM: Remove deprecated symbol from defconfig files
  ARM: sunxi: Add Machine support for A33
  ARM: sunxi: Introduce Allwinner H3 support
  Documentation: sunxi: Update Allwinner SoC documentation
2015-07-09 15:08:44 -07:00
Stephen Boyd
f04b8b48d3 Merge branch 'clk-fixes' into clk-next
* clk-fixes:
  drivers: clk: st: Incorrect register offset used for lock_status
2015-07-07 17:20:07 -07:00
Stephen Boyd
2573a02aa5 clk: Move clk_provider_list to scope of function using it
The list isn't used after of_clk_init() is called, so we don't
need to keep an empty list around after init. Put the list on the
stack.

Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-07 17:20:05 -07:00
Stephen Boyd
2e3b19f137 clk: Check for allocation errors in of_clk_init()
Dan Carpenter reports that we don't check the allocation here for
failure. Add a failure check and free any previously allocated
providers from the clk_provider_list.

Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-07 17:20:03 -07:00
Stephen Boyd
ca7d07a22a Merge branch 'clk-rk3368' into clk-next
* clk-rk3368:
  clk: rockchip: add rk3368 clock controller
  clk: rockchip: add missing include guards
  clk: rockchip: add dt-binding header for rk3368
  dt-bindings: add documentation of rk3668 clock controller
  clk: rockchip: define the inverters of rk3066/rk3188 and rk3288
  clk: rockchip: fix issues in the mmc-phase clock
  clk: rockchip: add support for phase inverters
  clk: rockchip: add COMPOSITE_NOGATE_DIVTBL variant
  clk: rockchip: protect register macros against multipart values
  clk: rockchip: fix faulty vip parent name on rk3288
  clk: rockchip: rk3288: add CLK_SET_RATE_PARENT to sclk_mac
2015-07-07 17:20:00 -07:00
Georgi Djakov
d4f76de374 clk: qcom: Add support for SR2 PLLs
Add support for SR2 type pll operations. SR2 is optimized for Time Interval
Error (TIE) or absolute jitter.

Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-07 17:19:58 -07:00
Stephen Boyd
a8a8db4799 clk: at91: Silence warnings and cleanup __init/extern usage
Remove useless ifdefs around function prototypes to silence the
following sparse warnings when the configs aren't enabled.

drivers/clk/at91/clk-h32mx.c:95:13: warning: symbol
'of_sama5d4_clk_h32mx_setup' was not declared. Should it be
static?
drivers/clk/at91/clk-utmi.c:159:13: warning: symbol
'of_at91sam9x5_clk_utmi_setup' was not declared. Should it be
static?

Plus, using __init and extern in function prototypes doesn't do
anything, so just drop it throughout this file.

Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-07 17:19:31 -07:00
Pankaj Dev
56551da925 drivers: clk: st: Incorrect register offset used for lock_status
Incorrect register offset used for sthi407 clockgenC

Signed-off-by: Pankaj Dev <pankaj.dev@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Fixes: 51306d56ba ("clk: st: STiH407: Support for clockgenC0")
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-07 16:05:08 -07:00
Georgi Djakov
adb11a40a3 clk: qcom: Constify the parent names arrays
Make const both the array and the strings, so they can be
moved to .rodata section.

Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-06 17:20:59 -07:00
Matthias Brugger
78e50c6def clk: xgene: Delete duplicated name field
X-Gene clocks implement it's name in the clock private struct.
This is a duplication of the name field. We can delete the field
and rely on the common implementation to retrieve the name.

Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-06 17:20:57 -07:00
Sergej Sawazki
bb68a4f1e5 clk: Rename clk-gpio-gate.c to clk-gpio.c
The file clk-gpio-gate.c does not only contain the gate clock, but also
the mux clock. Rename the file to clk-gpio.c.

Cc: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Sergej Sawazki <ce3a@gmx.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-06 17:20:55 -07:00
Sergej Sawazki
80eeb1f0f7 clk: add gpio controlled clock multiplexer
Add a common clock driver for basic gpio controlled clock multiplexers.
This driver can be used for devices like 5V41068A or 831721I from IDT
or for discrete multiplexer circuits. The 'select' pin selects one of
two parent clocks.

Cc: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Sergej Sawazki <ce3a@gmx.de>
[sboyd@codeaurora.org: Fix error paths to free memory and do it
in the correct order]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-06 17:20:52 -07:00
Sergej Sawazki
281cbb0076 clk: gpio-gate: Stay silent on EPROBE_DEFER
Do not output an error message if requesting gpio failes with EPROBE_DEFER.

Cc: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Sergej Sawazki <ce3a@gmx.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-06 15:55:07 -07:00
Sergej Sawazki
e21b08e2f3 clk: gpio-gate: Include export.h instead of module.h
Include export.h for EXPORT_SYMBOL_GPL, no need to include module.h.

Cc: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Sergej Sawazki <ce3a@gmx.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-06 15:55:06 -07:00
Stephen Boyd
f75073fabd Merge branch 'clk-fixes' into clk-next
* clk-fixes:
  clk: mediatek: mt8173: Fix enabling of critical clocks
  drivers: clk: st: Fix mux bit-setting for Cortex A9 clocks
  drivers: clk: st: Add CLK_GET_RATE_NOCACHE flag to clocks
  drivers: clk: st: Fix flexgen lock init
  drivers: clk: st: Fix FSYN channel values
  drivers: clk: st: Remove unused code
  clk: qcom: Use parent rate when set rate to pixel RCG clock
  clk: at91: do not leak resources
  clk: stm32: Fix out-by-one error path in the index lookup
  clk: iproc: fix bit manipulation arithmetic
  clk: iproc: fix memory leak from clock name
2015-07-06 15:54:58 -07:00
Sascha Hauer
7b2a4635b8 clk: mediatek: mt8173: Fix enabling of critical clocks
On the MT8173 the clocks are provided by different units. To enable
the critical clocks we must be sure that all parent clocks are already
registered, otherwise the parents of the critical clocks end up being
unused and get disabled later. To find a place where all parents are
registered we try each time after we've registered some clocks if
all known providers are present now and only then we enable the critical
clocks

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
[sboyd@codeaurora.org: Marked function and data __init]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-06 15:54:13 -07:00
Heiko Stuebner
3536c97a52 clk: rockchip: add rk3368 clock controller
Describe the clock tree and software resets of the rk3368 ARM64 SoC

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-06 15:09:22 -07:00
Heiko Stuebner
4534b1113e clk: rockchip: define the inverters of rk3066/rk3188 and rk3288
Both soc series' have inverters on the hsadc and camera interface clock
paths. So define them using the newly added inverter type.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-06 15:07:40 -07:00
Heiko Stuebner
7c494ad058 clk: rockchip: fix issues in the mmc-phase clock
The review for the new inverter clock type uncovered some issues (missing
headers and name handling) that are also present in the mmc-phase clock
type, I got (to much) inspiration from. Fix these there too.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-06 15:07:38 -07:00
Heiko Stuebner
8a76f443a9 clk: rockchip: add support for phase inverters
Most Rockchip socs have optional phase inverters connected to some
clocks that move the clock-phase by 180 degrees.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[sboyd@codeaurora.org: Dropped lazy part of commit text]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-06 15:04:40 -07:00
Heiko Stuebner
6f08507253 clk: rockchip: add COMPOSITE_NOGATE_DIVTBL variant
A clock branch consisting of a mux and divider with non-standard
divider values.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-06 15:03:25 -07:00
Heiko Stuebner
2d7884a7d0 clk: rockchip: protect register macros against multipart values
The macros calculate the correct offset from the id in the parameter.
If this parameter does not consist of a single number, the calculation
will return wrong registers in the best case or create unaligned accesses
in the worst case. So protect the calculations against such values.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-06 15:03:24 -07:00
Heiko Stuebner
101762976b clk: rockchip: fix faulty vip parent name on rk3288
The video input processor (vip) was called camera interface (cif) on
older socs which seems to have resulted in a copy'n'paste error when
creating the rk3288 camera clocks.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-06 15:03:23 -07:00
Heiko Stuebner
4791eb61db clk: rockchip: rk3288: add CLK_SET_RATE_PARENT to sclk_mac
The dwmac ethernet controller on the rk3288 supports phys connected
via rgmii and rmii. With rgmii phys it is expected that the mac clock
is provided externally while with rmii phys the clock can be external
but also generated from the plls. In the later case it of course needs
be at 50MHz, which gets set from the dwmac_rk driver.
As most devices use a rgmii phy it never surfaced so far that the mac
clk mux, doesn't go up one lever to the pll clock in the rmii case with
internal clock generation, as it is missing the CLK_SET_RATE_PARENT flag,
and thus will not set the correct frequency in most cases.

Fixes: b9e4ba5416 ("clk: rockchip: add clock controller for rk3288")
Cc: stable@vger.kernel.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-06 15:03:23 -07:00
Gabriel Fernandez
3be6d8ce63 drivers: clk: st: Fix mux bit-setting for Cortex A9 clocks
This patch fixes the mux bit-setting for ClockgenA9.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Fixes: 13e6f2da1d ("clk: st: STiH407: Support for A9 MUX Clocks")
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-06 12:25:42 -07:00
Pankaj Dev
18fee4538f drivers: clk: st: Add CLK_GET_RATE_NOCACHE flag to clocks
Add the CLK_GET_RATE_NOCACHE flag to all the clocks with recalc ops,
so that they reflect Hw rate after CPS wake-up when a clk_get_rate()
is called

Signed-off-by: Pankaj Dev <pankaj.dev@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-06 12:25:40 -07:00
Giuseppe Cavallaro
0f4f2afd44 drivers: clk: st: Fix flexgen lock init
While proving lock, the following warning happens
and it is fixed after initializing lock in the setup
function

INFO: trying to register non-static key.
the code is fine but needs lockdep annotation.
turning off the locking correctness validator.
CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.10.27-02861-g39df285-dirty #33
[<c00154ac>] (unwind_backtrace+0x0/0xf4) from [<c0011b50>] (show_stack+0x10/0x14)
[<c0011b50>] (show_stack+0x10/0x14) from [<c00689ac>] (__lock_acquire+0x900/0xb14)
[<c00689ac>] (__lock_acquire+0x900/0xb14) from [<c0069394>] (lock_acquire+0x68/0x7c)
[<c0069394>] (lock_acquire+0x68/0x7c) from [<c04958f8>] (_raw_spin_lock_irqsave+0x48/0x5c)
[<c04958f8>] (_raw_spin_lock_irqsave+0x48/0x5c) from [<c0381e6c>] (clk_gate_endisable+0x28/0x88)
[<c0381e6c>] (clk_gate_endisable+0x28/0x88) from [<c0381ee0>] (clk_gate_enable+0xc/0x14)
[<c0381ee0>] (clk_gate_enable+0xc/0x14) from [<c0386c68>] (flexgen_enable+0x28/0x40)
[<c0386c68>] (flexgen_enable+0x28/0x40) from [<c037f260>] (__clk_enable+0x5c/0x9c)
[<c037f260>] (__clk_enable+0x5c/0x9c) from [<c037f558>] (clk_enable+0x18/0x2c)
[<c037f558>] (clk_enable+0x18/0x2c) from [<c064a1dc>] (st_lpc_of_register+0xc0/0x248)
[<c064a1dc>] (st_lpc_of_register+0xc0/0x248) from [<c0649e44>] (clocksource_of_init+0x34/0x58)
[<c0649e44>] (clocksource_of_init+0x34/0x58) from [<c0637ddc>] (sti_timer_init+0x10/0x18)
[<c0637ddc>] (sti_timer_init+0x10/0x18) from [<c06343f8>] (time_init+0x20/0x30)
[<c06343f8>] (time_init+0x20/0x30) from [<c0632984>] (start_kernel+0x20c/0x2e8)
[<c0632984>] (start_kernel+0x20c/0x2e8) from [<40008074>] (0x40008074)

Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Fixes: b116517055 ("clk: st: STiH407: Support for Flexgen Clocks")
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-06 12:25:39 -07:00
Gabriel Fernandez
c4d339c69f drivers: clk: st: Fix FSYN channel values
This patch fixes the value for disabling the FSYN channel clock.
The 'is_enabled' returned value is also fixed.

Signed-off-by: Pankaj Dev <pankaj.dev@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-06 12:25:38 -07:00
Gabriel Fernandez
c14bada8f7 drivers: clk: st: Remove unused code
Remove this duplicated code due to a bad copy / paste.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-06 12:25:36 -07:00
Hai Li
6d451367bf clk: qcom: Use parent rate when set rate to pixel RCG clock
Since the parent rate has been recalculated, pixel RCG clock
should rely on it to find the correct M/N values during set_rate,
instead of calling __clk_round_rate() to its parent again.

Signed-off-by: Hai Li <hali@codeaurora.org>
Tested-by: Archit Taneja <architt@codeaurora.org>
Fixes: 99cbd064b0 ("clk: qcom: Support display RCG clocks")
[sboyd@codeaurora.org: Silenced unused parent variable warning]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-06 12:24:51 -07:00
Vishnu Patekar
159870d241 ARM: sunxi: Add Machine support for A33
Add machine support for the Allwinner A33 quad core cortex-a7 based SoC,
which is similar to the A23 SoC.

Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Tested-by: Chen-Yu Tsai <wens@csie.org>
2015-07-05 16:33:55 +02:00
Linus Torvalds
75462c8a87 Replace module_platform_driver with builtin_platform driver in non modules.
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Merge tag 'module-builtin_driver-v4.1-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/paulg/linux

Pull module_platform_driver replacement from Paul Gortmaker:
 "Replace module_platform_driver with builtin_platform driver in non
  modules.

  We see an increasing number of non-modular drivers using
  modular_driver() type register functions.  There are several downsides
  to letting this continue unchecked:

   - The code can appear modular to a reader of the code, and they won't
     know if the code really is modular without checking the Makefile
     and Kconfig to see if compilation is governed by a bool or
     tristate.

   - Coders of drivers may be tempted to code up an __exit function that
     is never used, just in order to satisfy the required three args of
     the modular registration function.

   - Non-modular code ends up including the <module.h> which increases
     CPP overhead that they don't need.

   - It hinders us from performing better separation of the module init
     code and the generic init code.

  So here we introduce similar macros for builtin drivers.  Then we
  convert builtin drivers (controlled by a bool Kconfig) by making the
  following type of mapping:

    module_platform_driver()       --->  builtin_platform_driver()
    module_platform_driver_probe() --->  builtin_platform_driver_probe().

  The set of drivers that are converted here are just the ones that
  showed up as relying on an implicit include of <module.h> during a
  pending header cleanup.  So we convert them here vs adding an include
  of <module.h> to non-modular code to avoid compile fails.  Additonal
  conversions can be done asynchronously at any time.

  Once again, an unused module_exit function that is removed here
  appears in the diffstat as an outlier wrt all the other changes"

* tag 'module-builtin_driver-v4.1-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/paulg/linux:
  drivers/clk: convert sunxi/clk-mod0.c to use builtin_platform_driver
  drivers/power: Convert non-modular syscon-reboot to use builtin_platform_driver
  drivers/soc: Convert non-modular soc-realview to use builtin_platform_driver
  drivers/soc: Convert non-modular tegra/pmc to use builtin_platform_driver
  drivers/cpufreq: Convert non-modular s5pv210-cpufreq.c to use builtin_platform_driver
  drivers/cpuidle: Convert non-modular drivers to use builtin_platform_driver
  drivers/platform: Convert non-modular pdev_bus to use builtin_platform_driver
  platform_device: better support builtin boilerplate avoidance
2015-07-02 10:42:13 -07:00
Linus Torvalds
2d4407079c Replace module_init with equivalent device_initcall in non modules.
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Merge tag 'module_init-device_initcall-v4.1-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/paulg/linux

Pull module_init replacement part one from Paul Gortmaker:
 "Replace module_init with equivalent device_initcall in non modules.

  This series of commits converts non-modular code that is using the
  module_init() call to hook itself into the system to instead use
  device_initcall().

  The conversion is a runtime no-op, since module_init actually becomes
  __initcall in the non-modular case, and that in turn gets mapped onto
  device_initcall.  A couple files show a larger negative diffstat,
  representing ones that had a module_exit function that we remove here
  vs previously relying on the linker to dispose of it.

  We make this conversion now, so that we can relocate module_init from
  init.h into module.h in the future.

  The files changed here are just limited to those that would otherwise
  have to add module.h to obviously non-modular code, in order to avoid
  a compile fail, as testing has shown"

* tag 'module_init-device_initcall-v4.1-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/paulg/linux:
  MIPS: don't use module_init in non-modular cobalt/mtd.c file
  drivers/leds: don't use module_init in non-modular leds-cobalt-raq.c
  cris: don't use module_init for non-modular core eeprom.c code
  tty/metag_da: Avoid module_init/module_exit in non-modular code
  drivers/clk: don't use module_init in clk-nomadik.c which is non-modular
  xtensa: don't use module_init for non-modular core network.c code
  sh: don't use module_init in non-modular psw.c code
  mn10300: don't use module_init in non-modular flash.c code
  parisc64: don't use module_init for non-modular core perf code
  parisc: don't use module_init for non-modular core pdc_cons code
  cris: don't use module_init for non-modular core intmem.c code
  ia64: don't use module_init in non-modular sim/simscsi.c code
  ia64: don't use module_init for non-modular core kernel/mca.c code
  arm: don't use module_init in non-modular mach-vexpress/spc.c code
  powerpc: don't use module_init in non-modular 83xx suspend code
  powerpc: use device_initcall for registering rtc devices
  x86: don't use module_init in non-modular devicetree.c code
  x86: don't use module_init in non-modular intel_mid_vrtc.c
2015-07-02 10:30:48 -07:00
Linus Torvalds
9d86b4128c Fix up implicit <module.h> users that will break later.
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Merge tag 'module-implicit-v4.1-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/paulg/linux

Pull implicit module.h fixes from Paul Gortmaker:
 "Fix up implicit <module.h> users that will break later.

  The files changed here are simply modular source files that are
  implicitly relying on <module.h> being present.  We fix them up now,
  so that we can decouple some of the module related init code from the
  core init code in the future.

  The addition of the module.h include to several files here is also a
  no-op from a code generation point of view, else there would already
  be compile issues with these files today.

  There may be lots more implicit includes of <module.h> in tree, but
  these are the ones that extensive build test coverage has shown that
  must be fixed in order to avoid build breakage fallout for the pending
  module.h <---> init.h code relocation we desire to complete"

* tag 'module-implicit-v4.1-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/paulg/linux:
  frv: add module.h to mb93090-mb00/flash.c to avoid compile fail
  drivers/cpufreq: include <module.h> for modular exynos-cpufreq.c code
  drivers/staging: include <module.h> for modular android tegra_ion code
  crypto/asymmetric_keys: pkcs7_key_type needs module.h
  sh: mach-highlander/psw.c is tristate and should use module.h
  drivers/regulator: include <module.h> for modular max77802 code
  drivers/pcmcia: include <module.h> for modular xxs1500_ss code
  drivers/hsi: include <module.h> for modular omap_ssi code
  drivers/gpu: include <module.h> for modular rockchip code
  drivers/gpio: include <module.h> for modular crystalcove code
  drivers/clk: include <module.h> for clk-max77xxx modular code
2015-07-02 10:25:22 -07:00
David Dueck
c76a024e82 clk: at91: do not leak resources
Do not leak memory and free irqs in case of an error.

Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: David Dueck <davidcdueck@googlemail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-02 09:51:50 -07:00
Daniel Thompson
15ab38273d clk: stm32: Fix out-by-one error path in the index lookup
If stm32f4_rcc_lookup() is called with primary == 0 and secondary == 192
then it will read beyond the end of the table array due to an out-by-one
error in the range check.

In addition to the fixing the inequality we also modify the r.h.s. to
make it even more explicit that we are comparing against the size of
table in bits.

Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
Acked-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Fixes: 358bdf892f ("clk: stm32: Add clock driver for STM32F4[23]xxx devices")
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-02 09:51:26 -07:00
Ray Jui
69916d9609 clk: iproc: fix bit manipulation arithmetic
A 32-bit variable should be type casted to 64-bit before arithmetic
operation and assigning it to a 64-bit variable

Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Ray Jui <rjui@broadcom.com>
Fixes: 5fe225c105 ("clk: iproc: add initial common clock support")
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-02 09:51:09 -07:00
Ray Jui
45a481c217 clk: iproc: fix memory leak from clock name
of_property_read_string_index takes array of pointers and assign them to
strings read from device tree property. No additional memory allocation
is needed prior to calling of_property_read_string_index. In fact, since
the array of pointers will be re-assigned to other strings, any memory
that it points to prior to calling of_property_read_string_index will be
leaked

Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Ray Jui <rjui@broadcom.com>
Fixes: 5fe225c105 ("clk: iproc: add initial common clock support")
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-02 09:50:26 -07:00
Linus Torvalds
5f1201d515 The changes to the common clock framework for 4.2 are dominated by new
drivers and updates to existing ones, as usual. There are some fixes to
 the framework itself and several cleanups for sparse warnings, etc.
 Please consider pulling.
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Merge tag 'clk-for-linus-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clock framework updates from Michael Turquette:
 "The changes to the common clock framework for 4.2 are dominated by new
  drivers and updates to existing ones, as usual.

  There are some fixes to the framework itself and several cleanups for
  sparse warnings, etc"

* tag 'clk-for-linus-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (135 commits)
  clk: stm32: Add clock driver for STM32F4[23]xxx devices
  dt-bindings: Document the STM32F4 clock bindings
  cpufreq: exynos: remove Exynos4210 specific cpufreq driver support
  ARM: Exynos: switch to using generic cpufreq driver for Exynos4210
  clk: samsung: exynos4: add cpu clock configuration data and instantiate cpu clock
  clk: samsung: add infrastructure to register cpu clocks
  clk: add CLK_RECALC_NEW_RATES clock flag for Exynos cpu clock support
  doc: dt: add documentation for lpc1850-ccu clk driver
  clk: add lpc18xx ccu clk driver
  doc: dt: add documentation for lpc1850-cgu clk driver
  clk: add lpc18xx cgu clk driver
  clk: keystone: add support for post divider register for main pll
  clk: mvebu: flag the crypto clk as CLK_IGNORE_UNUSED
  clk: cygnus: remove Cygnus dummy clock binding
  clk: cygnus: add clock support for Broadcom Cygnus
  clk: Change bcm clocks build dependency
  clk: iproc: add initial common clock support
  clk: iproc: define Broadcom iProc clock binding
  MAINTAINERS: update email for Michael Turquette
  clk: meson: add some error handling in meson_clk_register_cpu()
  ...
2015-07-01 19:22:00 -07:00
Linus Torvalds
78c10e556e Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS updates from Ralf Baechle:

 - Improvements to the tlb_dump code
 - KVM fixes
 - Add support for appended DTB
 - Minor improvements to the R12000 support
 - Minor improvements to the R12000 support
 - Various platform improvments for BCM47xx
 - The usual pile of minor cleanups
 - A number of BPF fixes and improvments
 - Some improvments to the support for R3000 and DECstations
 - Some improvments to the ATH79 platform support
 - A major patchset for the JZ4740 SOC adding support for the CI20 platform
 - Add support for the Pistachio SOC
 - Minor BMIPS/BCM63xx platform support improvments.
 - Avoid "SYNC 0" as memory barrier when unlocking spinlocks
 - Add support for the XWR-1750 board.
 - Paul's __cpuinit/__cpuinitdata cleanups.
 - New Malta CPU board support large memory so enable ZONE_DMA32.

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (131 commits)
  MIPS: spinlock: Adjust arch_spin_lock back-off time
  MIPS: asmmacro: Ensure 64-bit FP registers are used with MSA
  MIPS: BCM47xx: Simplify handling SPROM revisions
  MIPS: Cobalt Don't use module_init in non-modular MTD registration.
  MIPS: BCM47xx: Move NVRAM driver to the drivers/firmware/
  MIPS: use for_each_sg()
  MIPS: BCM47xx: Don't select BCMA_HOST_PCI
  MIPS: BCM47xx: Add helper variable for storing NVRAM length
  MIPS: IRQ/IP27: Move IRQ allocation API to platform code.
  MIPS: Replace smp_mb with release barrier function in unlocks.
  MIPS: i8259: DT support
  MIPS: Malta: Basic DT plumbing
  MIPS: include errno.h for ENODEV in mips-cm.h
  MIPS: Define GCR_GIC_STATUS register fields
  MIPS: BPF: Introduce BPF ASM helpers
  MIPS: BPF: Use BPF register names to describe the ABI
  MIPS: BPF: Move register definition to the BPF header
  MIPS: net: BPF: Replace RSIZE with SZREG
  MIPS: BPF: Free up some callee-saved registers
  MIPS: Xtalk: Update xwidget.h with known Xtalk device numbers
  ...
2015-06-27 12:44:34 -07:00
Linus Torvalds
f5dcb68086 ARM: SoC: driver updates for v4.2
Some of these are for drivers/soc, where we're now putting
 SoC-specific drivers these days. Some are for other driver subsystems
 where we have received acks from the appropriate maintainers.
 
 Some highlights:
 
 - simple-mfd: document DT bindings and misc updates
 - migrate mach-berlin to simple-mfd for clock, pinctrl and reset
 - memory: support for Tegra132 SoC
 - memory: introduce tegra EMC driver for scaling memory frequency
 - misc. updates for ARM CCI and CCN busses
 
  Conflicts:
 	arch/arm64/boot/dts/arm/juno-motherboard.dtsi
 
  Trivial add/add conflict with our dt branch.
  Resolution: take both sides.
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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver updates from Kevin Hilman:
 "Some of these are for drivers/soc, where we're now putting
  SoC-specific drivers these days.  Some are for other driver subsystems
  where we have received acks from the appropriate maintainers.

  Some highlights:

   - simple-mfd: document DT bindings and misc updates
   - migrate mach-berlin to simple-mfd for clock, pinctrl and reset
   - memory: support for Tegra132 SoC
   - memory: introduce tegra EMC driver for scaling memory frequency
   - misc. updates for ARM CCI and CCN busses"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (48 commits)
  drivers: soc: sunxi: Introduce SoC driver to map SRAMs
  arm-cci: Add aliases for PMU events
  arm-cci: Add CCI-500 PMU support
  arm-cci: Sanitise CCI400 PMU driver specific code
  arm-cci: Abstract handling for CCI events
  arm-cci: Abstract out the PMU counter details
  arm-cci: Cleanup PMU driver code
  arm-cci: Do not enable CCI-400 PMU by default
  firmware: qcom: scm: Add HDCP Support
  ARM: berlin: add an ADC node for the BG2Q
  ARM: berlin: remove useless chip and system ctrl compatibles
  clk: berlin: drop direct of_iomap of nodes reg property
  ARM: berlin: move BG2Q clock node
  ARM: berlin: move BG2CD clock node
  ARM: berlin: move BG2 clock node
  clk: berlin: prepare simple-mfd conversion
  pinctrl: berlin: drop SoC stub provided regmap
  ARM: berlin: move pinctrl to simple-mfd nodes
  pinctrl: berlin: prepare to use regmap provided by syscon
  reset: berlin: drop arch_initcall initialization
  ...
2015-06-26 11:54:29 -07:00
Linus Torvalds
4aa705b18b ARM: SoC: platform support for v4.2
Our SoC branch usually contains expanded support for new SoCs and
 other core platform code. Some highlights from this round:
 
 - sunxi: SMP support for A23 SoC
 - socpga: big-endian support
 - pxa: conversion to common clock framework
 - bcm: SMP support for BCM63138
 - imx: support new I.MX7D SoC
 - zte: basic support for ZX296702 SoC
 
  Conflicts:
 	arch/arm/mach-socfpga/core.h
 
 Trivial remove/remove conflict with our cleanup branch.
 Resolution: remove both sides
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Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC platform support updates from Kevin Hilman:
 "Our SoC branch usually contains expanded support for new SoCs and
  other core platform code.  Some highlights from this round:

   - sunxi: SMP support for A23 SoC
   - socpga: big-endian support
   - pxa: conversion to common clock framework
   - bcm: SMP support for BCM63138
   - imx: support new I.MX7D SoC
   - zte: basic support for ZX296702 SoC"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (134 commits)
  ARM: zx: Add basic defconfig support for ZX296702
  ARM: dts: zx: add an initial zx296702 dts and doc
  clk: zx: add clock support to zx296702
  dt-bindings: Add #defines for ZTE ZX296702 clocks
  ARM: socfpga: fix build error due to secondary_startup
  MAINTAINERS: ARM64: EXYNOS: Extend entry for ARM64 DTS
  ARM: ep93xx: simone: support for SPI-based MMC/SD cards
  MAINTAINERS: update Shawn's email to use kernel.org one
  ARM: socfpga: support suspend to ram
  ARM: socfpga: add CPU_METHOD_OF_DECLARE for Arria 10
  ARM: socfpga: use CPU_METHOD_OF_DECLARE for socfpga_cyclone5
  ARM: EXYNOS: register power domain driver from core_initcall
  ARM: EXYNOS: use PS_HOLD based poweroff for all supported SoCs
  ARM: SAMSUNG: Constify platform_device_id
  ARM: EXYNOS: Constify irq_domain_ops
  ARM: EXYNOS: add coupled cpuidle support for Exynos3250
  ARM: EXYNOS: add exynos_get_boot_addr() helper
  ARM: EXYNOS: add exynos_set_boot_addr() helper
  ARM: EXYNOS: make exynos_core_restart() less verbose
  ARM: EXYNOS: fix exynos_boot_secondary() return value on timeout
  ...
2015-06-26 11:34:35 -07:00
Linus Torvalds
55a7d4b85c h8300 pull request for 4.2
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Merge tag 'for-4.2' of git://git.sourceforge.jp/gitroot/uclinux-h8/linux

Pull Renesas H8/300 architecture re-introduction from Yoshinori Sato.

We dropped arch/h8300 two years ago as stale and old, this is a new and
more modern rewritten arch support for the same architecture.

* tag 'for-4.2' of git://git.sourceforge.jp/gitroot/uclinux-h8/linux: (27 commits)
  h8300: fix typo.
  h8300: Always build dtb
  h8300: Remove ARCH_WANT_IPC_PARSE_VERSION
  sh-sci: Get register size from platform device
  clk: h8300: fix error handling in h8s2678_pll_clk_setup()
  h8300: Symbol name fix
  h8300: devicetree source
  h8300: configs
  h8300: IRQ chip driver
  h8300: clocksource
  h8300: clock driver
  h8300: Build scripts
  h8300: library functions
  h8300: Memory management
  h8300: miscellaneous functions
  h8300: process helpers
  h8300: compressed image support
  h8300: Low level entry
  h8300: kernel startup
  h8300: Interrupt and exceptions
  ...
2015-06-25 13:07:24 -07:00
Linus Torvalds
e0456717e4 Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next
Pull networking updates from David Miller:

 1) Add TX fast path in mac80211, from Johannes Berg.

 2) Add TSO/GRO support to ibmveth, from Thomas Falcon

 3) Move away from cached routes in ipv6, just like ipv4, from Martin
    KaFai Lau.

 4) Lots of new rhashtable tests, from Thomas Graf.

 5) Run ingress qdisc lockless, from Alexei Starovoitov.

 6) Allow servers to fetch TCP packet headers for SYN packets of new
    connections, for fingerprinting.  From Eric Dumazet.

 7) Add mode parameter to pktgen, for testing receive.  From Alexei
    Starovoitov.

 8) Cache access optimizations via simplifications of build_skb(), from
    Alexander Duyck.

 9) Move page frag allocator under mm/, also from Alexander.

10) Add xmit_more support to hv_netvsc, from KY Srinivasan.

11) Add a counter guard in case we try to perform endless reclassify
    loops in the packet scheduler.

12) Extern flow dissector to be programmable and use it in new "Flower"
    classifier.  From Jiri Pirko.

13) AF_PACKET fanout rollover fixes, performance improvements, and new
    statistics.  From Willem de Bruijn.

14) Add netdev driver for GENEVE tunnels, from John W Linville.

15) Add ingress netfilter hooks and filtering, from Pablo Neira Ayuso.

16) Fix handling of epoll edge triggers in TCP, from Eric Dumazet.

17) Add an ECN retry fallback for the initial TCP handshake, from Daniel
    Borkmann.

18) Add tail call support to BPF, from Alexei Starovoitov.

19) Add several pktgen helper scripts, from Jesper Dangaard Brouer.

20) Add zerocopy support to AF_UNIX, from Hannes Frederic Sowa.

21) Favor even port numbers for allocation to connect() requests, and
    odd port numbers for bind(0), in an effort to help avoid
    ip_local_port_range exhaustion.  From Eric Dumazet.

22) Add Cavium ThunderX driver, from Sunil Goutham.

23) Allow bpf programs to access skb_iif and dev->ifindex SKB metadata,
    from Alexei Starovoitov.

24) Add support for T6 chips in cxgb4vf driver, from Hariprasad Shenai.

25) Double TCP Small Queues default to 256K to accomodate situations
    like the XEN driver and wireless aggregation.  From Wei Liu.

26) Add more entropy inputs to flow dissector, from Tom Herbert.

27) Add CDG congestion control algorithm to TCP, from Kenneth Klette
    Jonassen.

28) Convert ipset over to RCU locking, from Jozsef Kadlecsik.

29) Track and act upon link status of ipv4 route nexthops, from Andy
    Gospodarek.

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next: (1670 commits)
  bridge: vlan: flush the dynamically learned entries on port vlan delete
  bridge: multicast: add a comment to br_port_state_selection about blocking state
  net: inet_diag: export IPV6_V6ONLY sockopt
  stmmac: troubleshoot unexpected bits in des0 & des1
  net: ipv4 sysctl option to ignore routes when nexthop link is down
  net: track link-status of ipv4 nexthops
  net: switchdev: ignore unsupported bridge flags
  net: Cavium: Fix MAC address setting in shutdown state
  drivers: net: xgene: fix for ACPI support without ACPI
  ip: report the original address of ICMP messages
  net/mlx5e: Prefetch skb data on RX
  net/mlx5e: Pop cq outside mlx5e_get_cqe
  net/mlx5e: Remove mlx5e_cq.sqrq back-pointer
  net/mlx5e: Remove extra spaces
  net/mlx5e: Avoid TX CQE generation if more xmit packets expected
  net/mlx5e: Avoid redundant dev_kfree_skb() upon NOP completion
  net/mlx5e: Remove re-assignment of wq type in mlx5e_enable_rq()
  net/mlx5e: Use skb_shinfo(skb)->gso_segs rather than counting them
  net/mlx5e: Static mapping of netdev priv resources to/from netdev TX queues
  net/mlx4_en: Use HW counters for rx/tx bytes/packets in PF device
  ...
2015-06-24 16:49:49 -07:00
Linus Torvalds
1a13e36a79 fbdev changes for 4.2
* ssd1307fb: various fixes and improvements, SSD1305 support
 * Use architecture agnostic functions instead of MTRR functions in various
   fbdev drivers
 * TI DRA7xx SoC display support (arch/arm/ side)
 * OMAPDSS componentization to fix probing order issues
 * OMAPDSS scaling fixes
 * msm_fb: remove obsoleted driver
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Merge tag 'fbdev-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux

Pull fbdev updates from Tomi Valkeinen:

 - ssd1307fb: various fixes and improvements, SSD1305 support

 - use architecture agnostic functions instead of MTRR functions in
   various fbdev drivers

 - TI DRA7xx SoC display support (arch/arm/ side)

 - OMAPDSS componentization to fix probing order issues

 - OMAPDSS scaling fixes

 - msm_fb: remove obsoleted driver

* tag 'fbdev-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux: (77 commits)
  msm: msm_fb: Remove dead code
  OMAPDSS: HDMI: wait for framedone when stopping video
  OMAPDSS: HDMI4: fix error handling
  OMAPDSS: DISPC: scaler debug print
  OMAPDSS: DISPC: do only y decimation on OMAP3
  OMAPDSS: DISPC: check if scaling setup failed
  OMAPDSS: DISPC: fix 64 bit issue in 5-tap
  OMAPDSS: DISPC: fix row_inc for OMAP3
  OMAPDSS: DISPC: add check for scaling limits
  OMAPDSS: DISPC: fix check_horiz_timing_omap3 args
  OMAPDSS: DISPC: fix predecimation for YUV modes
  OMAPDSS: DISPC: work-around for errata i631
  OMAPDSS: simplify submodule reg/unreg code
  OMAPDSS: componentize omapdss
  OMAPDSS: reorder uninit calls
  OMAPDSS: remove uses of __init/__exit
  OMAPDSS: fix dss_init_ports error handling
  OMAPDSS: refactor dss probe function
  OMAPDSS: move 'dss_initialized' to dss driver
  fbdev: propagate result of fb_videomode_from_videomode()
  ...
2015-06-23 16:23:30 -07:00
Linus Torvalds
2ad7b44f5d Merge branch 'for-linus-clk' of git://ftp.arm.linux.org.uk/~rmk/linux-arm
Pull clkdev updates from Russell King:
 "This series addresses some breakage in clkdev caused by a previous
  patch set from the clk tree which introduced per-user clk structures.
  This basically renamed the existing 'struct clk' to 'struct clk_hw',
  and introduced a new 'struct clk'.

  This change will break anyone using clk_add_alias() with the common
  clk code enabled.  Thankfully, the intersection of users of
  clk_add_alias() and those using the common clk code is practically
  zero, but this is something which should be fixed to keep the code
  sane.

  The problem is that clk_add_alias() does this:

        r = clk_get(...);
        l = clkdev_alloc(r, ...);
        clk_put(...);

  which causes the alias to store a pointer to 'r', which has been
  freed.

  The original patch set tried to work around this problem incorrectly -
  at clk_get() time, it tried to convert the struct clk to a struct
  clk_hw, and then creating a new struct clk from that.  Clearly, if the
  original struct clk has been freed, then we have a use-after-free bug.

  We have other places in the tree which do something similar, so this
  series also addresses those locations too.

  This series addresses this problem by converting clkdev to store and
  use the clk_hw pointer.  This allows clk_get() to only have to create
  it's per-user struct clk from the clk_hw.  We can also get to the
  desired clk_hw at clk_add_alias() or clk lookup creation time, when
  the struct clk is "alive".

  We also perform some cleanups of the code:

   - replacing looped calls to clkdev_add() with clkdev_add_table()

   - replacing open-coded lookup allocation (which should have been
     using clkdev_alloc()) and subsequent clkdev_add() with
     clkdev_create()

   - replacing open-coded clk_add_alias() with clk_add_alias()"

* 'for-linus-clk' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
  clk: s2mps11: use clkdev_create()
  ASoC: migor: use clkdev_create()
  ARM: omap2: use clkdev_add_alias()
  ARM: omap2: use clkdev_create()
  ARM: orion: use clkdev_create()
  ARM: lpc32xx: convert to use clkdev_add_table()
  SH: use clkdev_add_table()
  clkdev: add clkdev_create() helper
  clkdev: const-ify connection id to clk_add_alias()
  clkdev: get rid of redundant clk_add_alias() prototype in linux/clk.h
  clkdev: drop __init from clkdev_add_table()
  clk: update clk API documentation to clarify clk_round_rate()
  clkdev: use clk_hw internally
2015-06-23 15:50:46 -07:00
Dan Carpenter
ded515a4d5 clk: h8300: fix error handling in h8s2678_pll_clk_setup()
The error handling was a bit messy and buggy.  It freed "pll_clock" then
dereferenced it, and then freed it again.  I've re-written it in normal
kernel style.

Fixes: 42ff8e8008c8 ('h8300: clock driver')
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
2015-06-23 13:35:58 +09:00
Yoshinori Sato
7b5bb891a6 h8300: clock driver
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
2015-06-23 13:35:55 +09:00
Daniel Thompson
358bdf892f clk: stm32: Add clock driver for STM32F4[23]xxx devices
The driver supports decoding and statically modelling PLL state (i.e.
we inherit state from bootloader) and provides support for all
peripherals that support simple one-bit gated clocks. The covers all
peripherals whose clocks come from the AHB, APB1 or APB2 buses.

It has been tested on an STM32F429I-Discovery board. The clock counts
for TIM2, USART1 and SYSTICK are all set correctly and the wall clock
looks OK when checked with a stopwatch. I have also tested a prototype
driver for the RNG hardware. The RNG clock is correctly enabled by the
framework (also did inverse test and proved that by changing DT to
configure the wrong clock bit then we observe the RNG driver to fail).

Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
Reviewed-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
[sboyd@codeaurora.org: Silence sparse warnings]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-06-22 16:17:01 -07:00
Huacai Chen
30ad29bb48 MIPS: Loongson: Naming style cleanup and rework
Currently, code of Loongson-2/3 is under loongson directory and code of
Loongson-1 is under loongson1 directory. Besides, there are Kconfig
options such as MACH_LOONGSON and MACH_LOONGSON1. This naming style is
very ugly and confusing. Since Loongson-2/3 are both 64-bit general-
purpose CPU while Loongson-1 is 32-bit SoC, we rename both file names
and Kconfig symbols from loongson/loongson1 to loongson64/loongson32.

[ralf@linux-mips.org: Resolve a number of simple conflicts.]

Signed-off-by: Huacai Chen <chenhc@lemote.com>
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Cc: Kelvin Cheung <keguang.zhang@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/9790/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-06-21 21:53:59 +02:00
Paul Burton
29136ad581 clk: ingenic: add JZ4780 CGU support
Add support for the clocks provided by the CGU in the Ingenic JZ4780
SoC, making use of the SoC-agnostic CGU code to do the heavy lifting.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Co-authored-by: Paul Cercueil <paul@crapouillou.net>
Cc: Lars-Peter Clausen <lars@metafoo.de>
Cc: Mike Turquette <mturquette@linaro.org>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: linux-clk@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/10157/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-06-21 21:53:20 +02:00
Paul Burton
50d893ff72 MIPS, clk: move jz4740 clock suspend, resume functions to jz4740-cgu
The jz4740-cgu driver already has access to the CGU, so it makes sense
to move the few remaining accesses to the CGU from arch/mips/jz4740
there too. Move the jz4740_clock_{suspend,resume} functions there for
such consistency. The arch/mips/jz4740/clock.c file now contains nothing
more of use & so is removed.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Lars-Peter Clausen <lars@metafoo.de>
Cc: Mike Turquette <mturquette@linaro.org>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: linux-clk@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com>
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/10158/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-06-21 21:53:19 +02:00
Paul Burton
ed286ca5d6 MIPS, clk: move jz4740 UDC auto suspend functions to jz4740-cgu
The jz4740-cgu driver already has access to the CGU, so it makes sense
to move the few remaining accesses to the CGU from arch/mips/jz4740
there too. Move the jz4740_clock_udc_{dis,en}able_auto_suspend functions
there for such consistency.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Lars-Peter Clausen <lars@metafoo.de>
Cc: Mike Turquette <mturquette@linaro.org>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: linux-clk@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/10154/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-06-21 21:53:18 +02:00
Paul Burton
41dd641e9a MIPS,clk: move jz4740_clock_set_wait_mode to jz4740-cgu
The jz4740-cgu driver already has access to the CGU, so it makes sense
to move the few remaining accesses to the CGU from arch/mips/jz4740
there too. Move jz4740_clock_set_wait_mode for such consistency.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Lars-Peter Clausen <lars@metafoo.de>
Cc: Mike Turquette <mturquette@linaro.org>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: linux-clk@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/10153/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-06-21 21:53:17 +02:00