- PM changes to make the code easier to use on newer SoCs
- PM changes for newer SoCs suspend and resume and wake-up events
- Minor clean-up to remove dead Kconfig options
Note that these have a dependency to the fixes-v3.18-not-urgent
tag and is based on a commit in that series.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJUEhKGAAoJEBvUPslcq6VzURoP/3tM1iOFzQ83xe0ijEnHuUEz
To5DF1AgJ/l8a6H9FV9xDTn7SXjV8Fts0MrPwveGnKRUMmZfrUBedvWGM9NyyWm5
L7IJKHvSc7FAj7ee5crNobCYTrQ9THUlr8X1mLILFl5mTh2pDnm4ZRscHy+OxN0+
w97d/T5MrFhoCa8LXo8nGm7jROvayp+E0VTxjFdU07VKJK8xjd++M0B5U3pXsqCC
8VabNDt8VBK/SVCOKYn3tnNop1/9t9nSWfN18OAEaIS6rn5ZaQxXETKxyRWgjTvn
OVEgsazFiPVm87H3O6cj0BizOSXG2gMfBTECZwVPtavyQR2lb/YljHUQ5Z9/T4v9
x+nOWFxqVAr8OM1kKcatSMrZymY4AG5NdOmOgrAqKoQzWGGKhT3LcNz3Ecja25vX
ZWGYsJl6hbF4PPaCgKe8KGRISLuv1g1N4TI8ztsxELRzhClxhuaERt7TkdQRLGrH
emKSFP8Kkn6yrQy/RirOaXnwPWJRzuMrgpLuwDTKY6vY07MGk+nHkzF+2itKkvLB
CG/Tw29jUi9gnOU9QwjkpBiJxsHlgcO/XzSTGN89p6EjVylyqdCqkpO3MCfjPV7Q
kPap33Zx5SvxMMMSXRDKrrez533RfxBeTXkgT1O0fnR0r4fWYoc5+zL8Y02g10Wt
tZ4gZRYP68IuxzfPUAgJ
=LW8C
-----END PGP SIGNATURE-----
Merge tag 'soc-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
SoC related changes for omaps for v3.18 merge window:
- PM changes to make the code easier to use on newer SoCs
- PM changes for newer SoCs suspend and resume and wake-up events
- Minor clean-up to remove dead Kconfig options
Note that these have a dependency to the fixes-v3.18-not-urgent
tag and is based on a commit in that series.
* tag 'soc-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (514 commits)
ARM: OMAP5+: Reuse OMAP4 PM code for OMAP5 and DRA7
ARM: dts: OMAP3+: Add PRM interrupt
ARM: omap: Remove stray ARCH_HAS_OPP references
ARM: DRA7: Add hook in SoC initcalls to enable pm initialization
ARM: OMAP5: Add hook in SoC initcalls to enable pm initialization
ARM: OMAP5 / DRA7: Enable CPU RET on suspend
ARM: OMAP5 / DRA7: PM: Provide a dummy startup function for CPU hotplug
ARM: OMAP5 / DRA7: PM: Avoid all SAR saves
ARM: OMAP5 / DRA7: PM: Enable Mercury retention mode on CPUx powerdomains
ARM: OMAP5 / DRA7: PM / wakeupgen: Enables ES2 PM mode by default
ARM: OMAP5 / DRA7: PM: Set MPUSS-EMIF clock-domain static dependency
ARM: OMAP5 / DRA7: PM: Update CPU context register offset
ARM: AM437x: use pdata quirks for pinctrl information
ARM: DRA7: use pdata quirks for pinctrl information
ARM: OMAP5: use pdata quirks for pinctrl information
ARM: OMAP4+: PM: Use only valid low power state for CPU hotplug
ARM: OMAP4+: PM: use only valid low power state for suspend
ARM: OMAP4+: PM: Make logic state programmable
ARM: OMAP2+: powerdomain: introduce logic for finding valid power domain
ARM: OMAP2+: powerdomain: pwrdm_for_each_clkdm iterate only valid clkdms
...
In general Renesas hardware is not documented to the extent
where the relationship between IP blocks on different SoCs can be assumed
although they may appear to operate the same way. Furthermore the
documentation typically does not specify a version for individual
IP blocks. For these reasons a convention of using the SoC name in place
of a version and providing SoC-specific compat strings has been adopted.
Although not universally liked this convention is used in the bindings for
a number of drivers for Renesas hardware. The purpose of this patch is to
make use of the SoC-specific CMT compat string for the r8a7740 48-bit CMT
clock source.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
In general Renesas hardware is not documented to the extent
where the relationship between IP blocks on different SoCs can be assumed
although they may appear to operate the same way. Furthermore the
documentation typically does not specify a version for individual
IP blocks. For these reasons a convention of using the SoC name in place
of a version and providing SoC-specific compat strings has been adopted.
Although not universally liked this convention is used in the bindings for
a number of drivers for Renesas hardware. The purpose of this patch is to
make use of the SoC-specific CMT compat string for the r8a7779 TMU
clock source.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
In general Renesas hardware is not documented to the extent
where the relationship between IP blocks on different SoCs can be assumed
although they may appear to operate the same way. Furthermore the
documentation typically does not specify a version for individual
IP blocks. For these reasons a convention of using the SoC name in place
of a version and providing SoC-specific compat strings has been adopted.
Although not universally liked this convention is used in the bindings for
a number of drivers for Renesas hardware. The purpose of this patch is to
make use of the SoC-specific CMT compat string for the r8a7791 48-bit CMT
clock source.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
In general Renesas hardware is not documented to the extent
where the relationship between IP blocks on different SoCs can be assumed
although they may appear to operate the same way. Furthermore the
documentation typically does not specify a version for individual
IP blocks. For these reasons a convention of using the SoC name in place
of a version and providing SoC-specific compat strings has been adopted.
Although not universally liked this convention is used in the bindings for
a number of drivers for Renesas hardware. The purpose of this patch is to
make use of the SoC-specific CMT compat string for the r7s72100 MTU2
clock source.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
In general Renesas hardware is not documented to the extent
where the relationship between IP blocks on different SoCs can be assumed
although they may appear to operate the same way. Furthermore the
documentation typically does not specify a version for individual
IP blocks. For these reasons a convention of using the SoC name in place
of a version and providing SoC-specific compat strings has been adopted.
Although not universally liked this convention is used in the bindings for
a number of drivers for Renesas hardware. The purpose of this patch is to
make use of the SoC-specific CMT compat string for the r8a7790 48-bit CMT
clock source.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
When booting using the r8a7740/armadillo800eva using dt-reference:
* Use CCF to initialise clocks via DT
* Initialise timers via DT
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJT/BT6AAoJENfPZGlqN0++MPwQAIzGfi79jMY14Xep790KD17A
wvae1QGyLpIPH/nyVr6iEbHiX3YBfW4kcvrQ1GWOG19tFoWlc4fiOK1ZcCAnydFD
SU1lnkpT6+ZIEeFkdXwMyux2lVeaZSQHOInT7UYZnWLUhfkCkuf7IJNvrYNMGb+Z
3viXbRkqz1cz9nyIRDmryq0IZO8d7ZNFhOSdTTq3Rjzn32V68I2HZVGKOu00bI7J
UEpEXlPqAs8R90NkyLvoEaN3d0NHz6TrX8VqgWW6cNxu8Kv3OCLhkjmGdjmWXZ3P
SuVXJv37vcjkKXuclRVaPV8GcQgJZO34RSUpc0HMYJyutEp3ANLxujT7zFSwJEvK
vUZkPGpzWY9+icqfPOoGlEoGIcVGTnB1rH25ap5y/b7SnfNsw2dJyhx/Mr8nln2b
SwTMXxZZvP8V2qK7CrXU5TXnhl2nYJwvjU8ORhe3ZJrAOmrlfrBNFBTzm/8Txik7
/JUFjInTkOoLX4a0vjJlwc/rRAAe8jASmpWTC6N9mTzJhY7gySpXwxWOwT2f/+YR
otDz1JS4EpqRFiK3ptnPVJ7sVpamz5glCLCCZWMZdwWG7G1B+daXD2shTPk7aup5
EsN0YKIjMfdTL5sQcQIhS5Yoj/KJEhwkNny+EsMofExKZeQerqQT3SG9a798xxLR
8ACepiF2VECSLNCWvUKj
=uu7K
-----END PGP SIGNATURE-----
Merge tag 'renesas-r8a7740-ccf-and-timers-for-v3.18' into dt-timers-for-v3.18
Renesas ARM Based SoC R8a7740 CCF and Timers Updates for v3.18
When booting using the r8a7740/armadillo800eva using dt-reference:
* Use CCF to initialise clocks via DT
* Initialise timers via DT
Provide OMAP3, 4 and OMAP5 with interrupt number for PRM
And for DRA7, provide crossbar number for prm interrupt.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
* Enable timers using DT when booting boards without Legacy-C code
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJT8+H9AAoJENfPZGlqN0++FWcP/jO8bI4iFQXzZS13a1IzehTy
8PW1d8wu7+9KMrUaSNRVSBk20U5xGrNgykzBbM/kyB4JDqBsc7d97zOEnus7x9WP
ujP6cD3TaiX3EDssS9UMcZJlT95PtcTEIicwMj38dflvM6JoU3Od08s15Fp3AiwB
XzhtCG8PvbVCe6RagglC/1g4r8GCB2cA0bBnyoybOoHGNZv+bpn9D5j/m6ltp2TH
f4sKuXrPQKGeOi4RKjSaCKnKqrRrfZ6S6fOZGjzZw9lSSw72EXVsE763IDFs8osd
Sdc4FKtcM2CaiL1/BuJ6NP5kYyMPHc37il+FbyYIOdi0l75RzKoMLRBcQjbgfUyy
3KahXSk3k8xv2qpCUoS2UKBeiCSc3ejs0AcOUD540igy1OuRRHQRrjHv5D2MJwjm
92W4/74hS0ihWTjIG9WQ0lIb2SQfBsUwpQwANN/9zR7cWnsSrPOowK0f+q8rPQXc
K2nrXis1YL2uU04JPU2BPAMtw/XdYzDADRfg+dSCKntdEC2MHvlkdqcxOYaoUM/3
8slW8hYxFo5vO1c5sYxGHd573i5JTKHhPOzrs/f4faw5/I1ZyiJotbfVt8//6K1D
ocnTxXZKzh5X0FcckEhdRyFa1QcHk0v5PqsqmQAYYjXmq5+3HV7GAskGL9tUuOq0
97qsr4ScwT63EBl9yFZY
=cyP9
-----END PGP SIGNATURE-----
Merge tag 'renesas-dt-timers-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Merge "Renesas ARM Based SoC DT Timers Updates for v3.18" from Simon Horman:
* Enable timers using DT when booting boards without Legacy-C code
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* tag 'renesas-dt-timers-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: genmai-reference: Enable MTU2 in device tree
ARM: shmobile: r7s72100: Add MTU2 device to DT
ARM: shmobile: marzen-reference: Enable TMU0 in device tree
ARM: shmobile: koelsch-reference: Enable CMT0 in device tree
ARM: shmobile: lager-reference: Enable CMT0 in device tree
ARM: shmobile: r8a7779: Add TMU devices to DT
ARM: shmobile: r8a7791: Add CMT devices to DT
ARM: shmobile: r8a7790: Add CMT devices to DT
Conflicts:
arch/arm/mach-shmobile/setup-r8a7779.c
When booting using the r8a7740/armadillo800eva using dt-reference:
* Use CCF to initialise clocks via DT
* Initialise timers via DT
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJT/BT6AAoJENfPZGlqN0++MPwQAIzGfi79jMY14Xep790KD17A
wvae1QGyLpIPH/nyVr6iEbHiX3YBfW4kcvrQ1GWOG19tFoWlc4fiOK1ZcCAnydFD
SU1lnkpT6+ZIEeFkdXwMyux2lVeaZSQHOInT7UYZnWLUhfkCkuf7IJNvrYNMGb+Z
3viXbRkqz1cz9nyIRDmryq0IZO8d7ZNFhOSdTTq3Rjzn32V68I2HZVGKOu00bI7J
UEpEXlPqAs8R90NkyLvoEaN3d0NHz6TrX8VqgWW6cNxu8Kv3OCLhkjmGdjmWXZ3P
SuVXJv37vcjkKXuclRVaPV8GcQgJZO34RSUpc0HMYJyutEp3ANLxujT7zFSwJEvK
vUZkPGpzWY9+icqfPOoGlEoGIcVGTnB1rH25ap5y/b7SnfNsw2dJyhx/Mr8nln2b
SwTMXxZZvP8V2qK7CrXU5TXnhl2nYJwvjU8ORhe3ZJrAOmrlfrBNFBTzm/8Txik7
/JUFjInTkOoLX4a0vjJlwc/rRAAe8jASmpWTC6N9mTzJhY7gySpXwxWOwT2f/+YR
otDz1JS4EpqRFiK3ptnPVJ7sVpamz5glCLCCZWMZdwWG7G1B+daXD2shTPk7aup5
EsN0YKIjMfdTL5sQcQIhS5Yoj/KJEhwkNny+EsMofExKZeQerqQT3SG9a798xxLR
8ACepiF2VECSLNCWvUKj
=uu7K
-----END PGP SIGNATURE-----
Merge tag 'renesas-r8a7740-ccf-and-timers-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Merge "Renesas ARM Based SoC R8a7740 CCF and Timers Updates for v3.18" from Simon Horman:
When booting using the r8a7740/armadillo800eva using dt-reference:
* Use CCF to initialise clocks via DT
* Initialise timers via DT
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* tag 'renesas-r8a7740-ccf-and-timers-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r8a7740: Remove r8a7740_add_standard_devices_dt
ARM: shmobile: armadillo800eva-reference: Do not use r8a7740_add_standard_devices_dt()
ARM: shmobile: armadillo800eva-reference: Enable CMT1 in device tree
ARM: shmobile: r8a7740: Add CMT1 device to DT
ARM: shmobile: armadillo800eva-reference: add clock overrides to DTS
ARM: shmobile: r8a7740: add MSTP clock assignments to DT
ARM: shmobile: r8a7740: add SoC clocks to DTS
ARM: shmobile: r8a7740: clock register bits
The r8a7740 Armadillo800EVA DTS can now be used both for
DT Multiplatform and the legacy case. Because of that
remove the r8a7740 Armadillo800EVA DT reference DTS file.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Beaglebone white and beaglebone black differ in tiny little aspects.
This is the reason why we maintain seperate dts for these platforms.
However, there is no real way to decode from dtb which platform it is
since compatible and model name are the same for both platforms.
Fix this so that beaglebone black and beaglebone are identifiable,
while maintaining compatibility for older zImages which might use old
beaglebone compatible flag for black as well.
Reported-by: Tom Rini <trini@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Currently we claim that omap4-panda and omap4-panda-es are essentially
the same, but they are not since PandaBoard-ES uses OMAP4460 and
PandaBoard uses OMAP4430.
So, split the common definition and make the model name available.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Build the r8a7740 Armadillo800EVA board DTB in case
of Multiplatform. The DT reference case will be removed
and can be ignored for now.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Take the contents from the Armadillo800EVA DT reference DTS
and add them to the "regular" Armadillo800EVA DTS. This is
preparation for removal of the DT reference DTS. So the goal
is to have a single DTS for this Armadillo board.
The SoC "r8a7740" is added to compatible string but the board
is left as-is (excluding the reference suffix).
The kernel command line is left as-is, earlyprintk is used in
case of legacy and for multiplatform we can simply ignore it
for now.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Here's the weekly batch of fixes from arm-soc.
The delta is a largeish negative delta, due to revert of SMP support for Broadcom's
STB SoC -- it was accidentally merged before some issues had been addressed, so they
will make a new attempt for 3.18. I didn't see a need for a full revert of the whole
platform due to this, we're keeping the rest enabled.
The rest is mostly:
* A handful of DT fixes for i.MX (Hummingboard/Cubox-i in particular)
* Some MTD/NAND fixes for OMAP
* Minor DT fixes for shmobile
* Warning fix for UP builds on vexpress/spc
There's also a couple of patches that wires up hwmod on TI's DRA7 SoC
so it can boot. Drivers and the rest had landed for 3.17, and it's small
and isolated so it made sense to pick up now even if it's not a bugfix.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJUA1uwAAoJEIwa5zzehBx3dV8QAJv/6OcFofqWPqSapCdcCTkU
o9o+QxzTY4Fo4GDyTboLwvY2EE7aFKohiekKGoHHT+fXXR4n+/Xe5Dq58DijdZ0q
xUksd1h1ZuqzbWqT+1fyrlgJt3jOmQ1vzbBVpWA4tN1RUKJekU+ZF0oCAAdDwbaf
O925etd77+ij0euJ/l06fR9YUYIY23mufG+SELke5S7xS9T1sVFWcluf/z+y57qc
hxF6Uc5r4LOY4pFKYgjvsu3R7KPD4DANCiSYUvjS5sIWrJ3xenkyHVMxFEyQ5Tz+
TCrT8rXx3Ue7AlNMztY5P1dTmYftwJhWy6p/8J8UqPJ6ip633FWrhTfKHmLIR3lC
VkMYroFeg4Fp/YvFENeBe9QUbg0Xb920oZoDQA4SwkZJkQlWafYsOy4bLKSyMQGQ
nKcnyxeP2q5YaStTZMSNQ4xwT9yo3dwBllYGSbXUiTk0VJ3TX9jEMg6StvRM0YHG
sT8XKufqIAJugNZZsGtGyBLO6f8BbPVgFICvEVetgjMWHl9iGNVDbeqbYvQ6A8NL
TTqJUK7CXkNgQGX2rB7txSgR3XoaWU0rWjSnSXy2Xgtb/pd/jZYLicEY8Wd4Q1qp
Ww2misiX4viMxcD6AWiDUj1mcciSh915h1po5zZbLMTRp4qfuqh1BfSvPY/fh5DD
LKXAwm3PyL9+QrknP3//
=/AD8
-----END PGP SIGNATURE-----
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"Here's the weekly batch of fixes from arm-soc.
The delta is a largeish negative delta, due to revert of SMP support
for Broadcom's STB SoC -- it was accidentally merged before some
issues had been addressed, so they will make a new attempt for 3.18.
I didn't see a need for a full revert of the whole platform due to
this, we're keeping the rest enabled.
The rest is mostly:
- a handful of DT fixes for i.MX (Hummingboard/Cubox-i in particular)
- some MTD/NAND fixes for OMAP
- minor DT fixes for shmobile
- warning fix for UP builds on vexpress/spc
There's also a couple of patches that wires up hwmod on TI's DRA7 SoC
so it can boot. Drivers and the rest had landed for 3.17, and it's
small and isolated so it made sense to pick up now even if it's not a
bugfix"
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (23 commits)
vexpress/spc: fix a build warning on array bounds
ARM: DRA7: hwmod: Add dra74x and dra72x specific ocp interface lists
ARM: DRA7: Add support for soc_is_dra74x() and soc_is_dra72x() variants
MAINTAINERS: catch special Rockchip code locations
ARM: dts: microsom-ar8035: MDIO pad must be set open drain
ARM: dts: omap54xx-clocks: Fix the l3 and l4 clock rates
ARM: brcmstb: revert SMP support
ARM: OMAP2+: hwmod: Rearm wake-up interrupts for DT when MUSB is idled
ARM: dts: Enable UART wake-up events for beagleboard
ARM: dts: Remove twl6030 clk32g "regulator"
ARM: OMAP2+: omap_device: remove warning that clk alias already exists
ARM: OMAP: fix %d confusingly prefixed with 0x in format string
ARM: dts: DRA7: fix interrupt-cells for GPIO
mtd: nand: omap: Fix 1-bit Hamming code scheme, omap_calculate_ecc()
ARM: dts: omap3430-sdp: Revert to using software ECC for NAND
ARM: OMAP2+: GPMC: Support Software ECC scheme via DT
mtd: nand: omap: Revert to using software ECC by default
ARM: dts: hummingboard/cubox-i: change SPDIF output to be more descriptive
ARM: dts: hummingboard/cubox-i: add USB OC pinctrl configuration
ARM: shmobile: r8a7791: add missing 0x0100 for SDCKCR
...
(and a sneaky document addition that slipped from the previous pull-request)
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJT/0s6AAoJEFGvii+H/HdhNiEP/R+zAKkTCmJyw2aeJR9RrNaO
Qu2rzavdCsM/DKJiEKsF0QNvyMFM3S1Tx16pnOWcsCdJI9LVgeCRv7Fpn2mJKNRI
UlmRHuG+SRu2nzr0gc+hyEOuz5VhpGemKo4tntUEPKrj5eXD25e3QgYHFIdTI32k
c/bG7eKV7LbPSrybzLNw6FNRuH0YyN667PEck1HVFerCv/921LwO4seOVPAwecgu
tELpaY7oxDTxoPe8QmxzmPWvCri1OjGaQTEfHoCWXfUaeYcOksI4mJ1zoIBZ0aHb
uSY+wVnXfkAbmz7kzcJJvVYuf4PhI0mRh2uEhpvzJxMaetAA3JVf0/JXOhTGbATK
itWgSqCVXooMf+8DIEsMkmXgqV0+Nvy0vZxv+viIdQ4ea9nUrWVT+KJmYsKp8lk9
SAXsDv+4sr3POCN4QwvAsEKmujtngkOws2YSRRZqiPw8DAiNVpjgF/bZ6jZXVvQs
wpOqGFJhwS3etyBica1hEZorhGoQzLEWgXDa+D+9jPs1TWVBJVYKeGaRFPGVZxgN
6mAObpbv0/Uc6SUUlv55qfF3A1KUE2n7001SoD7zYEcTQ9jIcqw8CgKlb4kgrROv
VeFb4wIxF6kGuijiKMZvwoH0x+QL/fXrvIVK6x8UN2Zy3+QMva+x8pu8tZQvTYun
CibJKkoCwT2dth7D9pWS
=DaB2
-----END PGP SIGNATURE-----
Merge tag 'mfd-fixes-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd
Pull mfd fixes from Lee Jones:
"Couple of simple fixes due for the 3.17 rcs
(and a sneaky document addition that slipped from the previous
pull-request)"
* tag 'mfd-fixes-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd:
mfd: twl4030-power: Fix PM idle pin configuration to not conflict with regulators
mfd: tc3589x: Add device tree bindings
mfd: ab8500-core: Use 'ifdef' for config options
mfd: htc-i2cpld: Fix %d confusingly prefixed with 0x in format string
mfd: omap-usb-host: Fix %d confusingly prefixed with 0x in format string
Commit 43fef47f94 (mfd: twl4030-power: Add a configuration to turn
off oscillator during off-idle) added support for configuring the PMIC
to cut off resources during deeper idle states to save power.
This however caused regression for n900 display power that needed the
PMIC configuration to be disabled with commit d937678ab6 (ARM: dts:
Revert enabling of twl configuration for n900).
Turns out the root cause of the problem is that we must use
TWL4030_RESCONFIG_UNDEF instead of DEV_GRP_NULL to avoid disabling
regulators that may have been enabled before the init function
for twl4030-power.c runs. With TWL4030_RESCONFIG_UNDEF we let the
regulator framework control the regulators like it should. Here we
need to only configure the sys_clken and sys_off_mode triggers for
the regulators that cannot be done by the regulator framework as
it's not running at that point.
This allows us to enable the PMIC configuration for n900.
Fixes: 43fef47f94 (mfd: twl4030-power: Add a configuration to turn off oscillator during off-idle)
Cc: stable@vger.kernel.org # v3.16
Signed-off-by: Tony Lindgren <tony@atomide.com>
Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
- Fixes suspend/resume issue on imx53-qsrb due to PMIC IRQ pin
configuration missing
- A couple small SolidRun board fixes/correction from Rabeeh
and Russell
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJT/XBJAAoJEFBXWFqHsHzOuqgH/3XqY4n0kL7lZQGRl8sBA/1m
bLtlKYaGjtn5ITXYONuWyxk9MrkCUaVUEEkcM3Gty6kHbCZ9F8nqSa5NiYs4MyGR
FiBX1GANmz96t61i90jlNNxHdPfnmgj3ZXEDTEj9g2brwGceUgQZv4/D59qSy41H
VlyIIOREQbrIoFlln1cEaKf2UXOpmSpB835QHROwy9K4aK0kZKAR4v5eqM2aQaIl
9VpvR5Xfsmr5vH/srlkY+Vc2ODVF1nQZsa3ikleAh2rzFQ4thwSKqpSxF7HL6EAo
zafJuI67ctyzIFk1PlsUuqCM2NimzACnpgrNG6Vn2KDq/JavNIsuyna0KgzzXqE=
=jOFz
-----END PGP SIGNATURE-----
Merge tag 'imx-fixes-3.17-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes
Merge "ARM: imx: fixes for 3.17, 2nd take" from Shawn Guo:
i.MX fixes for 3.17, 2nd take:
- Fixes suspend/resume issue on imx53-qsrb due to PMIC IRQ pin
configuration missing
- A couple small SolidRun board fixes/correction from Rabeeh
and Russell
* tag 'imx-fixes-3.17-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: microsom-ar8035: MDIO pad must be set open drain
ARM: dts: hummingboard/cubox-i: change SPDIF output to be more descriptive
ARM: dts: hummingboard/cubox-i: add USB OC pinctrl configuration
ARM: dts: imx53-qsrb: Fix suspend/resume
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch is important for the MicroSOM implementation due to the
following details -
1. VIH of the Atheros phy is 1.7V.
2. NVCC_ENET which is the power domain of the MDIO pad is driven by the
PHY's LDO (i.e. either 1.8v or 2.5v).
3. The MicroSOM implements an onbouard 1.6kohm pull up to 3.3v (R3000).
In the case the PHY's LDO was 1.8v then there would be only a 100mV
margin for the signal to be acknowledged as high (1.8v-1.7v).
Due to that setting the pad as an open drain will let the 1.6kohm pull
that signal high to 3.3 that assures enough margins to the PHY to be
acked as '1' logic.
Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Similarly to DRA7, OMAP5 has l3 and l4 clock rates incorrectly calculated.
Fixed by using proper divider clock types for the clock nodes.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Reported-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Tested-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
For device tree based booting, we need to use wake-up
interrupts like we already do for some omaps. This fixes
a PM regression on beagleboard compared to legacy booting.
Tested-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The kernel has never supported clk32g as a regulator since it is a clock
and not a regulator. Fortunately nothing actually references this node so
we can just remove it.
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
GPIO modules are also interrupt sources. However, they require both the
GPIO number and IRQ type to function properly.
By declaring that GPIO uses interrupt-cells=<1>, we essentially do not
allow users of the nodes to use the interrupt property appropritely.
With this change, the following now works:
interrupt-parent = <&gpio6>;
interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
Fixes: 6e58b8f1da ('ARM: dts: DRA7: Add the dts files for dra7 SoC and dra7-evm board')
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
For v3.14 and prior, 1-bit Hamming code ECC via software was used
for NAND on this board.
Commit c06c527016 in v3.15 changed the behaviour
to use 1-bit Hamming code via Hardware using a different ECC layout
i.e. (ROM code layout) than what is used by software ECC.
This ECC layout change causes NAND filesystems created in v3.14
and prior to be unusable in v3.15 and later. So revert back to
using software ECC scheme.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Hummingboard has no over current hardware, so disable the over current
detection for both ports.
Cubox-i has over current hardware, so appropriately configure this.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
On r8a7791, i2c6 (aka iic3) doesn't need pinmux, but the koelsch dts
refers to non-existent pinmux configuration data:
pinmux core: sh-pfc does not support function i2c6
sh-pfc e6060000.pfc: invalid function i2c6 in map table
Remove it to fix this.
Fixes: commit 1d41f36a68 ("ARM: shmobile:
koelsch dts: Add VDD MPU regulator for DVFS")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Olof Johansson <olof@lixom.net>
Working on Gigabit/PCIe support in U-Boot for Apalis T30 I realised
that the current device tree source includes for our modules only
happen to work due to referencing the on-carrier 5v0 supply from USB
which is not at all available on-module. The modules actually contain
TPS60150 charge pumps to generate the PMIC required 5 volts from the
one and only 3.3 volt module supply. This patch fixes this.
(Note: When back-porting this to v3.16 stable releases, simply drop the
change to tegra30-apalis.dtsi; that file was added in v3.17)
Cc: <stable@vger.kernel.org> #v3.16+
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
dts files and addition of the new Rockchip list to MAINTAINERS.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABCAAGBQJT+hwkAAoJEPOmecmc0R2Bda4IAJ7rxypWxi8RtfxULHu1oGxZ
cdmAsaedAkjTn6tye/99lv1WkLzUD+Q3AxLX6Glu8PgTkocbwtkVTP+gMbv7zwfN
Z9bA6kazPL4Rskr6Am8BFKkGhXHCXChGP1J3z9Gyh07Vu2+3zsvRzyM7hySt3TqZ
EA2dL/uODlukw6EPzFaqGWZLn1OuJmkHXDfnZ3lBI/GFZD9qt5DnYswMBlDlIwr6
D08jmcleRA3wpnY1HXYR2cN1sJmcEP6xVE8ApXd71X0MtumEy49ZTR+4T5/Sh/XN
OPheoH3UUVtXVrAa5fsoUE2xsKs3PZgnIHk1kQklpbw+HArbN+aW0Jh6CySb65Q=
=aNJj
-----END PGP SIGNATURE-----
Merge tag 'v3.17-rockchip-fixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into fixes
Merge "ARM: rockchip: fix for 3.17" from Heiko Stubner:
Pinctrl that got accidentially dropped when reorganizing the
dts files and addition of the new Rockchip list to MAINTAINERS.
* tag 'v3.17-rockchip-fixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
MAINTAINERS: add new Rockchip SoC list
ARM: dts: rockchip: readd missing mmc0 pinctrl settings
Signed-off-by: Olof Johansson <olof@lixom.net>
During the restructuring of the Rockchip Cortex-A9 dtsi files it seems
like the pinctrl settings vanished at some point from the mmc0 support.
This of course renders them unusable, so readd the necessary pinctrl
properties.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add the CMT1 counters to the r8a7740 device tree and make it
disabled by default.
Based on work by Magnus Damm.
Cc: Magnus Damm <magnus.damm@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Declares the r8a7740 clocks supported by the legacy clock framework,
excluding those requiring extensions to the DIV6 driver.
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Acked-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Only a single patch in here that fixes a DTC warning.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJT2hD6AAoJEBx+YmzsjxAgV9YP/1wML2m04CODnLmLhKyx1GyM
VyBoEHb+o7P7TRyK7ePIVkGhGnQjYGMyXAI2KfOiBJpAl23uxXCXSNKc6WY+nBAw
6T6qL6w+tPIPW4B79fAjmoPksqhoVf9sAKAkdu6+ETwKMHRaF0IesPRTg9t21Wcd
yHHDY4z/qaFCMV59zeOIWMxM0V0gvUa46+bXC2flyTcTz5RgyUswCOXKHLvXfK1L
w8B+V34AeBtm2EzG6co1iOJVRKXlrjzUg25+adbRissNfvmVkPwYkQJNoBO6r/PO
Rxf7Mq50oovPl/Oc83e3RZl3tE8ds12t+ScS0qUFq6+tBvyq53IYP+51IhDOGiR3
a6PB1nPEXtvUt09xv5SPJiRsB+BFrh5hx+qWbDvUNQL5FZrqBxa63H6qArybFQXg
GaY8Zv5gdiMvAU0tdk7v4pduJkvvoG2GALGHPrcKmrpg2+qQ4LDKOJxErIEqOUi2
ERp7c0kODDz18F9OmjGYU2R7XT6Ji8h4MS/hbCiLajcboQMe3yClrcVB8ts+AUKJ
NSDWl5Q0/8uHhk40FAaGYEqVLakk8vhXwdg1hpcXzIg3dJg+P09dYK5nIOBzKIok
+eVXZ8xjcRnoBAumljZ3eGbTuysGDO95E56coDPE4IiAe4Esi7kl3fUS/NICoOGs
MC9tjeyMoscy+hoGsP57
=PL45
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt-for-3.17-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into fixes
Merge "Allwinner DT changes, take 2" from Maxime Ripard:
Only a single patch in here that fixes a DTC warning.
* tag 'sunxi-dt-for-3.17-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
ARM: dt: sun6i: Add #address-cells and #size-cells to i2c controller nodes
Signed-off-by: Olof Johansson <olof@lixom.net>
Add CPU Frequency information to the r8a7778 DTS file. This
will allow us to use the shared C code on r8a7778 and BockW
which reads out the clock frequency from DT and calculates the
delay settings from there.
Also add other missing CPU information to the r8a7778 DTS.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add CPU Frequency information to the sh73a0 DTS file. This
will allow us to use the shared C code on sh73a0 and KZM9G
which reads out the clock frequency from DT and calculates the
delay settings from there.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add CPU Frequency information to the sh7372 DTS file. This
will allow us to use the shared C code on sh7372 and Mackerel
which reads out the clock frequency from DT and calculates the
delay settings from there.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Increase max i2c bus frequency beyond the default for faster
data transfers. According to the manual, these faster speeds are
only available when the board is wired up the right way. In this case,
the vendor kernel has run at this speed for a long time.
sda-delay is needed for talking to RTC on PMIC, otherwise the i2c
controller never sees an ACK. Strangely the other PMIC i2c slave (the
main one) works fine even without this delay. I Chose value 100 to
match the vendor kernel.
Signed-off-by: Daniel Drake <drake@endlessm.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Tested-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
The ODROID kernel shows that the PMIC interrupt line is hooked up
to pin GPX3-2.
This is needed for the max77686-irq driver to create the PMIC IRQ
domain, which is needed by max77686-rtc.
Signed-off-by: Daniel Drake <drake@endlessm.com>
Tested-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
The current pinfunc define all uart CTS_B IO port for DCE uart 'CTS_B'
IP port. Since uart IP port 'CTS_B' is output, and it don't need to
set 'SELECT_INPUT' bit.
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
