Commit Graph

623 Commits

Author SHA1 Message Date
Linus Torvalds
2ec3240fd7 ARM: 64-bit DT updates for v4.7
We continue ramping up platform support for 64-bit ARM machines,
 with 111 individual non-merge changesets touching 21 platforms.
 
 The LG1312 platform is completely new and is the first ARM
 platform by LG that we support in the mainline kernel. Two other
 SoCs got added that are updated versions of existing SoC
 families, so the port mainly consists of new dts files:
 - The Hisilicon Hip06/D03 is the latest server platform
   from Huawei/Hisilicon, and follows the Hip05/D02 platform.
 - Rockchip RK3399 follows the 32-bit RK3288 that is popular
   in low-end Chromebooks and the 64-bit RK3368 that is mainly
   found in chinese Android TV boxes.
 
 The 96Boards HiKey based on the Hisilicon Hi6220 (Kirin 620)
 gets a long-awaited overhaul with a lot of devices enabled in
 the DT, so it should be much more usable with a mainline kernel
 now. See also
 https://plus.google.com/111524780435806926688/posts/PeGb2VsNhJd
 
 A lot of work went into enabling new device drivers on existing
 machines, but we also have a couple of new commercially
 available machines:
 
 - Google Pixel C laptop based on Tegra210
 - Hardkernel Odroid C2 Based on Amlogic Meson GXBB (S905)
 - Geekbuying GeekBox based on Rockchip RK3368
 
 And finally, a couple of reference or development platforms
 that are not end-user platforms but are used for trying out
 the respective SoC platforms:
 
 - Amlogic Meson GXBB P200 and P201 development systems
 - NXP Layerscape 1043A QDS development board
 - Hisilicon Hip06 D03 server board, as mentioned above
 - LG1312 Reference Design
 - RK3399 Evaluation Board
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIVAwUAVzuXimCrR//JCVInAQJtoRAAkiyHJCwsc7UJuaPY4XyFR3JGvjRrk4vA
 EvpnFsfu4Xgso3yillZUY3i0oUAFAUslYJR5ycNS63OV8+CafpzVCxZmXl6N7muF
 +NzVsrcEBZvfX3YWRSEB6qwILqjRTNBDqDVfZEhcP3Jh7XJ1U+TPcTKGMuG0zRVL
 NvGbEM0YF21kKJXz8rPWx/moYhNmE/1E5XEI5e5NpoO9y9BIRjJPSkpkstccaO5I
 Hvd2cqa8sHLROY0ffhK+UNytvSqvkTILUswlBBFC+/JX4yctFeLTcEbLrEpGnWUG
 zqy6lIooq2IBKKDsrxTisIZ5ACwoLQlMUdBRUYgNkjH5KR7/DBmUQO2WygYGb/xC
 imLiJpIIshkBG/xFrSVJjVDleTW++CecHU8uFVQaftOl1EHFGEs8ChCooRk9lRMq
 jQyEEGbX33dKUlGSvkMiVIufWOFBL+AqefFgl+TPDZf0xXWoFGA4cOvdxClxKSF5
 Eh6XnQu9mQLHQ3OjetuQE+VsZHEKoe+cIH2ypUj4D4MJAWV6ok6bsbQJtMmLgwbZ
 fh1pHSpCHG3iJqaoICFmcokiymiLst3lZqOm6GP4Glgbs8TVwKfeYNUSFRVMlJ5W
 BQ/SVaBuXbAiv8Ree7wk2HbAXtOzKuFqEzVVRWd3XgIERTbNZaI+qoFssh0TIlBe
 WNDmLB+6E5Q=
 =locI
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM 64-bit DT updates from Arnd Bergmann:
 "We continue ramping up platform support for 64-bit ARM machines, with
  111 individual non-merge changesets touching 21 platforms.

  The LG1312 platform is completely new and is the first ARM platform by
  LG that we support in the mainline kernel.  Two other SoCs got added
  that are updated versions of existing SoC families, so the port mainly
  consists of new dts files:

   - The Hisilicon Hip06/D03 is the latest server platform from
     Huawei/Hisilicon, and follows the Hip05/D02 platform.

   - Rockchip RK3399 follows the 32-bit RK3288 that is popular in
     low-end Chromebooks and the 64-bit RK3368 that is mainly found in
     chinese Android TV boxes.

  The 96Boards HiKey based on the Hisilicon Hi6220 (Kirin 620) gets a
  long-awaited overhaul with a lot of devices enabled in the DT, so it
  should be much more usable with a mainline kernel now.  See also

     https://plus.google.com/111524780435806926688/posts/PeGb2VsNhJd

  A lot of work went into enabling new device drivers on existing
  machines, but we also have a couple of new commercially available
  machines:

   - Google Pixel C laptop based on Tegra210
   - Hardkernel Odroid C2 Based on Amlogic Meson GXBB (S905)
   - Geekbuying GeekBox based on Rockchip RK3368

  And finally, a couple of reference or development platforms that are
  not end-user platforms but are used for trying out the respective SoC
  platforms:

   - Amlogic Meson GXBB P200 and P201 development systems
   - NXP Layerscape 1043A QDS development board
   - Hisilicon Hip06 D03 server board, as mentioned above
   - LG1312 Reference Design
   - RK3399 Evaluation Board"

* tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (104 commits)
  arm64: dts: marvell: add XOR node for Armada 3700 SoC
  dt-bindings: document rockchip rk3399-evb board
  arm64: dts: rockchip: add dts file for RK3399 evaluation board
  arm64: dts: rockchip: add core dtsi file for RK3399 SoCs
  dt-bindings: rockchip-dw-mshc: add description for rk3399
  arm64: dts: marvell: Use a SoC-specific compatible for xHCI on Armada37xx
  arm64: dts: marvell: Rename armada-37xx USB node
  arm64: dts: marvell: Clean up armada-3720-db
  Documentation: arm64: Add Hisilicon Hip06 D03 dts binding
  arm64: dts: Add initial dts for Hisilicon Hip06 D03 board
  arm64: dts: hip05: Add nor flash support
  arm64: dts: hip05: fix its node without msi-cells
  arm64: dts: r8a7795: Don't disable referenced optional clocks
  arm64: dts: salvator-x: populate EXTALR
  arm64: dts: r8a7795: enable PCIe on Salvator-X
  arm64: dts: r8a7795: Add PCIe nodes
  arm64: tegra: Add IOMMU node to GM20B on Tegra210
  arm64: tegra: Add reference clock to GM20B on Tegra210
  dt-bindings: Add documentation for GM20B GPU
  dt-bindings: gk20a: Document iommus property
  ...
2016-05-18 12:58:39 -07:00
Linus Torvalds
f7df9be067 ARM: DT updates for v4.7
These are all the updates to device tree files for 32-bit platforms,
 which as usual makes up the bulk of the ARM SoC changes: 462 non-merge
 changesets, 450 files changed, 23340 insertions, 5216 deletions.
 
 The three platforms that are added with the "soc" branch are here as well,
 and we add some related machine files:
 
 - For Aspeed AST2400/AST2500, we get the evaluation platform and
   the Tyan Palmetto POWER8 mainboard that uses the AST2400 BMC
 - For Oxnas 810SE, the Western Digital "My Book World Edition"
   is added as the only platform at the moment.
 - For ARM MPS2, the AN385 (Cortex-M3) and AN399 (Cortex-M7)
   are supported
 
 On the ARM Realview development platform, we now support all machines
 with device tree, previously only the board files were supported, which
 in turn will likely be removed soon.
 
 Qualcomm IPQ4019 is the second generation ARM based "Internet Processor",
 following the IPQ806x that is used in many high-end WiFi routers. This one
 integrates two ath10k wifi radios that were previously on separate chips.
 
 Other boards that got added for existing chips are:
 
 - On Ti OMAP family:
   - Amazon Kindle Fire, first generation, tablet and ebook reader
   - OnRISC Baltos iR 2110 and 3220 embedded industrial PCs
   - TI AM5728 IDK, TI AM3359 ICE-V2, and TI DRA722 Rev C EVM
     development systems
 
 - On Samsung EXYNOS platform:
   - Samsung ARTIK5 evaluation board, see
     https://www.artik.io/modules/overview/artik-5/
 
 - On NXP i.MX platforms:
   - Ka-Ro electronics TX6S-8034, TX6S-8035, TX6U-8033, TX6U-81xx,
     TX6Q-1036, TX6Q-1110/-1130, TXUL-0010 and TXUL-0011 industrial
     SoM modules
   - Embest MarS Board i.MX6Dual DIY platform
   - Boundary Devices i.MX6 Quad Plus Nitrogen6_MAX and
     SoloX Nitrogen6sx embedded boards
   - Technexion Pico i.MX6UL compute module
   - ZII VF610 Development Board
 
 - On Marvell embedded (mvebu, orion, kirkwood) platforms:
   - Linksys Viper (E4200v2 / EA4500) WiFi router
   - Buffalo Kurobox Pro NAS
 
 - On Qualcomm Snapdragon:
   - Arrow DragonBoard 600c (96boards) with APQ8064 Snapdragon 600
 
 - On Rockchips platform:
   - mqmaker MiQi single-board computer
 
 - On Altera SoCFPGA:
   - samtec VIN|ING 1000 vehicle communication interface
 
 - On Allwinner Sunxi platforms:
   - Dserve DSRV9703C tablet
   - Difrnce DIT4350 tablet
   - Colorfly E708 Q1 tablet
   - Polaroid MID2809PXE04 tablet
   - Olimex A20 OLinuXino LIME2 single board computer
   - Xunlong Orange Pi 2, Orange Pi One, and Orange Pi PC
     single board computers
 
 Across many platforms, bug fixes went in to address warnings that
 dtc now emits with 'make dtbs W=1'. Further changes for device enablement
 went into Ti OMAP, bcm283x (Raspberry Pi), bcm47xx (wifi router),
 Ti Davinci, Samsung EXYNOS, Marvell mvebu/kirkwood/orion, NXP i.MX/Vybrid
 NXP LPC18xx, NXP LPC32xx, Renesas shmobile/r-mobile/r-car, Rockchips
 rk3xxx, ST Ux500, ST STi, Atmel AT91/SAMA5, Altera SoCFPGA, Allwinner
 Sunxi, Sigma Designs Tango, NVIDIA Tegra, Socionext Uniphier and ARM
 Versatile Express.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIVAwUAVzuXhGCrR//JCVInAQJXjhAA1bV0fbREflRQrlXdMb4rNesygH8ikaja
 gOYHE1yO+tSitHZ5g4w2yAFIEK7DzFdO5rz53BEINZfLCj4LO4495/z9ipqZQEjC
 rw5IL89jAn8x4wF791SHjLpmmNRbHN2vjLcsX3ShJIHckip/jIbiU2aFJuohA0TU
 jxpPAZzhaKsu/rDaVzHMS/im4LbZQ2qI3DxUUn6Kt8c468i4Ns22sowqSjh2xO/X
 YiwHD0eAvDrySfMGiNT82wMMTfMF2KfXZGB885isMP4hK8OIDrOnI5nM9rxyRFfu
 N14o0+tN1S2JzBHnqOOpib6JxYyCVr+QTjsKGAyR5X1mGINIhX8f1gy0EvFFxXKT
 rIATc5VTeo4gc1quij8RVtDEp/4iJ8GspH4WGMh1F8tjTe+WUxeSMkxdf6/QY1+Q
 vZKT0KKihoJQu1xI62NjnaRbfbhwx2BSWehwgXVd72lD19dG5LPw+Nj6/8+Bgouc
 YxJahgkB9MMtHoNp8huMg33Gr9a07/yVxc4CztXtf7N9phd0nEXov2iM1aBgazLU
 8IVd3Z9lZA+4iGVcj3oBJ6K1IkiCmg2qoNyF6tcInR5vPjKLECuxyuZw8VKuUuHD
 k/s/rymSGRlDN5i4F0h0r4MvQ9gkYfwk8xiL3ofmwYHwo103Q7b7Cw55XRk88EoB
 appd5QA+pko=
 =Nx46
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM DT updates from Arnd Bergmann:
 "These are all the updates to device tree files for 32-bit platforms,
  which as usual makes up the bulk of the ARM SoC changes: 462 non-merge
  changesets, 450 files changed, 23340 insertions, 5216 deletions.

  The three platforms that are added with the "soc" branch are here as
  well, and we add some related machine files:

   - For Aspeed AST2400/AST2500, we get the evaluation platform and the
     Tyan Palmetto POWER8 mainboard that uses the AST2400 BMC
   - For Oxnas 810SE, the Western Digital "My Book World Edition" is
     added as the only platform at the moment.
   - For ARM MPS2, the AN385 (Cortex-M3) and AN399 (Cortex-M7) are
     supported

  On the ARM Realview development platform, we now support all machines
  with device tree, previously only the board files were supported,
  which in turn will likely be removed soon.

  Qualcomm IPQ4019 is the second generation ARM based "Internet
  Processor", following the IPQ806x that is used in many high-end WiFi
  routers.  This one integrates two ath10k wifi radios that were
  previously on separate chips.

  Other boards that got added for existing chips are:

  Ti OMAP family:
     - Amazon Kindle Fire, first generation, tablet and ebook reader
     - OnRISC Baltos iR 2110 and 3220 embedded industrial PCs
     - TI AM5728 IDK, TI AM3359 ICE-V2, and TI DRA722 Rev C EVM
       development systems

  Samsung EXYNOS platform:
     - Samsung ARTIK5 evaluation board, see

        https://www.artik.io/modules/overview/artik-5/

  NXP i.MX platforms:
     - Ka-Ro electronics TX6S-8034, TX6S-8035, TX6U-8033, TX6U-81xx,
       TX6Q-1036, TX6Q-1110/-1130, TXUL-0010 and TXUL-0011 industrial
       SoM modules
     - Embest MarS Board i.MX6Dual DIY platform
     - Boundary Devices i.MX6 Quad Plus Nitrogen6_MAX and SoloX
       Nitrogen6sx embedded boards
     - Technexion Pico i.MX6UL compute module
     - ZII VF610 Development Board

  Marvell embedded (mvebu, orion, kirkwood) platforms:
     - Linksys Viper (E4200v2 / EA4500) WiFi router
     - Buffalo Kurobox Pro NAS

  Qualcomm Snapdragon:
     - Arrow DragonBoard 600c (96boards) with APQ8064 Snapdragon 600

  Rockchips platform:
     - mqmaker MiQi single-board computer

  Altera SoCFPGA:
     - samtec VIN|ING 1000 vehicle communication interface

  Allwinner Sunxi platforms:
     - Dserve DSRV9703C tablet
     - Difrnce DIT4350 tablet
     - Colorfly E708 Q1 tablet
     - Polaroid MID2809PXE04 tablet
     - Olimex A20 OLinuXino LIME2 single board computer
     - Xunlong Orange Pi 2, Orange Pi One, and Orange Pi PC single board
       computers

  Across many platforms, bug fixes went in to address warnings that dtc
  now emits with 'make dtbs W=1'.  Further changes for device enablement
  went into Ti OMAP, bcm283x (Raspberry Pi), bcm47xx (wifi router), Ti
  Davinci, Samsung EXYNOS, Marvell mvebu/kirkwood/orion, NXP i.MX/Vybrid
  NXP LPC18xx, NXP LPC32xx, Renesas shmobile/r-mobile/r-car, Rockchips
  rk3xxx, ST Ux500, ST STi, Atmel AT91/SAMA5, Altera SoCFPGA, Allwinner
  Sunxi, Sigma Designs Tango, NVIDIA Tegra, Socionext Uniphier and ARM
  Versatile Express"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (458 commits)
  ARM: dts: tango4: Import watchdog node
  ARM: dts: tango4: Update cpus node for cpufreq
  ARM: dts: tango4: Update DT to match clk driver
  ARM: dts: tango4: Initial thermal support
  arm/dst: Add Aspeed ast2500 device tree
  arm/dts: Add Aspeed ast2400 device tree
  ARM: sun7i: dt: Add pll3 and pll7 clocks
  ARM: dts: sunxi: Add a olinuxino-lime2-emmc
  ARM: dts: at91: sama5d4: add trng node
  ARM: dts: at91: sama5d3: add trng node
  ARM: dts: at91: sama5d2: add trng node
  ARM: dts: at91: at91sam9g45 family: reduce the trng register map size
  ARM: sun4i: dt: Add pll3 and pll7 clocks
  ARM: sun5i: chip: Enable the TV Encoder
  ARM: sun5i: r8: Add display blocks to the DTSI
  ARM: sun5i: a13: Add display and TCON clocks
  ARM: dts: ux500: configure the accelerometers open drain
  ARM: mx5: dts: Enable USB OTG on M53EVK
  ARM: dts: imx6ul-14x14-evk: Add audio support
  ARM: dts: imx6qdl: Remove unneeded unit-addresses
  ...
2016-05-18 12:48:46 -07:00
Linus Torvalds
a7fd20d1c4 Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next
Pull networking updates from David Miller:
 "Highlights:

   1) Support SPI based w5100 devices, from Akinobu Mita.

   2) Partial Segmentation Offload, from Alexander Duyck.

   3) Add GMAC4 support to stmmac driver, from Alexandre TORGUE.

   4) Allow cls_flower stats offload, from Amir Vadai.

   5) Implement bpf blinding, from Daniel Borkmann.

   6) Optimize _ASYNC_ bit twiddling on sockets, unless the socket is
      actually using FASYNC these atomics are superfluous.  From Eric
      Dumazet.

   7) Run TCP more preemptibly, also from Eric Dumazet.

   8) Support LED blinking, EEPROM dumps, and rxvlan offloading in mlx5e
      driver, from Gal Pressman.

   9) Allow creating ppp devices via rtnetlink, from Guillaume Nault.

  10) Improve BPF usage documentation, from Jesper Dangaard Brouer.

  11) Support tunneling offloads in qed, from Manish Chopra.

  12) aRFS offloading in mlx5e, from Maor Gottlieb.

  13) Add RFS and RPS support to SCTP protocol, from Marcelo Ricardo
      Leitner.

  14) Add MSG_EOR support to TCP, this allows controlling packet
      coalescing on application record boundaries for more accurate
      socket timestamp sampling.  From Martin KaFai Lau.

  15) Fix alignment of 64-bit netlink attributes across the board, from
      Nicolas Dichtel.

  16) Per-vlan stats in bridging, from Nikolay Aleksandrov.

  17) Several conversions of drivers to ethtool ksettings, from Philippe
      Reynes.

  18) Checksum neutral ILA in ipv6, from Tom Herbert.

  19) Factorize all of the various marvell dsa drivers into one, from
      Vivien Didelot

  20) Add VF support to qed driver, from Yuval Mintz"

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next: (1649 commits)
  Revert "phy dp83867: Fix compilation with CONFIG_OF_MDIO=m"
  Revert "phy dp83867: Make rgmii parameters optional"
  r8169: default to 64-bit DMA on recent PCIe chips
  phy dp83867: Make rgmii parameters optional
  phy dp83867: Fix compilation with CONFIG_OF_MDIO=m
  bpf: arm64: remove callee-save registers use for tmp registers
  asix: Fix offset calculation in asix_rx_fixup() causing slow transmissions
  switchdev: pass pointer to fib_info instead of copy
  net_sched: close another race condition in tcf_mirred_release()
  tipc: fix nametable publication field in nl compat
  drivers: net: Don't print unpopulated net_device name
  qed: add support for dcbx.
  ravb: Add missing free_irq() calls to ravb_close()
  qed: Remove a stray tab
  net: ethernet: fec-mpc52xx: use phy_ethtool_{get|set}_link_ksettings
  net: ethernet: fec-mpc52xx: use phydev from struct net_device
  bpf, doc: fix typo on bpf_asm descriptions
  stmmac: hardware TX COE doesn't work when force_thresh_dma_mode is set
  net: ethernet: fs-enet: use phy_ethtool_{get|set}_link_ksettings
  net: ethernet: fs-enet: use phydev from struct net_device
  ...
2016-05-17 16:26:30 -07:00
Linus Torvalds
b6ae4055f4 arm64 perf updates for 4.7
- Support for the PMU in Broadcom's Vulcan CPU
 
 - Dynamic event detection using the PMCEIDn_EL0 ID registers
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABCgAGBQJXNhyFAAoJELescNyEwWM0A0gIAL52VQid16PvLgEO4g6mzv5B
 S1ef/y45342R/DYczcUSFboMPuqYSxZ/i7dCwpvLUKX/YjyqQrrGvvS4IYOS99Mp
 /OAcf8eTyzzVpJiGQetta3q20gNHGXOxd48R1zcgt+bbEax89lyHQul0A8+rPWLq
 RZhEI6Hcq9fb70AjXjWvDxdbbJhtDKc8BGuptygOEqc8LO3mrb1J60TclU629XOH
 Jn4Vdu5f6Rx8hPFdw5HXn+Vdheymphz0qj1lyGCQS4Am97bM5J/54a/A4tyHnHuQ
 s9Y26NIAvrktp9wCMlXGQhYL94e1rZowXCWxF98D9XrlIzYORIdf/OZ5DCS8LCA=
 =0ntf
 -----END PGP SIGNATURE-----

Merge tag 'arm64-perf' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux

Pull arm64 perf updates from Will Deacon:
 "The main addition here is support for Broadcom's Vulcan core using the
  architected ID registers for discovering supported events.

   - Support for the PMU in Broadcom's Vulcan CPU

   - Dynamic event detection using the PMCEIDn_EL0 ID registers"

* tag 'arm64-perf' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
  arm64: perf: don't expose CHAIN event in sysfs
  arm64/perf: Add Broadcom Vulcan PMU support
  arm64/perf: Filter common events based on PMCEIDn_EL0
  arm64/perf: Access pmu register using <read/write>_sys_reg
  arm64/perf: Define complete ARMv8 recommended implementation defined events
  arm64/perf: Changed events naming as per the ARM ARM
  arm64: dts: Add Broadcom Vulcan PMU in dts
  Documentation: arm64: pmu: Add Broadcom Vulcan PMU binding
2016-05-16 17:39:29 -07:00
Arnd Bergmann
9910f5b199 The Freescale/NXP arm64 device tree updates for 4.7:
- New board support of LS1043a-QDS from Freescale/NXP
  - Add new compatible for LS1043A and LS2080A GPIO devices
  - Update device tree bindings and sources for LS2080A fsl-mc device
  - Update QSPI and DSPI support on LS1043A and LS2080A
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJXKL1RAAoJEFBXWFqHsHzOdO8H/1HeVve6KqhjpgHEYI0vqCQN
 F8dC3kA8S9UZcozl58VrKvH+ArR2dcumfdl6ov/WVdfuWDwcBN3SKYgCK4xV1aN9
 QtxFkc7uiE4InyDl4w9Q3fGRZfCgzk3eYUWQmHw6D0oQc3UhoIZ3cK+aKMB2nlZ1
 Q4e0pO3Ell96sKYIhaG6rltlLc9U6Ax4z1XDl1CZ/T2njARFqwBfgNkjSdguB0Ks
 +GOCd/TyloncdWoC41MQnwaOWc+msa3rkXJG2Aj1PWyocZPIiY0K68RClv1g/yKk
 XZJ3M574QK+n/+Em0t+QaxrggiqT6kzr00CfULyyXQ4xhZO1siByCuxdEFW/tAs=
 =pZW5
 -----END PGP SIGNATURE-----

Merge tag 'imx-dt64-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt64

Merge "The Freescale/NXP arm64 device tree updates for 4.7" from Shawn Guo:

 - New board support of LS1043a-QDS from Freescale/NXP
 - Add new compatible for LS1043A and LS2080A GPIO devices
 - Update device tree bindings and sources for LS2080A fsl-mc device
 - Update QSPI and DSPI support on LS1043A and LS2080A

* tag 'imx-dt64-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  arm64: dts: ls2080a: fsl-mc dt node updates
  Documentation: fsl-mc: binding updates for MSIs, ranges, PHYs
  arm64: dts: ls1043a: add the DTS node for QSPI support
  Documentation: fsl-quadspi: Add fsl,ls1043a-qspi compatible string
  arm64: dts: ls2080a: Add compatible "fsl,ls2080a-gpio" for ls2080a gpio nodes
  arm64: dts: ls1043a: Add compatible "fsl,qoriq-gpio" for ls1043a gpio nodes
  arm64: dts: ls2080a: update the DTS for QSPI and DSPI support
  Documentation: fsl: dspi: Add fsl,ls2080a-dspi compatible string
  arm64: dts: ls1043a-rdb: add the DTS for DSPI support
  arm64: dts: add LS1043a-QDS board support
  Documentation: DT: Add entry for Freescale LS1043a-QDS board
2016-05-10 22:19:36 +02:00
Arnd Bergmann
19d91c04af - add thermal and auxadc device nodes to mt8173
- add thermal zone nodes to mt8173
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABAgAGBQJXJzbBAAoJELQ5Ylss8dNDhPMP/34LpEJLt8gWSPTDTKbspNB/
 DzI4kdeQAtcLJuPJK7MlLZV8Lp9zDiLF6vHbyOHZcljaIonb9pi0FbvGXtrWVd6I
 E8Xk0RYmM2UU0sgBFOeC03HwzqCU2kzl/ixOsNnxiVm/UhDZfw0v4E7wJVM7OyBh
 wpTT5jpDA9fv/3TmdFedEp4+8y/piDRk0waisxEOf8bE+9AlWELllOZdV3mj9fnE
 OUTfwHT4q01F9K+RgCqZZIhoeGdNW1N4U3xdaH9AHBc2mPE3PCYKCdVri+p3sJaI
 ukgDwYJ2ESDBPvz3Eh8Qob1i4bCFlASiowRimbzEeM0ev4NG1SIvYinh7kn0yVFE
 R1EkewitGU9o9JkO8d64DbvbQIhH1nnSua/cwZbMc1qIi+R6QH5P5osak993vvhK
 s2NlG2k7efYU0BQhPLTNFxJ8QGpBXr37Zty2ILY+HtGGUt6jMVWYjfpgqTxgi7DA
 px2UDe/Cl36OG64N7b7WwJCDVCPpT3hRxOM0nODLHBsmhE6VyuvR5A0CoQt2X2nw
 JeXrHNMdfQnxESPbJ5LooupDzYUyzsc0i1c3cJDrbohNkAv96mM4iClhlnKrNLwm
 /7JHEha/OcVwSpm30nYgXSt/a3m686QqUTuYq+tdQA13DPxqB4dDBuWtQUqrMbZV
 wjoIwzRGUuObSaFd06C2
 =tbKd
 -----END PGP SIGNATURE-----

Merge tag 'v4.6-next-dts64' of https://github.com/mbgg/linux-mediatek into next/dt64

Merge "ARM: mediatek: dts64 updates for v4.7" from Matthias Brugger:

- add thermal and auxadc device nodes to mt8173
- add thermal zone nodes to mt8173

* tag 'v4.6-next-dts64' of https://github.com/mbgg/linux-mediatek:
  arm64: dts: mt8173: Add thermal zone node.
  ARM64: dts: mt8173: Add thermal/auxadc device nodes
2016-05-10 22:19:00 +02:00
Arnd Bergmann
8ed589854a arm64: tegra: Enable GM20B GPU on Tegra210
Complement the GM20B GPU device tree node on Tegra210 with missing
 properties to make it usable.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABCAAGBQJXI3yjAAoJEN0jrNd/PrOhmUEQAK73RCf3YtRpEFMWOFIrU6cG
 5YsUw5auf65Bc98mFn9a+3lEUMl7QBpLrY3QialllK+CA4pQDs74fwk3rEZ0pSIK
 BUQMaKpkoYsfEqbsV3zEYLfVXkoK5oss1Vd6KfjR0qH4dDQJ8cAEPHkm0KGs4Mxo
 ud1AsZ/0L/3zQEvSZqdEks7N+g+yBXtSzx7CnQ8y9OEHdLQAvh5f1WD5rKc8ir+z
 P/ufsl16J365Sv4JTOzWQhnOaQXgSyzM+CECGZtcCTd0GTel1y6O+SRgIkKv9nD5
 jeFcPMuMYvPKD4FeZgedMia1NQd1mkwWA5gEb4KwOfxgGFUKkYft6hy2Zx4wUVm2
 I9tvDhzzOJduJUu3F69Zws6ztHUPB5zM3hIrSPptkOVME6k063TBGVItGH0NgJAT
 fubvqi0xbVHhZ6jGSY6kwwo1nnIB2DtPcgF8Gm0bHctF4Zveyo3Vq5iyaTWPjEhj
 l+qc1rTgmQf2lFvMUXEsIQbl8b8m/UcWK2hrGj7Wq0qvD8CwP4wg0S8uRm+hDBX0
 ZUk0lIqC1PBDZkVETkzNEpXI6eKeixaXYgr6jsCCFUZdBmeFJ/4m+Kbn5xCNObGJ
 pwGkhSZceBABgGz/p/yfAS0RRlmfYotg4yRa0JHkVgfK2oqOtAl5QiQzN4fMyRkt
 vAPrcTd61LCB4hiC31K3
 =yX4c
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-4.7-gm20b' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt64

Merge "arm64: tegra: Enable GM20B GPU on Tegra210" from Thierry Reding:

Complement the GM20B GPU device tree node on Tegra210 with missing
properties to make it usable.

* tag 'tegra-for-4.7-gm20b' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  arm64: tegra: Add IOMMU node to GM20B on Tegra210
  arm64: tegra: Add reference clock to GM20B on Tegra210
  dt-bindings: Add documentation for GM20B GPU
  dt-bindings: gk20a: Document iommus property
  dt-bindings: gk20a: Fix typo in compatible name
2016-05-10 22:18:14 +02:00
Arnd Bergmann
3a005c1d59 mvebu dt64 for 4.7
- switch to label in the mvebu arm64 device tree
 - use new clock binding on Armada 7K/8K
 - improve SPI and I2C description on Armada 7K/8k
 - add CP110 block adding PCIe, SATA and USB3
 - add XOR support on Armada 3700
 - few more little fix
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iEYEABECAAYFAlcjbaAACgkQCwYYjhRyO9VaVgCghxZq/0qnD5+k5ouUvSYwXiOo
 EV8AoIL6w3bn64kY93M0o8RtrG4WLe+h
 =Pilg
 -----END PGP SIGNATURE-----

Merge tag 'mvebu-dt64-4.7-1' of git://git.infradead.org/linux-mvebu into next/dt64

Merge "mvebu dt64 for 4.7" from Gregory CLEMENT:

- switch to label in the mvebu arm64 device tree
- use new clock binding on Armada 7K/8K
- improve SPI and I2C description on Armada 7K/8k
- add CP110 block adding PCIe, SATA and USB3
- add XOR support on Armada 3700
- few more little fix

* tag 'mvebu-dt64-4.7-1' of git://git.infradead.org/linux-mvebu:
  arm64: dts: marvell: add XOR node for Armada 3700 SoC
  arm64: dts: marvell: Use a SoC-specific compatible for xHCI on Armada37xx
  arm64: dts: marvell: Rename armada-37xx USB node
  arm64: dts: marvell: Clean up armada-3720-db
  arm64: dts: marvell: enable several CP interfaces on Armada 7040-DB
  arm64: dts: marvell: initial DT description of Armada 7K/8K CP110 master
  arm64: dts: marvell: use the proper I2C controller compatible string for 7K/8K
  arm64: dts: marvell: improve SPI flash description on Armada 7040-DB
  arm64: dts: marvell: use new clock binding on Armada AP806
  arm64: dts: marvell: add UART aliases and define stdout-path
  arm64: dts: marvell: rename armada-ap806 XOR nodes
  arm64: dts: marvell: clean up armada-7040-db
2016-05-10 22:14:52 +02:00
Arnd Bergmann
f1c09c3e96 Adding the new rk3399 core devicetree support as well as a board
dts for the evaluation board of this chip and similar to the arm32
 side also move the rk3368 thermal data into the core soc dtsi, as
 there really is no need to keep it separate.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABCAAGBQJXIoubAAoJEPOmecmc0R2B/kQH/1gcN5C5JM4kkohUyEJ2uBju
 zIwbfw4TyV/ndMUb1rCj8XUTBvbz80PvNKmsYJXERr8fUtjRaA71Wf8iJsqyaqDz
 NQ3ygC30ZtmG2Z39ekn4cZ7zqjxwrEmY53vFfR4oDd1ENNVh14g26qxLfYDG7SXD
 RGB729icDa2wr9W0doNc9khcQDFY3j4pbz+v8tfDoVcbFZWeq5K4SnbvB0VVQBCA
 sS0EJV0KUUSlZ5okJuoZUx5UeeodJaV8uvygOboL644kI8hNnnp4rCP23paZ/d0H
 ot5IcrXDjpCHCEQdQpr3OsCnCgzeK0NL5F1ppJr2MYfjQJSWEaGFQatV2Ipquss=
 =25Hx
 -----END PGP SIGNATURE-----

Merge tag 'v4.7-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt64

Merge "Rockchip dts64 updates for v4.7 - part2" from Heiko Stübner:

Adding the new rk3399 core devicetree support as well as a board
dts for the evaluation board of this chip and similar to the arm32
side also move the rk3368 thermal data into the core soc dtsi, as
there really is no need to keep it separate.

* tag 'v4.7-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  dt-bindings: document rockchip rk3399-evb board
  arm64: dts: rockchip: add dts file for RK3399 evaluation board
  arm64: dts: rockchip: add core dtsi file for RK3399 SoCs
  dt-bindings: rockchip-dw-mshc: add description for rk3399
  clk: rockchip: export some necessary rk3399 clock ids
  clk: rockchip: rename rga clock-id on rk3399
  clk: rockchip: add general gpu soft-reset on rk3399
  arm64: dts: rockchip: move the rk3368 thermal data into rk3368.dtsi
  clk: rockchip: fix checkpatch errors in rk3399 dt-binding header
  clk: rockchip: add dt-binding header for rk3399
2016-05-10 22:06:49 +02:00
David S. Miller
e800072c18 Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
In netdevice.h we removed the structure in net-next that is being
changes in 'net'.  In macsec.c and rtnetlink.c we have overlaps
between fixes in 'net' and the u64 attribute changes in 'net-next'.

The mlx5 conflicts have to do with vxlan support dependencies.

Signed-off-by: David S. Miller <davem@davemloft.net>
2016-05-09 15:59:24 -04:00
Linus Torvalds
c4781a8df9 Here are a couple last-minute fixes for ARM SoCs. Most of them
are for the OMAP platforms, quoting Tony Lindgren:
 
     Fixes for omaps for v4.6-rc cycle. All dts fixes, mostly
     affecting voltages and pinctrl for various device drivers:
 
     - Regulator minimum voltage fixes for omap5
     - ISP syscon register offset fix for omap3
     - Fix regulator initial modes for n900
     - Fix omap5 pinctrl wkup instance size
 
 The rest are all for different platforms:
 
 - Allwinner:
    Remove incorrect constraints from a dcdc1 regulator
 
 - Alltera SoCFPGA:
   Fix compilation in thumb2 mode
 
 - Samsung exynos:
   Fix a potential oops in the pm-domain error handling
 
 - Davinci:
   Avoid a link error if NVMEM is disabled
 
 - Renesas:
   Do not mark an external uart clock as disabled, to allow
   probing the uarts
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIVAwUAVyud6WCrR//JCVInAQKhXBAAir8+FCYQGLzwFQrCHTRa6zJq0sGUOLss
 DBawxezSxtcz9LYn2s9EI5W7yqs/vtjILNTtV3bNNHZTrn/cE8Jpvo+kjNK096PP
 3m0LS20pbGV/629JXiuf55pWugoXUvQNP4kTcuW8dQzQWWuzv2QfJwtW776Q8rOQ
 ZRvh6uUsCgsc6JCCnZESVAnWQ7VA5YpTpZRhokhogdU0r6VTuHfOf8NPD10kiel+
 jpayjC852MPJtS+1JI/d9vIydsSPHbfS8lkVp0rX7oep/Xjp6C3HGSNH+KkLTjXf
 9q6uVm21Kko24wd3RAFYNFshNmD80j+BQJN+59gx7jUnQsVA+WZkNlKSPD1svf+R
 9Ym+fGVn+UgsU/rSW+hhTYft7ao6Tud+W80QARFgWX6B3E3xF/ExJ9TE07hg0sK7
 b+JZAFoSnEut6yTq5g99/YdvDLfqANPo3f3968bl18rKh15Iso/u177KR3cbMPBw
 rKFXg9fkmjd3g5mUUekYvaEKbb+bEeLaAT+2Cri3diSW7odTzsLQSXELS0UTOWfx
 TLTJSkmgxvABhdZZPQscHBvxwXPGQO8S479GGXG2xcI+tiT7ZDJPZeVm0P99B8WB
 Y2VjTjuc49ZALrzT93nY9nInyjhzI5NsnccG5Khw+qoxlZ3+H+N2tVkhwt6+FNcg
 vl8vcFbj9hM=
 =ymz3
 -----END PGP SIGNATURE-----

Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Arnd Bergmann:
 "Here are a couple last-minute fixes for ARM SoCs.  Most of them are
  for the OMAP platforms, the rest are all for different platforms.

  OMAP:
     All dts fixes, mostly affecting voltages and pinctrl for various
     device drivers:

      - Regulator minimum voltage fixes for omap5
      - ISP syscon register offset fix for omap3
      - Fix regulator initial modes for n900
      - Fix omap5 pinctrl wkup instance size

  Allwinner:
     Remove incorrect constraints from a dcdc1 regulator

  Alltera SoCFPGA:
     Fix compilation in thumb2 mode

  Samsung exynos:
     Fix a potential oops in the pm-domain error handling

  Davinci:
     Avoid a link error if NVMEM is disabled

  Renesas:
     Do not mark an external uart clock as disabled, to allow probing
     the uarts"

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: davinci: only use NVMEM when available
  ARM: SoCFPGA: Fix secondary CPU startup in thumb2 kernel
  ARM: dts: omap5: fix range of permitted wakeup pinmux registers
  ARM: dts: omap3-n900: Specify peripherals LDO regulators initial mode
  ARM: dts: omap3: Fix ISP syscon register offset
  ARM: dts: omap5-cm-t54: fix ldo1_reg and ldo4_reg ranges
  ARM: dts: omap5-board-common: fix ldo1_reg and ldo4_reg ranges
  arm64: dts: r8a7795: Don't disable referenced optional scif clock
  ARM: EXYNOS: Properly skip unitialized parent clock in power domain on
  ARM: dts: sun8i-q8-common: Do not set constraints on dc1sw regulator
2016-05-05 15:31:35 -07:00
Iyappan Subramanian
6619ac5a44 dtb: xgene: Add channel property
Added 'channel' property, describing ethernet to CPU channel number.

Signed-off-by: Iyappan Subramanian <isubramanian@apm.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2016-05-02 16:47:55 -04:00
Yisen.Zhuang\(Zhuangyuzeng\)
ea991027ef dts: hisi: update hns dst for changing property port-id to reg
Indexes should generally be avoided. This patch changes property port-id
to reg in dsaf port node.

Signed-off-by: Yisen Zhuang <yisen.zhuang@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2016-04-29 13:39:04 -04:00
Gregory CLEMENT
19b67d5c8b arm64: dts: marvell: add XOR node for Armada 3700 SoC
Armada 3700 SoC comprise one dual-channel XOR engine and this
patch adds its according representation.

Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-04-29 15:07:42 +02:00
Jianqun Xu
cc7364fbda arm64: dts: rockchip: add dts file for RK3399 evaluation board
This patch add rk3399-evb.dts for RK3399 evaluation board.
Tested on RK3399 evb.

Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-04-28 22:25:46 +02:00
Jianqun Xu
f048b9a4d4 arm64: dts: rockchip: add core dtsi file for RK3399 SoCs
This patch adds core dtsi file for Rockchip RK3399 SoCs.

The RK3399 has big/little architecture, which needs a separate
node for the PMU of each microarchitecture, for now it missing
the pmu node since the old one could not work well.

Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Tested-by: Brian Norris <briannorris@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-04-28 22:25:38 +02:00
Arnd Bergmann
6383190203 Second Round of Renesas ARM Based SoC Fixes for v4.6
* Don't disable referenced optional scif clock
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJXIUSSAAoJENfPZGlqN0++NxUP/iExGz3SUIwOMh9vcq4zl6Iz
 LSvZMo26XYkF4/HBOAfrtNGxfFZnZRPOLhQ1K757YJejvo7uPxp6loOxolfe93GI
 o92dMCRWCFN7IcmGX+JOlcnMkyG4o8fUjgrPm3V5DUV3+bn7UBYnkD91RXgFiMxw
 2it4mas1sDajEzgJ16AJK/JT/x0amrMzZp9dieO/7++g1lLp8SToxDTtJarWgrkc
 OytMGN96fxfvKKSjDC/MUD7vq12+yVQXHYlxIo+E851fP42xqhUuc070/xPbtRqm
 9EsGPoqF9CQL5c4NY9TbXtY2gD/cvHWd0ojbPtHPGpg7vMXGBSLIDBn7pBEmu5oK
 5ivMXtSSIXX2lr0hGnJM27NmfSx/JGQiJhW/BdyYrMJgTS7/Sji3/Vau0+aEqxt/
 SxpZQf0xcVKd+xd+ZnvBB7b3ffBbdkAPAYVAv/Y452oTWlUs6yH76nvMUqAf7dy/
 wMfHGucxtNhKM8jB/iS3Z2aWMcWDZxH+B3Q/PwmkjUxJLxj9Db2bKQ/2Gn6IrX3B
 dl+S2ZrGC/n+Qqh7+aLoqbtAp7hn5i43fZIe3UL6xYf90kWi/D7iOz+w/LaHX7YE
 qlTF4lInwy39Y58PXkLNgivaS0zSFCZ3gWFk7hg0gXBPQlnLYsIZ9dFqGMF4uQZt
 2Qj3ebjkIq37eM20l7cd
 =ySSs
 -----END PGP SIGNATURE-----

Merge tag 'renesas-fixes2-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes

Merge "Second Round of Renesas ARM Based SoC Fixes for v4.6" from Simon Horman:

* Don't disable referenced optional scif clock

* tag 'renesas-fixes2-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  arm64: dts: r8a7795: Don't disable referenced optional scif clock
  ARM: shmobile: timer: Fix preset_lpj leading to too short delays
  Revert "ARM: dts: porter: Enable SCIF_CLK frequency and pins"
  ARM: dts: r8a7791: Don't disable referenced optional clocks
2016-04-28 17:46:27 +02:00
Arnd Bergmann
d6a58a5cc1 ARM64: DT: Hisilicon hip05 and hip06 updates for 4.7
- Fix its node without msi-cells for hip05
 - Add nor flash node for hip05 D02 board
 - Add initial dts for hip06 D03 board
 - Reorder and add the hip06 D03 binding in the binding document
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJXINEDAAoJEAvIV27ZiWZcwQkQAIOSd4juC+23IfAOQHxdUANx
 6nLxoAEFDqTA/mOLap1a7ttKTqlhRRPXepw8+mT+JqaNgd7oegXVWsoy7G+t6EGS
 62piFNCY0V7PnpGyjSriN73Fup99RLKSbvhOvdn0zM1h2hlO5skSBj+ApVjTcclc
 ca+2ovMwdlUA3FIaIFjsFb+UDKju/VnShNBus2Uhb6dvdwHZ1jbTSKvfDd2PEcSy
 O0/E/DuZ7RyzpAaS93jy2Malhkl5ojw1O6svbXHD7/fgmQKHxIQSzXza0yKhO+fR
 Kx5zuoQxb2/Uwi/hI3lxmCWGJoht3jzlmqCYivP/FT3y+204MrcCyoZpCPN5jBhB
 todtfNRTWze5+8gEmPBPbCth3/4rAeWWbG1IObylNL8J4fxgQp5mUFHtAe8F3Q4v
 6pcoXFynN2eKFCEXjw0G/E+3DjeAjaGiOtY+XnPnYvh4vQUqzFhxObEDi3gg4Rs5
 SqHHpcV3n3lWv16kgSNbHP1I8RMFt44JwBchakzYrV+fz35JlFxiojCDumz5eotK
 s7dqGzAGNFzk0KxNi/Wwrn0dVPQk8FZfO9XuCb4Rl+ThO3VRKC6lhgP/S93sBYUk
 EgABmLJr/zv3TdymaMFAOcekWqBcwzTgQ7eGFGF20E5pvsUjCmtU3nFE6mG+IPoM
 kmrGprVN/53FrYX3DDaF
 =OZ3Q
 -----END PGP SIGNATURE-----

Merge tag 'hip0x-dt-for-4.7' of git://github.com/hisilicon/linux-hisi into next/dt64

Merge "ARM64: DT: Hisilicon hip05 and hip06 updates for 4.7" Wei Xu:

- Fix its node without msi-cells for hip05
- Add nor flash node for hip05 D02 board
- Add initial dts for hip06 D03 board
- Reorder and add the hip06 D03 binding in the binding document

* tag 'hip0x-dt-for-4.7' of git://github.com/hisilicon/linux-hisi:
  Documentation: arm64: Add Hisilicon Hip06 D03 dts binding
  arm64: dts: Add initial dts for Hisilicon Hip06 D03 board
  arm64: dts: hip05: Add nor flash support
  arm64: dts: hip05: fix its node without msi-cells
2016-04-28 16:16:00 +02:00
Arnd Bergmann
bf6fc0a249 Second Round of Renesas ARM64 Based SoC DT Updates for v4.7
* Don't disable referenced optional clocks in DT of r8a7795 SoC
 * Populate EXTALR in DT of salvator-x board
 * Enable PCIe in DT of salvator-x board
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJXICAoAAoJENfPZGlqN0++nGQP/2q0g8NyPiF3oUa2e0xF7MWf
 DP099+HGRoiI7aYhEOPpF8T1Ib4PsSXRBwv5VMZMjLQ+7k12t0NzKozAleQfT+DA
 PVewJWVIgQLovJjxY3vojr8Rg70IeGF1hwwVSK9q7osNP0ywwokVNjt6fpiMrrKq
 43mVfDHLt6AtIWwDph4D43+mHsBfBlnWiluM9WDtu4x/3iv1P1Pz8fnOU7+clNsW
 2Ij1pDZlsmx6do4du3ijvKb6DKwceluqSXUaoSQTlkrqy+ljwczM64j8AItnVbD5
 xr70cwMG6Em2lUWcXL/rel7+uLIyKoXirRstmIRLz7BKnUEjPb5NVM3kFNCG3I2s
 QAifVsyJpZflw1/VlDnTTXk3iG22wZn+o9UdN0dOIHlj0QE6ui9dBYcLt+ZtRshp
 v07eumPvK8rtwXiW4bBjlILaPmoQtF5RI+/Hb93dJHLLXeDaLHx37ve7SRxmFsrj
 NJv9HtsoPzWrEtyxIDuAUlabhcvd2mzZXMuAPFbKC4vckDdKWy1rVqGkGG1sRf0K
 RJDPjGhskKAg9ryeIg12+4GLmoKQRfPKjXG4ajuNwZvzfYIOI3rEZgIzBNuc6k1h
 U3rWFKZf1sMAs/uwSmabZjp+6Li9p1Lt/gZqagZ3bElJa/VTUQLafPMMm6rzV17d
 Hlx/ZjKAkALLTbzGNQzG
 =i1nn
 -----END PGP SIGNATURE-----

Merge tag 'renesas-arm64-dt2-for-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt64

Merge "Second Round of Renesas ARM64 Based SoC DT Updates for v4.7" from Simon Horman:

* Don't disable referenced optional clocks in DT of r8a7795 SoC
* Populate EXTALR in DT of salvator-x board
* Enable PCIe in DT of salvator-x board

* tag 'renesas-arm64-dt2-for-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  arm64: dts: r8a7795: Don't disable referenced optional clocks
  arm64: dts: salvator-x: populate EXTALR
  arm64: dts: r8a7795: enable PCIe on Salvator-X
  arm64: dts: r8a7795: Add PCIe nodes
  arm64: dts: r8a7795: Use USB3.0 fallback compatibility string
  arm64: dts: r8a7795: Add CAN support
  arm64: dts: r8a7795: Add CAN external clock support
2016-04-28 16:11:54 +02:00
David S. Miller
c0cc53162a Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Minor overlapping changes in the conflicts.

In the macsec case, the change of the default ID macro
name overlapped with the 64-bit netlink attribute alignment
fixes in net-next.

Signed-off-by: David S. Miller <davem@davemloft.net>
2016-04-27 15:43:10 -04:00
Gregory CLEMENT
150fa11284 arm64: dts: marvell: Use a SoC-specific compatible for xHCI on Armada37xx
Even if the Armada 37xx does not any specific setup, the device tree
binding documentation requires to use a SoC-specific version
corresponding to the platform first followed by the generic version.

This patch introduce this new compatible string and updates the
documentation accordingly.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-04-27 17:51:51 +02:00
Andreas Färber
cc2684c449 arm64: dts: marvell: Rename armada-37xx USB node
No need to reflect the USB version in the node name.

Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
[gregory.clement@free-electrons.com: drop Fixes tag as it is not a bug fix.]
2016-04-27 17:51:51 +02:00
Andreas Färber
7b01cff5cc arm64: dts: marvell: Clean up armada-3720-db
Instead of duplicating the SoC's node hierarchy, including a bus node
named "internal-regs", reference the actually desired nodes by label,
like Berlin already does. Add labels where necessary.

Drop an inconsistent white line while at it.
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
[gregory.clement@free-electrons.com: drop Fixes tag as it is not a bug fix.]
2016-04-27 17:51:50 +02:00
Kefeng Wang
aa8d3e74f5 arm64: dts: Add initial dts for Hisilicon Hip06 D03 board
The Hip06 soc has same cpu topology compared with Hip05, four clusters
and each cluster has quard Cortex-A57, but with different IO part,
like HNS, SAS and PCI, they are all upgraded. There are also not same
in ITS, MBIGEN and SMMU, etc.

This patch adds the initial dts for hip06 d03 board.

Note, there is no serial, because the soc use LPC uart, the serial node
is not needed.

Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2016-04-27 15:40:11 +01:00
Kefeng Wang
162d23bfd1 arm64: dts: hip05: Add nor flash support
This patch is to add support nor-flash. Notice, the pre-defined
partitions may not be used.

Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2016-04-27 15:39:56 +01:00
Kefeng Wang
7089665073 arm64: dts: hip05: fix its node without msi-cells
Fix commit abf9c25d55 ("arm64: dts: hip05: Append all gicv3 ITS
entries"), it forgets the property msi-cell, see arm,gic-v3.txt.

Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2016-04-27 15:39:54 +01:00
Geert Uytterhoeven
9f33a8a9e1 arm64: dts: r8a7795: Don't disable referenced optional clocks
clk_get() on a disabled clock node will return -EPROBE_DEFER, which can
cause drivers to be deferred forever if such clocks are referenced in
their devices' clocks properties.

Update the various disabled external clock nodes to default to a
frequency of 0, but don't disable them, to prevent this.

Reported-by: Jürg Billeter <j@bitron.ch>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-04-27 11:48:34 +10:00
Wolfram Sang
de5a79f125 arm64: dts: salvator-x: populate EXTALR
It can be used for the watchdog.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-04-27 11:48:34 +10:00
Phil Edworthy
bbd273047b arm64: dts: r8a7795: enable PCIe on Salvator-X
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-04-27 11:48:33 +10:00
Phil Edworthy
9251024a6a arm64: dts: r8a7795: Add PCIe nodes
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-04-27 11:48:28 +10:00
Alexandre Courbot
30f949bc66 arm64: tegra: Add IOMMU node to GM20B on Tegra210
The operating system driver can take advantage of the IOMMU to remove
the need for physically contiguous memory buffers.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-04-26 18:41:43 +02:00
Alexandre Courbot
4a0778e98f arm64: tegra: Add reference clock to GM20B on Tegra210
This clock is required for the GPU to operate.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-04-26 18:41:05 +02:00
Thomas Petazzoni
fea1449879 arm64: dts: marvell: enable several CP interfaces on Armada 7040-DB
This commit enables several interfaces of the CP side of the Armada
7040 for the Armada 7040 DB board:

 - one PCIe interface
 - one SPI controller with an attached SPI flash
 - one I2C controller
 - one SATA controller
 - two USB3 controllers

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-04-26 15:11:37 +02:00
Thomas Petazzoni
728dacc7f4 arm64: dts: marvell: initial DT description of Armada 7K/8K CP110 master
This commit adds an initial Device Tree description for the CP110
master that is found in the Armada 7K and 8K SoCs. This initial
description describes:

 - the system controller (to provide clocks)
 - three PCIe interfaces
 - the SATA interface
 - the I2C controllers
 - the SPI controllers

For the record, the organization of the SoCs is as follows:

 - 7020: dual-core AP, one CP110 (master)
 - 7040: quad-core AP, one CP110 (master)
 - 8020: dual-core AP, two CP110s (master and slave)
 - 8040: quad-core AP, two CP110s (master and slave)

For this reason, all of the 7020, 7040, 8020 and 8040 include
armada-cp110-master.dtsi. When support for the second CP110 (slave)
used in 8020 and 8040 will be added, the .dtsi files for those SoCs
will in addition include armada-cp110-slave.dtsi.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-04-26 15:10:21 +02:00
Thomas Petazzoni
d8b330a3e3 arm64: dts: marvell: use the proper I2C controller compatible string for 7K/8K
The I2C controller found in the Marvell Armada 7K/8K provides the
bridge/offloading features, so the Device Tree should use the
marvell,mv78230-i2c compatible string instead of marvell,mv64xxx-i2c.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-04-26 15:09:51 +02:00
Thomas Petazzoni
fe85e20e97 arm64: dts: marvell: improve SPI flash description on Armada 7040-DB
This commit slightly improves the description of the SPI flash
connected to the SPI controller of the Armada 7040, by:

 - Using the more generic "jedec,spi-nor" compatible string, which
   lets the driver auto-detect the exact SPI flash type.

 - Removing the silly comment about the Chip Select, since reg = <0>
   is explicit enough.

 - Switching to the new Device Tree binding to describe flash
   partitions.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-04-26 15:09:23 +02:00
Thomas Petazzoni
bb233a9319 arm64: dts: marvell: use new clock binding on Armada AP806
This commit updates the Marvell AP806 Device Tree description to make
use of the accepted clock Device Tree binding.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-04-26 15:09:02 +02:00
Thomas Petazzoni
bf15116216 arm64: dts: marvell: add UART aliases and define stdout-path
This commit adds the necessary UART aliases to the main Armada 7K/8K
.dtsi file, and uses them to define the /chosen/stdout-path property
on the Armada 7040 DB board.

Suggested-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-04-26 15:07:56 +02:00
Andreas Färber
1093e5f6fc arm64: dts: marvell: rename armada-ap806 XOR nodes
Node names should not contain an instance number, the unit address
serves to distinguish nodes of the same name. So rename the XOR nodes
to just xor@<address>.

Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
[Thomas:
 - remove labels, they are really not needed for XOR engines.
 - remove the Fixes: tag, as this is not a fix.]
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-04-26 15:04:23 +02:00
Andreas Färber
037ad463ba arm64: dts: marvell: clean up armada-7040-db
Instead of duplicating the node hierarchy, reference the nodes by label,
adding labels where necessary.

Drop some trailing or inconsistent white lines while at it.

Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
[Thomas: drop Fixes tag as it is not a bug fix.]
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-04-26 15:03:58 +02:00
Yisen.Zhuang\(Zhuangyuzeng\)
218afd68a2 dts: hisi: update hns dst for separating dsaf dev support
Because debug dsaf port was separated from service dsaf port, this patch
updates the related configurations of hns dts, changes it to match with
the new binding files. This also removes enet nodes which don't exist in
d02 board.

Signed-off-by: Yisen Zhuang <yisen.zhuang@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2016-04-26 01:09:18 -04:00
Stuart Yoder
bb4b4e93fe arm64: dts: ls2080a: fsl-mc dt node updates
updates to the fsl-mc node for full functionality:
   -msi-parent is needed for interrupt support
   -ranges is needed to enable the bus driver to translate bus addresses
   -dpmac nodes provide a basis for relating dpmac objects to PHYs

Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-04-26 11:25:44 +08:00
Geert Uytterhoeven
f5515f9cdf arm64: dts: r8a7795: Don't disable referenced optional scif clock
clk_get() on a disabled clock node will return -EPROBE_DEFER, which can
cause drivers to be deferred forever if such clocks are referenced in
their devices' clocks properties.

Update the disabled external scif clock node so that it
is not disabled to prevent this.

Reported-by: Jürg Billeter <j@bitron.ch>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
[simon: fix for v4.6 extracted from a larger patch targeted at v4.7]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-04-26 09:44:48 +10:00
Masahiro Yamada
fb89cf36b6 arm64: dts: uniphier: add reference clock node for PH1-LD20
Add a master clock node generated by a 25MHz crystal oscillator.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2016-04-25 22:57:54 +02:00
Masahiro Yamada
b455f0a1cc arm64: dts: uniphier: use Daughter board on PH1-LD20 reference board
Include the development base board, which is equipped with some
devices such as EEPROM.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2016-04-25 22:57:04 +02:00
Arnd Bergmann
0a45e16a54 This pull request contains Broadcom ARM64-based SoC Device Tree changes:
- Anup enables a bunch of standard peripherals in the Northstar 2 DTS: PL330
   DMA, GIC maintenance interrupt, PL022 SPI controller
 
 - Anup also re-orgnanizes the clock Device Tree fragments into a separate file
   for consistency with how other Broadcom SoCs are doing this
 
 - Luke switches the SMP enable-method and reboot from a spin-table + syscon to
   the standard PSCI 1.0 firmware interface
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJXG8r9AAoJEIfQlpxEBwcEVIYP/0Q5uRJ7zysbVOBo0dm4CPwK
 2dxmt1ANc6fB/LSuedIzCkAOXPBX1x4goF59pb5UHBBpV2/Y79HT6BMG2SVvjtNh
 4FF3mqVLZ5B6KlJDkZb6JN29SG82OjGZrZLpSC8/89TXMadTLdbSq41hVjJ9sY9l
 9feg1qmhO1pKfZIRWPxJnNzCyiJOtKBZSSZaUyejolZBMIIdf8uPUtiRqu/sNWvd
 mz37YDdXFJomaoBdgUSKlwvChs+6LkzczSLRlcTHa9Wr7luXwftU1uXRHbzHDMHS
 BUxvIbJe8ivwDjYdCB6l0PxIiigYm2mVIZt06BVYLbQMih5zmlOdrSW6c3e/CrIe
 i9IBRHwR+l7uqs/u2b6dX7/wziH9jtZ2Hv0dK7+k/A8nktw4wWr5VZsYiMWZ/j0Q
 ikfSRz26+p0LJ05PNTtmqSFhZ5sAcUQ599+guyNDl+8EbpVKHvTlHtmWxktO/w0v
 3K0QwaIvxac0xR90XVBvhmY6b+/8uJoKqp6jqTymEZGOqinOvA9kcnNW6PDZHyxh
 6LdEGg1APNou0/t1Uq7khlOfkRhhifUAV8dJVFqFsc/ZFOB1zZiLIiEmV5ckdZlR
 iUFKArRzki4G6CG1JQ2bGIjun+JGVPCuQsdlVERJdeBC4WJn4JtT/SGlc0DlowK2
 r/4BBv44ZLmRcLcm10+L
 =6mn8
 -----END PGP SIGNATURE-----

Merge tag 'arm-soc/for-4.7/devicetree-arm64' of http://github.com/Broadcom/stblinux into next/dt64

Pull "Broadcom ARM64-based SoC Device Tree changes" from Florian Fainelli:

- Anup enables a bunch of standard peripherals in the Northstar 2 DTS: PL330
  DMA, GIC maintenance interrupt, PL022 SPI controller

- Anup also re-orgnanizes the clock Device Tree fragments into a separate file
  for consistency with how other Broadcom SoCs are doing this

- Luke switches the SMP enable-method and reboot from a spin-table + syscon to
  the standard PSCI 1.0 firmware interface

* tag 'arm-soc/for-4.7/devicetree-arm64' of http://github.com/Broadcom/stblinux:
  arm64: dts: NS2 secondary core enablement via PSCI
  arm64: dts: Add ARM PL022 SPI DT nodes for NS2
  arm64: dts: Move NS2 clock DT nodes to separate DT file
  arm64: dts: Add maintenance interrupt for GIC in NS2 DT
  arm64: dts: Add ARM PL330 DMA DT node for NS2
2016-04-25 22:54:20 +02:00
Arnd Bergmann
11a138e479 First part of X-Gene DTS changes queued for v4.7.
This patch set only includes a single change to
 fix the compatible string for SATA controllers on
 X-Gene v2 SOC platforms.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJXFV/ZAAoJEB11UG/BVQ/gE/wP+QEZfjkYct5cpzbt2RmeX4Tx
 3PbN5u00t013WrGfpkacM+l9n7ZNJLEuub//ptZ9ejvmdfqVInVsScMybBZq/1rY
 CAsv2aGs+Crn8CxDbaiBu0uiWwccE+OrswWd5pmOsdqvqFSugYEHosmtte3tbgK5
 3ehhb/WNXoGodaAdKLl3daDH056eozRJUYVgEr0w5pIVkMWOMYQUO7wibYlydG3N
 DGex0jpY175eYl4il5YRtcX2AAK6PP3JjyjmuEkU/Ngy7tGZPtpUG2CHKp8eBbLF
 oH1SZpM6Wnbw4iyTJNCrDxMe3unXRNEVprH5Y3r4LNrxrd2608Fx7OmvXUpm5gqK
 GLOaT4gFjqDr14M3tmHy/LHDovoGbVKMgM3AIqTJBDtjC6XM6QqtcFStnR9WpHms
 dPj8aPxAXoHFp8vdd/68LqxJ9yGZHfbiQg67kHGaNd3SV61LBLyrsSB50ENyUj4Q
 ks2fBwpEMnrK8pil1zTK8PowIQ2hXa7BHfppiTGnsnLVJBzH0PIiB7q1r14ggHXu
 AzwjiqByAL7++corvBQnj68UKdIlmKBlecXX3IpVhG+7QmJ1FR4Sdg3pPv5UNVAn
 UVqu+nlVSStbdNVUnMwEwHseXpCZG9dAQrBVFasqgBInS0jJq6toCF7uMDzD+oQM
 mzT8S9qZQEDfYDSc7Fjj
 =Wnq5
 -----END PGP SIGNATURE-----

Merge tag 'xgene-dts-for-v4.7-part1' of https://github.com/AppliedMicro/xgene-next into next/dt64

Merge "First part of X-Gene DTS changes queued for v4.7" from Duc Dang:

This patch set only includes a single change to
fix the compatible string for SATA controllers on
X-Gene v2 SOC platforms.

* tag 'xgene-dts-for-v4.7-part1' of https://github.com/AppliedMicro/xgene-next:
  arm64: dts: apm: Fix compatible string for X-Gene 2 SATA controller DTS node
2016-04-25 22:53:01 +02:00
Arnd Bergmann
04136309a2 ARM64: DT: Hisilicon Hi6220 soc and hikey board updates for 4.7
- Reserve memory regions for Hi6220
 - Add sp804 timer node for Hi6220
 - Add cpu and cluster level's low power state for Hi6220
 - Add gpio configuration nodes for Hi6220
 - Add pinctrl configuration nodes for Hi6220
 - Add spi related nodes for Hi6220
 - Add i2c nodes for Hi6220
 - Add i2c nodes to work with mezzanine boards
 - Add usb nodes for Hi6220
 - Add mailobx node for Hi6220
 - Add SRAM node and stub clock node for Hi6220
 - Add pinctrl nodes for uarts and enable them
 - Add LED nodes for hi6220-hikey board
 - Add hi655x pmic node for Hi6220
 - Add dwmmc nodes for Hi6220
 - Add wifi nodes support for Hi6220-Hikey board
 - Register thermal sensor for Hi6220
 - Register Hi6220's thermal zone for power allocator
 - Add L2 cache topology for Hi6220
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJXERKpAAoJEAvIV27ZiWZcrjQP/iaj3zzSDcdHwGGbZsPXK/bt
 VHtqmtrWazXy5DIgA/4voHT3aYiHWVgmqCtl5kFs9X6SRDaqZXmMTAJPAiuBjs8s
 HMArHopgV/cmpGbg/ex4PxQqhj0TEOS6kiTl6roYlWnbNvOvHDpePWbS44grDqT+
 2q5hvm2xe9DVG3iEz5rlpBx42j+e7bH7LNiysToDXwb6PblKq+/o3PlkQKBQ7fyF
 9eGCI1az6iMNdGNicuHjU4olri6XcqCAeccO3Nh0nnuXOfEip1dIngT2vLc9IXVV
 J2L9xZ7oiJkgofAzve3sTkZbHsQIL9UmIiL1JNZycrQJyjjjk9VtUxuzD3yLOaPI
 8GJpIkccoAGQdMwFsRDT7fQW1qmtSxs5mMzhkGfeD2gAjTcWA0H+Pn7hjb0AQHDf
 wot1aKkGfoRl+PPF7j6DaHe4Gd2oU+6R89Z3e4ZzVlLzt11Hijm4yMs7h2sXKpAe
 39+FglMPEHLW2RFNBXNz3Fu4dUcWIgTWHU333Jjvs0Wj7O7er8L0xwkA91PRH+E8
 n86n7pYv2LnpDHxZ7yi5DYXNojIfxPIDyZgJK0NYgFi5E0iKCBJ9KNulzIWDqLve
 Llm0x8xA3VPBbxXeF4OZQ4w1IeTmwGEXOSnIlGIUmaouoPFpyxt8Ex8FKPlEBblB
 Ke+fFwAIZFYHnhJVXVHN
 =MpZ0
 -----END PGP SIGNATURE-----

Merge tag 'hi6220-dt-for-4.7' of git://github.com/hisilicon/linux-hisi into next/dt64

Pull "ARM64: DT: Hisilicon Hi6220 soc and hikey board updates for 4.7" from Wei Xu

- Reserve memory regions for Hi6220
- Add sp804 timer node for Hi6220
- Add cpu and cluster level's low power state for Hi6220
- Add gpio configuration nodes for Hi6220
- Add pinctrl configuration nodes for Hi6220
- Add spi related nodes for Hi6220
- Add i2c nodes for Hi6220
- Add i2c nodes to work with mezzanine boards
- Add usb nodes for Hi6220
- Add mailobx node for Hi6220
- Add SRAM node and stub clock node for Hi6220
- Add pinctrl nodes for uarts and enable them
- Add LED nodes for hi6220-hikey board
- Add hi655x pmic node for Hi6220
- Add dwmmc nodes for Hi6220
- Add wifi nodes support for Hi6220-Hikey board
- Register thermal sensor for Hi6220
- Register Hi6220's thermal zone for power allocator
- Add L2 cache topology for Hi6220

* tag 'hi6220-dt-for-4.7' of git://github.com/hisilicon/linux-hisi:
  arm64: dts: Add L2 cache topology to Hi6220
  arm64: dts: register Hi6220's thermal zone for power allocator
  arm64: dts: register Hi6220's thermal sensor
  arm64: dts: add wifi nodes support for hi6220-hikey
  arm64: dts: add dwmmc nodes for hi6220
  arm64: dts: hikey: Add hi655x pmic dts node
  arm64: dts: add LED nodes for hi6220-hikey
  arm64: dts: hi6220: add pinctrl for uarts and enable them
  arm64: dts: add Hi6220's stub clock node
  arm64: dts: add mailbox node for Hi6220
  arm64: dts: Add hi6220 usb node
  arm64: dts: hikey: enable i2c0 and i2c1 for working with mezzanine boards
  arm64: dts: add all hi6220 i2c nodes
  arm64: dts: add Hi6220 spi configuration nodes
  arm64: dts: add Hi6220 pinctrl configuration nodes
  arm64: dts: Add Hi6220 gpio configuration nodes
  arm64: dts: enable idle states for Hi6220
  arm64: dts: add sp804 timer node for Hi6220
  arm64: dts: Reserve memory regions for hi6220
2016-04-25 22:51:50 +02:00
Arnd Bergmann
408e8fc8fc ARMv8 Juno DT updates for v4.7
Just one update: Support for external expansion bus useful for
 additional hardware e.g.LogicTile Express daughterboards (Brian Starkey)
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABCAAGBQJXERe6AAoJEABBurwxfuKYC3AP/AylITCQ6rtpULmu/zY/ghfi
 lbMe1ffX8vo8S2G51ytO9Ko6j929t7d8lN69h/c18fhnWKNFv1NMKW2lJyVg4PlR
 yqc2yPsQ0Ypr/f57zvnug38MBX8ugn9RGC0f075FNFIOdFqtnalziP8VTLuaJWj6
 CXZBgUdKlEG0J077LkK+07W4OnLSvu9rt+qA+jyFrTxJNIK21y4WjPPhL13KDNjK
 xSfvsy0HnMdjBe60PsW21mhkdX7ya5qaON1KA556oWEkFjPPbQ9Ur/sprZXbP3i1
 MphyxJoZJd94Rkffvv4IjmbujVrYogjcoYM0NNtu50g9gDVE1sO62Ynv50AEBn31
 zUEKiD0VmP9qrMWTkTxTSOzFgV+6Rk9DE90VQxJhzTU7pxQq8WFanGVKDHmWQjJg
 egpTuzbR1sMd9CQAzIPMXMTSQZf6qrK/LZvb0/tVGt6/3fQ/Ru/urvl7UdUK3yn/
 ehsox7yKJ9cEqFVlOakFlcBmzQ8B57f7eKzSQpu0lWkQ5CRSacWY2xqT/9DiIi3u
 1BVpYnHFQyhBlBD00KFTSW7V4ZBi6493uXqugmmcaqGCTWaEA02qvUSi9dZhLJPs
 UeU2I+lR5kQCYlL74jc0T4Mtw4fjIZv28K/WYgJ6TuheLoLcnim7b0+qHQ1YUKvX
 77LHQ1nGTzXCL8QGrQtd
 =ypy7
 -----END PGP SIGNATURE-----

Merge tag 'juno-for-v4.7/dt-updates' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/dt64

Pull "ARMv8 Juno DT updates for v4.7" from Sudeep Holla:

Just one update: Support for external expansion bus useful for
additional hardware e.g.LogicTile Express daughterboards (Brian Starkey)

* tag 'juno-for-v4.7/dt-updates' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
  arm64: dts: juno: Add external expansion bus to DT
2016-04-25 22:50:23 +02:00
Arnd Bergmann
a845167df0 arm64: tegra: Changes for v4.7-rc1
A couple of cleanups and fixes to various device trees, enable power and
 volume keys on Jetson TX1, use stdout-path to define the serial port (so
 it doesn't have to be specified on the kernel command-line) and add
 Google Pixel C (a.k.a. Smaug) support.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABCAAGBQJXEP0aAAoJEN0jrNd/PrOhU0QQALq45NK5/CoX52YcSuAf/sT/
 JzcZ7lPPncIP7pc9ya/9pJZ31i5OsTAawoQY0sRHhyXaDhsEOeKs1z6GOYMtkdqw
 JL6sn4f/+p2X8+SEP6p37jUpyhSw7Dtz8b2R6tqYEpoBxztlDTZmSEzq1ix5GDkh
 X5ZtaULpqnvn04cxD/MR/2aQRl271lB8aluJTCWllpWEawNyCm2UyytJdnAJK2tT
 QN0GRs9gtliOuDeeJkCW7/BUY3ejKvqtEqMJSlCSHlgE6SL+WJ/8N0APewXgAKOq
 puXu7NL53vlZgn9B6LyA4SyLZoL/Kfus1MnZyWC+p28bY9vVz+FGv0n6rylSh0Vp
 ocGCgyrDob4Y3oio47UPUiQ6ffKsgS8+CTpkte1Gt43Ux1Fyjd1t6NDX1yNU4liY
 vOTaVEzntEB1BRoSLLAOPWIkSdSmJ6B+/ZbWnezmjFl/2XUKSybBa8SoSBFXhXPw
 lJc0ngj4ylk2QVS40fBItq3/vx4u4DFOg33tHxnhdZ1eQ38ZKwPQ+jH9YnruWZpj
 qu4trci6GgQPnH/06lQf4FeRyJ56jD+8iQXwW3hAz5DEE8uGdkawFo7evFsIgbn5
 ZHDsLhABhCiH1y1s4At71XxSN+Jg3LYsUEKggU4KD1gxD3oi/ELGT3jT44HXx0pv
 Jqz/3/BG7tEkNcpBZebN
 =2hlL
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-4.7-arm64' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt64

Merge "arm64: tegra: Changes for v4.7-rc1" from Thierry Reding

A couple of cleanups and fixes to various device trees, enable power and
volume keys on Jetson TX1, use stdout-path to define the serial port (so
it doesn't have to be specified on the kernel command-line) and add
Google Pixel C (a.k.a. Smaug) support.

* tag 'tegra-for-4.7-arm64' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  arm64: tegra: Enable cros-ec and charger on Smaug
  arm64: tegra: Add pinmux for Smaug board
  arm64: tegra: Add stdout-path for various boards
  arm64: tegra: Remove unused #power-domain-cells property
  arm64: tegra: Add gpio-keys nodes for Smaug
  arm64: tegra: Enable power and volume keys on Jetson TX1
  arm64: tegra: Add support for Google Pixel C
  arm64: tegra: Replace legacy *,wakeup property with wakeup-source
  arm64: tegra: Fix copy/paste typo in several DTS includes
  arm64: tegra: Remove 0, prefix from unit-addresses
2016-04-25 22:48:51 +02:00