Commit Graph

79372 Commits

Author SHA1 Message Date
Gurchetan Singh
8d6b006e1f drm/virtio: implement context init: handle VIRTGPU_CONTEXT_PARAM_POLL_RINGS_MASK
For the Sommelier guest Wayland proxy, it's desirable for the
DRM fd to be pollable in response to an host compositor event.
This can also be used by the 3D driver to poll events on a CPU
timeline.

This enables the DRM fd associated with a particular 3D context
to be polled independent of KMS events.  The parameter
VIRTGPU_CONTEXT_PARAM_POLL_RINGS_MASK specifies the pollable
rings.

Signed-off-by: Gurchetan Singh <gurchetansingh@chromium.org>
Acked-by: Nicholas Verne <nverne@chromium.org>
Link: http://patchwork.freedesktop.org/patch/msgid/20210921232024.817-11-gurchetansingh@chromium.org
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2021-09-29 09:22:31 +02:00
Gurchetan Singh
85c83ea915 drm/virtio: implement context init: allocate an array of fence contexts
We don't want fences from different 3D contexts (virgl, gfxstream,
venus) to be on the same timeline.  With explicit context creation,
we can specify the number of ring each context wants.

Execbuffer can specify which ring to use.

Signed-off-by: Gurchetan Singh <gurchetansingh@chromium.org>
Acked-by: Lingfeng Yang <lfy@google.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20210921232024.817-10-gurchetansingh@chromium.org
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2021-09-29 09:22:31 +02:00
Gurchetan Singh
bbf588d7d4 drm/virtio: implement context init: stop using drv->context when creating fence
The plumbing is all here to do this.  Since we always use the
default fence context when allocating a fence, this makes no
functional difference.

We can't process just the largest fence id anymore, since it's
it's associated with different timelines.  It's fine for fence_id
260 to signal before 259.  As such, process each fence_id
individually.

Signed-off-by: Gurchetan Singh <gurchetansingh@chromium.org>
Acked-by: Lingfeng Yang <lfy@google.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20210921232024.817-9-gurchetansingh@chromium.org
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2021-09-29 09:22:31 +02:00
Gurchetan Singh
e8b6e76f69 drm/virtio: implement context init: plumb {base_fence_ctx, ring_idx} to virtio_gpu_fence_alloc
These were defined in the previous commit. We'll need these
parameters when allocating a dma_fence.  The use case for this
is multiple synchronizations timelines.

The maximum number of timelines per 3D instance will be 32. Usually,
only 2 are needed -- one for CPU commands, and another for GPU
commands.

As such, we'll need to specify these parameters when allocating a
dma_fence.

vgdev->fence_drv.context is the "default" fence context for 2D mode
and old userspace.

Signed-off-by: Gurchetan Singh <gurchetansingh@chromium.org>
Acked-by: Lingfeng Yang <lfy@google.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20210921232024.817-8-gurchetansingh@chromium.org
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2021-09-29 09:22:30 +02:00
Gurchetan Singh
7547675b84 drm/virtio: implement context init: track {ring_idx, emit_fence_info} in virtio_gpu_fence
Each fence should be associated with a [fence ID, fence_context,
seqno].  The seqno number is just the fence id.

To get the fence context, we add the ring_idx to the 3D context's
base_fence_ctx.  The ring_idx is between 0 and 31, inclusive.

Each 3D context will have it's own base_fence_ctx. The ring_idx will
be emitted to host userspace, when emit_fence_info is true.

Signed-off-by: Gurchetan Singh <gurchetansingh@chromium.org>
Acked-by: Lingfeng Yang <lfy@google.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20210921232024.817-7-gurchetansingh@chromium.org
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2021-09-29 09:22:30 +02:00
Anthoine Bourgeois
4fb530e5ca drm/virtio: implement context init: support init ioctl
This implements the context initialization ioctl.  A list of params
is passed in by userspace, and kernel driver validates them.  The
only currently supported param is VIRTGPU_CONTEXT_PARAM_CAPSET_ID.

If the context has already been initialized, -EEXIST is returned.
This happens after Linux userspace does dumb_create + followed by
opening the Mesa virgl driver with the same virtgpu instance.

However, for most applications, 3D contexts will be explicitly
initialized when the feature is available.

Signed-off-by: Anthoine Bourgeois <anthoine.bourgeois@gmail.com>
Acked-by: Lingfeng Yang <lfy@google.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20210921232024.817-6-gurchetansingh@chromium.org
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2021-09-29 09:22:30 +02:00
Anthoine Bourgeois
6198770a1f drm/virtio: implement context init: probe for feature
Let's probe for VIRTIO_GPU_F_CONTEXT_INIT.

Create a new DRM_INFO(..) line since the current one is getting
too long.

Signed-off-by: Anthoine Bourgeois <anthoine.bourgeois@gmail.com>
Acked-by: Lingfeng Yang <lfy@google.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20210921232024.817-5-gurchetansingh@chromium.org
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2021-09-29 09:22:30 +02:00
Gurchetan Singh
1925d6a7e0 drm/virtio: implement context init: track valid capabilities in a mask
The valid capability IDs are between 1 to 63, and defined in the
virtio gpu spec.  This is used for error checking the subsequent
patches.  We're currently only using 2 capability IDs, so this
should be plenty for the immediate future.

Signed-off-by: Gurchetan Singh <gurchetansingh@chromium.org>
Acked-by: Lingfeng Yang <lfy@google.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20210921232024.817-4-gurchetansingh@chromium.org
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2021-09-29 09:22:30 +02:00
Dave Airlie
dde98a573c drm/i915: constify display wm vtable
Use a nop table for the cases where CxSR doesn't init properly.

v2: use a nop table (Jani)

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/bb0658d14afd02cca692cd58223800f68f4ff4ce.1632869550.git.jani.nikula@intel.com
2021-09-29 09:29:03 +03:00
Dave Airlie
eba4b7960f drm/i915: constify clock gating init vtable.
I used a macro to avoid making any really silly mistakes here.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/7c97f7e5ab0eae3c4cd7ce8344254356c34f3ad6.1632869550.git.jani.nikula@intel.com
2021-09-29 09:29:00 +03:00
Dave Airlie
d28c2f5c23 drm/i915: constify display function vtable
Make nice clear tables instead of having things in two places.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/d0f7e2c792dc40804555d26b6ede62f4bd2f23d6.1632869550.git.jani.nikula@intel.com
2021-09-29 09:28:58 +03:00
Dave Airlie
cbc7617af0 drm/i915: drop unused function ptr and comments.
There was some excess comments and an unused vtbl ptr.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/573a9366d33e2b7bd7b8215af614f03f3e562926.1632869550.git.jani.nikula@intel.com
2021-09-29 09:28:56 +03:00
Dave Airlie
6b4cd9cba6 drm/i915: constify the cdclk vtable
This is a bit of a twisty one since each platform is slightly
different, so might take some more review care.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/75e0139b28cca9ceff77de72c3ef737c101255ba.1632869550.git.jani.nikula@intel.com
2021-09-29 09:28:53 +03:00
Dave Airlie
a73477f881 drm/i915: constify the dpll clock vtable
Most the dpll vtable into read-only memory.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/0414a27317de3f335a8453a29486b746aa6862e7.1632869550.git.jani.nikula@intel.com
2021-09-29 09:28:50 +03:00
Dave Airlie
0a108bca94 drm/i915: constify the audio function vtable
Move the functions into read-only tables.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/5a481307a5daab40a506c3b9a64b0b37e01a1a41.1632869550.git.jani.nikula@intel.com
2021-09-29 09:28:47 +03:00
Dave Airlie
c6d2704655 drm/i915: constify color function vtable.
This clarifies quite well what functions get used on what platforms
instead of having to decipher the old tree.

v2: fixed IVB mistake (Jani)

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/49e46e61206d4fdcf08fb5dc1978da3fce702134.1632869550.git.jani.nikula@intel.com
2021-09-29 09:28:42 +03:00
Dave Airlie
cd030c7c11 drm/i915: constify hotplug function vtable.
Use a macro to avoid mistakes, this type of macro is only used
in a couple of places.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/af229c1e8ec894f177b344ab77b90e32c33428de.1632869550.git.jani.nikula@intel.com
2021-09-29 09:28:39 +03:00
Dave Airlie
1c55b1e063 drm/i915: constify fdi link training vtable
Put the vtable into ro memory.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/ec4687956f9b98024fea55b2f0ed1e192e244ff1.1632869550.git.jani.nikula@intel.com
2021-09-29 09:28:37 +03:00
Dave Airlie
903f3806f3 drm/i915: split the dpll clock compute out from display vtable.
this single function might be possible to merge later, but
for now it's simple to just split it out.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/ba570aa10b694b2e8640e0c58430fd0053c306b7.1632869550.git.jani.nikula@intel.com
2021-09-29 09:10:41 +03:00
Dave Airlie
5c8c179bca drm/i915: split fdi link training from display vtable.
It may make sense to merge this with display again later,
however the fdi use of the vtable is limited to only a
few generations.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/7af7359b6cec33bd2d32152893d9a1e8f8cf7f21.1632869550.git.jani.nikula@intel.com
2021-09-29 09:10:39 +03:00
Dave Airlie
de1677c5e3 drm/i915: split irq hotplug function from display vtable
This provide a service from irq to display, so make it separate

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/05f533064709764dff8bcfef6a58f9a8482dc5bb.1632869550.git.jani.nikula@intel.com
2021-09-29 09:10:36 +03:00
Dave Airlie
89ac34c14d drm/i915: split cdclk functions from display vtable.
This moves all the cdclk related functions into their own vtable.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/591b7b6a79c4ab644a161ae00b7d630b3ef16434.1632869550.git.jani.nikula@intel.com
2021-09-29 09:10:33 +03:00
Dave Airlie
7b75709ac8 drm/i915: split audio functions from display vtable
These are only used internally in the audio code

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/d12257cc7685a9b52618f7da444ba1fc8848b4db.1632869550.git.jani.nikula@intel.com
2021-09-29 09:10:31 +03:00
Dave Airlie
082800ab52 drm/i915: split color functions from display vtable
These are only used internally in the color module

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/084a31362f1621d2f556069bb2bc47d362a63823.1632869550.git.jani.nikula@intel.com
2021-09-29 09:10:28 +03:00
Dave Airlie
27057882f6 drm/i915: split watermark vfuncs from display vtable.
These are the watermark api between display and pm.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/7130356324ef3de59b4e913f025d7dce822157ee.1632869550.git.jani.nikula@intel.com
2021-09-29 08:58:53 +03:00
Dave Airlie
46d8e4a1da drm/i915: split clock gating init from display vtable
This function is only used inside intel_pm.c

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/95d626a7329ab5779804762894e304e12c6dbe1f.1632869550.git.jani.nikula@intel.com
2021-09-29 08:58:50 +03:00
Dave Airlie
4360a2b54f drm/i915/display: add intel_fdi_link_train wrapper.
This wraps the fdi link training vfunc to make it clearer.

Suggested by Jani.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1bb978bcb6f16fbdaf08f2800a179b774525b59e.1632869550.git.jani.nikula@intel.com
2021-09-29 08:58:46 +03:00
Dave Airlie
44892ffafa drm/i915: add wrappers around cdclk vtable funcs.
This adds wrappers around all the vtable callers so they are in
one place.

Suggested by Jani.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/c3dd7aaad039e76acde9dda7211468907aa657c0.1632869550.git.jani.nikula@intel.com
2021-09-29 08:58:39 +03:00
Dave Airlie
02a1a6351e drm/i915/wm: provide wrappers around watermark vfuncs calls (v3)
This moves one wrapper from the pm->display side, and creates
wrappers for all the others, this should simplify things later.

One thing to note is that the code checks the existence of some
of these ptrs, so the wrappers are a bit complicated by that.

Suggested by Jani.

v2: fixup warnings in wrong place error.

v3 by Jani: fix intel_compute_global_watermarks() return value check

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/ee2760c45896568c9dd9114a575509619bd44ef2.1632869550.git.jani.nikula@intel.com
2021-09-29 08:53:57 +03:00
Dave Airlie
ef9c66a0ae drm/i915: make update_wm take a dev_priv.
The crtc was never being used here.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/70438bface47fa683cda8a9e95d0556fca448172.1632869550.git.jani.nikula@intel.com
2021-09-29 08:27:35 +03:00
Dave Airlie
758b2fc266 drm/i915/pm: drop get_fifo_size vfunc.
The i845_update_wm code was always calling the i845 variant,
and the i9xx_update_wm had only a choice between i830 and i9xx
paths, hardly worth the vfunc overhead.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/07523b1e46cd10adb2991ed4d2619b542a48c1ce.1632869550.git.jani.nikula@intel.com
2021-09-29 08:27:33 +03:00
Dave Airlie
5716c8c6f4 drm/i915/uncore: split the fw get function into separate vfunc
constify it while here. drop the put function since it was never
overloaded and always has done the same thing, no point in
indirecting it for show.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/41c3e1896162fc08e22e40b00642791365a8c00e.1632869550.git.jani.nikula@intel.com
2021-09-29 08:27:30 +03:00
Prike Liang
26db706a6d drm/amdgpu: force exit gfxoff on sdma resume for rmb s0ix
In the s2idle stress test sdma resume fail occasionally,in the
failed case GPU is in the gfxoff state.This issue may introduce
by firmware miss handle doorbell S/R and now temporary fix the issue
by forcing exit gfxoff for sdma resume.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2021-09-28 14:40:27 -04:00
Simon Ser
98122e63a7 drm/amdgpu: check tiling flags when creating FB on GFX8-
On GFX9+, format modifiers are always enabled and ensure the
frame-buffers can be scanned out at ADDFB2 time.

On GFX8-, format modifiers are not supported and no other check
is performed. This means ADDFB2 IOCTLs will succeed even if the
tiling isn't supported for scan-out, and will result in garbage
displayed on screen [1].

Fix this by adding a check for tiling flags for GFX8 and older.
The check is taken from radeonsi in Mesa (see how is_displayable
is populated in gfx6_compute_surface).

Changes in v2: use drm_WARN_ONCE instead of drm_WARN (Michel)

[1]: https://github.com/swaywm/wlroots/issues/3185

Signed-off-by: Simon Ser <contact@emersion.fr>
Acked-by: Michel Dänzer <mdaenzer@redhat.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Harry Wentland <hwentlan@amd.com>
Cc: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Cc: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2021-09-28 14:40:19 -04:00
Charlene Liu
d942856865 drm/amd/display: Pass PCI deviceid into DC
[why]
pci deviceid not passed to dal dc, without proper break,
dcn2.x falls into dcn3.x code path

[how]
pass in pci deviceid, and break once dal_version initialized.

Reviewed-by: Zhan Liu <Zhan.Liu@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Signed-off-by: Charlene Liu <Charlene.Liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2021-09-28 14:39:54 -04:00
Josip Pavic
467a51b69d drm/amd/display: initialize backlight_ramping_override to false
[Why]
Stack variable params.backlight_ramping_override is uninitialized, so it
contains junk data

[How]
Initialize the variable to false

Reviewed-by: Roman Li <Roman.Li@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Signed-off-by: Josip Pavic <Josip.Pavic@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2021-09-28 14:39:40 -04:00
Hawking Zhang
9f52c25f59 drm/amdgpu: correct initial cp_hqd_quantum for gfx9
didn't read the value of mmCP_HQD_QUANTUM from correct
register offset

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Le Ma <Le.Ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2021-09-28 14:39:29 -04:00
Praful Swarnakar
083fa05bba drm/amd/display: Fix Display Flicker on embedded panels
[Why]
ASSR is dependent on Signed PSP Verstage to enable Content
Protection for eDP panels. Unsigned PSP verstage is used
during development phase causing ASSR to FAIL.
As a result, link training is performed with
DP_PANEL_MODE_DEFAULT instead of DP_PANEL_MODE_EDP for
eDP panels that causes display flicker on some panels.

[How]
- Do not change panel mode, if ASSR is disabled
- Just report and continue to perform eDP link training
with right settings further.

Signed-off-by: Praful Swarnakar <Praful.Swarnakar@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2021-09-28 14:39:12 -04:00
Leslie Shi
66805763a9 drm/amdgpu: fix gart.bo pin_count leak
gmc_v{9,10}_0_gart_disable() isn't called matched with
correspoding gart_enbale function in SRIOV case. This will
lead to gart.bo pin_count leak on driver unload.

Cc: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Leslie Shi <Yuliang.Shi@amd.com>
Signed-off-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-09-28 14:38:16 -04:00
yangcong
93ee1a2c0f drm/panel: support for BOE and INX video mode panel
Support for these two panels fits in nicely with the existing
panel-boe-tv101wum-nl6 driver as suggested by Sam [1].
This is an incell IC, TDDI use time division multiplexing.
Init code effect touch sensing.The main things
we needed to handle were:
a) These panels need slightly longer delays in two places. Since these
new delays aren't much longer, let's just unconditionally increase
them for the driver.
b) These panel use video BURST mode

[1] https://lore.kernel.org/r/YSPAseE6WD8dDRuz@ravnborg.org/

Signed-off-by: yangcong <yangcong5@huaqin.corp-partner.google.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
[dianders: fix whitespace issues reported by dim apply-branch]
[dianders: inx,=>innolux,]
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210914032252.3770756-4-yangcong5@huaqin.corp-partner.google.com
2021-09-28 09:31:33 -07:00
yangcong
18c58153b8 drm/panel: boe-tv101wum-nl6: Support enabling a 3.3V rail
The auo,b101uan08.3 panel (already supported by this driver) has
a 3.3V rail that needs to be turned on. For previous users of
this panel this voltage was directly output by pmic. On a new
user (the not-yet-upstream sc7180-trogdor-mrbland board) we need
to turn the 3.3V rail on. Add support in the driver for this.

Signed-off-by: yangcong <yangcong5@huaqin.corp-partner.google.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210914032252.3770756-2-yangcong5@huaqin.corp-partner.google.com
2021-09-28 09:22:43 -07:00
Qingqing Zhuo
87e9585b36 drm/amd/display: Replace referral of dal with dc
[Why]
DC should be used in place of DAL in
upstream.

[How]
Replace dal with dc in function names.

Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-09-28 09:30:13 -04:00
Aric Cyr
487ac89fee drm/amd/display: 3.2.155
This version brings along following fixes:
- Fixes to backlight, LUT, PPS, MST
- Use correct vpg for 128b/132b encoding
- Improved logging for VCP
- Replace referral of dal with dc

Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-09-28 09:30:13 -04:00
Anthony Koo
14431f3b7c drm/amd/display: [FW Promotion] Release 0.0.86
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-09-28 09:30:13 -04:00
Oliver Logush
8673b8dc89 drm/amd/display: Add an extra check for dcn10 OPTC data format
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Signed-off-by: Oliver Logush <oliver.logush@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-09-28 09:30:12 -04:00
Ilya
7596936260 drm/amd/display: Add PPS immediate update flag for DCN2
[Why]
This change is needed for DCN2 to make use of the immediate_update
flag. With this flag, update to PPS will be immediate, rather than
always taking place on dig_update signal.

[How]
Set AFMT_GENERIC7_FRAME/IMMEDIATE_UPDATE bits depending on flag
value.

Reviewed-by: Wenjing Liu <wenjing.liu@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Signed-off-by: Ilya <Ilya.Bakoulin@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-09-28 09:30:12 -04:00
Jimmy Kizito
43dc2ad561 drm/amd/display: Fix MST link encoder availability check.
[Why]
MST streams share the same link and should share the same encoder.
The current availability check may erroneously determine that an
encoder is unavailable for MST streams.

[How]
When checking for link encoder availability, check if an encoder
in use shares a link with the stream for which the availability
check is being conducted. If the link is shared, then the link
encoder should be shared too and will be deemed available.

Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Signed-off-by: Jimmy Kizito <Jimmy.Kizito@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-09-28 09:30:11 -04:00
Meenakshikumar Somasundaram
e3ab29aa8c drm/amd/display: Fix for link encoder access for MST.
[Why]
Link encoder in the link could be null for certain links.

[How]
If link encoder in the link is null then get the link encoder
from the stream.

Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Signed-off-by: Meenakshikumar Somasundaram <meenakshikumar.somasundaram@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-09-28 09:30:11 -04:00
Wenjing Liu
f6e54f0643 drm/amd/display: add function to convert hw to dpcd lane settings
[why]
Unify the code which handles the conversion between hw lane setting
and dpcd lane setting.

v2: squash in unused variable fixes (Alex)

Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-09-28 09:30:10 -04:00
Wenjing Liu
52dffe2fc1 drm/amd/display: update cur_lane_setting to an array one for each lane
[why]
To support per lane lane setting adjustment, we need to change cur_lane_setting
to an array one for each lane as the first step.

Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-09-28 09:30:10 -04:00