Commit Graph

15 Commits

Author SHA1 Message Date
Jean-Christophe PLAGNIOL-VILLARD
e9f68b5cc6 ARM: at91: make rstc soc independent
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-01-20 17:22:38 +01:00
Jean-Christophe PLAGNIOL-VILLARD
be6d432172 ARM: at91: make aic soc independent
on all at91 have the Advanced Interrupt Controller starts at address
0xfffff000

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2011-11-28 22:50:39 +08:00
Jean-Christophe PLAGNIOL-VILLARD
13079a7333 ARM: at91: make DBGU soc independent
we will select now the DBGU used by the soc at Kconfig level

For the DEBUG_LL and early_printk this will allow to select which DBGU to use
this will also allow to select them when multiple SOC are enabled

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2011-11-28 22:50:39 +08:00
Jean-Christophe PLAGNIOL-VILLARD
c1c30a29df ARM: at91: make watchdog drivers soc independent
switch the watchdog drivers to resource and pass it via platform_device

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
2011-11-28 22:50:39 +08:00
Jean-Christophe PLAGNIOL-VILLARD
f22deee523 ARM: at91: make shutdown controler soc independent
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2011-11-28 22:50:38 +08:00
Jean-Christophe PLAGNIOL-VILLARD
f466f3bc92 ARM: at91: drop CCFG
never used in the kernel

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2011-11-28 22:50:38 +08:00
Jean-Christophe PLAGNIOL-VILLARD
faee0cc33c ARM: at91: make smc register base soc independent
now sam9_smc_configure will take as first parameter is the SMC id

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2011-11-28 22:50:38 +08:00
Jean-Christophe PLAGNIOL-VILLARD
4ab0c5998d ARM: at91: make pit register base soc independent
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2011-11-28 22:50:38 +08:00
Jean-Christophe PLAGNIOL-VILLARD
eab5fd67d6 ARM: at91: make rtt register base soc independant
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2011-11-28 22:50:38 +08:00
Jean-Christophe PLAGNIOL-VILLARD
d28edd1bc4 ARM: at91: make ecc register base soc independant
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2011-11-28 22:50:37 +08:00
Jean-Christophe PLAGNIOL-VILLARD
80e91cb802 ARM: at91: make gpio register base soc independant
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Reviewed-by: Ryan Mallon <rmallon@gmail.com>
2011-11-28 22:50:37 +08:00
Jean-Christophe PLAGNIOL-VILLARD
21d08b9d55 at91: introduce commom AT91_BASE_SYS
On all at91 except rm9200 and x40 have the System Controller starts
at address 0xffffc000 and has a size of 16KiB.

On rm9200 it's start at 0xfffe4000 of 111KiB with non reserved data starting
at 0xfffff000

This patch removes the individual definitions of AT91_BASE_SYS and
replaces them with a common version at base 0xfffffc000 and size 16KiB
and map the same memory space

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-07-28 15:07:28 +00:00
Jean-Christophe PLAGNIOL-VILLARD
ee2e35015d at91: factorize common irq ID
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
Cc: Andrew Victor <linux@maxim.org.za>
2011-05-25 23:04:34 +08:00
Nicolas Ferre
7dca3343fc ARM: 6185/1: AT91: PM: dual ram controller support
This rework allows to address tow memory controllers. AT91SAM9263 and
AT91SAM9G45 family have tow SDRAM or DDR/SDRAM controllers. Power management
should take care of this.
This patch modify the way RAM IP header files are implemented to allow
access to registers of both controllers ; it also adds some macros.

We also modify the power management files to use those modified header files.
Slow clock (assembly) and regular power management functions are synchronized
for setting of RAM self-refresh procedure:
(lpr & ~AT91_DDRSDRC_LPCB) | AT91_DDRSDRC_LPCB_SELF_REFRESH

Note that AT91RM9200 is not impacted by this modification.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-09 12:31:50 +01:00
Russell King
a09e64fbc0 [ARM] Move include/asm-arm/arch-* to arch/arm/*/include/mach
This just leaves include/asm-arm/plat-* to deal with.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-08-07 09:55:48 +01:00