Commit Graph

8 Commits

Author SHA1 Message Date
Douglas Anderson
84752e8d8a clk: rockchip: fix the rk3399 sdmmc sample / drv name
The rk3399 clock table had a simple typo in it, calling the SDMMC sample
and drive clocks by the wrong name.  Fix this minor typo.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Tested-by: Brian Norris <briannorris@chromium.org>
Acked-by: Brian Norris <briannorris@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-05-08 22:40:32 +02:00
Xing Zheng
fd8bc82933 clk: rockchip: fix the rk3399 cifout clock
The cifout clock is incorrect due to the manual error, we need to
fix it.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-04-25 22:54:51 +02:00
Xing Zheng
50961e8314 clk: rockchip: drop unnecessary CLK_IGNORE_UNUSED flags from rk3399
We don't need to many clocks enable after startup, to reduce some
power consumption.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-04-25 22:52:26 +02:00
Xing Zheng
aa2897ceb7 clk: rockchip: add some frequencies on the rk3399 PLL table
This patch add some necessary frequencies for the RK3399 clock.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-04-25 22:51:21 +02:00
Xing Zheng
3f92a05440 clk: rockchip: assign more necessary rk3399 clock ids
Assign newly added clock ids.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-04-25 22:49:13 +02:00
Xing Zheng
f3d40914d3 clk: rockchip: fix the gate bit for i2c4 and i2c8 on rk3399
The gate bits of the i2c4 and i2c8 are incorrect due to the manual
error, we need to fix them.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-04-25 21:52:32 +02:00
Heiko Stuebner
995d3fdeb2 clk: rockchip: reign in some overly long lines in the rk3399 controller
We allow overlong lines in the array portitions describing the clock
trees to ease readability by having each element always at the same
position. But the rest of the code should honor the 80 char limit.

Fix the newly added rk3399 clock code to respect that.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-04-19 21:07:01 +02:00
Xing Zheng
115510053e clk: rockchip: add clock controller for the RK3399
Add the clock tree definition for the new RK3399 SoC.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-03-28 14:57:07 +02:00