These patches fixup or update for rockchip i2s.
Changes in v3:
- Drop property 'rockchip,playback-only', 'rockchip,capture-only'.
Implement it by 'dma-names' of DT instead.
Changes in v2:
- split property trcm into single 'trcm-sync-tx-only' and
'trcm-sync-rx-only' suggested by Nicolas.
- split property trcm into single 'trcm-sync-tx-only' and
'trcm-sync-rx-only' suggested by Nicolas.
- drop change-id
Sugar Zhang (12):
ASoC: rockchip: i2s: Add support for set bclk ratio
ASoC: rockchip: i2s: Fixup clk div error
ASoC: rockchip: i2s: Improve dma data transfer efficiency
ASoC: rockchip: i2s: Fix regmap_ops hang
ASoC: rockchip: i2s: Fix concurrency between tx/rx
ASoC: rockchip: i2s: Reset the controller if soft reset failed
ASoC: dt-bindings: rockchip: Document reset property for i2s
ASoC: rockchip: i2s: Make playback/capture optional
ASoC: rockchip: i2s: Add compatible for more SoCs
ASoC: dt-bindings: rockchip: Add compatible strings for more SoCs
ASoC: rockchip: i2s: Add support for frame inversion
ASoC: dt-bindings: rockchip: i2s: Document property TRCM
Xiaotan Luo (1):
ASoC: rockchip: i2s: Fixup config for DAIFMT_DSP_A/B
Xing Zheng (1):
ASoC: rockchip: i2s: Add support for TRCM property
.../devicetree/bindings/sound/rockchip-i2s.yaml | 19 ++
sound/soc/rockchip/rockchip_i2s.c | 278 +++++++++++++++------
sound/soc/rockchip/rockchip_i2s.h | 10 +-
3 files changed, 224 insertions(+), 83 deletions(-)
--
2.7.4
There are two independent PCIe controllers in MT2712 and MT7622
platform. Each of them should contain an independent MSI domain.
In old dts architecture, MSI domain will be inherited from the root
bridge, and all of the devices will share the same MSI domain.
Hence that, the PCIe devices will not work properly if the irq number
which required is more than 32.
Split the PCIe node for MT2712 and MT7622 platform to comply with
the hardware design and fix MSI issue.
Link: https://lore.kernel.org/r/20210823032800.1660-2-chuanjia.liu@mediatek.com
Signed-off-by: Chuanjia Liu <chuanjia.liu@mediatek.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh+dt@kernel.org>
Acked-by: Ryder Lee <ryder.lee@mediatek.com>
There are 4 USB controllers on MT8195, the controllers (IP1~IP3,
exclude IP0) have a wrong default SOF/ITP interval which is
calculated from the frame counter clock 24Mhz by default, but
in fact, the frame counter clock is 48Mhz, so we should set
the accurate interval according to 48Mhz. Here add a new compatible
for MT8195, it's also supported in driver. But the first controller
(IP0) has no such issue, we prefer to use generic compatible,
e.g. mt8192's compatible.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/1629189389-18779-2-git-send-email-chunfeng.yun@mediatek.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
LiteETH is a small footprint and configurable Ethernet core for FPGA
based system on chips.
The hardware is parametrised by the size and number of the slots in it's
receive and send buffers. These are described as properties, with the
commonly used values set as the default.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: David S. Miller <davem@davemloft.net>
Reset controller updates for v5.15
Add support for the SC7280 PDC Global and RZ/G2L USB/PHY reset
controllers, convert UniPhier glue device tree bindings to json-schema
and remove a leftover mention of ZTE zx2967 from Kconfig.
* tag 'reset-for-v5.15' of git://git.pengutronix.de/pza/linux:
reset: simple: remove ZTE details in Kconfig help
reset: renesas: Add RZ/G2L usbphy control driver
dt-bindings: reset: Document RZ/G2L USBPHY Control bindings
dt-bindings: reset: Convert UniPhier glue reset to json-schema
reset: qcom: Add PDC Global reset signals for WPSS
dt-bindings: reset: pdc: Add PDC Global bindings
dt-bindings: reset: aoss: Add AOSS reset controller binding
Link: https://lore.kernel.org/r/d42a75fc17ce718ef1b3fa4c5d3f5c7fb0bd2bc2.camel@pengutronix.de
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Yaml conversion of io-domain bindings and addition of
rk3568 io domains.
* tag 'v5.15-rockchip-driver1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
soc: rockchip: io-domain: Remove unneeded semicolon
soc: rockchip: io-domain: add rk3568 support
dt-bindings: power: add rk3568-pmu-io-domain support
dt-bindings: soc: rockchip: add rockchip-io-domain.yaml object to grf.yaml
dt-bindings: power: convert rockchip-io-domain.txt to YAML
soc: rockchip: ROCKCHIP_GRF should not default to y, unconditionally
Link: https://lore.kernel.org/r/9718620.EvYhyI6sBW@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
There are two methods to specify the location of the elf core headers:
using the "elfcorehdr=" kernel parameter, as handled by generic code in
kernel/crash_dump.c, or using the "linux,elfcorehdr" property under the
"/chosen" node in the Device Tree, as handled by architecture-specific
code in arch/arm64/mm/init.c.
Extend support for "linux,elfcorehdr" to all platforms supporting DT by
adding platform-agnostic handling for handling this property to the FDT
core code. This can co-exist safely with the architecture-specific
handling, until the latter has been removed.
This requires moving the call to of_scan_flat_dt() up, as the code
scanning the "/chosen" node now needs to be aware of the values of
"#address-cells" and "#size-cells".
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/c7e46e50aaf87ef49bdaa61358d25b122f32b7df.1628670468.git.geert+renesas@glider.be
Vinod writes:
phy-for-5.15
- Updates:
- Yaml conversion for Freescale imx8mq usb phy, TI AM654 SERDES phy,
Cadence torrent phy
- Updates for Amlogic Meson8b-usb2 phy, Samsung ufs phy
- New support:
- UFS phy for Qualcomm SM6115
- PCIe & USB/DP phy for Qualcomm sc8180x
- USB3 PHY support for Qualcomm IPQ6018
- Renesas USB2.0 PHY for RZ/G2L
* tag 'phy-for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (45 commits)
phy: qcom-qmp: Add support for SM6115 UFS phy
dt-bindings: phy: qcom,qmp: Add SM6115 UFS PHY bindings
phy: qmp: Provide unique clock names for DP clocks
phy: xilinx: zynqmp: skip PHY initialization and PLL lock for USB
phy: amlogic: meson8b-usb2: don't log an error on -EPROBE_DEFER
phy: amlogic: meson8b-usb2: Power off the PHY by putting it into reset mode
phy: phy-mtk-mipi-dsi: convert to devm_platform_ioremap_resource
phy: phy-mtk-mipi-dsi: remove dummy assignment of error number
phy: phy-mtk-hdmi: convert to devm_platform_ioremap_resource
phy: phy-mtk-ufs: use clock bulk to get clocks
phy: phy-mtk-tphy: remove error log of ioremap failure
phy: phy-mtk-tphy: print error log using child device
phy: phy-mtk-tphy: support type switch by pericfg
phy: phy-mtk-tphy: use clock bulk to get clocks
dt-bindings: phy: mediatek: tphy: support type switch by pericfg
phy: cadence-torrent: Check PIPE mode PHY status to be ready for operation
phy: cadence-torrent: Add debug information for PHY configuration
phy: cadence-torrent: Add separate functions for reusable code
phy: cadence-torrent: Add PHY configuration for DP with 100MHz ref clock
phy: cadence-torrent: Add PHY registers for DP in array format
...
Georgi writes:
interconnect changes for 5.15
Here are changes for the 5.15-rc1 merge window consisting of interconnect
core and driver updates.
Framework change:
- Add sanity check to detect if node is already added to provider.
Driver changes:
- RPMh drivers probe function consolidation
- Add driver for SC8180x platforms
- Add support for SC8180x OSM L3
- Use driver-specific naming in OSM L3
Signed-off-by: Georgi Djakov <djakov@kernel.org>
* tag 'icc-5.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc:
interconnect: qcom: osm-l3: Use driver-specific naming
interconnect: qcom: osm-l3: Add sc8180x support
dt-bindings: interconnect: Add SC8180x to OSM L3 DT binding
interconnect: qcom: Add SC8180x providers
dt-bindings: interconnect: Add Qualcomm SC8180x DT bindings
interconnect: Sanity check that node isn't already on list
interconnect: qcom: icc-rpmh: Consolidate probe functions
Pull RISC-V fixes from Palmer Dabbelt:
- fix the sifive-l2-cache device tree bindings for json-schema
compatibility. This does not change the intended behavior of the
binding.
- avoid improperly freeing necessary resources during early boot.
* tag 'riscv-for-linus-5.14-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
riscv: Fix a number of free'd resources in init_resources()
dt-bindings: sifive-l2-cache: Fix 'select' matching
