3 Commits

Author	SHA1	Message	Date
Anup Patel	a3182c91ef	RISC-V: Access CSRs using CSR numbers ... We should prefer accessing CSRs using their CSR numbers because: 1. It compiles fine with older toolchains. 2. We can use latest CSR names in #define macro names of CSR numbers as-per RISC-V spec. 3. We can access newly added CSRs even if toolchain does not recognize newly addes CSRs by name. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	2019-05-16 20:42:11 -07:00
Christoph Hellwig	1125203c13	riscv: rename SR_* constants to match the spec ... Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	2018-01-07 15:14:39 -08:00
Palmer Dabbelt	6d60b6ee0c	RISC-V: Device, timer, IRQs, and the SBI ... This patch contains code that interfaces with devices that are mandated by the RISC-V supervisor specification and that don't have explicit drivers anywhere else in the tree. This includes the staticly defined interrupts, the CSR-mapped timer, and virtualized SBI devices. Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>	2017-09-26 15:26:47 -07:00