Commit Graph

141 Commits

Author SHA1 Message Date
Kefeng Wang
fcb321590c tty: amba-pl011: Add earlycon support for SBSA UART
Declare an OF early console for SBSA UART so that the early console device
can be specified via the "stdout-path" property in device-tree.

Cc: Russell King <linux@armlinux.org.uk>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-11-10 15:10:37 +01:00
Aleksey Makarov
10879ae5f1 serial: pl011: add console matching function
This patch adds function pl011_console_match() that implements
method match of struct console.  It allows to match consoles against
data specified in a string, for example taken from command line or
compiled by ACPI SPCR table handler.

This patch was merged to tty-next but then reverted because of
conflict with

commit 46e36683f4 ("serial: earlycon: Extend earlycon command line option to support 64-bit addresses")

Now it is fixed.

Signed-off-by: Aleksey Makarov <aleksey.makarov@linaro.org>
Reviewed-by: Peter Hurley <peter@hurleysoftware.com>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Tested-by: Christopher Covington <cov@codeaurora.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-10-27 16:27:23 +02:00
Greg Kroah-Hartman
08bf215900 Revert "serial: pl011: add console matching function"
This reverts commit 8b8f347d3a as it
causes build errors in linux-next

Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Cc: Aleksey Makarov <aleksey.makarov@linaro.org>
Cc: Peter Hurley <peter@hurleysoftware.com>
Cc: Russell King <rmk+kernel@armlinux.org.uk>
Cc: Christopher Covington <cov@codeaurora.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-09-30 07:46:35 +02:00
Aleksey Makarov
8b8f347d3a serial: pl011: add console matching function
This patch adds function pl011_console_match() that implements
method match of struct console.  It allows to match consoles against
data specified in a string, for example taken from command line or
compiled by ACPI SPCR table handler.

Signed-off-by: Aleksey Makarov <aleksey.makarov@linaro.org>
Reviewed-by: Peter Hurley <peter@hurleysoftware.com>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Tested-by: Christopher Covington <cov@codeaurora.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-09-28 17:46:57 +02:00
Kefeng Wang
35aa33cf0b tty: amba-pl011: Don't complain on -EPROBE_DEFER when no irq
Don't complain on -EPROBE_DEFER when attempting to get the irq.
the driver probe will be retried later.

Cc: Russell King <linux@armlinux.org.uk>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-09-27 12:57:16 +02:00
Shawn Guo
e06690bff6 tty: amba-pl011: uart_amba_port is not available with earlycon function
Commit 0e125a5fac ("tty: amba-pl011: define flag register bits for ZTE
device") changes earlycon function pl011_putc() to use a pointer to
uart_amba_port.  This causes a regression when earlycon is enabled,
because uart_amba_port is not available yet at earlycon time.  Let's
revert the change on pl011_putc() to fix the regression.

The earlycon support for ZTE device can probably be added later by
declaring a new earlycon setup function with a vendor specific
compatible.

Reported-by: Sudeep Holla <sudeep.holla@arm.com>
Fixes: 0e125a5fac ("tty: amba-pl011: define flag register bits for ZTE device")
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-09-22 11:45:08 +02:00
Shawn Guo
2426fbc77f tty: amba-pl011: probe ZTE device from AMBA bus with a pseudo-ID
There is no Peripheral Identification Registers on ZTE PL011 device, so
although the driver amba-pl011 is ready to work for ZTE device, the
device cannot be probed by the driver at all.

With arm,primecell-periphid DT bindings (bindings/arm/primecell.txt) in
place, it should be the cleanest the way to use a pseudo-ID to probe the
device from AMBA bus.  We create an unofficial vendor number
AMBA_VENDOR_LINUX, which will practically never become an official
vendor ID, and takes Configuration, Revision number, and Part number as
input to compose a pseudo-ID for ZTE device.

Also, since we start using vendor_zte to probe ZTE device, the
__maybe_unused for vendor_zte is removed.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-08-31 15:24:23 +02:00
Shawn Guo
9c267ddb41 tty: amba-pl011: add .get_fifosize for ZTE device
ZTE PL011 device has a fixed FIFO size 16.  Let's add a .get_fifosize
hook for it.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-08-31 15:24:23 +02:00
Shawn Guo
0e125a5fac tty: amba-pl011: define flag register bits for ZTE device
For some reason we do not really understand, ZTE hardware designers
choose to define PL011 Flag Register bit positions differently from
standard ones as below.

	Bit		Standard	ZTE
	-----------------------------------
	CTS		0		1
	DSR		1		3
	BUSY		3		8
	RI		8		0

Let's define these bits into vendor data and get ZTE PL011 supported
properly.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-08-31 15:24:23 +02:00
Jiri Slaby
394a9e2ca2 TTY: serial, handle platform_get_irq retval properly
platform_get_irq can fail, so we should handle negative value when
returned.

[v2]

platform_get_irq can actually return zero on some platforms. So do not
remove checks for irq == 0 there.

Signed-off-by: Jiri Slaby <jslaby@suse.cz>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: "Uwe Kleine-König" <kernel@pengutronix.de>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Laxman Dewangan <ldewangan@nvidia.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: linux-serial@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org
Cc: linux-tegra@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-06-25 09:01:52 -07:00
Arnd Bergmann
287980e49f remove lots of IS_ERR_VALUE abuses
Most users of IS_ERR_VALUE() in the kernel are wrong, as they
pass an 'int' into a function that takes an 'unsigned long'
argument. This happens to work because the type is sign-extended
on 64-bit architectures before it gets converted into an
unsigned type.

However, anything that passes an 'unsigned short' or 'unsigned int'
argument into IS_ERR_VALUE() is guaranteed to be broken, as are
8-bit integers and types that are wider than 'unsigned long'.

Andrzej Hajda has already fixed a lot of the worst abusers that
were causing actual bugs, but it would be nice to prevent any
users that are not passing 'unsigned long' arguments.

This patch changes all users of IS_ERR_VALUE() that I could find
on 32-bit ARM randconfig builds and x86 allmodconfig. For the
moment, this doesn't change the definition of IS_ERR_VALUE()
because there are probably still architecture specific users
elsewhere.

Almost all the warnings I got are for files that are better off
using 'if (err)' or 'if (err < 0)'.
The only legitimate user I could find that we get a warning for
is the (32-bit only) freescale fman driver, so I did not remove
the IS_ERR_VALUE() there but changed the type to 'unsigned long'.
For 9pfs, I just worked around one user whose calling conventions
are so obscure that I did not dare change the behavior.

I was using this definition for testing:

 #define IS_ERR_VALUE(x) ((unsigned long*)NULL == (typeof (x)*)NULL && \
       unlikely((unsigned long long)(x) >= (unsigned long long)(typeof(x))-MAX_ERRNO))

which ends up making all 16-bit or wider types work correctly with
the most plausible interpretation of what IS_ERR_VALUE() was supposed
to return according to its users, but also causes a compile-time
warning for any users that do not pass an 'unsigned long' argument.

I suggested this approach earlier this year, but back then we ended
up deciding to just fix the users that are obviously broken. After
the initial warning that caused me to get involved in the discussion
(fs/gfs2/dir.c) showed up again in the mainline kernel, Linus
asked me to send the whole thing again.

[ Updated the 9p parts as per Al Viro  - Linus ]

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Andrzej Hajda <a.hajda@samsung.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Link: https://lkml.org/lkml/2016/1/7/363
Link: https://lkml.org/lkml/2016/5/27/486
Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> # For nvmem part
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2016-05-27 15:26:11 -07:00
Christopher Covington
1aabf523a2 tty: amba-pl011: Use 32-bit accesses for SBSA UART
Version 2 of the Server Base System Architecture (SBSAv2) describes UART
hardware registers as 32 bits wide, giving no guidance on access sizes. The
SBSA UART driver previously assumed partial-length 16 and 8 bit accesses would
work. But the SBSAv2 UART hardware on the Qualcomm Technologies QDF2432 only
supports full-length 32 bit register accesses, so use those exclusively. This
is compatible with SBSAv3, which explicitly requires UART hardware support 32
(and 16 and sometimes 8) bit accesses.

Tested on Juno, Midway, QDF2432, Seattle, and X-Gene 1.

Tested-by: Mark Langsdorf <mlangsdo@redhat.com>
Tested-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Christopher Covington <cov@codeaurora.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-04-30 09:26:55 -07:00
Ed Spiridonov
bb70002cb7 serial: pl011: add mark/space parity support
PL011 UART has hardware mark/space parity ability, this trivial patch adds support for it.
Tested on Raspberry Pi v1, v2 (BCM2835 and BCM2836)

Signed-off-by: Ed Spiridonov <edo.rus@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-03-07 16:11:14 -08:00
Robin Murphy
d9e105ca60 tty: amba-pl011: don't dereference NULL platform data
When only a TX DMA channel is specified in DT, pl011_dma_probe() falls
back to looking for the optional RX channel in platform data. What it
doesn't do is check whether that platform data actually exists...

Add the missing check to avoid crashing the kernel.

Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-03-07 16:11:14 -08:00
Arnd Bergmann
ff52a9a0c3 serial: amba-pl011: mark vendor_zte as __maybe_unused
The pl011 driver has gone back and forth on the definition of the
ZTE specific variation of the hardware definitions, but the
current state is that the vendor definition is left in place
yet unused:

drivers/tty/serial/amba-pl011.c:190:27: warning: 'vendor_zte' defined but not used [-Wunused-variable]

I don't know what the plan forward is to get this code to work,
but the current behavior is a bit annoying as we get a warning
whenever we build this driver.

This patch does not help us to make it work, but at least
shuts up the warning.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes: 7ec7587189 ("tty: amba-pl011: add support for ZTE UART (EXPERIMENTAL)")
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-02-06 22:51:04 -08:00
Timur Tabi
2f2fd08949 serial: amba-pl011: use cpu_relax when polling registers
Busy loops that poll on a register should call cpu_relax().  On some
architectures, it can lower CPU power consumption or yield to a
hyperthreaded twin processor.  It also serves as a compiler barrier,
so it can replace barrier() calls.

Signed-off-by: Timur Tabi <timur@codeaurora.org>
Reviewed-by: Dave Martin <Dave.Martin@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-02-06 22:51:04 -08:00
Peter Hurley
2eaa790989 earlycon: Use common framework for earlycon declarations
Use a single common table of struct earlycon_id for both command line
and devicetree. Re-define OF_EARLYCON_DECLARE() macro to instance a
unique earlycon declaration (the declaration is only guaranteed to be
unique within a compilation unit; separate compilation units must still
use unique earlycon names).

The semantics of OF_EARLYCON_DECLARE() is different; it declares an
earlycon which can matched either on the command line or by devicetree.
EARLYCON_DECLARE() is semantically unchanged; it declares an earlycon
which is matched by command line only. Remove redundant instances of
EARLYCON_DECLARE().

This enables all earlycons to properly initialize struct console
with the appropriate name and index, which improves diagnostics and
enables direct earlycon-to-console handoff.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Peter Hurley <peter@hurleysoftware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-02-06 22:07:37 -08:00
Timur Tabi
3b78fae793 tty: amba-pl011: use iotype instead of access_32b to track 32-bit I/O
Instead of defining a new field in the uart_amba_port structure, use the
existing iotype field of the uart_port structure, which is intended for
this purpose.  If we need to use 32-bit register access, we set iotype
to UPIO_MEM32, otherwise we set it to UPIO_MEM.

For early console, specify the "mmio32" option on the kernel command-line.
Example:

        earlycon=pl011,mmio32,0x3ced1000

Signed-off-by: Timur Tabi <timur@codeaurora.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-01-06 21:02:45 -08:00
Russell King
cdf091ca2c tty: amba-pl011: fix earlycon register offsets
The REG_x macros are indices into a table, not register offsets.  Since earlycon
does not have access to the vendor data, we can currently only support standard
ARM PL011 devices.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Tested-by: Huang Shijie <shijie.huang@arm.com>
Signed-off-by: Timur Tabi <timur@codeaurora.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-01-06 21:02:45 -08:00
Russell King
f5ce6edd22 tty: amba-pl011: switch to using relaxed IO accessors
Using relaxed IO accessors allows GCC to better optimise this code
as we eliminate the heavy memory barriers - for example, GCC can now
cache the address of a register across a read-modify-write sequence,
rather than reloading the base address, offset and access size flag.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Reviewed-by: Peter Hurley <peter@hurleysoftware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-12-13 19:59:48 -08:00
Russell King
7ec7587189 tty: amba-pl011: add support for ZTE UART (EXPERIMENTAL)
Add (incomplete) support for the ZTE UART to the AMBA PL011 driver.
This is similar to the ARM and ST variants, except it has a different
register address layout, and requires 32-bit accesses to the registers.
Use the newly introduced register tables and access size support to
cope with these differences.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Reviewed-by: Peter Hurley <peter@hurleysoftware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-12-13 19:59:48 -08:00
Russell King
84c3e03bdd tty: amba-pl011: add support for 32-bit register access
Add support for 32-bit register accesses to the AMBA PL011 UART.  This
is needed for ZTE UARTs, which require 32-bit accesses as opposed to
the more normal 16-bit accesses.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Reviewed-by: Peter Hurley <peter@hurleysoftware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-12-13 19:59:48 -08:00
Russell King
10004a6624 tty: amba-pl011: remove ST micro registers from standard table
Remove the ST micro registers from the standard table.  These registers
should never be accessed in non-ST micro variants.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Reviewed-by: Peter Hurley <peter@hurleysoftware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-12-13 19:59:48 -08:00
Russell King
e4df9a8053 tty: amba-pl011: clean up LCR register offsets
As we can detect when the LCR register is split between TX and RX,
we don't need three entries in the table to deal with this.  Reduce
this down to two entries by converting the REG_ST_LCRH_* entries to
standard REG_LCRH_* and remove REG_LCRH.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Reviewed-by: Peter Hurley <peter@hurleysoftware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-12-13 19:59:48 -08:00
Russell King
bf69ff8a24 tty: amba-pl011: add ST register offset table
Add the ST variant register offset table to the driver.  Currently,
this is an identical copy of the standard version, but this will be
modified in the following changes.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Reviewed-by: Peter Hurley <peter@hurleysoftware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-12-13 19:59:48 -08:00
Russell King
439403bde9 tty: amba-pl011: add register offset table to vendor data
Add the register offset table to the vendor data, allowing vendor
differences to be described in this table.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Reviewed-by: Peter Hurley <peter@hurleysoftware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-12-13 19:59:48 -08:00
Russell King
debb7f64f9 tty: amba-pl011: add register lookup table
Add a register lookup table, which allows the register offsets to be
adjusted on a per-port basis.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Reviewed-by: Peter Hurley <peter@hurleysoftware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-12-13 19:59:48 -08:00
Russell King
9f25bc510e tty: amba-pl011: prepare REG_* register indexes
Prepare for REG_* register accessors.  This change involves introducing
pl011_reg_to_offset() to convert REG_* to the hardware register offset,
and converting all call sites to use REG_* names.  We need to fix up
locations where we check for equivalence of register offsets as well.

Much of this change was made via these sed expressions:
s/ST_UART01[1x]\(_[^_]*\|_LCRH_[TR]X\)\>/REG_ST\1/
s/UART01[1x]_\(DR\|RSR\|ECR\|FR\|ILPR\|[IF]BRD\|LCRH\|CR\|IFLS\|IMSC\|RIS\|MIS\|ICR\|DMACR\)\>/REG_\1/g

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Reviewed-by: Peter Hurley <peter@hurleysoftware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-12-13 19:59:48 -08:00
Russell King
7fe9a5a9d9 tty: amba-pl011: add helper to detect split LCRH register
Add a helper to detect the split LCRH register found on ST variants.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Reviewed-by: Peter Hurley <peter@hurleysoftware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-12-13 19:59:48 -08:00
Russell King
b2a4e24c2e tty: amba-pl011: convert accessor functions to take uart_amba_port
Convert the new accessor functions to take the uart_amba_port instead
of the port base address.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Reviewed-by: Peter Hurley <peter@hurleysoftware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-12-13 19:59:48 -08:00
Russell King
7583633921 tty: amba-pl011: add register accessor functions
Add register accessor functions to amba-pl011.  Much of this
transformation was done using the sed expression below, with any
left-overs fixed up manually afterwards, and code formatted to remain
within coding style.

s/readw(\(uap->port.membase\|regs\|port->membase\) +/pl011_read(\1,/g
s/writew(\(.*\) +/pl011_write(\1,/g

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Reviewed-by: Peter Hurley <peter@hurleysoftware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-12-13 19:59:48 -08:00
Timur Tabi
71a5cd8a4a serial: amba-pl011: fix incorrect integer size in pl011_fifo_to_tty()
The UART_DUMMY_DR_RX status bit is equal to (1 << 16), so a u16 is too small
to hold that value.  The result is that UART_DUMMY_DR_RX is never passed
to uart_insert_char().  This means that we're always accepting characters,
even when CREAD (in termios) is not set.

Signed-off-by: Timur Tabi <timur@codeaurora.org>
Reviewed-by: Dave Martin <Dave.Martin@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-10-17 21:29:21 -07:00
Greg Kroah-Hartman
0de6cfb9f3 Revert "uart: pl011: Rename regs with enumeration"
This reverts commit 534e14e229 as with
this patch the serial console is broken on lots of platforms.

Reported-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: Jun Nie <jun.nie@linaro.org>
Acked-by: Will Deacon <will.deacon@arm.com>
Tested-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-09-04 09:14:43 -07:00
Greg Kroah-Hartman
f11c98417c Revert "uart: pl011: Introduce register accessor"
This reverts commit 7b753f318d as with
this patch the serial console is broken on lots of platforms.

Reported-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: Jun Nie <jun.nie@linaro.org>
Acked-by: Will Deacon <will.deacon@arm.com>
Tested-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-09-04 09:14:43 -07:00
Greg Kroah-Hartman
ab66ca27c8 Revert "uart: pl011: Introduce register look up table"
This reverts commit 2c096a9eed as with
this patch the serial console is broken on lots of platforms.

Reported-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: Jun Nie <jun.nie@linaro.org>
Acked-by: Will Deacon <will.deacon@arm.com>
Tested-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-09-04 09:14:42 -07:00
Greg Kroah-Hartman
8e50254a6a Revert "uart: pl011: Improve LCRH register access decision"
This reverts commit 09dcc7dfc0 as with
this patch the serial console is broken on lots of platforms.

Reported-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: Jun Nie <jun.nie@linaro.org>
Acked-by: Will Deacon <will.deacon@arm.com>
Tested-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-09-04 09:14:42 -07:00
Greg Kroah-Hartman
062a68a5e0 Revert "uart: pl011: Add support to ZTE ZX296702 uart"
This reverts commit 8cd90e50d1 as with
this patch the serial console is broken on lots of platforms.

Reported-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: Jun Nie <jun.nie@linaro.org>
Acked-by: Will Deacon <will.deacon@arm.com>
Tested-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-09-04 09:14:20 -07:00
Jun Nie
8cd90e50d1 uart: pl011: Add support to ZTE ZX296702 uart
Support ZTE uart with some registers differing offset.
Probe as platform device for not AMBA IP ID is
available on ZTE uart.

Signed-off-by: Jun Nie <jun.nie@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-08-04 22:07:26 -07:00
Jun Nie
09dcc7dfc0 uart: pl011: Improve LCRH register access decision
Improve LCRH register access decision as ARM PL011 lcrh
register serve as both TX and RX, while other SOC may
implement TX and RX function with separated register.

Signed-off-by: Jun Nie <jun.nie@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-08-04 22:07:26 -07:00
Jun Nie
2c096a9eed uart: pl011: Introduce register look up table
Introduce register look up table as different SOC venders
may have different register offset for the some register.

Signed-off-by: Jun Nie <jun.nie@linaro.org>
Reviewed-by: Peter Hurley <peter@hurleysoftware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-08-04 22:07:25 -07:00
Jun Nie
7b753f318d uart: pl011: Introduce register accessor
Introduce register accessor to ease loop up table access
in later patch.

Signed-off-by: Jun Nie <jun.nie@linaro.org>
Reviewed-by: Peter Hurley <peter@hurleysoftware.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-08-04 22:07:25 -07:00
Jun Nie
534e14e229 uart: pl011: Rename regs with enumeration
Rename regs with enumeration to generalize register names.

Signed-off-by: Jun Nie <jun.nie@linaro.org>
Reviewed-by: Peter Hurley <peter@hurleysoftware.com>
Signed-off-by: Jun Nie <jun.nie@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-08-04 22:07:24 -07:00
Krzysztof Kozlowski
97a60eac33 serial: amba-pl011: Fix devm_ioremap_resource return value check
Value returned by devm_ioremap_resource() was checked for non-NULL but
devm_ioremap_resource() returns IOMEM_ERR_PTR, not NULL. In case of
error this could lead to dereference of ERR_PTR.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski.k@gmail.com>
Cc: <stable@vger.kernel.org>
Fixes: 3873e2d7f6 ("drivers: PL011: refactor pl011_probe()")
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-07-23 15:05:53 -07:00
Graeme Gregory
3db9ab0b6d drivers: PL011: add ACPI probing for SBSA UART
Add the necessary driver boilerplate to let the driver be used when
the respective ACPI table is discovered by the ACPI subsystem.

[Andre: change table name, add MODULE_DEVICE_TABLE entry and improve
	commit message]

Reviewed-by: Hanjun Guo <hanjun.guo@linaro.org>
Signed-off-by: Graeme Gregory <graeme.gregory@linaro.org>
Tested-by: Mark Langsdorf <mlangsdo@redhat.com>
Tested-by: Naresh Bhat <nbhat@cavium.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-24 13:08:51 -07:00
Andre Przywara
0dd1e247fd drivers: PL011: add support for the ARM SBSA generic UART
The ARM Server Base System Architecture[1] document describes a
generic UART which is a subset of the PL011 UART.
It lacks DMA support, baud rate control and modem status line
control, among other things.
The idea is to move the UART initialization and setup into the
firmware (which does this job today already) and let the kernel just
use the UART for sending and receiving characters.

We use the recent refactoring to build a new struct uart_ops
variable which points to some new functions avoiding access to the
missing registers. We reuse as much existing PL011 code as possible.

In contrast to the PL011 the SBSA UART does not define any AMBA or
PrimeCell relations, so we go with a pretty generic probe function
which only uses platform device functions.
A DT binding is provided with this patch, ACPI support is added in a
separate one.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Mark Langsdorf <mlangsdo@redhat.com>
Tested-by: Naresh Bhat <nbhat@cavium.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-24 13:08:51 -07:00
Andre Przywara
cefc2d1d66 drivers: PL011: allow to supply fixed option string
The SBSA UART has a fixed baud rate and flow control setting, which
cannot be changed or queried by software.
Add a vendor specific property to always return fixed values when
trying to read the console options.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Mark Langsdorf <mlangsdo@redhat.com>
Tested-by: Naresh Bhat <nbhat@cavium.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-24 13:08:51 -07:00
Andre Przywara
71eec4836b drivers: PL011: allow avoiding UART enabling/disabling
The SBSA UART should not be enabled or disabled (it is always on),
and consequently the spec lacks the UART_CR register.
Add a vendor specific property to skip disabling or enabling of the
UART. This will be used later by the SBSA UART support.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Mark Langsdorf <mlangsdo@redhat.com>
Tested-by: Naresh Bhat <nbhat@cavium.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-24 13:08:51 -07:00
Andre Przywara
9c4ef4b030 drivers: PL011: move cts_event workaround into separate function
To avoid lines with more than 80 characters and to make the
pl011_int() function more readable, move the workaround out into a
separate function.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Mark Langsdorf <mlangsdo@redhat.com>
Tested-by: Naresh Bhat <nbhat@cavium.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-24 13:08:51 -07:00
Andre Przywara
075167ed71 drivers: PL011: replace UART_MIS reading with _RIS & _IMSC
The PL011 register UART_MIS is actually a bitwise AND of the
UART_RIS and the UART_MISC register.
Since the SBSA UART does not include the _MIS register, use the
two separate registers to get the same behaviour. Since we are
inside the spinlock and we read the _IMSC register only once, there
should be no race issue.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Mark Langsdorf <mlangsdo@redhat.com>
Tested-by: Naresh Bhat <nbhat@cavium.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-24 13:08:51 -07:00
Andre Przywara
3873e2d7f6 drivers: PL011: refactor pl011_probe()
Currently the pl011_probe() function is relying on some AMBA IDs
and a device tree node to initialize the driver and a port.
Both features are not necessarily required for the driver:
- we lack AMBA IDs in the ARM SBSA generic UART and
- we lack a DT node in ACPI systems.
So lets refactor the function to ease later reuse.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Mark Langsdorf <mlangsdo@redhat.com>
Tested-by: Naresh Bhat <nbhat@cavium.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-24 13:08:51 -07:00