The current GPL only licensing on the DTSI makes it very impractical for other
software components licensed under another license.
In order to make it easier for them to reuse our device trees, relicense our
device trees under a GPL/X11 dual-license.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Carlo Caione <carlo@caione.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
The current GPL only licensing on the DTSI makes it very impractical for other
software components licensed under another license.
In order to make it easier for them to reuse our device trees, relicense our
device trees under a GPL/X11 dual-license.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
The current GPL only licensing on the DTSI makes it very impractical for other
software components licensed under another license.
In order to make it easier for them to reuse our device trees, relicense our
device trees under a GPL/X11 dual-license.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The current GPL only licensing on the DTSI makes it very impractical for other
software components licensed under another license.
In order to make it easier for them to reuse our device trees, relicense our
device trees under a GPL/X11 dual-license.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The current GPL only licensing on the DTSI makes it very impractical for other
software components licensed under another license.
In order to make it easier for them to reuse our device trees, relicense our
device trees under a GPL/X11 dual-license.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
The current GPL only licensing on the DTSI makes it very impractical for other
software components licensed under another license.
In order to make it easier for them to reuse our device trees, relicense our
device trees under a GPL/X11 dual-license.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
The current GPL only licensing on the DTSI makes it very impractical for other
software components licensed under another license.
In order to make it easier for them to reuse our device trees, relicense our
device trees under a GPL/X11 dual-license.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Emilio López <emilio@elopez.com.ar>
Acked-by: Hans de Goede <hdegoede@redhat.com>
The current GPL only licensing on the DTSI makes it very impractical for other
software components licensed under another license.
In order to make it easier for them to reuse our device trees, relicense our
device trees under a GPL/X11 dual-license.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Carlo Caione <carlo@caione.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
The current GPL only licensing on the DTSI makes it very impractical for other
software components licensed under another license.
In order to make it easier for them to reuse our device trees, relicense our
device trees under a GPL/X11 dual-license.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Carlo Caione <carlo@caione.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
The current GPL only licensing on the DTSI makes it very impractical for other
software components licensed under another license.
In order to make it easier for them to reuse our device trees, relicense our
device trees under a GPL/X11 dual-license.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Carlo Caione <carlo@caione.org>
Acked-by: David Lanzendörfer <david.lanzendoerfer@o2s.ch>
Acked-by: Hans de Goede <hdegoede@redhat.com>
The current GPL only licensing on the DTSI makes it very impractical for other
software components licensed under another license.
In order to make it easier for them to reuse our device trees, relicense our
device trees under a GPL/X11 dual-license.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Carlo Caione <carlo@caione.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
The current GPL only licensing on the DTSI makes it very impractical for other
software components licensed under another license.
In order to make it easier for them to reuse our device trees, relicense our
device trees under a GPL/X11 dual-license.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
The current GPL only licensing on the DTSI makes it very impractical for other
software components licensed under another license.
In order to make it easier for them to reuse our device trees, relicense our
device trees under a GPL/X11 dual-license.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
The A80 Optimus Board is was launched with the Allwinner A80 SoC.
It was jointly developed by Allwinner and Merrii.
This board has a UART port, a JTAG connector, USB host ports, a USB
3.0 OTG connector, an HDMI output, a micro SD slot, 8G NAND flash,
4G DRAM, a camera sensor interface, a WiFi/BT combo chip, a headphone
jack, IR receiver, and additional GPIO headers.
This patch adds only basic support.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Tested-by: Andreas Färber <afaerber@suse.de>
The Allwinner A80 is a new multi-purpose SoC with 4 Cortex-A7 and
4 Cortex-A15 cores in a big.LITTLE architecture, and a 64-core
PowerVR G6230 GPU.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Tested-by: Andreas Färber <afaerber@suse.de>
This adds support for the Olimex A20-OLinuXino-Lime2
https://www.olimex.com/Products/OLinuXino/A20/A20-OLinuXIno-LIME2
Differences to previous Lime boards are 1GB RAM and gigabit ethernet
Signed-off-by: Iain Paton <ipaton0@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Mele M3 is yet another Allwinnner based Android top set box from Mele.
It uses a housing similar to the A2000, but without the USM sata storage slot
at the top.
It features an A20 SoC, 1G RAM, 4G eMMC (unique for Allwinner devices),
100Mbit ethernet, HDMI out, 3 USB A receptacles, VGA, and A/V OUT connections.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Banana Pi is an A20 based development board using Raspberry Pi compatible
IO headers. It comes with 1 GB RAM, 1 Gb ethernet, 2x USB host, sata, hdmi
and stereo audio out + various expenansion headers:
http://www.lemaker.org/
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The uart3_pins_a multiplexes the uart3 pins to port G, add a pinctrl entry
for mapping them to port H (as used on the Bananapi).
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
All chips of i.mx6 can be powered off by programming SNVS.
For example :
On i.mx6q-sabresd board, PMIC_ON_REQ connect with external
pmic ON/OFF pin, that will cause the whole PMIC powered off
except VSNVS. And system can restart once PMIC_ON_REQ goes
high by push POWRER key.
Signed-off-by: Robin Gong <b38343@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Add structure of USB supply logic. The USB hosts power enable
regulator is needed to control VBUS supply on the Colibri carrier
board.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Add CAN support for Phytec phyFLEX-i.MX6 (PFL-A-02 and PBA-B-01).
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Add PCIe support for Phytec phyFLEX-i.MX6 (PFL-A-02 and PBA-B-01).
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The PMIC interrupt was changed from modul revision 1 to 2. Revision 1 was
declared as a prototype and is not in series by any customers.
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The nand is on the module (PFL-A-02) and not on the baseboard (PBA-B-01).
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
ST-M41T0M6 is available on Colibri carrier boards.
Hence enable M41T0M6 RTC.
Acked-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This patch adds links to the on-chip SRAM and reset controller nodes
and switches the interrupts. Make the BIT processor interrupt, which exists on
all variants, the first one. The JPEG unit interrupt, which does not exist on
i.MX27 and i.MX5 thus is an optional second interrupt.
Use different compatible strings for i.MX6Q/D and i.MX6S/DL, as they have to
load separate firmware images for some reason.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
imx6q-tbs2910 board uses sgtl5000 codec and the machine file (imx-sgtl5000)
already sets SSI in slave mode and codec in master mode, so there is no need
for having this property.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Soeren Moch <smoch@web.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Since restructuring of the device tree files, the USB misc/phy
nodes are disabled by default. Hence we need to enable those
explicitly when USB is used.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Use GPIO support by adding SD card detection configuration and
GPIO pinmux for Colibri's standard GPIO pins. Attach the GPIO
pins to the iomuxc node to get the GPIO pin settings applied.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Since pins and frequency are specific to module (pfla02), not base board
(pbab02), it is better to be initialized in corresponding dts file.
This patch fixes i2c2, i2c3 pin configuration which caused messages:
imx6q-pinctrl 20e0000.iomuxc: no groups defined in /soc/aips-bus@02000000/iomuxc@020e0000/i2c2grp
imx6q-pinctrl 20e0000.iomuxc: no groups defined in /soc/aips-bus@02000000/iomuxc@020e0000/i2c3grp
imx6q-pinctrl 20e0000.iomuxc: unable to find group for node i2c2grp
imx6q-pinctrl 20e0000.iomuxc: unable to find group for node i2c3grp
Signed-off-by: Dmitry Lavnikevich <d.lavnikevich@sam-solutions.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Add Colibri VF50 device tree files vf500-colibri.dtsi and
vf500-colibri-eval-v3.dts, in line with the Colibri VF61 device tree
files. However, to minimize dupplication we also add vf-colibri.dtsi
and vf-colibri-eval-v3.dtsi which contain the common device tree
nodes.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This adds more generic base device trees for Vybrid SoCs. There
are three series of Vybrid SoC commonly available:
- VF3xx series: single core, Cortex-A5 without external memory
- VF5xx series: single core, Cortex-A5
- VF6xx series: dual core, Cortex-A5/Cortex-M4
The second digit represents the presents of a L2 cache (VFx1x).
The VF3xx series are not suitable for Linux especially since the
internal memory is quite small (1.5MiB).
The VF500 is essentially the base SoC, with only one core and
without L1 cache. The VF610 is a superset of the VF500, hence
vf500.dtsi is then included and enhanced by vf610.dtsi. There is
no board using VF510 or VF600 currently, but, if needed, they can
be added easily.
The Linux kernel can also run on the Cortex-M4 CPU of Vybrid
using !MMU support. This patchset creates a device tree structure
which allows to share peripherals nodes for a VF6xx Cortex-M4
device tree too. The two CPU types have different views of the
system: Foremost they are using different interrupt controllers,
but also the memory map is slightly different. The base device
tree vfxxx.dtsi allows to create SoC and board level device trees
supporting the Cortex-M4 while reusing the shared peripherals
nodes.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The clock controller module (CCM) has several clock inputs, which
are connected to external crystal oscillators. To reflect this,
assign these fixed clocks to the CCM node directly.
This especially resolves initialization order dependencies we had
with the earlier initialization code: When resolving of the fixed
clocks failed in clk-vf610, the code created fixed clocks with a
rate of 0.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The LS1021A TWR is a low cost, high-performance evaluation,
development and test platform supporting the LS1021A processor.
It is optimized to support the high-bandwidth DDR3L memory and
a full complement of high-speed SerDes ports.
For more detail information about the LS1021A TWR board, please
refer to LS1021A QorIQ Tower System Reference Manual.
Signed-off-by: Chao Fu <B44548@freescale.com>
Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The LS1021A QorIQ development system (QDS) is a high-performance
computing evaluation, development and test platform supporting
the LS1021A processor. The LS1021A QDS is optimized to support
the high-bandwidth DDR3LP/DDR4 memory and a full complement of
high-speed SerDes ports.
For more detail information about the LS1021AQDS, please refer to
the QorIQ LS1021A Development System Reference Manual.
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Chao Fu <B44548@freescale.com>
Signed-off-by: Jason Jin <Jason.Jin@freescale.com>
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: Jaiprakash Singh <b44839@freescale.com>
Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
On registration I2C bus drivers attemp to get ids from device tree
aliases, add a missing alias for I2C4 found on iMX6 DualLite/Solo.
Signed-off-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
TBS2910 is a i.MX6Q based board. For additional details refer to
http://www.tbsdtv.com/products/tbs2910-matrix-arm-mini-pc.html
Signed-off-by: Soeren Moch <smoch@web.de>
Reviewed-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Add enet2 support for imx6sx-sdb board, and add the "fsl,imx6q-fec"
compatible for fec2 node to be compatible with the old version.
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Add all required properties for the cpufreq-dt driver.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The Colibri standard defines four pins as PWM outputs, two of them (PWM
A and C) are routed to FTM instance 0 and the other two (PWM B and D)
are routed to FTM instance 1. Hence enable both FTM instances for the
Colibri module and mux the four pins accordingly.
Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Acked-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Add Global Timer support which is part of the private peripherals
of the Cortex-A5 processor. This Global Timer is compatible with the
Cortex-A9 implementation. It's a 64-bit timer and is clocked by the
peripheral clock, which is typically 133 or 166MHz on Vybrid.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Acked-by: Bill Pringlemeir <bpringlemeir@nbsps.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
SSI block has 'ipg' clock for internal peripheral access and also 'baud' clock
for generating bit clock when SSI operates in master mode.
Add the extra 'baud' clock so that we can have SSI functional in master mode.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
SSI block has 'ipg' clock for internal peripheral access and also 'baud' clock
for generating bit clock when SSI operates in master mode.
Add the extra 'baud' clock so that we can have SSI functional in master mode.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Stock firmware on rk3288 does not initizalize the CNTVOFF registers
of the architected timer correctly. This introduces issues with the
newly added SMP support for rk3288, resulting in rcu stalls due to
differing timer values per core.
There exist preliminary and tested patches for u-boot for this problem,
but there are a minority of boards using other bootloaders like coreboot.
There also is currently a second solution for miss-initialized architected
timers in the works:
- clocksource: arch_timer: Fix code to use physical timers when requested
- clocksource: arch_timer: Allow the device tree to specify uninitialized timer registers
Therefore disable smp on rk3288 again till these are finalized, also
allowing coreboot-based boards to boot again.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
sclk_mfc is required for MFC device since commit
0c2272170d ("media: s5p-mfc: rename
special clock to sclk_mfc"), so add it to exynos4 dts.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This ensures the core and the audio subsystem clocks are configured
properly, as expected by the sound machine driver. These bits are
missing to obtain proper audio sample rates in kernel v3.17, where
audio support for Odroid X2/U3 was first added.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The HP Chromebook 11 uses an Atmel maXTouch as trackpad.
The keymap was found by trial-and-error.
Signed-off-by: Andreas Faerber <afaerber@suse.de>
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Spotted in the Chrome OS 3.8 based device tree.
Needs CONFIG_SENSORS_LM90.
Signed-off-by: Andreas Faerber <afaerber@suse.de>
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Reported-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Andreas Faerber <afaerber@suse.de>
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds max77693-haptic node to support for haptic motor driver.
Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch add PWM(Pulse Width Modulation) node and
handle to use pwm property.
Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Specify the default mux and divider clocks in device tree
to ensure the FIMC devices on Trats, Trats2, Universal_c210
and Odroid X2/U3 boards are clocked from recommended clock
source and with maximum supported frequency.
For Trats2 also the MIPI-CSIS and the camera sensor clocks
are configured, the 'clock-frequency' property is deprecated
in favour of 'assigned-clock-rates' property.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch enables support for TMU at Exynos4412 based Trats2 board.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Reviewed-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The TMU device tree node definition for Exynos4x12 family of SoCs.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Reviewed-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Synology DS414 is a 4-bay NAS powered by a Marvell Armada XP
(mv78230 dual-core @1.33Ghz). It is very similar on many aspects
to previous 4-bay synology models based on Marvell kirkwood SoC.
Here is a short summary of the device:
- 1GB RAM
- Boot on SPI flash (64Mbit Micron N25Q064)
- 2 GbE interfaces (Armada MAC connected to two Marvell 88E1512
PHY via RGMII)
- 1 front USB 2.0 ports (directly handled by the Armada 370)
- 2 rear USB 3.0 ports (handled by an EtronTech EJ168A XHCI
controller on the PCIe bus)
- 4 internal SATA ports handled by a Marvell 88SX7042 SATA-II
controller on the PCIe bus)
- Seiko S-35390A I2C RTC chip
- UART0 providing serial console
- UART1 used for poweroff (connected to a Microchip PIC16F883)
Additional note: the front LEDs the and the two fans are not directly
connected to the SoC and under its control. The former are presumably
driven by the SATA controller, the latter by the PIC.
[ jac: fixed up s/ge[01]_rgmii_pins/pmx_ge[01]_rgmii/ to match
armada-xp.dtsi ]
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Link: https://lkml.kernel.org/r/5b678d6d1f2f42f4bf0d087878b9d8024d463ea7.1416613429.git.arno@natisbad.org
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Synology DS213j is a 2-bay NAS powered by a Marvell Armada 370
(88F6710 @1.2Ghz). It is very similar on many aspects to previous
2-bay synology models based on Marvell kirkwood SoC. Here is a
short summary of the device:
- 512MB RAM
- boot on SPI flash (64Mbit Micron N25Q064)
- 1 GbE interface (Armada MAC connected to a Marvell 88E1512
PHY via SGMII)
- 2 rear USB 2.0 ports (directly handled by the Armada 370)
- 2 internal SATA ports handled by the Armada 370: 2 GPIO for
presence, 2 for powering them
- two front amber LED (disk1, disk2) controlled by the SoC
- Seiko S-35390A I2C RTC chip
- UART0 providing serial console
- UART1 used for poweroff (connected to a TI MSP430F2111)
- Fan handled via 4 GPIO (3 for speed, 1 for alarm)
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Link: https://lkml.kernel.org/r/20f1a03897df1d825b62abdd525e588a8e39b3ec.1416613429.git.arno@natisbad.org
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This patch defines common Armada XP pinctrl settings in armada-xp.dtsi
for the supported SPI interface (MPP36-39) and use it as default
for Armada XP spi interface. That being done, it removes the now
redundant definitions in armada-xp-axpwifiap.dts.
Note: this patch has the potential to break out-of-tree users w/o
specific pinctrl settings for their spi interfaces if the default
above does not match their config (i.e. if they do not use CS0).
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Link: https://lkml.kernel.org/r/d404b7abd80ee5a0fd8e8d3586d33cd37740d589.1416613429.git.arno@natisbad.org
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This patch defines common Armada XP pinctrl settings for uart2 and
uart3 interfaces (uart0 and uart1 rx/tx do not rely on MPP):
uart2: MPP42-43 as default
uart3: MPP44-45 as default
Suggested-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Link: https://lkml.kernel.org/r/fd51c080c7139a67ec01df8d797f1e88ce557796.1416613429.git.arno@natisbad.org
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This patch defines common Armada 370 pinctrl settings for uart0 and
uart1 interfaces:
uart0: MPP0-1 as default
uart1: MPP41-42 as default
Note: this patch has the potential to break out-of-tree users w/o
specific pinctrl settings for their uart interfaces if the default
above does not match their config.
Suggested-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Link: https://lkml.kernel.org/r/31412e57955c98bc9cc47b70726b5072af945cc3.1416613429.git.arno@natisbad.org
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This patch defines common Armada 370 pinctrl settings for spi0 and spi1
interfaces:
spi0: MPP33-36 as default, MPP32,63-65 as available alternate config
spi1: MPP49-52 as default
Currently, the Armada 370 DB .dts file has no explicit pinctrl info
for the spi0 interface used to access the flash on the board. The
patch fixes that by also adding explicit pinctrl info (MPP32,63-65)
for this SPI interface.
Note: this patch has the potential to break out-of-tree users w/o
specific pinctrl settings for their spi interfaces if the default
above does not match their config.
Suggested-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Link: https://lkml.kernel.org/r/1e812eb63b37718e273463e22e4d7512f8f0b624.1416613429.git.arno@natisbad.org
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
What was done by Sebastian in 264a05e19b ("ARM: mvebu: armada-xp:
Add node alias to pinctrl and add base address") and 01c434225e
("ARM: mvebu: armada-xp: Use pinctrl node alias") can also be done for
Armada 370, i.e.
- Rename Armada 370 pinctrl node to pin-ctrl with its address encoded
- Add a node alias to access the pinctrl node easily.
- use the newly available alias in existing Armada 370 .dts files
We can even go a bit further by putting the pinctrl node definition in
armada-370-xp.dtsi, with only its reg property defined. This allows us
to then also use the newly defined node alias in armada-xp.dtsi,
armada-370.dtsi.
Suggested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Suggested-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Link: https://lkml.kernel.org/r/b54eb45e5242728aace3ce8aef2eae4251f8dea3.1416613429.git.arno@natisbad.org
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Now that labels for uartX are available in Marvell Armada .dtsi files,
this patch replaces the "/soc/internal-regs/serial@12000" found in
armada-xp-lenovo-ix4-300d.dts file for stdout-path property by the more
concise &uart0.
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Suggested-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Link: https://lkml.kernel.org/r/d1a883510e01f7f212a385e826dccbef903fae42.1416613429.git.arno@natisbad.org
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This patch adds uartX labels for Armada SoC serial nodes. This is
a preliminary work to be able to easily reference the serial lines
in Device Tree files. One expected use is when providing stdout-path
property for barebox.
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Link: https://lkml.kernel.org/r/0683d1a823fe9b75849f3dafcf1cf6ee291cdca6.1416613429.git.arno@natisbad.org
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
As reported by Andrew, the vendor prefix for Seiko Instruments, Inc.
S-35390A I2C RTC chip in kirkwood-synology.dtsi has a typo (ssi
instead of sii). This patches fixes it.
Note: i2c devices ignore the optional vendor prefix, which explains
why it worked with the typo and also why there is no backward
compatibility issues with the fix.
Reported-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Link: https://lkml.kernel.org/r/0444140a267d982c3e5f5f2b7b5f2dc41d010e2a.1416613429.git.arno@natisbad.org
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Commit a095b1c78a ("ARM: mvebu: sort DT nodes by address")
missed placing the system-controller in the correct order.
Fixes: a095b1c78a ("ARM: mvebu: sort DT nodes by address")
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/20141114204333.GS27002@pengutronix.de
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
In order to update MAC address entries in the ethernet nodes in Device Tree
both mainline U-Boot and Barebox bootloaders accept the same format of aliases,
which is 'ethernetX', where X stands for an interface number.
Other platforms in the mainline Linux, that comprise ethernet references in
'/aliases' node (like various flavours of imx or sunXi), follow the naming
scheme described above.
This commit ajusts ethernet aliases of Marvell Armada 38x SoC to be properly
recognized by bootloaders' MAC address fixup routines.
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1415980652-7429-5-git-send-email-mw@semihalf.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
For proper operation of Armada 38x SDHCI controller proper 'clocks' property
is sufficient. Therefore it is not useful to keep an additional
'clock-frequency' property in SDHCI controller node of board-level Device Tree
file for Armada 385 DB.
This commit gets rid of useless 'clock-frequency' property.
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1415980652-7429-4-git-send-email-mw@semihalf.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The Marvell Armada 38x SoC's SDHCI interface is capable of using 1.8v voltage,
needed for driving "UHS-I" SD cards at their full speed. It is not, however,
possible on the DB board. Due to physical connectivity connector supply is tied
to 3v and any attempt of changing voltage in order to operate in the fastest UHS
modes fails.
This patch enables equivalent SDHCI quirk in order to adjust controller
operation to system capabilities.
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1415980652-7429-3-git-send-email-mw@semihalf.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This patch adds tscadc DT entries for am437x-gp-evm
and am43x-epos-evm.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add node for RTC.
Note that on dra7xx are no separate interrupts for alram
and timer unlike for SoCs.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[nm@ti.com: update with rtc crossbar number]
Signed-off-by: Nishanth Menon <nm@ti.com>
[tony@atomide.com: updated comments]
Signed-off-by: Tony Lindgren <tony@atomide.com>
This adds support for the N900's battery to the
Nokia N900 DTS file.
Signed-off-by: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The HDMI node does not have a power supply attached. As a result its
power regulator, VDAC, shuts off on boot and screen loses signal.
This attaches VDAC (vdda_hdmi_dac) to HDMI's vdda-supply.
Signed-off-by: Adam YH Lee <adam.yh.lee@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Since commit e409dfbfcc ("ASoC: dapm: Add a few supply widget sanity
checks") the following error is seen:
imx-wm8962 sound: wm8962 <-> 202c000.ssi mapping ok
imx-wm8962 sound: Connecting non-supply widget to supply widget is not supported (AMIC -> MICBIAS)
imx-wm8962 sound: ASoC: no dapm match for AMIC --> (null) --> MICBIAS
imx-wm8962 sound: ASoC: Failed to add route AMIC -> direct -> MICBIAS
Invert the route between the microphone and the bias in order to fix it.
While at it, align the audio routing with imx6sl-evk and imx6sx-sdb, which have
the same wm8962 circuitry.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
imx6qdl-rex boards use sgtl5000 codec and the machine file (imx-sgtl5000)
already sets SSI in slave mode and codec in master mode, so there is no need
for having this property.
Cc: Robert Nelson <robertcnelson@gmail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
imx6qdl-gw5x boards use sgtl5000 codec and the machine file (imx-sgtl5000)
already sets SSI in slave mode and codec in master mode, so there is no need
for having this property.
Cc: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Use IMX6QDL_CLK_CKO definition instead of its hard coded clock number for better
readability.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This adds the NovaTech OrionLXm which is based on the AM335x SoC
http://www.novatechweb.com/substation-automation/orionlxm/
RAM: 512MiB
Flash: 4GB eMMC
Ethernet PHYs: 2x Micrel KSZ8041FTLI
USB ports are used internally by the expansion cards.
Internal micro SD slot is available.
Signed-off-by: George McCollister <george.mccollister@gmail.com>
Reviewed-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
- OMAP4/5: DSS hwmod cleanup patches from Tomi Valkeinen.
- DRA7xx: hwmod data support for UARTs 7 through 10.
- AM43xx: hwmod data support for the onboard ADC.
Basic build, boot, and PM test reports are here:
http://www.pwsan.com/omap/testlogs/omap-b-for-v3.19/20141121110550/
Note that I cannot test the DRA7xx or AM43xx patches, since I do not have
these boards.
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Merge tag 'for-v3.19/omap-b2' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v3.19/soc
Several more OMAP patches targeted for v3.19. They include:
- OMAP4/5: DSS hwmod cleanup patches from Tomi Valkeinen.
- DRA7xx: hwmod data support for UARTs 7 through 10.
- AM43xx: hwmod data support for the onboard ADC.
Basic build, boot, and PM test reports are here:
http://www.pwsan.com/omap/testlogs/omap-b-for-v3.19/20141121110550/
Note that I cannot test the DRA7xx or AM43xx patches, since I do not have
these boards.
- Add DTS support for a new chip in the SOCFPGA family, the Arria 10.
- Enable watchdog node.
- Add SPI nodes.
- Add the OCRAM node.
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Merge tag 'socfpga_dts_updates_for_v3.19' of git://git.rocketboards.org/linux-socfpga-next into next/dt
Pull "SoCFPGA DTS updates for v3.19" from Dinh Nguyen:
- Add DTS support for a new chip in the SOCFPGA family, the Arria 10.
- Enable watchdog node.
- Add SPI nodes.
- Add the OCRAM node.
* tag 'socfpga_dts_updates_for_v3.19' of git://git.rocketboards.org/linux-socfpga-next:
arm: dts: socfpga: Add a base DTSI for Altera's Arria10 SOC
arm: dts: socfpga: enable watchdog for socfpga platform
arm: dts: socfpga: Add SPI nodes to SOCFPGA DT.
arm: dts: socfpga: Add OCRAM node
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Add labels for LEDs on kzm9g-reference and koelsch
* Add Sound support to r8a7790/lager and r8a7791/koelsch
* Add IIC DMA nodes to r8a7790 and r8a7791
* Use SoC-specific IIC compatible properties on sh73a0 and r8a73a4
* Add SGX, MMP and VSP1 clocks to r8a7794
* Add USBDMAC{0,1} clocks to r8a7790 and r8a7791
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Merge tag 'renesas-dt2-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Pull "Second Round of Renesas ARM Based SoC DT Updates for v3.19" from Simon Horman:
* Add labels for LEDs on kzm9g-reference and koelsch
* Add Sound support to r8a7790/lager and r8a7791/koelsch
* Add IIC DMA nodes to r8a7790 and r8a7791
* Use SoC-specific IIC compatible properties on sh73a0 and r8a73a4
* Add SGX, MMP and VSP1 clocks to r8a7794
* Add USBDMAC{0,1} clocks to r8a7790 and r8a7791
* tag 'renesas-dt2-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (29 commits)
ARM: shmobile: r8a7791: add USBDMAC{0,1} clocks to device tree
ARM: shmobile: r8a7790: add USBDMAC{0,1} clocks to device tree
ARM: shmobile: r8a7794: Add MMP and VSP1 clocks to device tree
ARM: shmobile: r8a7794: Add SGX clock to device tree
ARM: shmobile: koelsch: add Volume Ramp usage on comment
ARM: shmobile: lager: add Volume Ramp usage on comment
ARM: shmobile: r8a7791: add DMA nodes for IIC
ARM: shmobile: r8a7790: add DMA nodes for IIC
ARM: shmobile: kzm9g-reference dts: Add labels for the LEDs
ARM: shmobile: koelsch dts: Add labels for the LEDs
ARM: shmobile: sh73a0 dtsi: Add SoC-specific IIC compatible properties
ARM: shmobile: r8a73a4 dtsi: Add SoC-specific IIC compatible properties
ARM: shmobile: koelsch: Sound DMA support via DVC on DTS
ARM: shmobile: koelsch: Sound DMA support via SRC on DTS
ARM: shmobile: koelsch: Sound DMA support via BUSIF on DTS
ARM: shmobile: koelsch: Sound DMA support on DTS
ARM: shmobile: koelsch: Sound PIO support on DTS
ARM: shmobile: koelsch: fixup I2C2 clock frequency
ARM: shmobile: lager: Sound DMA support via DVC on DTS
ARM: shmobile: lager: Sound DMA support via SRC on DTS
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- AHCI and SATA PHY nodes for BG2
- USB and USB PHZ nodes for BG2/BG2CD/BG2Q
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Merge tag 'berlin-dt-3.19-2' of git://git.infradead.org/users/hesselba/linux-berlin into next/dt
Pull "Berlin DT changes for v3.19 (round 2)" from Sebastian Hesselbarth:
- AHCI and SATA PHY nodes for BG2
- USB and USB PHZ nodes for BG2/BG2CD/BG2Q
* tag 'berlin-dt-3.19-2' of git://git.infradead.org/users/hesselba/linux-berlin:
ARM: dts: berlin: enable USB on the Google Chromecast
ARM: dts: berlin: add BG2CD nodes for USB support
ARM: dts: Berlin: enable USB on the BG2Q DMP
ARM: dts: berlin: add BG2Q nodes for USB support
ARM: berlin: Enable SATA on Sony NSZ-GS7
ARM: berlin: Add AHCI and SATA PHY nodes to BG2
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The Arria 10 is latest SOC+FPGA from the Altera SOCFPGA platform. The Arria10
SOC shares some similarities with the SOCFPGA Cyclone5 and Arria5, but there
are enough differences to warrant a new base dtsi.
The differences are:
* 3 EMAC controllers
* 5 I2C controllers
* 3 SPI controllers
* 1.5 GHZ dual A9s
* Support for DDR4
Besides the usual memory map and IRQ changes, the clock framework will be
different, so this patch just adds the fixed-clocks.
Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
- rate init for rk3288 clocks
- enablement of various peripherals
- new boardfile for Haoyu Marsboard (rk3066 based)
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Merge tag 'v3.19-rockchip-dts2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Pull "ARM: rockchip: second batch of dts related changes" from Heiko Stuebner:
- the dts part of the rk3288 smp support
- rate init for rk3288 clocks
- enablement of various peripherals
- new boardfile for Haoyu Marsboard (rk3066 based)
* tag 'v3.19-rockchip-dts2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: enable PWM on Radxa Rock
ARM: dts: rockchip: fix invalid unit-address in rk3188.dtsi
ARM: dts: rk3288: add VOP iommu nodes
ARM: dts: rockchip: add reset for CPU nodes
ARM: dts: rockchip: add intmem node for rk3288 smp support
ARM: dts: rockchip: add pmu references to cpus nodes
ARM: dts: rockchip: add serial aliases for rk3066 and rk3188
ARM: dts: rockchip: Add devicetree source for MarsBoard RK3066
ARM: dts: rockchip: Add EMAC Rockchip for RK3066 SoCs
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
A lot of things happened during that merge window, but mostly:
- Preliminary Support for the A80
- New Boards Support
+ Mele M3
+ Banana Pi
+ Optimus
+ OLinuXino Lime2
- Device Tree Relicensing to GPLv2/X11 dual license
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Merge tag 'sunxi-dt-for-3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt
Pull "Allwinner Device Tree Changes for 3.19" from Maxime Ripard:
A lot of things happened during that merge window, but mostly:
- Preliminary Support for the A80
- New Boards Support
+ Mele M3
+ Banana Pi
+ Optimus
+ OLinuXino Lime2
- Device Tree Relicensing to GPLv2/X11 dual license
* tag 'sunxi-dt-for-3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (52 commits)
ARM: dts: sun6i: Add ethernet support to M9 board
ARM: sun6i: DT: Add PLL6 multiple outputs
ARM: dts: sun6i: Add support for the status led
ARM: dts: sun6i: Add EHCI support for the M9 board
ARM: dts: sunxi: Add regulator-boot-on property to ahci-5v regulator
ARM: dts: sun7i: Cubietruck: add power supply regulator for USB OTG VBUS
ARM: dts: sun7i: Cubietruck: override regulator pin
ARM: sun7i: dtsi: add support for usbphy0
ARM: dtsi: sunxi: add common VBUS regulator
ARM: dts: sunxi: Banana Pi: increase startup-delay for the GMAC PHY regulator
ARM: dts: sunxi: Use sun4i-a10-apb1-clk for sun6i/sun8i apb2 clocks.
ARM: dts: sunxi: unify APB1 clock
ARM: dts: sun6i: Re-parent ahb1_mux to pll6 as required by dma controller
ARM: sun5i: olinuxino: Relicense the device tree under GPLv2/X11
ARM: sun4i: cubieboard: Relicense the device tree under GPLv2/X11
ARM: sun7i: pcduino3: Relicense the device tree under GPLv2/X11
ARM: sun4i: pcduino: Relicense the device tree under GPLv2/X11
ARM: sun7i: olinuxino lime: Relicense the device tree under GPLv2/X11
ARM: dts: sun9i: Enable uart4 for A80 Optimus board
ARM: dts: sun9i: Add uart4 pinmux setting for A80 SoC
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Pull "ARM: meson: DTS related changes" from Carlo Caione:
here is the pull request for the DT related changes for the 3.19.
It's mainly the work done by Beniamino for the preliminary support of
the Amlogic Meson8 SoC, the support for L2 cache and the I2C
controller.
Please note that the support for the Tronsmart S89 Elite TV box has not
been included since the Meson8 development will be done now on a
different dev board kindly provided by Amlogic.
* tag 'v3.19-meson-dts' of https://github.com/carlocaione/linux-meson:
ARM: dts: meson: add I2C controller nodes
ARM: meson: DTS: enable L2 cache
ARM: dts: add dtsi for Amlogic Meson8 SoCs
DTS: meson: Add forgotten compatible in board DTS
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
top of the multiplatform patches, this moves out
some drivers and reduced the amount of code carried
in arch/arm/mach-integrator.
- Move the Integrator/AP timer to drivers/clocksource
- Move the restart functionality to the device tree,
patches to enable restart for the Integrator have
been merged to the reset tree (orthogonal)
- Move debug LEDs to device tree (using the syscon
LED driver merged for v3.18)
- Move core module LEDs to device tree (using the
syscon LED driver merged for v3.18)
- Move the SoC driver (chip ID etc) to
drivers/soc/versatile/soc-integrator.c
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Merge tag 'integrator-v3.19-arm-soc-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/soc
Pull "ARM SoC Integrator updates for v3.19" from Linus Walleij:
Integrator updates for the v3.19 merge cycle on
top of the multiplatform patches, this moves out
some drivers and reduced the amount of code carried
in arch/arm/mach-integrator.
- Move the Integrator/AP timer to drivers/clocksource
- Move the restart functionality to the device tree,
patches to enable restart for the Integrator have
been merged to the reset tree (orthogonal)
- Move debug LEDs to device tree (using the syscon
LED driver merged for v3.18)
- Move core module LEDs to device tree (using the
syscon LED driver merged for v3.18)
- Move the SoC driver (chip ID etc) to
drivers/soc/versatile/soc-integrator.c
* tag 'integrator-v3.19-arm-soc-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
soc: move SoC driver for the ARM Integrator
ARM: integrator: move core module LED to device tree
ARM: integrator: move debug LEDs to syscon LED driver
ARM: integrator: move restart to the device tree
ARM: integrator: move AP timer to clocksource
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This adds critical trip points to the Jetson TK1 device tree.
The device will do a controlled shutdown when either the CPU, GPU
or MEM thermal zone reaches 101 degrees Celsius.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
This adds the soctherm thermal sensing and management unit to the
Tegra124 device tree along with the four thermal zones corresponding
to the four thermal sensors provided by soctherm.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
Add a DT node for the TRNG (True Random Number Generator) block.
Keep this block enabled as it does not depend on any external connection,
and thus should be available on all boards.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
all other nodes in bcm63138.dtsi use "interrupts", this had to be just a typo
which never got noticed, even it may have quite some consequences.
Signed-off-by: Radek Dostal <radek.dostal@streamunlimited.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
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Merge tag 'v3.19-next-dts' of https://github.com/mbgg/linux-mediatek into next/dt
Pull "Add support for mt6592, mt8127 and mt8135 Socs from Mediatek"
from Matthias Brugger:
Here comes the pull request which introduces basic support for
Mediatek SoCs mt6592, mt8127 and mt8135.
The patches for the mt81xx got merged in the late tree for v3.18 but
were not be merged at the end. They got a small fix regarding the
compatible and model string in the dts files.
* tag 'v3.19-next-dts' of https://github.com/mbgg/linux-mediatek:
dt-bindings: add documentation for Mediatek SoC
ARM: mediatek: add dts for mt6592-evb
ARM: mediatek: Add basic support for mt6592
dt-bindings: add more chips in documentation for Mediatek SoC
ARM: dts: Build dtb for mt8127 & mt8135
ARM: mediatek: add dts for MT8135 evaluation board.
ARM: mediatek: Add basic support for mt8135
ARM: mediatek: add dts for 8127 Moose board
ARM: mediatek: Add basic support for mt8127
Signed-off-by; Arnd Bergmann <arnd@arndb.de>
- some trivial fixes: macro for IRQ, license wording
- DMA description for sama5d4
- RTT as RTC driver definition plus associated GPBR for several SoCs
- addition of missing nodes: rtc for at91sam9rl, isi for at91sam9g45
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Merge tag 'at91-dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into next/dt2
Pull "Second DT batch for 3.19" from Nicolas Ferre:
- some trivial fixes: macro for IRQ, license wording
- DMA description for sama5d4
- RTT as RTC driver definition plus associated GPBR for several SoCs
- addition of missing nodes: rtc for at91sam9rl, isi for at91sam9g45
* tag 'at91-dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
ARM: at91/dt: at91sam9g45: add ISI node
ARM: at91/dt: enable the RTT block on the at91sam9m10g45ek board
ARM: at91/dt: enable the RTT block on the sam9g20ek board
ARM: at91/dt: add GPBR nodes
ARM: at91/dt: add RTT nodes to at91 dtsis
ARM: at91/dt: at91sam9rl: add rtc
ARM: at91: fix GPLv2 wording
ARM: at91/dt: sama5d4: add DMA support
ARM: at91/dt: sama5d4: use macro instead of numeric value
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Pull "Broadcom Cygnus SoC Device Tree changes" from Florian Fainelli:
This pull request contains the Broadcom Cygnus Device Tree changes:
- binding documentation for the SoC and clock
- cygnus SoC and clock dtsi files
- DTS for Cygnus Entreprise phone, BCM911360K and BCM958300K
* tag 'arm-soc/for-3.19/cygnus-dts-v2' of http://github.com/brcm/linux:
ARM: dts: Enable Broadcom Cygnus SoC
dt-bindings: Document Broadcom Cygnus SoC and clocks
[arnd: something went wrong here, we already had pulled an earlier
version of the same patches, which had the wrong license statement.
I've pulled this one over the old pull request and fixed up the
conflicts now]
Conflicts:
arch/arm/boot/dts/bcm-cygnus-clock.dtsi
arch/arm/boot/dts/bcm-cygnus.dtsi
arch/arm/boot/dts/bcm911360_entphn.dts
arch/arm/boot/dts/bcm911360k.dts
arch/arm/boot/dts/bcm958300k.dts
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch corrects the vendor-prefix for isl29028 in the compatible property from
"isil,isl29028" to "isl,isl29028" according to listed vendor-prefixes in
Documentation/devicetree/bindings/vendor-prefixes.txt. Incorrect vendor-prefix "isl"
was reported by checkpatch.pl warning for drivers/staging/iio/light/isl29028.c.
Thus incorrect vendor-prefix "isil" was corrected for every mention of device isl29028.
Signed-off-by: Darshana Padmadas <darshanapadmadas@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The model B and B+ differ in the GPIO lines for ACT and PWR leds, and the
I2S interface.
Signed-off-by: Matthias Klein <matthias.klein@linux.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Lee Jones <lee@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Fix currently harmless but wrong sizes for various GPMC connected
devices
- Set up timings for several GPMC connected devices to get rid of
bootloader dependencies in later patches
- Enable various drivers for dra7xx
- Prepare Igep boards to support new variants
- Add intial support for BeagleBoard-X15
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Merge tag 'omap-for-v3.19/dt-part1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Pull "Device tree related changes for omaps" from Tony Lindgren:
- Fix currently harmless but wrong sizes for various GPMC connected
devices
- Set up timings for several GPMC connected devices to get rid of
bootloader dependencies in later patches
- Enable various drivers for dra7xx
- Prepare Igep boards to support new variants
- Add intial support for BeagleBoard-X15
* tag 'omap-for-v3.19/dt-part1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (37 commits)
ARM: dts: DRA7: Add aliases for all serial ports
ARM: dts: Add am57xx-beagle-x15
ARM: OMAP2+: igep00x0: Add pdata-quirks for the btwilink device.
ARM: dts: omap3-igep00x0: Remove i2c2 node.
ARM: dts: omap3-igep0020-rev-f: Support IGEPv2 Rev. F
ARM: dts: omap3-igep0020-common: Introduce igep0020 common dtsi file.
ARM: dts: omap3-igep0030-rev-g: Support IGEP COM MODULE Rev. G
ARM: dts: omap3-igep0030-common: Introduce igep0030 common dtsi file.
ARM: dts: omap3-igep00x0: Move outside common file the on board Wifi module.
ARM: dts: omap3-igep0020: Specify IGEPv2 revision in device tree.
ARM: dts: omap3-igep0030: Specify IGEP COM revision in device tree.
ARM: dts: omap3-igep00x0: Move NAND configuration to a common place.
ARM: dts: omap3-igep00x0: Fix UART2 pins that aren't common.
ARM: dts: dra7: add labels to DWC3 nodes
ARM: dts: dra72x-evm: Enable CPSW and MDIO
ARM: dts: dra7-evm: Keep all VDD rails always-on
ARM: dts: dra72-evm: Add MMC nodes
ARM: dts: dra72-evm: Add power button node
ARM: dts: dra72-evm: Provide explicit pinmux for TPS PMIC
ARM: dts: dra72-evm: Add regulator information to USB2 PHYs
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
"dss_fck" is a hacky clock, used to work around problems with MODULEMODE
bit handling in DSS hwmods.
These problems have now been solved, so we can remove the dss_fck clock.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Archit Taneja <archit.taneja@gmail.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
RFBI iclk was set to point to hacky "dss_fck", which will be removed.
Instead use "l3_div_ck", which is the proper clock for this. "l3_div_ck"
is the parent of "dss_fck", so the clock rate is the same as previously.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Archit Taneja <archit.taneja@gmail.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
- Add reboot node, reusing syscon-reboot
- Add I2C nodes Hisilicon IP
- Add IR node based on Hisilicon IP
- Add Watchdog node based on ARM IP
- Add GPIO nodes based on ARM GPIO IP
- Add SATA node based on Hisilicon IP
- Add USB nodes
- Add MMC nodes based on Synopsys IP
- Add GMAC nodes based on Hisilicon IP
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Merge tag 'hix5hd2-dt-for-3.19' of git://github.com/hisilicon/linux-hisi into next/dt
Pull "ARM: DT: Hisilicon terminal SoC HiX5HD2 DT updates for 3.19" from Wei Xu:
- Add reboot node, reusing syscon-reboot
- Add I2C nodes Hisilicon IP
- Add IR node based on Hisilicon IP
- Add Watchdog node based on ARM IP
- Add GPIO nodes based on ARM GPIO IP
- Add SATA node based on Hisilicon IP
- Add USB nodes
- Add MMC nodes based on Synopsys IP
- Add GMAC nodes based on Hisilicon IP
* tag 'hix5hd2-dt-for-3.19' of git://github.com/hisilicon/linux-hisi:
ARM: dts: hix5hd2: add reboot node
ARM: dts: hix5hd2: add i2c node
ARM: dts: hix5hd2: add ir node
ARM: dts: hix5hd2: add wdg node
ARM: dts: hix5hd2: add gpio node
ARM: dts: hix5hd2: add sata node
ARM: dts: hix5hd2: add usb node
ARM: dts: hix5hd2: add mmc node
ARM: dts: hix5hd2: add gmac node
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Use keyboard as gpio-keys node name
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Merge tag 'renesas-dt-cleanups3-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Pull "Third Round of Renesas ARM Based SoC DT Cleanups for v3.19" from Simon Horman:
* Use keyboard as gpio-keys node name
* tag 'renesas-dt-cleanups3-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: kzm9g-reference: Use keyboard as gpio-keys node name
ARM: shmobile: koelsch: Use keyboard as gpio-keys node name
ARM: shmobile: lager: Use keyboard as gpio-keys node name
ARM: shmobile: armadillo800eva: Use keyboard as gpio-keys node name
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Enable DU using DT on marzen/r8a7779, lager/r8a7790 and koelsch/r8a7791
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Merge tag 'renesas-dt-du-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/cleanup
Pull "Renesas ARM Based SoC DT DU Updates for v3.19" from Simon Horman:
* Enable DU using DT on marzen/r8a7779, lager/r8a7790 and koelsch/r8a7791
* tag 'renesas-dt-du-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: koelsch: Enable DU device in DT
ARM: shmobile: koelsch-reference: Remove DU platform device
ARM: shmobile: lager: Enable DU device in DT
ARM: shmobile: lager-reference: Remove DU platform device
ARM: shmobile: marzen: Enable DU device in DT
ARM: shmobile: dts: Add common file for AA104XD12 panel
ARM: shmobile: r8a7791: Add DU node to device tree
ARM: shmobile: r8a7790: Add DU node to device tree
ARM: shmobile: r8a7779: Add DU node to device tree
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This contains the serial port numbering fixes that are required for the
serial port numbering to stay the same with or without the serial core
making use of the aliases defined in DT.
eMMC is also fixed for TN7 and Roth boards which were using the wrong
regulators.
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Merge tag 'tegra-for-3.18-fixes-for-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into fixes
Pull "ARM: tegra: Device tree fixes for v3.18-rc5" from Thierry Reding:
This contains the serial port numbering fixes that are required for the
serial port numbering to stay the same with or without the serial core
making use of the aliases defined in DT.
eMMC is also fixed for TN7 and Roth boards which were using the wrong
regulators.
* tag 'tegra-for-3.18-fixes-for-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: roth: Fix SD card VDD_IO regulator
ARM: tegra: Remove eMMC vmmc property for roth/tn7
ARM: dts: tegra: move serial aliases to per-board
ARM: tegra: Add serial port labels to Tegra124 DT
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Correct IIC0 parent clock on r8a7740
* Correct SD3CKCR address to device tree on r8a7790
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Merge tag 'renesas-dt-fixes-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes
Pull "Renesas ARM Based SoC DT Fixes for v3.18" from Simon Horman:
* Correct IIC0 parent clock on r8a7740
* Correct SD3CKCR address to device tree on r8a7790
* tag 'renesas-dt-fixes-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r8a7740 dtsi: Correct IIC0 parent clock
ARM: shmobile: r8a7790: Fix SD3CKCR address to device tree
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Enable the RTT and GPBR devices and specify the general purpose register
used to store the current time.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Enable the RTT and GPBR devices and specify the general purpose register
used to store the current time.
Enable wakeup on RTT event on the shutdown controller device.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
at91sam926x, at91sam9g45 and at91sam9rl SoCs all have at least one RTT
block.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Add rtc support to the at91sam9rl dtsi file.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
During the submission of these new sama5d4 files, the GPL notice mentioned the
device tree as a library, which is not really accurate.
Fix all these library mentions to reflect the fact that it's actually just a
file.
Reported-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
A fix for the A31 dma controller that requires the AHB clock to be parented to
PLL6 in order to operate.
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Merge tag 'sunxi-fixes-for-3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into fixes
Merge "Allwinner fixes for 3.18" from Maxime Ripard:
A fix for the A31 dma controller that requires the AHB clock to be parented to
PLL6 in order to operate.
* tag 'sunxi-fixes-for-3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
ARM: dts: sun6i: Re-parent ahb1_mux to pll6 as required by dma controller
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
There is a macro for the irq type.
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Explicitly set the dr_mode for the dwc3 controller on the
Snow board to host mode. This is required to ensure the
controller is initialized in the right mode if the kernel is
build with USB gadget support.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The LEDs on the kzm9g board are labeled using upper-case characters.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The LEDs on the koelsch board are labeled using upper-case characters.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The IIC nodes used the generic compatible properties only.
This causes the driver to fail when using Standard Speed, as the
operational clock is driven by the 104 MHz HP clock:
i2c-sh_mobile e6820000.i2c: timing values out of range: L/H=0x208/0x1bf
i2c-sh_mobile: probe of e6820000.i2c failed with error -22
Add the SoC-specific compatible property to fix this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The IIC nodes used the generic compatible properties only.
This may cause the driver to fail when using Standard Speed on IIC
masters where the operational clock is driven by the 130 MHz HP clock.
Add the SoC-specific compatible property to fix this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Current Koelsch I2C2 has 400kHz settings,
but, ak4643 audio codec chip which is connected to I2C2 can't
work such frequency.
Fixup I2C2 clock frequency to 100kHz.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Current Lager IIC2 is using default clock frequency,
but, ak4643 audio codec chip needs 100kHz
This patch clarifies IIC2 clock frequency as 100kHz.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable usb1 on Google Chromecast which is connected to micro-USB
plug used for external power supply, too.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Adds nodes describing the Marvell Berlin BG2CD USB PHY and USB. The BG2CD
SoC has 2 USB ChipIdea controllers, with usb0 host-only and usb1 dual-role
capable.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Enable the 2 available USB PHY and USB nodes on the Marvell Berlin BG2Q
DMP.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Adds nodes describing the Marvell Berlin BG2Q USB PHY and USB. The BG2Q
SoC has 3 USB host controller, compatible with ChipIdea.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Add nodes for I2C controllers A,B,AO, which are available in both
Meson6 and Meson8.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Carlo Caione <carlo@caione.org>
This enables the L2 cache controller available in Amlogic SoCs.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Carlo Caione <carlo@caione.org>
This adds a dtsi for Amlogic Meson8 SoCs. It differs from the Meson6
dtsi for the number of Cortex-A9 cores (4 vs 2) and for the frequency
of clk81.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Carlo Caione <carlo@caione.org>
Following Arnds review comments, update the miphy365 to follow the
common convention of naming the phy node names as phy@addr.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Suggested-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
At the moment we don't take a reference on some core interconnect
clocks which means when CCF turns off unused clocks the SoC will
hang. As a temp soltuion we will boot with clk_ignore_unused
parameter for all b2120 boards.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
The STiH410 is an advanced multi-HD AVC processor with 3D graphics acceleration
and 1.5-GHz ARM Cortex-A9 SMP CPU part of the stih407 family.
It has wide connectivity including USB 3.0, PCI-e, SATA and gigabit ethernet.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
The stih410 soc which will be added in the following commit is very similar to
the stih407, to enable maximum re-use of the dt files this commit abstracts the
common parts into a shared dt file stihxxx-b2120 for the board, and also a shared
file stih407-family.dtsi for the SoC.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This patch adds the required pin configiguration for the extra usb
controllers found on the stih410 device.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This patch adds the DT nodes for the 4 usb ehci and ohci usb controllers
on the stih416 SoC.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This usb picophy is found on stih415/6 SoC.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This patch adds the required pin config for all usb controllers
on the stih416.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
The Mele M9 has an ethernet board, enable it.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
PLL6 on sun6i has multiple outputs, just like the other sunxi platforms.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Some DT files had a typo with a missing "5" in sama5d3x first compatible string.
Signed-off-by: Peter Rosin <peda@axentia.se>
[nicolas.ferre@atmel.com: modify commit log]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
MAINTAINERS file to avoid missing PMIC and SoC related patches:
- Fix random hangs on am437x because of incorrect default
value for the DDR regulator
- Fix wrong partition name for NAND on am335x-evm
- Fix wrong pinctrl defines for dra7xx
- Update maintainers entries for PMICs and SoCs
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Merge tag 'omap-fixes-against-v3.18-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Merge "omap fixes against v3.18-rc4" from Tony Lindgren:
Few omap fixes for hangs and wrong pinctrl defines, and update
MAINTAINERS file to avoid missing PMIC and SoC related patches:
- Fix random hangs on am437x because of incorrect default
value for the DDR regulator
- Fix wrong partition name for NAND on am335x-evm
- Fix wrong pinctrl defines for dra7xx
- Update maintainers entries for PMICs and SoCs
* tag 'omap-fixes-against-v3.18-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
pinctrl: dra: dt-bindings: Fix output pull up/down
MAINTAINERS: Update entry for omap related .dts files to cover new SoCs
MAINTAINERS: add more files under OMAP SUPPORT
ARM: dts: AM437x-SK-EVM: Fix DCDC3 voltage
ARM: dts: AM437x-GP-EVM: Fix DCDC3 voltage
ARM: dts: AM43x-EPOS-EVM: Fix DCDC3 voltage
ARM: dts: am335x-evm: Fix 5th NAND partition's name
Signed-off-by: Olof Johansson <olof@lixom.net>
This enables user space access to the 3 PWM available on the Radxa Rock headers.
Signed-off-by: Julien CHAUVEAU <julien.chauveau@neo-technologies.fr>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The clock nodes for DSS VIDEO1/2 and HDMI have wrong register addresses.
This patch fixes the addresses so that they point to
CM_CLKSEL_VIDEO1_PLL_SYS, CM_CLKSEL_VIDEO2_PLL_SYS and
CM_CLKSEL_HDMI_PLL_SYS.
Reported-by: Somnath Mukherjee <somnath@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The mt6592-evb is an evaluation board based on the MT6592 SoC.
Signed-off-by: Howard Chen <ibanezchen@gmail.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* A dtsi for boards based on Mediatek MT6592 SoCs
* Compatible string in arch/arm/mach-mediatek/mediatek.c
Signed-off-by: Howard Chen <ibanezchen@gmail.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This allows the "make dtbs" to build the moose and mt8135-evbp1
for MediaTek SoC
Signed-off-by: Joe.C <yingjoe.chen@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
The Mele M9 / A1000G quad has a blue status led, add support for this.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Mele M9 / A1000G quad uses both usb-ports, one goes to an internal
usb wifi card, the other to a build-in usb-hub, so neither need their
OHCI companion controller to be enabled since the are always connected at
USB-2 speeds.
The controller which is attached to the wifi also does not need a vbus
regulator.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
