Commit Graph

31259 Commits

Author SHA1 Message Date
James Bottomley
92ab78315c x86/Voyager: make it build and boot
[
  mingo@elte.hu: these fixes are a subset of changes cherry-picked from:

     git://git.kernel.org:/pub/scm/linux/kernel/git/jejb/voyager-2.6.git

  They fix various problems that recent x86 changes caused in the Voyager
  subarchitecture: both APIC changes and cpumask changes and certain
  cleanups caused subarch assumptions to break.

  Most of these changes are obsolete as the subarch code has been removed
  from the x86 development tree - but we merge them upstream to make Voyager
  build and boot.
]

Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-31 18:26:07 +01:00
Jeremy Fitzhardinge
795f99b61d xen: setup percpu data pointers
Impact: fix xen booting

We need to access percpu data fairly early, so set up the percpu
registers as soon as possible.  We only need to load the appropriate
segment register.  We already have a GDT, but its hard to change it
early because we need to manipulate the pagetable to do so, and that
hasn't been set up yet.

Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
2009-01-31 14:28:58 +09:00
Jeremy Fitzhardinge
11e3a840cd x86: split loading percpu segments from loading gdt
Impact: split out a function, no functional change

Xen needs to be able to access percpu data from very early on.  For
various reasons, it cannot also load the gdt at that time.   It does,
however, have a pefectly functional gdt at that point, so there's no
pressing need to reload the gdt.

Split the function to load the segment registers off, so Xen can call
it directly.

Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
2009-01-31 14:28:54 +09:00
Brian Gerst
552be871e6 x86: pass in cpu number to switch_to_new_gdt()
Impact: cleanup, prepare for xen boot fix.

Xen needs to call this function very early to setup the GDT and
per-cpu segments.  Remove the call to smp_processor_id() and just
pass in the cpu number.

Signed-off-by: Brian Gerst <brgerst@gmail.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
2009-01-31 14:28:50 +09:00
Cliff Wickman
2749ebe320 x86: UV fix uv_flush_send_and_wait()
Impact: fix possible tlb mis-flushing on UV

uv_flush_send_and_wait() should return a pointer if the broadcast
remote tlb shootdown requests fail. That causes the conventional IPI
method of shootdown to be used.

Signed-off-by: Cliff Wickman <cpw@sgi.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
2009-01-31 14:23:37 +09:00
Ingo Molnar
d8106d2e24 x86, vm86: clean up invalid_vm86_irq()
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-31 04:21:26 +01:00
Ingo Molnar
009eb3fe14 x86, irq: describe NR_IRQ sizing details, clean up
Impact: cleanup

Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-31 04:21:25 +01:00
Ingo Molnar
c379698fda x86, irq_vectors.h: remove needless includes
Reduce include file dependencies a bit - remove the two headers
that are included in irq_vectors.h.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-31 04:21:24 +01:00
Ingo Molnar
9fc2e79d4f x86, irq: add IRQ layout comments
Describe the layout of x86 trap/exception/IRQ vectors and clean
up indentation and other small details.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-31 04:21:23 +01:00
Ingo Molnar
3e92ab3d7e x86, irqs, voyager: remove Voyager quirk
Remove a Voyager complication from the generic irq_vectors.h header.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-31 04:21:22 +01:00
Ingo Molnar
ed74ca6d5a x86, voyager: move Voyager-specific defines to voyager.h
They dont belong into the generic headers.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-31 04:21:21 +01:00
Ingo Molnar
647ad94fc0 x86, apic: clean up spurious vector sanity check
Move the spurious vector sanity check to the place where it's
defined - out of a .c file.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-31 04:21:20 +01:00
Ingo Molnar
5da690d29f x86, apic: unify the APIC vector enumeration
Most of the vector layout on 32-bit and 64-bit is identical now,
so eliminate the duplicated enumeration of the vectors.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-31 04:21:19 +01:00
Ingo Molnar
8f47e16348 x86: update copyrights
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-31 04:21:18 +01:00
Ingo Molnar
d1de36f5b5 x86, apic: clean up header section
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-31 04:21:17 +01:00
Ingo Molnar
193c81b979 x86, irq: add LOCAL_PERF_VECTOR
Add a slot for the performance monitoring interrupt. Not yet used
by any subsystem - but the hardware has it. (This eases integration
with performance monitoring code.)

Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-31 02:23:27 +01:00
Andreas Schwab
7fc49f1981 x86 setup: fix asm constraints in vesa_store_edid
Impact: fix potential miscompile (currently believed non-manifest)

As the comment explains, the VBE DDC call can clobber any register.
Tell the compiler about that fact.

Signed-off-by: Andreas Schwab <schwab@suse.de>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-30 23:55:25 +01:00
Jeremy Fitzhardinge
4767afbf1f x86/paravirt: fix missing callee-save call on pud_val
Impact: Fix build when CONFIG_PARAVIRT_DEBUG is enabled

Fix missed convertion to using callee-saved calls for pud_val, which
causes a compile error when CONFIG_PARAVIRT_DEBUG is enabled.

Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2009-01-30 14:52:39 -08:00
Jeremy Fitzhardinge
da5de7c22e x86/paravirt: use callee-saved convention for pte_val/make_pte/etc
Impact: Optimization

In the native case, pte_val, make_pte, etc are all just identity
functions, so there's no need to clobber a lot of registers over them.

(This changes the 32-bit callee-save calling convention to return both
EAX and EDX so functions can return 64-bit values.)

Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-01-30 14:51:45 -08:00
Jeremy Fitzhardinge
791bad9d28 x86/paravirt: implement PVOP_CALL macros for callee-save functions
Impact: Optimization

Functions with the callee save calling convention clobber many fewer
registers than the normal C calling convention.  Implement variants of
PVOP_V?CALL* accordingly.  This only bothers with functions up to 3
args, since functions with more args may as well use the normal
calling convention.

Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-01-30 14:51:45 -08:00
Jeremy Fitzhardinge
ecb93d1ccd x86/paravirt: add register-saving thunks to reduce caller register pressure
Impact: Optimization

One of the problems with inserting a pile of C calls where previously
there were none is that the register pressure is greatly increased.
The C calling convention says that the caller must expect a certain
set of registers may be trashed by the callee, and that the callee can
use those registers without restriction.  This includes the function
argument registers, and several others.

This patch seeks to alleviate this pressure by introducing wrapper
thunks that will do the register saving/restoring, so that the
callsite doesn't need to worry about it, but the callee function can
be conventional compiler-generated code.  In many cases (particularly
performance-sensitive cases) the callee will be in assembler anyway,
and need not use the compiler's calling convention.

Standard calling convention is:
	 arguments	    return	scratch
x86-32	 eax edx ecx	    eax		?
x86-64	 rdi rsi rdx rcx    rax		r8 r9 r10 r11

The thunk preserves all argument and scratch registers.  The return
register is not preserved, and is available as a scratch register for
unwrapped callee code (and of course the return value).

Wrapped function pointers are themselves wrapped in a struct
paravirt_callee_save structure, in order to get some warning from the
compiler when functions with mismatched calling conventions are used.

The most common paravirt ops, both statically and dynamically, are
interrupt enable/disable/save/restore, so handle them first.  This is
particularly easy since their calls are handled specially anyway.

XXX Deal with VMI.  What's their calling convention?

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-01-30 14:51:45 -08:00
Jeremy Fitzhardinge
9104a18dcd x86/paravirt: selectively save/restore regs around pvops calls
Impact: Optimization

Each asm paravirt-ops call says what registers are available for
clobbering.  This patch makes use of this to selectively save/restore
registers around each pvops call.  In many cases this significantly
shrinks code size.

Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-01-30 14:51:44 -08:00
Jeremy Fitzhardinge
b8aa287f77 x86: fix paravirt clobber in entry_64.S
Impact: Fix latent bug

The clobber is trying to say that anything except RDI is available for
clobbering, but actually clobbers everything.  This hasn't mattered
because the clobbers were basically ignored, but subsequent patches
will rely on them.

Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-01-30 14:51:44 -08:00
Jeremy Fitzhardinge
41edafdb78 x86/pvops: add a paravirt_ident functions to allow special patching
Impact: Optimization

Several paravirt ops implementations simply return their arguments,
the most obvious being the make_pte/pte_val class of operations on
native.

On 32-bit, the identity function is literally a no-op, as the calling
convention uses the same registers for the first argument and return.
On 64-bit, it can be implemented with a single "mov".

This patch adds special identity functions for 32 and 64 bit argument,
and machinery to recognize them and replace them with either nops or a
mov as appropriate.

At the moment, the only users for the identity functions are the
pagetable entry conversion functions.

The result is a measureable improvement on pagetable-heavy benchmarks
(2-3%, reducing the pvops overhead from 5 to 2%).

Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-01-30 14:51:44 -08:00
Jeremy Fitzhardinge
319f3ba52c xen: move remaining mmu-related stuff into mmu.c
Impact: Cleanup

Move remaining mmu-related stuff into mmu.c.
A general cleanup, and lay the groundwork for later patches.

Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-01-30 14:51:14 -08:00
H. Peter Anvin
9b7ed8faa0 Merge branch 'core/percpu' into x86/paravirt 2009-01-30 14:50:57 -08:00
Ingo Molnar
6b64ee02da x86, apic, 32-bit: add self-IPI methods
Impact: fix rare crash on 32-bit

The 32-bit APIC drivers had their send_IPI_self vectors set to NULL,
but ioapic_retrigger_irq() depends on it being always set. Fix it.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-30 23:42:18 +01:00
Manuel Lauss
2d2eca4d11 MIPS: Alchemy: time.c build fix
In Linus' current -git the cpumask member is now a pointer.

Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30 21:33:01 +00:00
Phil Sutter
0fc6bc0d6e MIPS: RB532: Export rb532_gpio_set_func()
This kernel symbol provides a way for drivers to switch on alternate
function for a certain GPIO pin. Turning it off is done implicitly when
changing the GPIO direction, as that would be fixed when using the given
pin als alternate function.

Signed-off-by: Phil Sutter <n0-1@freewrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30 21:33:01 +00:00
Phil Sutter
3828ee047d MIPS: RB532: Update headers
Remove the {set,get}_434_reg() prototypes, as the functions have been
removed. Also move the prototypes for {get,set}_latch_u5() to the correct
place.

Signed-off-by: Phil Sutter <n0-1@freewrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30 21:33:01 +00:00
Phil Sutter
1c4db8e828 MIPS: RB532: Simplify dev3 init
As rb532_dev3_ctl_res is not used by any platform device, it can be dropped
when not used for holding the physical address of the device 3 controller.

Also a size of one byte should suffice when ioremapping the physical
address mentioned above, as only a single byte is being read from and
written to it.

Signed-off-by: Phil Sutter <n0-1@freewrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30 21:33:01 +00:00
Phil Sutter
4ca3803f81 MIPS: RB532: Remove {get,set}_434_reg()
These kernel symbols are unused. Also, since dev3 init has been moved to
devices.c, set_434_reg() breaks compiling as it uses dev3.

Signed-off-by: Phil Sutter <n0-1@freewrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30 21:33:00 +00:00
Phil Sutter
36f2db4b9c MIPS: RB532: Move dev3 init code to devices.c
This code doesn't belong to gpio.c, as it's completely unrelated to
GPIO. As dev1 and dev2 init code is in devices.c, it seems to be a more
adequate place.

Signed-off-by: Phil Sutter <n0-1@freewrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30 21:33:00 +00:00
Phil Sutter
7060886fb7 MIPS: RB532: Fix set_latch_u5()
The data to be written is just a byte, so use writeb instead of writel.
Also, dev3.base contains the address, not the data so referencing here
is wrong.

Signed-off-by: Phil Sutter <n0-1@freewrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30 21:33:00 +00:00
Phil Sutter
deb1003329 MIPS: RB532: Fix init of rb532_dev3_ctl_res
This register just contains the address of the actual resource, so
initialisation has to be the same as cf_slot0_res and nand_slot0_res.

Signed-off-by: Phil Sutter <n0-1@freewrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30 21:33:00 +00:00
Phil Sutter
94d2cc1b8b MIPS: RB532: Use driver_data instead of platform_data
As the korina ethernet driver uses platform_get_drvdata() to extract the
driver specific data from the platform device, driver_data has to be
used here.

Signed-off-by: Phil Sutter <n0-1@freewrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30 21:33:00 +00:00
Phil Sutter
1452fc7d17 MIPS: RB532: Detect uart type, add platform device
Auto-detection works just fine, so use it instead of specifying the type
manually. Also define a platform device for the uart, as suggested by
David Daney.

Signed-off-by: Phil Sutter <n0-1@freewrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30 21:33:00 +00:00
Phil Sutter
84c2c562c1 MIPS: RB532: remove useless CF GPIO initialisation
As the pata-rb532-cf driver calls gpio_direction_input(), the calls to
rb532_gpio_set_func() and rb532_gpio_direction_input() are not needed since
the alternate function is automatically being disabled when changing the
GPIO pin direction.
The later two calls to rb532_gpio_set_{ilevel,istat}() are implicitly being
done by the IRQ initialisation of pata-rb532-cf.

Signed-off-by: Phil Sutter <n0-1@freewrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30 21:32:59 +00:00
Phil Sutter
33763d571d MIPS: RB532: Auto disable GPIO alternate function
When a driver calls gpio_set_direction_{input,output}(), it obviously
doesn't want the alternate function for that pin to be active (as the
direction would not matter in that case). This patch ensures alternate
function is disabled when the direction is being changed.

Signed-off-by: Phil Sutter <n0-1@freewrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30 21:32:59 +00:00
Phil Sutter
4aa0f4d726 MIPS: RB532: Add set_type() function to IRQ struct.
Interrupt Group 4 mapps the GPIO pins enabled as interrupt sources;
add defines to make this clear when addressing them later in code.

The mapped GPIOs support triggering on either level high or low. To
achieve this, the set_type() function calls rb532_gpio_set_ilevel() for
interrupts of the above mentioned group.

As there is no way to alter the triggering characteristics of the other
interrupts, accept level triggering on status high only. (This is just a
guess; but as the system boots fine and interrupt-driven devices (e.g.
serial console) work with no implications, it seems to be right.)

To clear a GPIO mapped IRQ, the source has to be cleared (i.e., the
interrupt status bit of the corresponding GPIO pin). This is done inside
rb532_disable_irq().

After applying these changes I could undo most of my former "fixes" to
pata-rb532-cf. Particularly all interrupt handling can be done
generically via set_irq_type() as it was before.

Signed-off-by: Phil Sutter <n0-1@freewrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30 21:32:59 +00:00
Phil Sutter
fb91e2cb7d MIPS: RC32434: Define io_map_base for PCI controller
The code is rather based on trial-and-error than knowledge. Verified Via
Rhine functionality in PIO as well as MMIO mode.

[Looks sane -- Ralf]

Signed-off-by: Phil Sutter <n0-1@freewrt.org>
Tested-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30 21:32:59 +00:00
Phil Sutter
5379a5fdf3 MIPS: RB532: Fix bit swapping in rb532_set_bit()
The algorithm works unconditionally. If bitval is one, the first line is
a no op and the second line sets the bit at offset position. Vice versa,
if bitval is zero, the first line clears the bit at offset position and
the second line is a no op.

Signed-off-by: Phil Sutter <n0-1@freewrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30 21:32:59 +00:00
David Daney
f839490ab4 MIPS: Use hardware watchpoints on all R1 and R2 CPUs.
The previous definition inadvertently omits Octeon which currently is
treated as an architecture variant separate from MIPS32 and MIPS64.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30 21:32:59 +00:00
David Daney
8bc6d05b48 MIPS: Read watch registers with interrupts disabled.
If a context switch occurred between the watch exception and reading the
watch registers, it would be possible for the new process to corrupt their
state.  Enabling interrupts only after the watch registers are read avoids
this race.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30 21:32:58 +00:00
David Daney
7adbedaf44 MIPS: Fix a typo in watchpoint register structure.
This fixes the ptrace ABI for watch registers, and should allow 64bit
kernels to use the watch register support.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30 21:32:58 +00:00
Atsushi Nemoto
65655b5a94 MIPS: TXx9: Add support for TX4939 internal RTC
Add platform support to use rtc-tx4939 driver.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30 21:32:58 +00:00
Ralf Baechle
42fe7ee31f MIPS: R2: Fix broken installation of cache error handler.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30 21:32:58 +00:00
Ralf Baechle
634286f127 MIPS: IP27: Switch from DMA_IP27 to DMA_COHERENT
The special IP27 DMA code selected by DMA_IP27 has been removed a while
ago turning DMA_IP27 into almost a nop.  Also fixup the broken logic of
its last users memcpy.S and memcpy-inatomic.s.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30 21:32:58 +00:00
Ralf Baechle
732f0462d5 MIPS: Add return value checks to user_termio_to_kernel_termios()
And while at it, convert all functions from macros to inline functions
for sanity.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30 21:32:57 +00:00
Huang Weiyi
2d8965156b MIPS: Octeon: Remove duplicated #includes
Signed-off-by: Huang Weiyi <weiyi.huang@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30 21:32:57 +00:00
Ralf Baechle
915ec1e216 MIPS: atomic_*(): Change type of intermediate variables.
This shaves of 1912 bytes of an IP27 defconfig kernel and avoids
unexpected overflow behaviour in atomic_sub_if_positive.  Apply the same
changes to the atomic64_* functions for consistency.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30 21:32:57 +00:00
Ralf Baechle
c7c1e3846b MIPS: Port "mm: invoke oom-killer from page fault" from UML / x86
Original commit 1c0fe6e3bd.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30 21:32:57 +00:00
Ralf Baechle
a8ca8b64e3 MIPS: Avoid destructive invalidation on partial cachelines.
See discussion e9c3a7c20901051031y528d0d31r18d44c5096c59e0@mail.gmail.com.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30 21:32:57 +00:00
Ralf Baechle
012703e0fc MIPS: SMTC: Fix build after recent creditial changes.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30 21:32:56 +00:00
Jaswinder Singh Rajput
7cff3608d2 headers_check fix: x86, swab.h
fix the following 'make headers_check' warnings:

  usr/include/asm/swab.h:4: include of <linux/types.h> is preferred over <asm/types.h>
  usr/include/asm/swab.h:7: found __[us]{8,16,32,64} type without #include <linux/types.h>

Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com>
2009-01-31 00:19:32 +05:30
Jaswinder Singh Rajput
2de548faa7 headers_check fix: x86, sigcontext32.h
fix the following 'make headers_check' warning:

  usr/include/asm/sigcontext32.h:20: found __[us]{8,16,32,64} type without #include <linux/types.h>

Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com>
2009-01-31 00:18:58 +05:30
Jaswinder Singh Rajput
e59afe6a21 headers_check fix: x86, sigcontext.h
fix the following 'make headers_check' warnings:

  usr/include/asm/sigcontext.h:5: include of <linux/types.h> is preferred over <asm/types.h>
  usr/include/asm/sigcontext.h:24: found __[us]{8,16,32,64} type without #include <linux/types.h>

Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com>
2009-01-31 00:18:30 +05:30
Jaswinder Singh Rajput
420ab35eef headers_check fix: x86, ptrace-abi.h
fix the following 'make headers_check' warnings:

  usr/include/asm/ptrace-abi.h:86: include of <linux/types.h> is preferred over <asm/types.h>
  usr/include/asm/ptrace-abi.h:93: found __[us]{8,16,32,64} type without #include <linux/types.h>

Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com>
2009-01-31 00:18:03 +05:30
Jaswinder Singh Rajput
d122072cc0 headers_check fix: x86, mtrr.h
fix the following 'make headers_check' warning:

  usr/include/asm/mtrr.h:61: found __[us]{8,16,32,64} type without #include <linux/types.h>

Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com>
2009-01-31 00:17:39 +05:30
Jaswinder Singh Rajput
999b697b9d headers_check fix: x86, mce.h
fix the following 'make headers_check' warnings:

  usr/include/asm/mce.h:7: include of <linux/types.h> is preferred over <asm/types.h>
  usr/include/asm/mce.h:29: found __[us]{8,16,32,64} type without #include <linux/types.h>

Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com>
2009-01-31 00:17:13 +05:30
Jaswinder Singh Rajput
cef3767852 headers_check fix: x86, kvm.h
fix the following 'make headers_check' warnings:

  usr/include/asm/kvm.h:9: include of <linux/types.h> is preferred over <asm/types.h>
  usr/include/asm/kvm.h:16: found __[us]{8,16,32,64} type without #include <linux/types.h>

Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com>
2009-01-31 00:16:44 +05:30
Jaswinder Singh Rajput
999721ca6d headers_check fix: x86, e820.h
fix the following 'make headers_check' warning:

  usr/include/asm/e820.h:44: found __[us]{8,16,32,64} type without #include <linux/types.h>

Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com>
2009-01-31 00:16:22 +05:30
Ingo Molnar
c43e0e46ad Merge branch 'linus' into core/percpu
Conflicts:
	kernel/irq/handle.c
2009-01-30 18:23:30 +01:00
Yinghai Lu
26f7ef14a7 x86: don't treat bigsmp as non-standard
just like 64 bit switch from flat logical APIC messages to
flat physical mode automatically.

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-30 15:24:37 +01:00
Yinghai Lu
43f39890db x86: seperate default_send_IPI_mask_sequence/allbutself from logical
Impact: 32-bit should use logical version

there are two version: for default_send_IPI_mask_sequence/allbutself
one in ipi.h and one in ipi.c for 32bit

it seems .h version overwrote ipi.c for a while.

restore it so 32 bit could use its old logical version.
also remove dupicated functions in .c

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-30 15:21:24 +01:00
Yinghai Lu
1ff2f20de3 x86: fix compiling with 64bit with def_to_bigsmp
only need to do cut off with 32bit

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-30 15:21:23 +01:00
Yinghai Lu
36ef4944ee x86, apic unification: remove left over files
Impact: cleanup

remove unused files

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-30 15:21:23 +01:00
Randy Dunlap
5872fb94f8 Documentation: move DMA-mapping.txt to Doc/PCI/
Move DMA-mapping.txt to Documentation/PCI/.

DMA-mapping.txt was supposed to be moved from Documentation/ to
Documentation/PCI/.  The 00-INDEX files in those two directories
were updated, along with a few other text files, but the file
itself somehow escaped being moved, so move it and update more
text files and source files with its new location.

Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com>
Acked-by: Greg Kroah-Hartman <gregkh@suse.de>
cc:	Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-01-29 18:19:29 -08:00
Linus Torvalds
6e3eed9850 Merge git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux-2.6-for-linus
* git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux-2.6-for-linus:
  lguest: Fix a memory leak with the lg object during launcher close
  lguest: disable the FORTIFY for lguest.
  lguest: typos fix
2009-01-29 18:10:36 -08:00
Ivan Kokshaysky
945048ca36 alpha: fix the BUG() macro
The commit "alpha: teach the compiler that BUG doesn't return"
(ed6b9b97f4) moved the asm code into inline
function which takes __FILE__ and __LINE__ as arguments.  This violates
asm constrains there ("i" - an immediate operand with constant value), so
that compile may result in warning or error, depending on compiler
version.

Just adding an infinite loop to the BUG() is sufficient.

Signed-off-by: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-01-29 18:04:44 -08:00
Ivan Kokshaysky
ee0c468bb1 alpha: compile fixes
- jensen build: fix conflicting declarations for pci_alloc_consistent()
  and undefined virt_to_phys();

- SMP: arch/alpha/kernel/smp.c:124: warning: passing argument 2
       of '__cpu_test_and_set' discards qualifiers from pointer target type
  Interestingly, this only happens with gcc-4.2; gcc <= 4.1 and gcc-4.3
  are OK. Fixed with extra assignment.

Signed-off-by: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Richard Henderson <rth@twiddle.net>
Cc: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-01-29 18:04:44 -08:00
Ivan Kokshaysky
e5d9a90c36 alpha: use syscall wrappers
Convert OSF syscalls and add alpha specific SYSCALL_ALIAS() macro.

Signed-off-by: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Richard Henderson <rth@twiddle.net>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-01-29 18:04:44 -08:00
Atsushi SAKAI
72410af921 lguest: typos fix
3 points

lguest_asm.S => i386_head.S
LHCALL_BREAK => LHREQ_BREAK
perferred    => preferred

Signed-off-by: Atsushi SAKAI <sakaia@jp.fujitsu.com>
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
2009-01-30 11:34:10 +10:30
Grant Likely
e489a44e24 powerpc/5200: Bugfix for PCI mapping of memory and IMMR
This patch ensures that memory gets properly mapped into the PCI
address space.  Without this patch, the memory window BAR is left
at whatever value happened to be loaded into the BAR when Linux
was booted.  Without this patch, memory could end up getting mapped
at any of the 1G address boundaries instead of at '0' where Linux
expects it.

Similarly, this patch also ensures that the internally memory mapped
registers (IMMR) are mapped to the correct PCI address range.

Without this patch, PCI appears to work correctly until a PCI
device is inserted which DMAs into memory.

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Tested-by: Wolfram Sang <w.sang@pengutronix.de>
2009-01-29 17:08:41 -07:00
Grant Likely
d35ec494a6 powerpc/5200: update defconfigs
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2009-01-29 17:08:38 -07:00
Yinghai Lu
4272ebfbef x86: allow more than 8 cpus to be used on 32-bit
X86_PC is the only remaining 'sub' architecture, so we dont need
it anymore.

This also cleans up a few spurious references to X86_PC in the
driver space - those certainly should be X86.

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-30 00:20:22 +01:00
Suresh Siddha
fbeb2ca022 x86: unify genapic code, unify subarchitectures, remove old subarchitecture code, xapic fix
xapic fix for 32bit platform with less than 8 cpu's.

Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-29 21:25:28 +01:00
Ingo Molnar
3769e7b4d8 x86/Voyager: move to the X86_32_NON_STANDARD code section
Make Voyager depend on X86_32_NON_STANDARD - it is a non-standard 32-bit
SMP architecture.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-29 14:17:21 +01:00
Ingo Molnar
e0c7ae376a x86: rename X86_GENERICARCH to X86_32_NON_STANDARD
X86_GENERICARCH is a misnomer - it contains non-PC 32-bit architectures
that are not included in the default build.

Rename it to X86_32_NON_STANDARD.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-29 14:17:20 +01:00
Ingo Molnar
e2c75d9f54 x86: remove the subarch menu
Remove the subarch menu and standardize on X86_PC.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-29 14:17:19 +01:00
Ingo Molnar
6a48565ed6 x86: move X86_VSMP from subarch menu
Move X86_VSMP out of the subarch menu - this way it can be enabled
together with standard PC support as well, in the same kernel.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-29 14:17:18 +01:00
Ingo Molnar
9c39801763 x86: move non-standard 32-bit platform Kconfig entries
- make X86_GENERICARCH depend X86_NON_STANDARD

- move X86_SUMMIT, X86_ES7000 and X86_BIGSMP out of the subarchitecture
  menu and under this option

Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-29 14:17:17 +01:00
Ingo Molnar
f67ae5c9e5 x86: move VOYAGER to the NON_STANDARD_PLATFORM section
Move X86_ELAN (old, NCR hw platform built on Intel CPUs) from the
subarchitecture menu to the non-standard-platform section.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-29 14:17:16 +01:00
Ingo Molnar
9e111f3e16 x86: move ELAN to the NON_STANDARD_PLATFORM section
Move X86_ELAN (old, AMD based web-boxes) from the subarchitecture
menu to the non-standard-platform section.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-29 14:17:15 +01:00
Ingo Molnar
06ac8346af x86: cleanup, introduce CONFIG_NON_STANDARD_PLATFORMS
Introduce a Y/N Kconfig option for non-PC x86 platforms.

Make VisWS, RDC321 and SGI/UV depend on this.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-29 14:17:14 +01:00
Ingo Molnar
1ec2dafd93 x86/Voyager: remove ISA quirk
Voyager has this ISA quirk (because Voyager has no ISA support):

 config ISA
 	bool "ISA support"
	depends on !X86_VOYAGER

There's a ton of x86 hardware that does not support ISA, and because
most ISA drivers cannot auto-detect in a safe way, the convention in
the kernel has always been to not enable ISA drivers if they are not
needed.

Voyager users can do likewise - no need for a Kconfig quirk.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-29 14:17:13 +01:00
Ingo Molnar
1c61d8c309 x86/Voyager: remove power management Kconfig quirk
Voyager has this PM/ACPI Kconfig quirk:

 menu "Power management and ACPI options"
	depends on !X86_VOYAGER

Most of the PM features are auto-detect so they should be safe to run
on just about any hardware. (If not, those instances need fixing.)

In any case, if a kernel is built for Voyager, the power management
options can be disabled.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-29 14:17:12 +01:00
Ingo Molnar
4b19ed9155 x86/Voyager: remove HOTPLUG_CPU Kconfig quirk
Voyager has this Kconfig quirk:

 config HOTPLUG_CPU
 	bool "Support for hot-pluggable CPUs"
	depends on SMP && HOTPLUG && !X86_VOYAGER

But this exception will be moot once Voyager starts using the
generic x86 code.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-29 14:17:12 +01:00
Ingo Molnar
e006235e5b x86/Voyager: remove MCE quirk
If no MCE code is desired on Voyager hw then the solution
is to turn them off in the .config - and to extend the MCE
code to not initialize on Voyager.

Remove the build-time quirk.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-29 14:17:11 +01:00
Ingo Molnar
7cd92366a5 x86/Voyager: remove APIC/IO-APIC Kbuild quirk
The lapic/ioapic code properly auto-detects and is safe to run on CPUs that
have no local APIC. (or which have their lapic turned off in the hardware)

Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-29 14:17:10 +01:00
Ingo Molnar
c3e6a2042f x86/Voyager: remove PARAVIRT Kconfig quirk
Remove this Kconfig quirk:

 config PARAVIRT
 	bool "Enable paravirtualization code"
	depends on !X86_VOYAGER
 	help

Voyager support built into a kernel does not preclude paravirt support.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-29 14:17:09 +01:00
Ingo Molnar
54523edd23 x86/Voyager: remove KVM_GUEST quirk
Voyager has this quirk currently:

 config KVM_GUEST
 	bool "KVM Guest support"
 	select PARAVIRT
	depends on !X86_VOYAGER

Voyager support built into a kernel image does not exclude
KVM paravirt guest support - so remove this quirk.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-29 14:17:08 +01:00
Ingo Molnar
e084e53100 x86/Voyager: remove KVM_CLOCK quirk
Voyager has this build-time quirk to exclude KVM_CLOCK:

 	bool "KVM paravirtualized clock"
 	select PARAVIRT
 	select PARAVIRT_CLOCK
	depends on !X86_VOYAGER

Voyager support built into a kernel image does not exclude
KVM paravirt clock support - so remove this quirk.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-29 14:17:07 +01:00
Ingo Molnar
f154f47d51 x86/Voyager: remove VMI Kconfig quirk
x86/Voyager has this build-time quirk:

 	bool "VMI Guest support"
 	select PARAVIRT
 	depends on X86_32
	depends on !X86_VOYAGER

Since VMI is auto-detected (and Voyager will be auto-detected) there's no
reason for this quirk.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-29 14:17:06 +01:00
Ingo Molnar
36619a8a80 x86/VisWS: remove Kconfig quirk
VisWS has this quirk currently:

 config X86_VISWS
 	bool "SGI 320/540 (Visual Workstation)"
	depends on X86_32 && PCI && !X86_VOYAGER && X86_MPPARSE && PCI_GODIRECT

The !Voyager quirk is unnecessary.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-29 14:17:05 +01:00
Ingo Molnar
550fe4f198 x86/Voyager: remove X86_FIND_SMP_CONFIG Kconfig quirk
x86/Voyager had this Kconfig quirk:

 config X86_FIND_SMP_CONFIG
	def_bool y
	depends on X86_MPPARSE || X86_VOYAGER

Which splits off the find_smp_config() callback into a build-time quirk.

Voyager should use the existing x86_quirks.mach_find_smp_config() callback
to introduce SMP-config quirks. NUMAQ-32 and VISWS already use this.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-29 14:17:04 +01:00
Ingo Molnar
f095df0a0c x86/Voyager: remove X86_BIOS_REBOOT Kconfig quirk
Voyager has this Kconfig quirk:

config X86_BIOS_REBOOT
	bool
	depends on !X86_VOYAGER
	default y

Voyager should use the existing machine_ops.emergency_restart reboot
quirk mechanism instead of a build-time quirk.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-29 14:17:03 +01:00
Ingo Molnar
23394d1c93 x86/Voyager: remove X86_HT Kconfig quirk
Voyager has this Kconfig quirk:

	depends on (X86_32 && !X86_VOYAGER) || X86_64

That is unnecessary as HT support is CPUID driven and explicitly
 enumerated.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-29 14:17:02 +01:00
Ingo Molnar
c0b5842a45 x86: generalize boot_cpu_id
x86/Voyager can boot on non-zero processors. While that can probably
be fixed by properly remapping the physical CPU IDs, keep boot_cpu_id
for now for easier transition - and expand it to all of x86.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-29 14:17:01 +01:00
Ingo Molnar
3e5095d152 x86: replace CONFIG_X86_SMP with CONFIG_SMP
The x86/Voyager subarch used to have this distinction between
 'x86 SMP support' and 'Voyager SMP support':

 config X86_SMP
	bool
	depends on SMP && ((X86_32 && !X86_VOYAGER) || X86_64)

This is a pointless distinction - Voyager can (and already does) use
smp_ops to implement various SMP quirks it has - and it can be extended
more to cover all the specialities of Voyager.

So remove this complication in the Kconfig space.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-29 14:17:00 +01:00