Commit Graph

1059 Commits

Author SHA1 Message Date
Eric Huang
9dcfc1936a drm/amd/powerplay: add functions set/get_fan_control_mode in hwmgr for Tonga.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:48 -05:00
Eric Huang
7ae0a66134 drm/amd/powerplay: Fix a bug in fan control setting default mode for Tonga and Fiji.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:48 -05:00
Eric Huang
601038142f drm/amd/powerplay: Add thermal protection support for Fiji.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:47 -05:00
Eric Huang
ea617bc9f9 drm/amd/powerplay: add display configeration changed function in hwmgr for Fiji.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:47 -05:00
Qiang Yu
bd90dd89e5 drm/amdgpu: Prepare DKMS build for powerplay module.
Signed-off-by: Qiang Yu <Qiang.Yu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-12-21 16:42:46 -05:00
Eric Huang
0bbb817618 drm/amd/amdgpu: enable uvd&vce clock gating for Fiji.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:46 -05:00
Eric Huang
0689a57013 drm/amd/amdgpu: add vce3.0 clock gating support. (v2)
v2: fix grbm locking

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:45 -05:00
Eric Huang
9b08a30647 drm/amd/amdgpu: add uvd6.0 clock gating support. (v2)
v2: fix bug in register mask setting.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:45 -05:00
Eric Huang
91c4c98155 drm/amd/powerplay: add multimedia power gating support for Fiji.
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:44 -05:00
Jammy Zhou
b57fd5663e drm/amdgpu: rename fiji_smumgr.h to fiji_smum.h
This conflicts with fiji_smumgr.h from powerplay
in DKMS environment

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Jordan Lazare <Jordan.Lazare@amd.com>
2015-12-21 16:42:44 -05:00
Jammy Zhou
dbd29f0d85 drm/amdgpu: rename tonga_smumgr.h to tonga_smum.h
This conflicts with the tonga_smumgr.h from powerplay
in DKMS environement

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Jordan Lazare <Jordan.Lazare@amd.com>
2015-12-21 16:42:43 -05:00
David Rokhvarg
6bd48d2404 drm/amd/powerplay: Add PPLib debug print macro.
- The macro is silent by default.
- Use the macro to print Display Configuration - related changes.

Signed-off-by: David Rokhvarg <David.Rokhvarg@amd.com>
2015-12-21 16:42:42 -05:00
Rex Zhu
0f8b106e11 drm/amd/powerplay: enable/disable NB pstate feature for Carrizo.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: David Rokhvarg <David.Rokhvarg@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-12-21 16:42:42 -05:00
Rex Zhu
73afe62101 drm/amd/powerplay: enable set_cpu_power_state task. (v2)
v2: integrate Jammy's crash fix

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-12-21 16:42:41 -05:00
Rex Zhu
7fb72a1fc0 drm/amd/powerplay: export interface to DAL to init/change display configuration.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: David Rokhvarg <David.Rokhvarg@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-12-21 16:42:41 -05:00
Rex Zhu
aceae1bfd9 drm/amd/powerplay: add smc msg for NB P-State switch
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: David Rokhvarg <David.Rokhvarg@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-12-21 16:42:40 -05:00
Rex Zhu
73c9f22288 drm/amd/powerplay: add new function point in hwmgr.
1. for set_cpu_power_state
2. restore display configuration

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-12-21 16:42:40 -05:00
Tom St Denis
9c97e75f0f amdgpu/powerplay: Add Stoney to list of early init cases
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:39 -05:00
Rex Zhu
c9fe74e68b drm/amd/powerplay: fix warning of cast to pointer from integer of different size.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:39 -05:00
rezhu
09b7a98622 drm/amd/powerplay: fix warning of cast to pointer from integer of different size.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:38 -05:00
Alex Deucher
9c0bad9074 drm/amd/powerplay: implement smc state upload for CZ
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:38 -05:00
Alex Deucher
d39d5c2c9d drm/amd/powerplay: add atomctrl function to calculate CZ sclk dividers
Use atombios to calculate the values.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:37 -05:00
Eric Huang
92b05d827d drm/amd/powerplay: enable clock gating for Fiji.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:37 -05:00
Eric Huang
6cec2655fa drm/amd/powerplay: add parts of system clock gating support for Fiji. (v2)
Removed fiji_mgcg_cgcg_init that is affected and redundant for new implementation.

v2: re-add mgcg_cgcg init

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:36 -05:00
Eric Huang
3c997d2412 drm/amdgpu: add sdma clock gating support for Fiji.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:36 -05:00
Eric Huang
a0d69786b5 drm/amd/amdgpu: add gmc clock gating support for Fiji.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:35 -05:00
Eric Huang
6e378858df drm/amd/amdgpu: add gfx clock gating support for Fiji.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:35 -05:00
Alex Deucher
0104aa21a9 drm/amd/powerplay/tonga: Add UVD DPM init
Load the UVD DPM state into the SMC.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:34 -05:00
kbuild test robot
62a03f6d58 drm/amd/powerplay: fix boolreturn.cocci warnings
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/tonga_hwmgr.c:2653:9-10: WARNING: return of 0/1 in function 'is_pcie_gen2_supported' with return type bool
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/tonga_hwmgr.c:2645:9-10: WARNING: return of 0/1 in function 'is_pcie_gen3_supported' with return type bool

 Return statements in functions returning bool should use
 true/false instead of 1/0.
Generated by: scripts/coccinelle/misc/boolreturn.cocci

CC: yanyang1 <young.yang@amd.com>
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:34 -05:00
Alex Deucher
464cea3e35 drm/amdgpu/powerplay/fiji: query supported pcie info from cgs (v2)
Rather than hardcode it.

v2: integrate spc fix from Rex

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:33 -05:00
Alex Deucher
834b694cc3 drm/amdgpu/powerplay/tonga: query supported pcie info from cgs (v2)
Rather than hardcode it.

v2: integrate spc fix from Rex

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:33 -05:00
Alex Deucher
cfd316d59e drm/amdgpu/cgs: add sys info query for pcie gen and link width
Needed by powerplay to properly handle pcie dpm switching.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:32 -05:00
Alex Deucher
d0dd7f0cc3 drm/amdgpu: store pcie gen mask and link width
We'll need this later for pcie dpm.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:32 -05:00
Alex Deucher
16881da6c0 drm/amdgpu: extract pcie helpers to common header
These will be used by multiple powerplay drivers and
other IP modules.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:30 -05:00
Alex Deucher
74c577b031 drm/amd/powerplay/fiji: enable pcie and mclk forcing for low
When forcing the lowest state also force mclk and pcie.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:30 -05:00
Alex Deucher
9fe1837d18 drm/amd/powerplay/tonga: enable pcie and mclk forcing for low
When forcing the lowest state also force mclk and pcie.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:29 -05:00
Rex Zhu
f4caf3e584 drm/amd/powerplay: refine the logic of whether need to update power state.
Better handle power state changes.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-12-21 16:42:29 -05:00
Rex Zhu
e829ecdb15 drm/amd/powerplay: implement new funcs to check current states for tonga.
Implement the new callbacks for tonga.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-12-21 16:42:28 -05:00
Rex Zhu
09b4c872fe drm/amd/powerplay: add and export hwmgr interface to eventmgr to check hw states.
Interface between hwmgr and eventmgr.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-12-21 16:42:28 -05:00
Jammy Zhou
e61710c59d drm/amdgpu: support per device powerplay enablement (v2)
The amdgu_powerplay variable is global for multiple GPU instances.

v2: fold in Flora's module option change, protect adev reference in
macros

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-12-21 16:42:27 -05:00
Rex Zhu
8804b8d5b0 drm/amdgpu: enable sysfs interface for powerplay
Same interface exposed in pre-powerplay dpm code.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:27 -05:00
Rex Zhu
3af76f23a4 drm/amdgpu: export fan control functions to amdgpu
Hook up the amdgpu thermal control callbacks for powerplay.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:26 -05:00
Rex Zhu
cac9a19919 drm/amdgpu/powerplay: implement fan control interface in amd_powerplay_funcs
This adds the interface needed to expose powerplay fan control to sysfs
via hwmon.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:26 -05:00
Rex Zhu
1e4854e96c drm/amdgpu/powerplay: implement thermal control for tonga.
Implement thermal and fan control for tonga.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:25 -05:00
Rex Zhu
2dfea9cd1f drm/amdgpu/powerplay: enable thermal interrupt task in eventmgr.
Add thermal handling to the event manager.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:25 -05:00
Rex Zhu
fba4eef584 drm/amdgpu/powerplay: add thermal control interface in hwmgr.
Thermal controller interface.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:24 -05:00
Rex Zhu
251bb34fa4 drm/amdgpu/powerplay: mv ppinterrupt.h to inc folder to share with other submodule.
Redefine interrupt callback function in accordance with cgs.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:24 -05:00
Rex Zhu
c28eae26b5 drm/amdgpu/powerplay: add new function point in hwmgr_funcs for thermal control
Add the interface for fan and thermal control.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:23 -05:00
Rex Zhu
0859ed3db9 drm/amd/powerplay: Add CG and PG support for tonga
Implement clock and power gating support for tonga.  On Tonga
this is handles by the SMU rather than direct register settings
in the driver.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:23 -05:00
Rex Zhu
b1132013ce drm/amd/powerplay: add new function point in hwmgr_func for CG/PG.
Add callbacks interface for clock and powergating.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:22 -05:00
Rex Zhu
3cec76f973 drm/amdgpu/powerplay: add some definition for other ip block to update cg pg.
Interface for clock and power gating handling.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:22 -05:00
Rex Zhu
edb611c1e1 drm/amdgpu: enable powerplay module by default for fiji.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:21 -05:00
Rex Zhu
76c8cc6b3b drm/amdgpu: enable powerplay module by default for tonga.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:21 -05:00
Rex Zhu
bbb207f3da drm/amdgpu/powerplay: program display gap for tonga.
Implement displaygap programming for tonga.  This is
required for properly mclk switching.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:20 -05:00
Rex Zhu
2f4afc5733 drm/amdgpu/powerplay: implement pem_task for display_configuration_change
Add support for display configuration changes to the event manager.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:19 -05:00
Rex Zhu
6f3bf7474c drm/amdgpu/poweprlay: export program display gap function to eventmgr
This allows the eventmgr to properly update the displaygap on
certain power events.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:19 -05:00
Rex Zhu
e8c7de5bf6 drm/amdgpu/powerplay: add function point in hwmgr_funcs for program display gap
Displaygap support is required for proper mclk switching.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:18 -05:00
Eric Huang
899fa4c04e drm/amd/amdgpu: enable powerplay and smc firmware loading for Fiji.
Switch over to handling in the powerplay module.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:18 -05:00
Jammy Zhou
3a74f6f273 drm/amdgpu: add amdgpu.powerplay module option
This option can be used to enable the new powerplay implementation,
and it is disabled by default.

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:17 -05:00
Eric Huang
aabcb7c11e drm/amd/powerplay: add Fiji DPM support.
This enabled DPM support for Fiji.  DPM is dynamic
clock and voltage scaling.

v2: rename fiji_hwmgr_early_init to fiji_hwmgr_init
v3: (agd) fold in endian fix, additional function addition

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:17 -05:00
Eric Huang
74785623db drm/amd/powerplay: add Fiji SMU support.
Add support for the SMU manager for Fiji. This handles the
firmware loading for other IP blocks (GFX, SDMA, etc.).

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:16 -05:00
Eric Huang
3ec2cdb85f drm/amd/powerplay: update atomctrl for fiji
Add some new functions to support Fiji.  Split out
from the previous patch.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:16 -05:00
Eric Huang
770911a3cf drm/amd/powerplay: add/update headers for Fiji SMU and DPM
New headers for Fiji.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:15 -05:00
yanyang1
c82baa2818 drm/amd/powerplay: add Tonga dpm support (v3)
This implements DPM for tonga.  DPM handles dynamic
clock and voltage scaling.

v2: merge all the patches related with tonga dpm
v3: merge dpm force level fix, cgs display fix, spelling fix

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: yanyang1 <young.yang@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:15 -05:00
Jammy Zhou
1060029fae drm/amd/powerplay: Add Tonga SMU support
The SMU manager handles firmware loading for other IP
blocks (GFX, SDMA, etc.).  This implements it for Tonga.

v3: delete peci sub-module
v2: use cgs interface directly

Signed-off-by: Young Yang <Young.Yang@amd.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:14 -05:00
yanyang1
306d8db3e7 drm/amd/powerplay: add header file for tonga smu and dpm
These headers provide the SMU interface used by the driver.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: yanyang1 <young.yang@amd.com>
2015-12-21 16:42:14 -05:00
yanyang1
7ff1d70a40 drm/amd/powerplay: Move smu7*.h from amdgpu to powerplay.
Move smu7.h, smu7_discrete.h and smu7_fusion.h from amdgpu to powerplay.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: yanyang1 <young.yang@amd.com>
2015-12-21 16:42:13 -05:00
yanyang1
3a287055ae drm/amd/powerplay: Add ixSWRST_COMMAND_1 in bif_5_0_d.h
Add ixSWRST_COMMAND_1 in bif_5_0_d.h.  Required by
new powerplay code for tonga and fiji.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: yanyang1 <young.yang@amd.com>
2015-12-21 16:42:12 -05:00
Rex Zhu
577bbe0183 drm/amd/powerplay: implement functions of amd_powerplay_func
This is the common interface for interacting with the powerplay
module.

v2: squash in fixes

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:12 -05:00
Rex Zhu
e92a037057 drm/amd/powerplay: add event manager sub-component
The event manager handles power related driver events.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:11 -05:00
Rex Zhu
28a18bab2e drm/amd/powerplay: add CG and PG support for carrizo
This adds clock and powergating support for CZ.

v2: squash in fixes

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:11 -05:00
Jammy Zhou
bdecc20a98 drm/amd/powerplay: add Carrizo dpm support
This patch enables basic DPM support for Carrizo.
DPM handles dynamic clock and voltage scaling.

v3: delete peci sub-module
v2: use cgs interface directly
    correct define SMU_EnabledFeatureScoreboard_SclkDpmOn

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:10 -05:00
Jammy Zhou
4630f0faae drm/amd/powerplay: add Carrizo smu support
This implements the SMU firmware manager interface for CZ.
Some header files are moved from amdgpu folder to powerplay as well.

v3: delete peci sub-module.
v2: use cgs interface directly
    add load_mec_firmware function

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:10 -05:00
Jammy Zhou
3bace35914 drm/amd/powerplay: add hardware manager sub-component
The hwmgr handles all hardware related calls, including clock/power
gating control, DPM, read and parse PPTable, etc.

v5: squash in fixes
v4: implement acpi's atcs function use cgs interface
v3: fix code style error and add big-endian mode support.
v2: use cgs interface directly in hwmgr sub-module

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:09 -05:00
Jammy Zhou
ac885b3a20 drm/amd/powerplay: add SMU manager sub-component
The SMUMGR is one sub-component of powerplay for SMU firmware support.
The SMU handles firmware loading for other IP blocks (GFX, SDMA, etc.)
on VI parts.  The adds the core powerplay infrastructure to handle that.

v3: direct use printk in powerplay module.
v2: direct use cgs_read/write_register functions in smu-modules

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:09 -05:00
Rex Zhu
1b5708ffb1 drm/amdgpu: export amd_powerplay_func to amdgpu and other ip block
Update amdgpu to deal with the new powerplay module properly.

v2: squash in fixes
v3: squash in Rex's power state reporting fix

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:08 -05:00
Rex Zhu
ba5c2a87b0 drm/amdgpu: disable legacy path of firmware check if powerplay is enabled
Powerplay will use a different interface once it's integrated.  These
legacy pathes will be removed once powerplay is enabled by default.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:08 -05:00
Alex Deucher
1f7371b2a5 drm/amd/powerplay: add basic powerplay framework
amdgpu_pp_ip_funcs is introduced to handle the two code paths,
the legacy one and the new powerplay implementation.

CONFIG_DRM_AMD_POWERPLAY kernel configuration option is
introduced for the powerplay component.

v4: squash in fixes
v3: register debugfs file when powerplay module enable
v2: add amdgpu_ucode_init_bo in hw init when amdgpu_powerplay enable.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:07 -05:00
Rex Zhu
47bf18b5b2 drm/amdgpu: add new cgs interface to get display info (v2)
Add new CGS interfaces to query display info across modules.
This is nedded by the powerplay module for synchronizing with
the display module.

v2: (agd): fold in refresh rate fix, rebase

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:07 -05:00
Rex Zhu
5e6186991a drm/amdgpu: implement cgs interface to query system info
Add a query to get the bus number and function of the
device.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-12-21 16:42:06 -05:00
Rex Zhu
3f1d35a03b drm/amdgpu: implement new cgs interface for acpi function
Add a new driver internal interface for accessing ACPI
methods.  These will be used by various new components
including powerplay.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:06 -05:00
Rex Zhu
66dc0ddd02 drm/amdgpu: mv amdgpu_acpi.h to amd/include/amd_acpi.h
This will be shared with the new powerplay module.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:05 -05:00
Rex Zhu
7e85be9948 drm/amdgpu: mv some definition from amdgpu_acpi.c to amdgpu_acpi.h
These will be shared with the new powerplay module.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:05 -05:00
Rex Zhu
3a2c788d95 drm/amdgpu: share struct amdgpu_pm_state_type with powerplay module
rename amdgpu_pm_state_type to amd_pm_state_type

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:04 -05:00
Felix Kuehling
005ae95e6e drm/amdgpu: Fix off-by-one errors in amdgpu_vm_bo_map
eaddr is sometimes treated as the last address inside the address
range, and sometimes as the first address outside the range. This
was resulting in errors when a test filled up the entire address
space. Make it consistent to always be the last address within the
range.

Signed-off-by: Felix.Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: stable@vger.kernel.org
2015-12-21 16:39:14 -05:00
Alex Deucher
41869c1c7f drm/amdgpu: fix dp link rate selection (v2)
Need to properly handle the max link rate in the dpcd.
This prevents some cases where 5.4 Ghz is selected when
it shouldn't be.

v2: simplify logic, add array bounds check

Reviewed-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:38:51 -05:00
Christian König
ee1782c3f2 drm/amdgpu: keep the PTs validation list in the VM v2
This avoids allocating it on the fly.

v2: fix grammar in comment

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-12-18 17:29:46 -05:00
Christian König
56467ebfb2 drm/amdgpu: split VM PD and PT handling during CS
This way we avoid the extra allocation for the page directory entry.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-12-18 17:29:45 -05:00
Christian König
3c0eea6c35 drm/amdgpu: put VM page tables directly into duplicates list
They share the reservation object with the page directory anyway.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-12-18 17:29:45 -05:00
Chunming Zhou
5b0112356c drm/amdgpu: restrict the sched jobs number to power of two
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
CC: stable@vger.kernel.org
2015-12-18 17:29:44 -05:00
Alex Deucher
a1493cd575 drm/amdgpu: limit visible vram if it's smaller than the BAR
In some cases the amount of vram may be less than the BAR size,
if so, limit visible vram to the amount of actual vram, not the
BAR size.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-17 11:56:41 -05:00
Christian König
91acbeb68a drm/amdgpu: fix user fence handling
This fixes a random corruption under memory pressure. We need to fence
the BO for the user fence as well, otherwise it might be swapped out
and the GPU could write the fence value to an undesired location.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2015-12-16 17:48:59 -05:00
Chunming Zhou
b70f014d58 drm/amdgpu: change default sched jobs to 32
Change the default scheduler queue size from 16 to 32.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-14 19:47:17 -05:00
Chunming Zhou
37cd0ca204 drm/amdgpu: unify AMDGPU_CTX_MAX_CS_PENDING and amdgpu_sched_jobs
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-14 19:45:24 -05:00
Chunming Zhou
c648ed7c5c drm/amdgpu: handle error case for ctx
Properly handle ctx init failure.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-14 19:42:11 -05:00
Chunming Zhou
e8deea2d4b drm/amdgpu: add entity only when first job come
umd somtimes will create a context for every ring,
that means some entities wouldn't be used at all.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-14 19:41:19 -05:00
Alex Deucher
2c1a278403 drm/amdgpu: add more debugging output for driver failures
Add more fine grained debugging output for init/fini/suspend/
resume failures.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-11 11:13:42 -05:00
Flora Cui
abdfb850ca drm/amdgpu: update rev id register for VI
Change-Id: I2ae9bb4a929f7c0c8783e0be563ae04be77596e2
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-11 11:13:41 -05:00
Flora Cui
c27816a883 drm/amdgpu/gfx8: update PA_SC_RASTER_CONFIG:PKR_MAP only
Use default value as a base.

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-12-11 11:13:41 -05:00
Flora Cui
3b55ddadef drm/amdgpu/gfx8: Enable interrupt on ME1_PIPE3
Otherwise FW cannot see the RLC ACK for the memory clean request
It's for Stoney.

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-12-11 11:13:40 -05:00
Ville Syrjälä
13a3d91f17 drm: Pass 'name' to drm_encoder_init()
Done with coccinelle for the most part. However, it thinks '...' is
part of the semantic patch, so I put an 'int DOTDOTDOT' placeholder
in its place and got rid of it with sed afterwards.

@@
identifier dev, encoder, funcs;
@@
 int drm_encoder_init(struct drm_device *dev,
                      struct drm_encoder *encoder,
                      const struct drm_encoder_funcs *funcs,
                      int encoder_type
+                     ,const char *name, int DOTDOTDOT
                      )
{ ... }

@@
identifier dev, encoder, funcs;
@@
 int drm_encoder_init(struct drm_device *dev,
                      struct drm_encoder *encoder,
                      const struct drm_encoder_funcs *funcs,
                      int encoder_type
+                     ,const char *name, int DOTDOTDOT
                      );

@@
expression E1, E2, E3, E4;
@@
 drm_encoder_init(E1, E2, E3, E4
+                 ,NULL
                  )

v2: Add ', or NULL...' to @name kernel doc (Jani)
    Annotate the function with __printf() attribute (Jani)

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1449670818-2966-1-git-send-email-ville.syrjala@linux.intel.com
2015-12-11 09:13:20 +01:00
Chunming Zhou
e410b5cbab drm/amdgpu: fix the lost duplicates checking
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Cc: stable@vger.kernel.org
2015-12-09 00:18:33 -05:00
Daniel Vetter
b516a9efb7 drm: Move LEAVE/ENTER_ATOMIC_MODESET to fbdev helpers
This is only used for kgdb (and previously panic) handlers in
the fbdev emulation, so belongs there.

Note that this means we'll leave behind a forward declaration, but
once all the helper vtables are consolidated (in the next patch) that
will make more sense.

v2: fixup radone/amdgpu.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1449218769-16577-3-git-send-email-daniel.vetter@ffwll.ch
Reviewed-by: Thierry Reding <treding@nvidia.com> (v2)
2015-12-08 16:07:51 +01:00
Dave Airlie
e876b41ab0 Linux 4.4-rc4
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJWZMgaAAoJEHm+PkMAQRiGGcIH+gNS/hbN2DKW7wphl1QuaV7C
 1fror8AvpwbGa/o0yuxovaVuZzAR0TF31vn+gAemF4U/hnM25xqxEHXYZEVv8OWw
 mbz4/z+jbVk3SiS5AiZPIZgL4W6RZnG5QYfiTVGPlBHuBznW2ITlNlClBOmBL45o
 uhb3bjTzi70AZ7Gh6i9sHgJoHg6D9u/ZxLaLcWnM79BzyTMHTf2t0wnrQmh66lEE
 hp7Rn9wXv9bk/e3iH7CVUb97P4IWhhkmfqcoturqAg9+C/M26b0VmvQp9Sy8S6Pd
 FVQ+SUIZllj5ZDKe9mOcs37czlxTr0keEFqzWeMh/7y4iuI3RaRp/qb+7mX5sIE=
 =WGZ1
 -----END PGP SIGNATURE-----

Back merge tag 'v4.4-rc4' into drm-next

We've picked up a few conflicts and it would be nice
to resolve them before we move onwards.
2015-12-08 11:04:26 +10:00
Alex Deucher
8e36f9d33c drm/amdgpu: Fixup hw vblank counter/ts for new drm_update_vblank_count() (v3)
commit 4dfd6486 "drm: Use vblank timestamps to guesstimate how many
vblanks were missed" introduced in Linux 4.4-rc1 makes the drm core
more fragile to drivers which don't update hw vblank counters and
vblank timestamps in sync with firing of the vblank irq and
essentially at leading edge of vblank.

This exposed a problem with radeon-kms/amdgpu-kms which do not
satisfy above requirements:

The vblank irq fires a few scanlines before start of vblank, but
programmed pageflips complete at start of vblank and
vblank timestamps update at start of vblank, whereas the
hw vblank counter increments only later, at start of vsync.

This leads to problems like off by one errors for vblank counter
updates, vblank counters apparently going backwards or vblank
timestamps apparently having time going backwards. The net result
is stuttering of graphics in games, or little hangs, as well as
total failure of timing sensitive applications.

See bug #93147 for an example of the regression on Linux 4.4-rc:

https://bugs.freedesktop.org/show_bug.cgi?id=93147

This patch tries to align all above events better from the
viewpoint of the drm core / of external callers to fix the problem:

1. The apparent start of vblank is shifted a few scanlines earlier,
so the vblank irq now always happens after start of this extended
vblank interval and thereby drm_update_vblank_count() always samples
the updated vblank count and timestamp of the new vblank interval.

To achieve this, the reporting of scanout positions by
radeon_get_crtc_scanoutpos() now operates as if the vblank starts
radeon_crtc->lb_vblank_lead_lines before the real start of the hw
vblank interval. This means that the vblank timestamps which are based
on these scanout positions will now update at this earlier start of
vblank.

2. The driver->get_vblank_counter() function will bump the returned
vblank count as read from the hw by +1 if the query happens after
the shifted earlier start of the vblank, but before the real hw increment
at start of vsync, so the counter appears to increment at start of vblank
in sync with the timestamp update.

3. Calls from vblank irq-context and regular non-irq calls are now
treated identical, always simulating the shifted vblank start, to
avoid inconsistent results for queries happening from vblank irq vs.
happening from drm_vblank_enable() or vblank_disable_fn().

4. The radeon_flip_work_func will delay mmio programming a pageflip until
the start of the real vblank iff it happens to execute inside the shifted
earlier start of the vblank, so pageflips now also appear to execute at
start of the shifted vblank, in sync with vblank counter and timestamp
updates. This to avoid some races between updates of vblank count and
timestamps that are used for swap scheduling and pageflip execution which
could cause pageflips to execute before the scheduled target vblank.

The lb_vblank_lead_lines "fudge" value is calculated as the size of
the display controllers line buffer in scanlines for the given video
mode: Vblank irq's are triggered by the line buffer logic when the line
buffer refill for a video frame ends, ie. when the line buffer source read
position enters the hw vblank. This means that a vblank irq could fire at
most as many scanlines before the current reported scanout position of the
crtc timing generator as the number of scanlines the line buffer can
maximally hold for a given video mode.

This patch has been successfully tested on a RV730 card with DCE-3 display
engine and on a evergreen card with DCE-4 display engine, in single-display
and dual-display configuration, with different video modes.

A similar patch is needed for amdgpu-kms to fix the same problem.

Limitations:

- Maybe replace the udelay() in the flip_work_func() by a suitable
  usleep_range() for a bit better efficiency? Will try that.

- Line buffer sizes in pixels are hard-coded on < DCE-4 to a value
  i just guessed to be high enough to work ok, lacking info on the true
  sizes atm.

Probably fixes: fdo#93147

Port of Mario's radeon fix to amdgpu.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(v1) Reviewed-by: Mario Kleiner <mario.kleiner.de@gmail.com>

(v2) Refine amdgpu_flip_work_func() for better efficiency.

     In amdgpu_flip_work_func, replace the busy waiting udelay(5)
     with event lock held by a more performance and energy efficient
     usleep_range() until at least predicted true start of hw vblank,
     with some slack for scheduler happiness. Release the event lock
     during waits to not delay other outputs in doing their stuff, as
     the waiting can last up to 200 usecs in some cases.

     Also small fix to code comment and formatting in that function.

(v2) Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>

(v3) Fix crash in crtc disabled case
2015-12-04 15:15:07 -05:00
jimqu
81d75a30c6 drm/amdgpu: add spin lock to protect freed list in vm (v2)
there is a protection fault about freed list when OCL test.
add a spin lock to protect it.

v2: drop changes in vm_fini

Signed-off-by: JimQu <jim.qu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-12-04 13:08:13 -05:00
Christian König
9c97b5ab4a drm/amdgpu: partially revert "drm/amdgpu: fix VM_CONTEXT*_PAGE_TABLE_END_ADDR" v2
The gtt_end is already inclusive, we don't need to subtract one here.

v2 (chk): keep the fix for the VM code, cause here it really applies.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Anatoli Antonovitch <anatoli.antonovitch@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-04 13:06:59 -05:00
Christian König
f3f1769283 drm/amdgpu: take a BO reference for the user fence
No need for a GEM reference here.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-04 13:05:44 -05:00
Christian König
e9d951a832 drm/amdgpu: take a BO reference in the display code
No need for the GEM reference here.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-04 12:32:47 -05:00
Christian König
6d99905a8c drm/amdgpu: set snooped flags only on system addresses v2
Not necessary for VRAM.

v2: no need to check if ttm is NULL.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-04 12:31:46 -05:00
jimqu
9c4153b1ee drm/amdgpu: add spin lock to protect freed list in vm (v2)
there is a protection fault about freed list when OCL test.
add a spin lock to protect it.

v2: drop changes in vm_fini

Signed-off-by: JimQu <jim.qu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-12-04 12:23:38 -05:00
Tom St Denis
eb64526f5a amdgpu/gfxv8: Remove magic numbers from function gfx_v8_0_tiling_mode_table_init()
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-04 11:26:52 -05:00
Nicolai Hähnle
786b521908 drm/amdgpu: fix race condition in amd_sched_entity_push_job
As soon as we leave the spinlock after the job has been added to the job
queue, we can no longer rely on the job's data to be available.

I have seen a null-pointer dereference due to sched == NULL in
amd_sched_wakeup via amd_sched_entity_push_job and
amd_sched_ib_submit_kernel_helper. Since the latter initializes
sched_job->sched with the address of the ring scheduler, which is
guaranteed to be non-NULL, this race appears to be a likely culprit.

Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Bugzilla: https://bugs.freedesktop.org/attachment.cgi?bugid=93079
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-12-04 11:26:52 -05:00
Chunming Zhou
ba98f9e56c drm/amdgpu: add err check for pin userptr
Missing error check if the operation failed.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-12-04 11:26:51 -05:00
Tom St Denis
0d07db7e10 amdgpu/gfxv8: Simplification in gfx_v8_0_enable_gui_idle_interrupt()
Simplified the function by folding the two paths into one.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-04 11:26:50 -05:00
Tom St Denis
544b8a74c7 amdgpu/gfxv8: Simplification of gfx_v8_0_create_bitmask()
Simplification of the function gfx_v8_0_create_bitmask().

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-04 11:26:50 -05:00
Tom St Denis
90bea0abf6 amdgpu/gfxv8: Cleanup of gfx_v8_0_tiling_mode_table_init() (v2)
Simplification and LOC reduction of function gfx_v8_0_tiling_mode_table_init()

v2: remove spurious break
bug: https://bugs.freedesktop.org/show_bug.cgi?id=93236

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-04 11:26:49 -05:00
Tom St Denis
8cdacf4457 amdgpu/gfxv8: Add missing break to switch statement from states init code
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-12-02 15:54:33 -05:00
Chunming Zhou
d033a6de80 drm/amd: abstract kernel rq and normal rq to priority of run queue
Allows us to set priorities in the scheduler.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
2015-12-02 15:54:33 -05:00
Alex Deucher
ccba7691a5 drm/amdgpu: add EDC support for CZ (v3)
This adds EDC support for CZ.
EDC = Error Correction and Detection
This code properly initializes the EDC hardware and
resets the error counts.  This is done in late_init
since it requires the IB pool which is not initialized
during hw_init.

v2: fix the IB size as noted by Felix, fix shader pgm
register programming
v3: use the IB for the shaders as suggested by Christian

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-02 15:54:26 -05:00
Alex Deucher
aa5e24e5f8 drm/amd: add new gfx8 register definitions for EDC
EDC is a RAS feature for on chip memory.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-02 15:54:18 -05:00
Nicolai Hähnle
07df04dfcf drm/amdgpu: fix race condition in amd_sched_entity_push_job
As soon as we leave the spinlock after the job has been added to the job
queue, we can no longer rely on the job's data to be available.

I have seen a null-pointer dereference due to sched == NULL in
amd_sched_wakeup via amd_sched_entity_push_job and
amd_sched_ib_submit_kernel_helper. Since the latter initializes
sched_job->sched with the address of the ring scheduler, which is
guaranteed to be non-NULL, this race appears to be a likely culprit.

Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Bugzilla: https://bugs.freedesktop.org/attachment.cgi?bugid=93079
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-12-02 15:04:04 -05:00
Chunming Zhou
e2f784fa8a drm/amdgpu: add err check for pin userptr
Missing error check if the operation failed.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-12-02 15:03:54 -05:00
Daniel Vetter
a9906fde57 drm/amdgpu: Use unlocked gem unreferencing
For drm_gem_object_unreference callers are required to hold
dev->struct_mutex, which these paths don't. Enforcing this requirement
has become a bit more strict with

commit ef4c6270bf
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Thu Oct 15 09:36:25 2015 +0200

    drm/gem: Check locking in drm_gem_object_unreference

Cc: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-02 12:46:00 -05:00
monk.liu
f930b2e862 drm/amdgpu: Use new read bios from rom callback
Read the vbios directly from the rom.  In some cases,
e.g., virtualization, the rom is not available via
the BAR or other means.  Access it directly.

This is an updated version of Monks original patch which
uses family specific callbacks and unifies some of the
validation checking.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-02 12:45:59 -05:00
Alex Deucher
95addb2ae0 drm/amdgpu: add read_bios_from_rom callback for VI parts
Read the vbios image directly from the rom.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-02 12:45:58 -05:00
Alex Deucher
1eb22bd38a drm/amdgpu: add read_bios_from_rom callback for CI parts
Read the vbios image directly from the rom.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-02 12:45:58 -05:00
Alex Deucher
7946b87803 drm/amdgpu: add a callback for reading the bios from the rom directly
This is necessary when the vbios image is not directly accessible via
the rom BAR or legacy vga location.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-02 12:45:57 -05:00
Jammy Zhou
288912cb95 drm/amdgpu: use $(src) in Makefile (v2)
This can solve the path problem when compile amdgpu with DKMS.

v2: agd: rebase on current drm-next

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-02 12:45:56 -05:00
Alex Deucher
54fb2a5cd0 drm/amdgpu: call hpd_irq_event on resume
Need to call this on resume if displays changes during
suspend in order to properly be notified of changes.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2015-12-02 12:45:54 -05:00
Dave Airlie
aeb745e9b5 Merge tag 'topic/drm-misc-2015-11-26' of git://anongit.freedesktop.org/drm-intel into drm-next
Here's the first drm-misc pull, with really mostly misc stuff all over.
Somewhat invasive is only Ville's change to mark the arg struct for
fb_create const - that might conflict with a new driver pull. So better to
get in fast.

* tag 'topic/drm-misc-2015-11-26' of git://anongit.freedesktop.org/drm-intel:
  drm/mm: use list_next_entry
  drm/i915: fix potential dangling else problems in for_each_ macros
  drm: fix potential dangling else problems in for_each_ macros
  drm/sysfs: Send out uevent when connector->force changes
  drm/atomic: Small documentation fix.
  drm/mm: rewrite drm_mm_for_each_hole
  drm/sysfs: Grab lock for edid/modes_show
  drm: Print the src/dst/clip rectangles in error in drm_plane_helper
  drm: Add "prefix" parameter to drm_rect_debug_print()
  drm: Keep coordinates in the typical x, y, w, h order instead of x, y, h, w
  drm: Pass the user drm_mode_fb_cmd2 as const to .fb_create()
  drm: modes: replace simple_strtoul by kstrtouint
  drm: Describe the Rotation property bits.
  drm: Remove unused fbdev_list members
  GPU-DRM: Delete unnecessary checks before drm_property_unreference_blob()
  drm/dp: add eDP DPCD backlight control bit definitions
  drm/tegra: Remove local fbdev emulation Kconfig option
  drm/imx: Remove local fbdev emulation Kconfig option
  drm/gem: Update/Polish docs
  drm: Update GEM refcounting docs
2015-12-01 08:01:18 +10:00
Christian König
82b9c55b1e drm/amdgpu: fix VM page table reference counting
We use the reservation object of the page directory for the page tables as
well, because of this the page directory should be freed last. Ensure that
by keeping a reference from the page tables to the directory.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-30 14:41:33 -05:00
Christian König
585116c5fa drm/amdgpu: fix userptr flags check
That got messed up while porting it from Radeon.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-30 14:38:47 -05:00
Ville Syrjälä
1eb83451ba drm: Pass the user drm_mode_fb_cmd2 as const to .fb_create()
Drivers shouldn't clobber the passed in addfb ioctl parameters.
i915 was doing just that. To prevent it from happening again,
pass the struct around as const, starting all the way from
internal_framebuffer_create().

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-11-24 11:47:38 +01:00
Lukas Wunner
cb1197173f drm: Remove unused fbdev_list members
I noticed that intel_fbdev->our_mode is unused. Introduced by
79e539453b ("DRM: i915: add mode setting support").

Then I noticed that intel_fbdev->fbdev_list is unused as well.
Introduced by 386516744b ("drm/fb: fix fbdev object model +
cleanup properly.") in i915, nouveau and radeon.

Subsequently cargo culted to amdgpu, ast, cirrus, qxl, udl,
virtio and mgag200.

Already removed from the latter with cc59487a05 ("drm/mgag200:
'fbdev_list' in 'struct mga_fbdev' is not used").

Remove it from the others.

Signed-off-by: Lukas Wunner <lukas@wunner.de>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-11-24 11:41:52 +01:00
Christian König
3d65193635 drm/amdgpu: move dependency handling out of atomic section v2
This way the driver isn't limited in the dependency handling callback.

v2: remove extra check in amd_sched_entity_pop_job()

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-11-23 12:20:15 -05:00
Christian König
393a0bd437 drm/amdgpu: optimize scheduler fence handling
We only need to wait for jobs to be scheduled when
the dependency is from the same scheduler.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-11-23 12:19:58 -05:00
Chunming Zhou
e98c1b0de6 drm/amdgpu: remove vm->mutex
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-11-20 18:22:28 -05:00
Chunming Zhou
69b576a1bc drm/amdgpu: add mutex for ba_va->valids/invalids
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-11-20 18:22:23 -05:00
Leo Liu
d66f8e48f1 drm/amdgpu: adapt vce session create interface changes
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-20 18:21:20 -05:00
Leo Liu
3c0ff9f18f drm/amdgpu: vce use multiple cache surface starting from stoney
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-20 18:21:04 -05:00
Leo Liu
d6c29c30ea drm/amdgpu: reset vce trap interrupt flag
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-20 18:20:55 -05:00
Chunming Zhou
49b02b180a drm/amdgpu: reserve/unreserve objects out of map/unmap operations
Change-Id: Id6514f2fb6e002437fdbe99353d5d35f4ac736c7
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-11-18 11:41:20 -05:00
Chunming Zhou
ef9f0a83d6 drm/amdgpu: move bo_reserve out of amdgpu_vm_clear_bo
Change-Id: Ifbb0c06680494bfa04d0be5e5941d31ae2e5ef28
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-11-18 11:41:02 -05:00
Chunming Zhou
c25867dfab drm/amdgpu: add lock for interval tree in vm
Change-Id: I62b892a22af37b32e6b4aefca80a25cf45426ed2
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-11-18 11:40:55 -05:00
Christian König
1c16c0a7b2 drm/amdgpu: keep the owner for VMIDs
We don't need the last VM use any more, keep the owner directly.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <davdi1.zhou@amd.com>
2015-11-18 11:40:37 -05:00
Christian König
ea89f8c9e8 drm/amdgpu: move VM manager clean into the VM code again
It's not a good idea to duplicate that code.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <davdi1.zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-18 11:40:27 -05:00
Christian König
8b4fb00b5d drm/amdgpu: cleanup VM coding style
Fix the indentation and move the VM functions to the structures.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <davdi1.zhou@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-18 11:40:00 -05:00
Christian König
eeed25ab83 drm/amdgpu: remove unused VM manager field
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <davdi1.zhou@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
2015-11-18 11:39:34 -05:00
Christian König
984810fc45 drm/amdgpu: cleanup scheduler command submission
Unify the two code path again, cause they do pretty much the same thing.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <davdi1.zhou@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
2015-11-18 11:39:12 -05:00
Christian König
2269a39579 drm/amdgpu: fix typo in firmware name
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-11-18 09:33:29 -05:00
Junwei Zhang
bbf0b34578 drm/amdgpu: remove the unnecessary parameter adev for amdgpu_sa_bo_new()
Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-11-16 17:01:32 -05:00
Christian König
680513cc0a drm/amdgpu: wait interruptible when semaphores are disabled v2
Otherwise debugging locked up processes isn't possible.

v2: rebased

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v1)
2015-11-16 17:01:15 -05:00
Chunming Zhou
43c27fb5c2 drm/amdgpu: update pd while updating vm as well
Change-Id: I93a861cd6707f7d91672b9e19757cc50008cd7a2
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-11-16 11:06:00 -05:00
Christian König
5d82730af7 drm/amdgpu: fix handling order in scheduler CS
We need to clear parser.ibs and num_ibs before amd_sched_fence_create,
otherwise the IB could be freed twice if fence creates fails.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-11-16 11:05:59 -05:00
Christian König
e284022163 drm/amdgpu: fix incorrect mutex usage v3
Before this patch the scheduler fence was created when we push the job
into the queue, so we could only get the fence after pushing it.

The mutex now was necessary to prevent the thread pushing the jobs to
the hardware from running faster than the thread pushing the jobs into
the queue.

Otherwise the thread pushing jobs into the queue would have accessed
possible freed up memory when it tries to get a reference to the fence.

So what you get in the end is thread A:
mutex_lock(&job->lock);
...
Kick of thread B.
...
mutex_unlock(&job->lock);

And thread B:
mutex_lock(&job->lock);
....
mutex_unlock(&job->lock);
kfree(job);

I'm actually not sure if I'm still up to date on this, but this usage
pattern used to be not allowed with mutexes. See here as well
https://lwn.net/Articles/575460/.

v2: remove unrelated changes, fix missing owner
v3: rebased, add more commit message

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-16 11:05:58 -05:00
Christian König
4a56228337 drm/amdgpu: cleanup scheduler fence get/put dance
The code was correct, but getting two references when the ownership
is linearly moved on is a bit awkward and just overhead.

Signed: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-16 11:05:58 -05:00
Chunming Zhou
7034decf6a drm/amdgpu: add command submission workflow tracepoint
OGL needs these tracepoints to investigate performance issue.

Change-Id: I5e58187d061253f7d665dfce8e4e163ba91d3e2b
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
2015-11-16 11:05:57 -05:00
Flora Cui
5f2e816b29 drm/amdgpu: update Fiji's tiling mode table
Change-Id: I925c15015390113f7e27746ec5751eaa6a92c2a7
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-16 11:05:56 -05:00
Rex Zhu
c305fd5fff drm/amdgpu: fix bug that can't enter thermal interrupt for bonaire.
Set reversed bit to enable/disable thermal interrupt.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-11-16 11:05:56 -05:00
Arnd Bergmann
e1b35f6103 drm/amdgpu: fix seq_printf format string
The amdgpu driver has a debugfs interface that shows the amount of
VRAM in use, but the newly added code causes a build error on
all 32-bit architectures:

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c:1076:17: warning: format '%lu' expects argument of type 'long unsigned int', but argument 4 has type 'long long int' [-Wformat=]

This fixes the format string to use "%llu" for printing 64-bit
numbers, which works everywhere, as long as we also cast to 'u64'.
Unlike atomic64_t, u64 is defined as 'unsigned long long' on
all architectures.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes: a2ef8a9749 ("drm/amdgpu: add vram usage into debugfs")
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-16 11:05:55 -05:00
Jay Cornwall
a80b30476d drm/amdgpu: Fix default page access routing
The VM default page (used when a VM translation fails) is allocated in
system memory. The VM is misconfigured to interpret the physical address
as referencing a VRAM physical page.

Route default page accesses to system memory.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Jay Cornwall <jay@jcornwall.me>
Cc: <stable@vger.kernel.org> # v4.2+
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-16 11:05:53 -05:00
Christian König
7e52a81c2f drm/amdgpu: cleanup amdgpu_cs_parser handling
No need any more to allocate that structure dynamically, just put it on the
stack. This is a start to cleanup some of the scheduler fallouts.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-16 11:05:52 -05:00
Christian König
e4a58a28b5 drm/amdgpu: fix leaking the IBs on error
Fixing a memory leak when the scheduler is enabled.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-16 11:05:51 -05:00
Chunming Zhou
f5617f9dde drm/amd: add kmem cache for sched fence
Change-Id: I45bb8ff10ef05dc3b15e31a77fbcf31117705f11
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-11-16 11:05:51 -05:00
Chunming Zhou
b49c84a576 drm/amdgpu: add kmem cache for amdgpu fence
Change-Id: I5ad8dd156ccf27a6f18004aa0a215a0925b6e67b
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-11-16 11:05:50 -05:00
Flora Cui
451f698bca drm/amdgpu: update fiji_mgcg_cgcg_init table
Change-Id: If44b8057741c78208f1976f60f31b535c944d0bd
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-11-16 11:05:49 -05:00
Christian König
16ae42feb0 drm/amdgpu: use common fence for amdgpu_vm_fence
Just cleanup the function parameters.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-16 11:05:49 -05:00
Christian König
b56c22853e drm/amdgpu: use fence_is_later() for vm_flush as well v2
v2: remove superfluous check

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v1)
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-11-16 11:05:48 -05:00
Christian König
c2776afe74 drm/amdgpu: use a timer for fence fallback
Less overhead than a work item and also adds proper cleanup handling.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-16 11:05:47 -05:00
Christian König
935c186aae drm/amdgpu: remove fence trace points
Mostly unused and replaced by the common trace points.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-16 11:05:46 -05:00
Flora Cui
fa6760482b drm/amdgpu: update Fiji's mmPA_SC_RASTER_CONFIG value
Change-Id: I6d138306a878450e5bf8a77a2f1aacc380a39fe5
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-16 11:05:46 -05:00
Linus Torvalds
3e82806b97 Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux
Pull drm updates from Dave Airlie:
 "I Was Almost Tempted To Capitalise Every Word, but then I decided I
  couldn't read it myself!

  I've also got one pull request for the sti driver outstanding.  It
  relied on a commit in Greg's tree and I didn't find out in time, that
  commit is in your tree now so I might send that along once this is
  merged.

  I also had the accidental misfortune to have access to a Skylake on my
  desk for a few days, and I've had to encourage Intel to try harder,
  which seems to be happening now.

  Here is the main drm-next pull request for 4.4.

  Highlights:

  New driver:
        vc4 driver for the Rasberry Pi VPU.
        (From Eric Anholt at Broadcom.)

  Core:
        Atomic fbdev support
        Atomic helpers for runtime pm
        dp/aux i2c STATUS_UPDATE handling
        struct_mutex usage cleanups.
        Generic of probing support.

  Documentation:
        Kerneldoc for VGA switcheroo code.
        Rename to gpu instead of drm to reflect scope.

  i915:
        Skylake GuC firmware fixes
        HPD A support
        VBT backlight fallbacks
        Fastboot by default for some systems
        FBC work
        BXT/SKL workarounds
        Skylake deeper sleep state fixes

  amdgpu:
        Enable GPU scheduler by default
        New atombios opcodes
        GPUVM debugging options
        Stoney support.
        Fencing cleanups.

  radeon:
        More efficient CS checking

  nouveau:
        gk20a instance memory handling improvements.
        Improved PGOB detection and GK107 support
        Kepler GDDR5 PLL statbility improvement
        G8x/GT2xx reclock improvements
        new userspace API compatiblity fixes.

  virtio-gpu:
        Add 3D support - qemu 2.5 has it merged for it's gtk backend.

  msm:
        Initial msm88896 (snapdragon 8200)

  exynos:
        HDMI cleanups
        Enable mixer driver byt default
        Add DECON-TV support

  vmwgfx:
        Move to using memremap + fixes.

  rcar-du:
        Add support for R8A7793/4 DU

  armada:
        Remove support for non-component mode
        Improved plane handling
        Power savings while in DPMS off.

  tda998x:
        Remove unused slave encoder support
        Use more HDMI helpers
        Fix EDID read handling

  dwhdmi:
        Interlace video mode support for ipu-v3/dw_hdmi
        Hotplug state fixes
        Audio driver integration

  imx:
        More color formats support.

  tegra:
        Minor fixes/improvements"

[ Merge fixup: remove unused variable 'dev' that had all uses removed in
  commit 4e270f0880: "drm/gem: Drop struct_mutex requirement from
  drm_gem_mmap_obj" ]

* 'drm-next' of git://people.freedesktop.org/~airlied/linux: (764 commits)
  drm/vmwgfx: Relax irq locking somewhat
  drm/vmwgfx: Properly flush cursor updates and page-flips
  drm/i915/skl: disable display side power well support for now
  drm/i915: Extend DSL readout fix to BDW and SKL.
  drm/i915: Do graphics device reset under forcewake
  drm/i915: Skip fence installation for objects with rotated views (v4)
  vga_switcheroo: Drop client power state VGA_SWITCHEROO_INIT
  drm/amdgpu: group together common fence implementation
  drm/amdgpu: remove AMDGPU_FENCE_OWNER_MOVE
  drm/amdgpu: remove now unused fence functions
  drm/amdgpu: fix fence fallback check
  drm/amdgpu: fix stoping the scheduler timeout
  drm/amdgpu: cleanup on error in amdgpu_cs_ioctl()
  drm/i915: Fix locking around GuC firmware load
  drm/amdgpu: update Fiji's Golden setting
  drm/amdgpu: update Fiji's rev id
  drm/amdgpu: extract common code in vi_common_early_init
  drm/amd/scheduler: don't oops on failure to load
  drm/amdgpu: don't oops on failure to load (v2)
  drm/amdgpu: don't VT switch on suspend
  ...
2015-11-10 09:33:06 -08:00
Dave Airlie
793423ffcb Merge branch 'drm-next-4.4' of git://people.freedesktop.org/~agd5f/linux into drm-next
- Updated register headers for GFX 8.1 for Stoney
- Add some new CZ revisions
- minor pageflip optimizations
- Fencing clean up
- Warning fix
- More fence cleanup
- oops fix
- Fiji fixes

* 'drm-next-4.4' of git://people.freedesktop.org/~agd5f/linux: (29 commits)
  drm/amdgpu: group together common fence implementation
  drm/amdgpu: remove AMDGPU_FENCE_OWNER_MOVE
  drm/amdgpu: remove now unused fence functions
  drm/amdgpu: fix fence fallback check
  drm/amdgpu: fix stoping the scheduler timeout
  drm/amdgpu: cleanup on error in amdgpu_cs_ioctl()
  drm/amdgpu: update Fiji's Golden setting
  drm/amdgpu: update Fiji's rev id
  drm/amdgpu: extract common code in vi_common_early_init
  drm/amd/scheduler: don't oops on failure to load
  drm/amdgpu: don't oops on failure to load (v2)
  drm/amdgpu: don't VT switch on suspend
  drm/amdgpu: Make amdgpu_mn functions inline
  drm/amdgpu: remove amdgpu_fence_ref/unref
  drm/amdgpu: use common fence for sync
  drm/amdgpu: use the new fence_is_later
  drm/amdgpu: use common fences for VMID management v2
  drm/amdgpu: move ring_from_fence to common code
  drm/amdgpu: switch to common fence_wait_any_timeout v2
  drm/amdgpu: remove unneeded fence functions
  ...
2015-11-05 10:57:25 +10:00
Christian König
a95e264254 drm/amdgpu: group together common fence implementation
And also add some missing function documentation. No functional change.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-04 12:29:23 -05:00
Christian König
7a91d6cb3c drm/amdgpu: remove AMDGPU_FENCE_OWNER_MOVE
Moves are exclusive operations anyway, just use the undefined owner for those.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-04 12:29:23 -05:00
Christian König
a67bcd34f6 drm/amdgpu: remove now unused fence functions
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-04 12:29:22 -05:00
Christian König
24372447e5 drm/amdgpu: fix fence fallback check
Interrupts are notorious unreliable, enable the fallback at
a couple of more places.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-04 12:29:22 -05:00
Christian König
424839a6a9 drm/amdgpu: fix stoping the scheduler timeout
cancel_delayed_work_sync is forbidden in interrupt context.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-04 12:29:21 -05:00
Dan Carpenter
4cfdcd9cec drm/amdgpu: cleanup on error in amdgpu_cs_ioctl()
We recently changed the locking in this function and now there is a
missing unlock on error.  Also there are some other resources that we
should probably release as well...

Fixes: f48b2659f5 ('drm/amdgpu: fix the broken vm->mutex V2')
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
2015-11-04 12:29:21 -05:00
Flora Cui
a7ca8ef930 drm/amdgpu: update Fiji's Golden setting
Change-Id: Ic3f3bfce4767cc05d04f6eb24e22a0f3e7ceacaa
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-11-03 11:48:18 -05:00
Flora Cui
b6bc28ff29 drm/amdgpu: update Fiji's rev id
Change-Id: I0018e2b72feb771683c57960ba3ce942bec5d3ab
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-11-03 11:47:39 -05:00
Flora Cui
a3d08fa56b drm/amdgpu: extract common code in vi_common_early_init
Change-Id: I9ed25353c559e27bc1b1d5b50f977b0ff03de87f
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-11-03 11:46:44 -05:00
Dave Airlie
32544d0215 drm/amd/scheduler: don't oops on failure to load
In two places amdgpu tries to tear down something it hasn't
initalised when failing. This is what happens when you
enable experimental support on topaz which then fails in
ring init.

This patch allows it to fail cleanly.

agd: Split out from from the original patch since the
scheduler is a driver independent.

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2015-11-03 11:15:29 -05:00
Dave Airlie
fe295b2715 drm/amdgpu: don't oops on failure to load (v2)
In two places amdgpu tries to tear down something it hasn't
initalised when failing. This is what happens when you
enable experimental support on topaz which then fails in
ring init.

This patch allows it to fail cleanly.

v2 (agd): split out scheduler change into a separate patch

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2015-11-03 11:15:19 -05:00
Alex Deucher
df7989fe1e drm/amdgpu: don't VT switch on suspend
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-03 11:15:08 -05:00
Harry Wentland
1d1106b0f6 drm/amdgpu: Make amdgpu_mn functions inline
Unused amdgpu_mn functions threw warnings for every file that includes
amdgpu.h. It makes sense to inline this amdgpu_mn stubs to avoid the warning.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: stable@vger.kernel.org
2015-11-02 10:24:56 -05:00
Christian König
6ef68c17d4 drm/amdgpu: remove amdgpu_fence_ref/unref
Just move the remaining users to fence_put/get.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-30 01:58:22 -04:00
Christian König
16545c32a5 drm/amdgpu: use common fence for sync
Stop using the driver internal functions.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-30 01:57:19 -04:00
Christian König
24233860b9 drm/amdgpu: use the new fence_is_later
Instead of coding the check ourself.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-30 01:56:10 -04:00
Christian König
d52832986a drm/amdgpu: use common fences for VMID management v2
v2: add missing NULL check.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-30 01:55:12 -04:00
Christian König
8120b61fdf drm/amdgpu: move ring_from_fence to common code
Going to need that elsewhere as well.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-30 01:54:07 -04:00
Christian König
ee327caf1a drm/amdgpu: switch to common fence_wait_any_timeout v2
No need to duplicate the functionality any more.

v2: fix handling if no fence is available.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v1)
2015-10-30 01:51:11 -04:00
Christian König
318cd340c5 drm/amdgpu: remove unneeded fence functions
amdgpu_fence_default_wait isn't needed any more the default wait does the same
thing and amdgpu_test_signaled is dead as well.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-30 01:49:30 -04:00
Dave Airlie
a76edb8cec Merge tag 'topic/drm-misc-2015-10-22' of git://anongit.freedesktop.org/drm-intel into drm-next
Few more drm-misc stragglers for 4.4. Big thing is the generic probe for
imx/rockchip/armada (but the variant for msm/rpi/exynos is still missing).

Also the hdmi clocking fixes from Ville which was a lot of confusion about
which tree it should be applied to ;-)

* tag 'topic/drm-misc-2015-10-22' of git://anongit.freedesktop.org/drm-intel:
  drm: correctly check failed allocation
  vga_switcheroo: Constify vga_switcheroo_handler
  drm/armada: Convert the probe function to the generic drm_of_component_probe()
  drm/rockchip: Convert the probe function to the generic drm_of_component_probe()
  drm/imx: Convert the probe function to the generic drm_of_component_probe()
  drm: Introduce generic probe function for component based masters.
  drm/edid: Round to closest when computing the CEA/HDMI alternate clock
  drm/edid: Fix up clock for CEA/HDMI modes specified via detailed timings
2015-10-30 09:49:06 +10:00
Dave Airlie
f1a04d8258 Merge branch 'drm-next-4.4' of git://people.freedesktop.org/~agd5f/linux into drm-next
More amdgpu and radeon stuff for drm-next.  Stoney support is the big change.
The rest is just bug fixes and code cleanups.  The Stoney stuff is pretty
low impact with respect to existing chips.

* 'drm-next-4.4' of git://people.freedesktop.org/~agd5f/linux:
  drm/amdgpu: change VM size default to 64GB
  drm/amdgpu: add Stoney pci ids
  drm/amdgpu: update the core VI support for Stoney
  drm/amdgpu: add VCE support for Stoney (v2)
  drm/amdgpu: add UVD support for Stoney
  drm/amdgpu: add GFX support for Stoney (v2)
  drm/amdgpu: add SDMA support for Stoney (v2)
  drm/amdgpu: add DCE support for Stoney
  drm/amdgpu: Update SMC/DPM for Stoney
  drm/amdgpu: add GMC support for Stoney
  drm/amdgpu: add Stoney chip family
  drm/amdgpu: fix the broken vm->mutex V2
  drm/amdgpu: remove the unnecessary parameter adev for amdgpu_fence_wait_any()
  drm/amdgpu: remove the exclusive lock
  drm/amdgpu: remove old lockup detection infrastructure
  drm: fix trivial typos
  drm/amdgpu/dce: simplify suspend/resume
  drm/amdgpu/gfx8: set TC_WB_ACTION_EN in RELEASE_MEM packet
  drm/radeon: Use rdev->gem.mutex to protect hyperz/cmask owners
2015-10-30 09:48:28 +10:00
Christian König
fe537d003f drm/amdgpu: ignore scheduler fences from the same entity
We are going to submit them before the job anyway.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-10-28 17:04:18 -04:00
Alex Deucher
6bd53c4125 drm/amdgpu: add GFX 8.1 register headers
Minor differences compared to GFX 8.0

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-28 16:49:03 -04:00
Alex Deucher
b8b339ea3b drm/amdgpu: add some additional CZ revisions
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2015-10-28 11:53:49 -04:00
Alex Deucher
ce055fe332 drm/amdgpu/dce11: optimize pageflip
Taking the grph update lock is only necessary when
updating the the secondary address (for single pipe stereo).

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-23 12:51:24 -04:00
Alex Deucher
0eaaacab03 drm/amdgpu/dce10: optimize pageflip
Taking the grph update lock is only necessary when
updating the the secondary address (for single pipe stereo).

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-23 12:51:23 -04:00
Alex Deucher
82326860b3 drm/amdgpu/dce8: optimize pageflip
Taking the grph update lock is only necessary when
updating the the secondary address (for single pipe stereo).

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-23 12:51:23 -04:00
Alex Deucher
c86f5ebfbd drm/amdgpu: don't try to recreate sysfs entries on resume
Fixes an error on resume caused by:
fa022a9b65

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2015-10-23 10:45:35 -04:00
Christian König
5c92d87d30 drm/amdgpu: stop leaking page flip fence
reservation_object_get_fences_rcu already takes the references.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-10-23 10:30:44 -04:00
Christian König
ed885b2107 drm/amdgpu: change VM size default to 64GB
That's still small enough to not waste to much memory on PD/PTs.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-21 12:32:02 -04:00
Samuel Li
81b1509aa9 drm/amdgpu: add Stoney pci ids
Signed-off-by: Samuel Li <samuel.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-21 12:21:48 -04:00
Samuel Li
39bb0c9282 drm/amdgpu: update the core VI support for Stoney
Add core VI enablement for Stoney.

Signed-off-by: Samuel Li <samuel.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-21 12:21:31 -04:00
Samuel Li
cfaba56603 drm/amdgpu: add VCE support for Stoney (v2)
Stoney is VCE 3.x single.

v2: Stoney is single pipe like Fiji

Signed-off-by: Samuel Li <samuel.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-21 12:21:07 -04:00
Samuel Li
a39c8cea35 drm/amdgpu: add UVD support for Stoney
Stoney is UVD 6.x.

Signed-off-by: Samuel Li <samuel.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-21 12:20:50 -04:00
Samuel Li
e3c7656c22 drm/amdgpu: add GFX support for Stoney (v2)
Stoney is GFX 8.1.

v2: update to latest golden settings

Signed-off-by: Samuel Li <samuel.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-21 12:20:32 -04:00
Samuel Li
bb16e3b6c8 drm/amdgpu: add SDMA support for Stoney (v2)
Stoney is SDMA 3.x.

v2: update to latest golden register settings

Signed-off-by: Samuel Li <samuel.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-21 12:20:20 -04:00
Samuel Li
fa2f9befbb drm/amdgpu: add DCE support for Stoney
Stoney is DCE 11.x.

Signed-off-by: Samuel Li <samuel.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-21 12:20:03 -04:00
Samuel Li
7a753c3f34 drm/amdgpu: Update SMC/DPM for Stoney
Stoney is SMC 8.x.

Signed-off-by: Samuel Li <samuel.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-21 12:19:46 -04:00
Samuel Li
aade2f04f9 drm/amdgpu: add GMC support for Stoney
Stoney is GMC 8.x.

Signed-off-by: Samuel Li <samuel.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-21 12:19:30 -04:00
Samuel Li
139f491799 drm/amdgpu: add Stoney chip family
Stoney is based on Carrizo with some IP upgrades.

Signed-off-by: Samuel Li <samuel.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-21 12:19:12 -04:00
Chunming Zhou
f48b2659f5 drm/amdgpu: fix the broken vm->mutex V2
fix the vm->mutex and ww_mutex confilcts.
vm->mutex is always token first, then ww_mutex.

V2: remove unneccessary checking for pt bo.

Change-Id: Iea56e183752c02831126d06d2f5b7a474a6e4743
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-10-21 11:35:14 -04:00
Junwei Zhang
ce16b0e5a3 drm/amdgpu: remove the unnecessary parameter adev for amdgpu_fence_wait_any()
Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-10-21 11:35:13 -04:00
Christian König
0c418f1010 drm/amdgpu: remove the exclusive lock
Finally getting rid of it.

Signed-off-by: Christian König <christian.koenig@amd.com>
2015-10-21 11:35:12 -04:00
Christian König
b7e4dad3e1 drm/amdgpu: remove old lockup detection infrastructure
It didn't worked to well anyway.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
2015-10-21 11:35:12 -04:00
Geliang Tang
d0be9f4ec1 drm: fix trivial typos
s/regsiter/register/

Signed-off-by: Geliang Tang <geliangtang@163.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-21 11:35:11 -04:00
Lukas Wunner
5d170139eb vga_switcheroo: Constify vga_switcheroo_handler
vga_switcheroo_client_ops has always been declared const since its
introduction with 26ec685ff9 ("vga_switcheroo: Introduce struct
vga_switcheroo_client_ops").

Do so for vga_switcheroo_handler as well.

 drivers/gpu/drm/amd/amdgpu/amdgpu.ko:
   6 .rodata       00009888
- 19 .data         00001f00
+ 19 .data         00001ee0
 drivers/gpu/drm/nouveau/nouveau.ko:
   6 .rodata       000460b8
  17 .data         00018fe0
 drivers/gpu/drm/radeon/radeon.ko:
-  7 .rodata       00030944
+  7 .rodata       00030964
- 21 .data         0000d6a0
+ 21 .data         0000d678
 drivers/platform/x86/apple-gmux.ko:
-  7 .rodata       00000140
+  7 .rodata       00000160
- 11 .data         000000e0
+ 11 .data         000000b8

Cc: Ben Skeggs <bskeggs@redhat.com>
Cc: Darren Hart <dvhart@linux.intel.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Reviewed-by: Christian König <christian.koenig@amd.com>.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-10-20 20:19:29 +02:00
Dave Airlie
affa0e033b Merge tag 'topic/drm-misc-2015-10-19' of git://anongit.freedesktop.org/drm-intel into drm-next
More drm-misc for 4.4.
- fb refcount fix in atomic fbdev
- various locking reworks to reduce drm_global_mutex and dev->struct_mutex
- rename docbook to gpu.tmpl and include vga_switcheroo stuff, plus more
  vga_switcheroo (Lukas Wunner)
- viewport check fixes for atomic drivers from Ville
- DRM_DEBUG_VBL from Ville
- non-contentious header fixes from Mikko Rapeli
- small things all over

* tag 'topic/drm-misc-2015-10-19' of git://anongit.freedesktop.org/drm-intel: (31 commits)
  drm/fb-helper: Fix fb refcounting in pan_display_atomic
  drm/fb-helper: Set plane rotation directly
  drm: fix mutex leak in drm_dp_get_mst_branch_device
  drm: Check plane src coordinates correctly during page flip for atomic drivers
  drm: Check crtc viewport correctly with rotated primary plane on atomic drivers
  drm: Refactor plane src coordinate checks
  drm: Swap w/h when converting the mode to src coordidates for a rotated primary plane
  drm: Don't leak fb when plane crtc coodinates are bad
  ALSA: hda - Spell vga_switcheroo consistently
  drm/gem: Use kref_get_unless_zero for the weak mmap references
  drm/vgem: Drop vgem_drm_gem_mmap
  drm: Fix return value of drm_framebuffer_init()
  drm/gem: Use container_of in drm_gem_object_free
  drm/gem: Check locking in drm_gem_object_unreference
  drm/gem: Drop struct_mutex requirement from drm_gem_mmap_obj
  drm/i810_drm.h: include drm/drm.h
  r128_drm.h: include drm/drm.h
  savage_drm.h: include <drm/drm.h>
  gpu/doc: Convert to markdown harder
  gpu/doc: Add vga_switcheroo documentation
  ...
2015-10-20 09:01:49 +10:00
Alex Deucher
677c884ff6 drm/amdgpu: add missing dpm check for KV dpm late init
Skip dpm late init if dpm is disabled.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2015-10-19 15:54:21 -04:00
Alex Deucher
27100735ad drm/amdgpu/dpm: don't add pwm attributes if DPM is disabled
PWM fan control is only available with DPM.  There is no non-DPM
support on amdgpu, so we should never get a crash here because
the sysfs nodes would never be created in the first place. Add the
check just in case to be on the safe side.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-19 15:53:54 -04:00
Alex Deucher
f9fff064bb drm/amdgpu/dce: simplify suspend/resume
We were basically opencoding the same thing in both
hw_init and resume and hw_fini and suspend.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-19 12:12:56 -04:00
Alex Deucher
a3d5aaa836 drm/amdgpu/gfx8: set TC_WB_ACTION_EN in RELEASE_MEM packet
This is the recommended setting from the hw team for newer
versions of the firmware.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2015-10-19 09:56:11 -04:00
Daniel Vetter
f8c47144bf drm/<drivers>: Drop DRM_UNLOCKED from modeset drivers
Just one special case (since i915 lost its ums code, yay):
- radeon: Has slots for the old ums ioctls which don't have
  DRM_UNLOCKED, but all filled with drm_invalid_op. So ok to drop it
  everywhere.

Every other kms driver just has DRM_UNLOCKED for all their ioctls, as
they should.

v2: admgpu happened, include that one too. And i915 lost its UMS
support which means we can change all the i915 ioctls too.

v3: Rebased on top of new vmwgfx DX interface extensions.

v4: Rebase on top of render-node support in exynos.

Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Reviewed-by: David Herrmann <dh.herrmann@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-10-16 15:50:54 +02:00
Dave Airlie
48f87dd146 Merge commit '06d1ee32a4d25356a710b49d5e95dbdd68bdf505' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into drm-next
Backmerge the drm-fixes pull from Linus's tree into drm-next.

This is to fix some conflicts and make future pulls cleaner
2015-10-16 10:25:28 +10:00
Dave Airlie
6b62b3e134 Merge tag 'topic/drm-misc-2015-10-08' of git://anongit.freedesktop.org/drm-intel into drm-next
Another round of drm-misc. Unfortunately the DRM_UNLOCKED removal for
DRIVER_MODESET isn't complete yet for lack of review on 1-2 patches.
Otherwise just various stuff all over.

* tag 'topic/drm-misc-2015-10-08' of git://anongit.freedesktop.org/drm-intel:
  drm: Stop using drm_vblank_count() as the hw frame counter
  drm/irq: Use unsigned int pipe in public API
  drm: Use DRM_ROTATE_MASK and DRM_REFLECT_MASK
  drm: Add DRM_ROTATE_MASK and DRM_REFLECT_MASK
  vga_switcheroo: Add missing locking
  vgaarb: use kzalloc in vga_arbiter_add_pci_device()
  drm: Don't zero vblank timestamps from the irq handler
  drm: Hack around CONFIG_AGP=m build failures
  drm/i915: Remove setparam ioctl
  drm: Remove dummy agp ioctl wrappers
  drm/vmwgfx: Stop checking for DRM_UNLOCKED
  drm/drm_ioctl.c: kerneldoc
  drm: Define a drm_invalid_op ioctl implementation
  drm: Remove __OS_HAS_AGP
  drm/doc: Update docs about device instance setup
2015-10-16 10:02:35 +10:00
Michel Dänzer
f6c7aba47b drm/amdgpu: Keep the pflip interrupts always enabled v7
This fixes flickering issues caused by prematurely firing pflip
interrupts.

v2 (chk): add commit message, fix DCE V10/V11 and DM as well
v3: Re-enable pflip interrupt wherever we re-enable a CRTC
v4: Enable pflip interrupt in DAL as well
v5: drop DAL changes for upstream
v6: (agd): only enable interrupts on crtcs that exist
v7: (agd): integrate suggestions from Michel

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2015-10-15 10:04:50 -04:00
Alex Deucher
80c083c5e4 drm/amdgpu: adjust default dispclk (v2)
Set the default to 600Mhz if it's not set in the bios,
and bump the default to 600Mhz if it's lower than that.

Port of radeon commit:
9368931db8

v2: clean up the code a bit

bug:
https://bugs.freedesktop.org/show_bug.cgi?id=91896

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-15 10:04:13 -04:00
Junwei Zhang
2fcef6ec87 drm/amdgpu: fix lockup when clean pending fences
The first lockup fence will lock the fence list of scheduler.
Then cancel the delayed workqueues for all clean pending fences
without waiting the workqueues to finish.

Change-Id: I9bec826de1aa49d587b0662f3fb4a95333979429
Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-10-14 16:20:32 -04:00
Junwei Zhang
2440ff2c91 drm/amdgpu: add timer to fence to detect scheduler lockup
Change-Id: I67e987db0efdca28faa80b332b75571192130d33
Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: David Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-10-14 16:16:42 -04:00
Christian König
d6c10f6b81 drm/amdgpu: add VM CS mapping trace point
Output all VM mappings a command submission uses.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14 16:16:41 -04:00
Christian König
b495bd3a54 drm/amdgpu: add option to clear VM page tables after every submit
This makes it much easier to find when userspace misses to send some buffers.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14 16:16:40 -04:00
Christian König
d9c13156a6 drm/amdgpu: add option to stop on VM fault
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14 16:16:40 -04:00
Christian König
ce0c6bcda6 drm/amdgpu: only print meaningful VM faults
Port of radeon commit 9b7d786b90.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14 16:16:39 -04:00
Christian König
39ff8449c5 drm/amdgpu: also trace already allocated VMIDs
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14 16:16:38 -04:00
Lukas Wunner
3d2ce0d239 drm/amdgpu: Drop unnecessary #include <linux/vga_switcheroo.h>
This was added to two radeon files even though they don't use any
vga_switcheroo symbols, the amdgpu fork inherited them:

Added to amdgpu_acpi.c by commit d7a2952f1a ("drm/radeon: Add
support for the ATIF ACPI method to the radeon driver").

Added to amdgpu_bios.c by commit 6a9ee8af34 ("vga_switcheroo:
initial implementation (v15)").

Signed-off-by: Lukas Wunner <lukas@wunner.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14 16:16:38 -04:00
Alex Deucher
7dfac8965f drm/amdgpu: clean up pageflip interrupt handling
Check to make sure we aren't touching a non-existent
display controller and simplify the code.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14 16:16:36 -04:00
Alex Deucher
c113ea1c4f drm/amdgpu: rework sdma structures
Rework the sdma structures in the driver to
consolidate all of the sdma info into a single
structure and allow for asics that may have
different numbers of sdma instances.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14 16:16:36 -04:00
Alex Deucher
756e6880c5 drm/amdgpu: unpin cursor BOs on suspend and pin them again on resume
Everything is evicted from VRAM before suspend, so we need to make
sure all BOs are unpinned and re-pinned after resume. Fixes broken
mouse cursor after resume introduced by commit b9729b17.

Port of radeon commit:
f3cbb17bcf

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14 16:16:35 -04:00
Alex Deucher
a2df42da61 drm/amdgpu/dce8: Fold set_cursor() into show_cursor()
Port of radeon commit:
8991668ab4

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14 16:16:34 -04:00
Alex Deucher
72b400675a drm/amdgpu/dce8: Clean up reference counting and pinning of the cursor BOs
Take a GEM reference for and pin the new cursor BO, unpin and drop the
GEM reference for the old cursor BO in dce8 crtc_cursor_set2, and use
amdgpu_crtc->cursor_addr in dce8 set_cursor.

This fixes dce8 cursor_reset accidentally incrementing the cursor BO
pin count, and cleans up the code a little.

Port of radeon commit:
cd404af0c9

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14 16:16:34 -04:00
Alex Deucher
c4e0dfadb2 drm/amdgpu/dce8: Move hotspot handling out of set_cursor
It's only needed in dce8 crtc_cursor_set2.

Port of radeon commit:
2e007e611b

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14 16:16:33 -04:00
Alex Deucher
fd70cf63e2 drm/amdgpu/dce8: Re-show the cursor after a modeset (v2)
Setting a mode seems to clear the cursor registers, so we need to
re-program them to make sure the cursor is visible.

Port of radeon commit:
6d3759fac6

v2: change radeon reference in error message

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14 16:16:32 -04:00
Alex Deucher
77ed35b889 drm/amdgpu/dce8: Use cursor_set2 hook for enabling / disabling the HW cursor
The cursor_set2 hook provides the cursor hotspot position within the
cursor image. When the hotspot position changes, we can adjust the cursor
position such that the hotspot doesn't move on the screen. This prevents
the cursor from appearing to intermittently jump around on the screen
when the position of the hotspot within the cursor image changes.

Port of radeon commits:
78b1a6010b
3feba08d79

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14 16:16:32 -04:00
Alex Deucher
ec9353dca9 drm/amdgpu/dce11: Fold set_cursor() into show_cursor()
Port of radeon commit:
8991668ab4

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14 16:16:31 -04:00
Alex Deucher
232cc6520a drm/amdgpu/dce11: Clean up reference counting and pinning of the cursor BOs
Take a GEM reference for and pin the new cursor BO, unpin and drop the
GEM reference for the old cursor BO in dce11 crtc_cursor_set2, and use
amdgpu_crtc->cursor_addr in dce11 set_cursor.

This fixes dce11 cursor_reset accidentally incrementing the cursor BO
pin count, and cleans up the code a little.

Port of radeon commit:
cd404af0c9

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14 16:16:30 -04:00
Alex Deucher
1996ea09cd drm/amdgpu/dce11: Move hotspot handling out of set_cursor
It's only needed in dce11 crtc_cursor_set2.

Port of radeon commit:
2e007e611b

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14 16:16:30 -04:00