Commit Graph

8191 Commits

Author SHA1 Message Date
Kuninori Morimoto
c1909cc19a ARM: mach-shmobile: sh7372: Add I2C0, I2C1 support
sh7372 chip has 2 INTC.
Then, I2C0 is connected to INTCS, and I2C1 is connected to INTCA.
Both of these has no GPIO settings.

Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-04-07 16:22:03 +09:00
Tejun Heo
336f5899d2 Merge branch 'master' into export-slabh 2010-04-05 11:37:28 +09:00
Tejun Heo
5a0e3ad6af include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files.  percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.

percpu.h -> slab.h dependency is about to be removed.  Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability.  As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.

  http://userweb.kernel.org/~tj/misc/slabh-sweep.py

The script does the followings.

* Scan files for gfp and slab usages and update includes such that
  only the necessary includes are there.  ie. if only gfp is used,
  gfp.h, if slab is used, slab.h.

* When the script inserts a new include, it looks at the include
  blocks and try to put the new include such that its order conforms
  to its surrounding.  It's put in the include block which contains
  core kernel includes, in the same order that the rest are ordered -
  alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
  doesn't seem to be any matching order.

* If the script can't find a place to put a new include (mostly
  because the file doesn't have fitting include block), it prints out
  an error message indicating which .h file needs to be added to the
  file.

The conversion was done in the following steps.

1. The initial automatic conversion of all .c files updated slightly
   over 4000 files, deleting around 700 includes and adding ~480 gfp.h
   and ~3000 slab.h inclusions.  The script emitted errors for ~400
   files.

2. Each error was manually checked.  Some didn't need the inclusion,
   some needed manual addition while adding it to implementation .h or
   embedding .c file was more appropriate for others.  This step added
   inclusions to around 150 files.

3. The script was run again and the output was compared to the edits
   from #2 to make sure no file was left behind.

4. Several build tests were done and a couple of problems were fixed.
   e.g. lib/decompress_*.c used malloc/free() wrappers around slab
   APIs requiring slab.h to be added manually.

5. The script was run on all .h files but without automatically
   editing them as sprinkling gfp.h and slab.h inclusions around .h
   files could easily lead to inclusion dependency hell.  Most gfp.h
   inclusion directives were ignored as stuff from gfp.h was usually
   wildly available and often used in preprocessor macros.  Each
   slab.h inclusion directive was examined and added manually as
   necessary.

6. percpu.h was updated not to include slab.h.

7. Build test were done on the following configurations and failures
   were fixed.  CONFIG_GCOV_KERNEL was turned off for all tests (as my
   distributed build env didn't work with gcov compiles) and a few
   more options had to be turned off depending on archs to make things
   build (like ipr on powerpc/64 which failed due to missing writeq).

   * x86 and x86_64 UP and SMP allmodconfig and a custom test config.
   * powerpc and powerpc64 SMP allmodconfig
   * sparc and sparc64 SMP allmodconfig
   * ia64 SMP allmodconfig
   * s390 SMP allmodconfig
   * alpha SMP allmodconfig
   * um on x86_64 SMP allmodconfig

8. percpu.h modifications were reverted so that it could be applied as
   a separate patch and serve as bisection point.

Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.

Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-30 22:02:32 +09:00
Catalin Marinas
fd522a8dec ARM: 6006/1: ARM: Use the correct NOP size in memmove for Thumb-2 kernel builds
When compiling the kernel to Thumb-2, using a 16-bit NOP in the
memmove() implementation causes the preceding ADD PC instruction to
branch incorrectly in the middle of a 32-bit LDR or STR instruction. The
memmove() code is now similar to the memcpy() template.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-03-29 17:33:33 +01:00
Mika Westerberg
782a0fd167 ARM: 6005/1: arm: kprobes: fix register corruption with jprobes
Current implementation of jprobes allocates empty pt_regs from the
stack which is then passed to kprobe_handler() and eventually to
singlestep().  Now when instruction being simulated is STMFD (like
in normal function prologues without CONFIG_FRAME_POINTER), stores
using SP actually write over top of the fabricated pt_regs
structure.

This can be reproduced for example by using LKDTM module:
    # modprobe lkdtm
    # mount -t debugfs none /sys/kernel/debug
    # echo PANIC > /sys/kernel/debug/provoke-crash/INT_HW_IRQ_EN

after this, it fails with corrupted registers (before the requested crash would occur):

lkdtm: Crash point INT_HW_IRQ_EN of type PANIC hit, trigger in 9 rounds
lkdtm: Crash point INT_HW_IRQ_EN of type PANIC hit, trigger in 8 rounds
Internal error: Oops - undefined instruction: 0 [#1]
last sysfs file: /sys/devices/platform/serial8250.0/sleep_timeout
Modules linked in: lkdtm
CPU: 0    Not tainted  (2.6.34-rc2 #69)
PC is at irq_desc+0x1638/0xeeb0
LR is at 0x25
pc : [<c050b428>]    lr : [<00000025>]    psr: c80a0013
sp : ce94bd60  ip : c050b3e8  fp : a0000013
r10: c0aa453c  r9 : cf5d4000  r8 : ce9a1822
r7 : c050b424  r6 : 00000025  r5 : c039d8f8  r4 : c050b3e8
r3 : 00000001  r2 : cf4d0440  r1 : c039d8f8  r0 : 00000020
Flags: NZcv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment user
Control: 10c5387d  Table: 8e804019  DAC: 00000015
Process sh (pid: 496, stack limit = 0xce94a2e8)
Stack: (0xce94bd60 to 0xce94c000)
[...]
Code: 000002cd 00000000 00000000 00000001 (dead4ead)
---[ end trace 2b46d5f2b682f370 ]---
Kernel panic - not syncing: Fatal exception in interrupt

This patch allocates enough space (2 * sizeof(struct pt_regs)) from
the stack to prevent such corruption.

Signed-off-by: Mika Westerberg <ext-mika.1.westerberg@nokia.com>
Acked-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-03-29 17:33:33 +01:00
viresh kumar
55a07517ed ARM: 6001/1: removing compilation warning comming from clkdev.h
clkdev.h is using struct device *. Due to this compilation
warning is comming. Removing this warning.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-03-29 17:33:32 +01:00
viresh kumar
aedceb2a49 ARM: 6000/1: removing compilation warning comming from <asm/irq.h>
irq.h is using struct pt_regs *. Due to this compilation
warning is comming. Removing this warning by adding declaration
of struct pt_regs.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-03-29 17:33:31 +01:00
Catalin Marinas
325ffc3633 ARM: 5997/1: ARM: Correct the VFPv3 detection
A CPU has VFPv3 hardware if the FPSID[19:16] bits are 2 or more.
Currently Linux was only checking for 3 or more.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-03-28 10:40:14 +01:00
Catalin Marinas
e7c5650f60 ARM: 5996/1: ARM: Change the mandatory barriers implementation (4/4)
The mandatory barriers (mb, rmb, wmb) are used even on uniprocessor
systems for things like ordering Normal Non-cacheable memory accesses
with DMA transfer (via Device memory writes). The current implementation
uses dmb() for mb() and friends but this is not sufficient. The DMB only
ensures the relative ordering of the observability of accesses by other
processors or devices acting as masters. In case of DMA transfers
started by writes to device memory, the relative ordering is not ensured
because accesses to slave ports of a device are not considered
observable by the DMB definition.

A DSB is required for the data to reach the main memory (even if mapped
as Normal Non-cacheable) before the device receives the notification to
begin the transfer. Furthermore, some L2 cache controllers (like L2x0 or
PL310) buffer stores to Normal Non-cacheable memory and this would need
to be drained with the outer_sync() function call.

The patch also allows platforms to define their own mandatory barriers
implementation by selecting CONFIG_ARCH_HAS_BARRIERS and providing a
mach/barriers.h file.

Note that the SMP barriers are unchanged (being DMBs as before) since
they are only guaranteed to work with Normal Cacheable memory.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-03-25 21:13:50 +00:00
Catalin Marinas
23107c5420 ARM: 5995/1: ARM: Add L2x0 outer_sync() support (3/4)
The L2x0 cache controllers need to explicitly drain their write buffer
even for Normal Noncacheable memory accesses.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-03-25 21:13:50 +00:00
Catalin Marinas
319f551a0a ARM: 5994/1: ARM: Add outer_cache_fns.sync function pointer (2/4)
This patch introduces the outer_cache_fns.sync function pointer together
with the OUTER_CACHE_SYNC config option that can be used to drain the
write buffer of the outer cache.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-03-25 21:13:49 +00:00
Catalin Marinas
33f663ff91 ARM: 5993/1: ARM: Move the outer_cache definitions into a separate file (1/4)
To avoid #include collisions with subsequent patches in the series, this
patch moves the outer_cache definitions to a separate asm/outercache.h
file.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-03-25 21:13:49 +00:00
Christian Lamparter
bb45692891 [ARM] Orion5x: replace KEY_WLAN with KEY_WPS_BUTTON
"Input: add KEY_WPS_BUTTON definition" introduced
a generic keycode for WPS input events.

Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2010-03-23 13:48:15 -04:00
Christian Lamparter
9705c3961e [ARM] Kirkwood: WPS button keycode mapping
Commit "Input: add KEY_WPS_BUTTON definition"
added a generic keycode for WPS button.
Let's use it, instead of "F1" mapping.

Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2010-03-23 13:48:14 -04:00
Russell King
4f4669ee73 Merge branch 'fix' of git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6 2010-03-23 08:18:25 +00:00
Daniel Mack
fe3ebaad32 [ARM] pxa/raumfeld: fix button name
This fixes a warning when booting 2.6.34-rc2:

[   26.619814] ------------[ cut here ]------------
[   26.624604] WARNING: at fs/proc/generic.c:316 __xlate_proc_name+0xac/0xc0()
[   26.631555] name 'on/off button'
[   26.634753] Modules linked in:

Signed-off-by: Daniel Mack <daniel@caiaq.de>
Cc: Sven Neumann <s.neumann@raumfeld.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-22 12:03:11 +08:00
Huang Weiyi
af089f517a [ARM] pxa/raumfeld: remove duplicated #include
Remove duplicated #include('s) in
 arch/arm/mach-pxa/raumfeld.c

Signed-off-by: Huang Weiyi <weiyi.huang@gmail.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-22 12:03:10 +08:00
H Hartley Sweeten
c8c3dcb9df [ARM] locomo: fix unpaired spin_lock_irqsave
The function locomo_m62332_senddata sends a three byte i2c message to
a M62332 DAC. This entire function is guarded with a spin_lock_irqsave
at the start of the function and a spin_unlock_irqrestore at the end.

As each byte is transferred, the i2c ACK from the DAC is checked.
Currently, if the ACK is missing the function simply returns without
the unlock. It also leaves the i2c bus in an invalid state since the
last byte transferred did not have a "stop" condition and leave the
bus idle.

Fix this by adding an exit path using goto.

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-22 12:03:09 +08:00
H Hartley Sweeten
1b0d76cb9d [ARM] locomo: fix SPI register offset
The locomo spi registers are all defined in locomo.h as offsets
from the first spi register LOCOMO_SPI (0x60), which is itself
an offset from the locomo base address.  To correctly access
these registers LOCOMO_SPI must always be included in the
address calculation.

There are two places in locomo.c where this is not done.  The
first one, in locomo_suspend, actually results in a write to
LOCOMO_ST instead of LOCOMO_SPICT.  The second is in __locomo_probe
and results in a write to LOCOMO_MCSX2 instead of LOCOMO_SPIIE.

Fix these by including LOCOMO_SPI in the calculation.

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-22 12:03:08 +08:00
Eric Miao
6533be390b [ARM] pxa/sharpsl: add dependency of max1111 driver to sharpsl_pm
sharpsl_pm.c actually depends on max1111 driver being built-in when
not using legacy ssp code.

Reported-by: Jonathan Cameron <jic23@cam.ac.uk>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-22 12:03:07 +08:00
Eric Miao
1fe2b6b527 [ARM] pxa: remove unnecessary 'select FB_W100' from some platforms
Reported-by: Jonathan Cameron <jic23@cam.ac.uk>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-22 12:03:06 +08:00
Jonathan Cameron
ef80936f99 [ARM] pxa: remove spi cs gpio direction to avoid clash with driver
Signed-off-by: Jonathan Cameron <jic23@cam.ac.uk>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-22 12:03:06 +08:00
Eric Miao
7471f46d74 [ARM] mmp: fix for variables in uncompress.h being discarded
Due to commit:

    5de813b  ARM: Eliminate decompressor -Dstatic= PIC hack

The data section will be discarded for the decompressor, thus move the
static variables into BSS section by initializing them at run time.

Reported-by: Jonathan Cameron <jic23@cam.ac.uk>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-22 12:03:05 +08:00
Jonathan Cameron
2a8ac187e0 [ARM] pxa: fix for variables in uncompress.h being discarded
Due to commit:

    5de813b  ARM: Eliminate decompressor -Dstatic= PIC hack

The data section will be discarded for the decompressor, thus move the
static variables into BSS section by initializing them at run time.

Signed-off-by: Jonathan Cameron <jic23@cam.ac.uk>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-22 12:03:04 +08:00
Russell King
48edcfcfbf ARM: Update mach-types
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-03-20 15:37:39 +00:00
Russell King
0372c38047 ARM: Fix IXP23xx build error in mach/memory.h
One to many close parens.

In file included from arch/arm/include/asm/page.h:202,
                 from include/linux/mm_types.h:15,
                 from include/linux/sched.h:63,
                 from arch/arm/kernel/asm-offsets.c:13:
arch/arm/include/asm/memory.h: In function 'virt_to_bus':
arch/arm/include/asm/memory.h:214: error: expected ';' before ')' token
arch/arm/include/asm/memory.h:214: error: expected statement before ')' token
arch/arm/include/asm/memory.h: In function 'bus_to_virt':
arch/arm/include/asm/memory.h:219: error: expected ';' before ')' token
arch/arm/include/asm/memory.h:219: error: expected statement before ')' token

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-03-20 15:33:09 +00:00
Linus Torvalds
9b59a0a4ee Merge branch 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6
* 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6:
  ARM/OMAP: Remove the +x bit from a couple of source files
  omap: McBSP: Drop unnecessary status/error bit clearing on reg_cacheretrieved register values
  OMAP4: fix temporary hacks that break multi-omap PM
  OMAP2: cpu_is_omap2*: fix compile-time removal of unused code
  omap3: pandora: add missing i2c3 board_info
  omap: mach-omap2/io.c: fix function declarations
  omap: Fix gpio_resume_after_retention
  omap3: Fix support for the LEDs connected to GPIO outputs on IGEP v2board
  omap: Checkpatch cleanup for blizzard.h
  omap: pass the reboot command to the boot loader
  omap2/3/4: mailbox: remove compiler warning
  OMAP2: serial.c: Fix number of uarts in early_init
  omap: Enable PM_RUNTIME in defconfigs to avoid USB compile errors
  omap2: Update n8x0 defconfig to test multi-omap and DMA api changes
  omap2: add USB initialization for tusb6010
  omap4: Fix build break by moving omap_smc1 into a separate .S
  omap2/3/4: ehci: avoid compiler error with touchbook
  omap3: Fix compile for Touch Book early_param
2010-03-18 16:59:30 -07:00
Linus Torvalds
c3a0bd7515 Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: (23 commits)
  ARM: Fix RiscPC decompressor build errors
  ARM: Fix sorting of platform group config options and includes
  ARM: 5991/1: Fix regression in restore_user_regs macro
  ARM: 5989/1: ARM: KGDB: add support for SMP platforms
  ARM: 5990/1: ARM: use __armv5tej_mmu_cache_flush for V5TEJ instead of __armv4_mmu_cache_flush
  ARM: Add final piece to fix XIP decompressor in read-only memory
  video: enable sh_mobile_lcdc on SH-Mobile ARM
  ARM: mach-shmobile: ap4evb SDHI0 platform data V2
  ARM: mach-shmobile: sh7372 SDHI vector merge
  ARM: mach-shmobile: sh7377 SDHI vector merge
  ARM: mach-shmobile: sh7367 SDHI vector merge
  ARM: mach-shmobile: G4EVM KEYSC platform data
  mtd: enable sh_flctl on SH-Mobile ARM
  ARM: mach-shmobile: G3EVM FLCTL platform data
  ARM: mach-shmobile: G3EVM KEYSC platform data
  Video: ARM CLCD: Better fix for swapped IENB and CNTL registers
  ARM: Add L2 cache handling to smp boot support
  ARM: 5960/1: ARM: perf-events: fix v7 event selection mask
  ARM: 5959/1: ARM: perf-events: request PMU interrupts with IRQF_NOBALANCING
  ARM: 5988/1: pgprot_dmacoherent() for non-mmu builds
  ...
2010-03-18 16:59:10 -07:00
Ben Dooks
0e17226f7c ARM: SAMSUNG: Fixup commit 4e6d488af3
Commit 4e6d488af3 either missed out the
following machine files or somehow managed to clash between merges.

Fixup the three files missing the second parameter to addruart macro
to allow them to build.

Fixes the following warnings in arch/arm/kernel/debug.c:
arch/arm/kernel/debug.S: Assembler messages:
arch/arm/kernel/debug.S:167: Error: too many positional arguments
arch/arm/kernel/debug.S:183: Error: too many positional arguments

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2010-03-15 23:11:41 +00:00
Ben Dooks
65e543f12c ARM: SAMSUNG: Fix build error from stale define in <plat/uncompress.h>
The decleration of error() as static in the platform specific uncompress
code in  arch/arm/plat-samsung/include/plat/uncomopress.h causes the build
of the uncompressor to break. Remove it, as it is no longer needed.

arch/arm/boot/compressed/decompress.o: In function `gunzip':
/var/tmp/kernel-orig/arch/arm/boot/compressed/../../../../lib/decompress_inflate.c:67: undefined reference to `error'
/var/tmp/kernel-orig/arch/arm/boot/compressed/../../../../lib/decompress_inflate.c:73: undefined reference to `error'
/var/tmp/kernel-orig/arch/arm/boot/compressed/../../../../lib/decompress_inflate.c:80: undefined reference to `error'
/var/tmp/kernel-orig/arch/arm/boot/compressed/../../../../lib/decompress_inflate.c:95: undefined reference to `error'
/var/tmp/kernel-orig/arch/arm/boot/compressed/../../../../lib/decompress_inflate.c:152: undefined reference to `error'

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2010-03-15 22:57:18 +00:00
Vasily Khoruzhick
e79032aa75 ARM: SAMSUNG: Add suspend/resume support for S3C PWM driver
Reset period_ns and duty_ns values in suspend handler to avoid skip of
configuration if same values passed to pwm_config;
Restore invertion bit in resume handler.

Without this patch PWM works incorrectly after resume from suspend.

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2010-03-15 22:43:33 +00:00
Vasily Khoruzhick
664e87e47e ARM: S3C2440: Fix s3c2440 cpufreq compilation post move.
Fix compilation issue by moving s3c2440-cpufreq.c into mach-s3c2440 directory

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2010-03-15 22:43:12 +00:00
Russell King
0d5e6f7ae8 ARM: Fix RiscPC decompressor build errors
arch/arm/boot/compressed/decompress.o: In function `do_decompress':
decompress.c:(.text+0x26e8): undefined reference to `error'
decompress.c:(.text+0x2760): undefined reference to `error'
decompress.c:(.text+0x27d8): undefined reference to `error'
decompress.c:(.text+0x2824): undefined reference to `error'
decompress.c:(.text+0x28f0): undefined reference to `error'

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-03-15 22:04:54 +00:00
Russell King
ccf50e2341 ARM: Fix sorting of platform group config options and includes
... and document the sorting criteria to help future additions.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-03-15 19:03:06 +00:00
Anders Grafström
8e4971f2fb ARM: 5991/1: Fix regression in restore_user_regs macro
ARMv5T and earlier require that a ldm {}^ instruction is not followed
by an instruction that accesses banked registers. This patch restores
the nop that was lost in commit b86040a59f.

Signed-off-by: Anders Grafström <grfstrm@users.sourceforge.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-03-15 17:20:08 +00:00
Will Deacon
5d8614cc5d ARM: 5989/1: ARM: KGDB: add support for SMP platforms
To support SMP platforms, KGDB requires the architecture backend to
implement the kgdb_roundup_cpus function.

This patch, taken against 2.6.33, implements the function for ARM based
on the MIPS port.

Cc: Jason Wessel <jason.wessel@windriver.com>
Cc: Jean-Michel Hautbois <jhautbois@gmail.com>
Cc: KGDB Mailing List <kgdb-bugreport@lists.sourceforge.net>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-03-15 14:33:04 +00:00
Sascha Hauer
75216859d9 ARM: 5990/1: ARM: use __armv5tej_mmu_cache_flush for V5TEJ instead of __armv4_mmu_cache_flush
This got broken with commit 0e056f20

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-03-15 14:32:02 +00:00
Russell King
b89ebadc34 ARM: Add final piece to fix XIP decompressor in read-only memory
This defines STATIC_RW_DATA, which prevents the read/write malloc
management data being declared with a static attribute.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-03-15 14:29:22 +00:00
Russell King
2d3b5fa3a3 Merge master.kernel.org:/pub/scm/linux/kernel/git/lethal/genesis-2.6 2010-03-15 14:27:06 +00:00
Magnus Damm
3a14d03977 ARM: mach-shmobile: ap4evb SDHI0 platform data V2
Add SDHI0 platform data for the AP4EVB board V2.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-03-15 12:06:47 +09:00
Magnus Damm
c57a31abf0 ARM: mach-shmobile: sh7372 SDHI vector merge
Merge the SDHI vectors for sh7372 using the recently
merged INTC force_enable/disable feature.

With this in place SDHI hotplug is supported using
the drivers sh_mobile_sdhi and tmio_mmc.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-03-15 12:06:46 +09:00
Magnus Damm
c148abfc2d ARM: mach-shmobile: sh7377 SDHI vector merge
Merge the SDHI vectors for sh7377 using the recently
merged INTC force_enable/disable feature.

With this in place SDHI hotplug is supported using
the drivers sh_mobile_sdhi and tmio_mmc.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-03-15 12:06:46 +09:00
Magnus Damm
9615b37c5c ARM: mach-shmobile: sh7367 SDHI vector merge
Merge the SDHI vectors for sh7367 using the recently
merged INTC force_enable/disable feature.

With this in place SDHI hotplug is supported using
the drivers sh_mobile_sdhi and tmio_mmc.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-03-15 12:06:45 +09:00
NISHIMOTO Hiroki
6676a1701b ARM: mach-shmobile: G4EVM KEYSC platform data
This patch adds KEYSC platform data for the G4EVM board.

Signed-off-by: NISHIMOTO Hiroki <nishimoto.hiroki@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-03-15 12:06:45 +09:00
Magnus Damm
143f3b833f ARM: mach-shmobile: G3EVM FLCTL platform data
This patch adds FLCTL platform data for the G3EVM board.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-03-15 11:13:14 +09:00
Magnus Damm
03fb256df9 ARM: mach-shmobile: G3EVM KEYSC platform data
This patch adds KEYSC platform data for the G3EVM board.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-03-15 11:13:13 +09:00
Russell King
1027247f6e ARM: Add L2 cache handling to smp boot support
The page table and secondary data which we're asking the secondary CPU
to make use of has to hit RAM to ensure that the secondary CPU can see
it since it may not be taking part in coherency or cache searches at
this point.

Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-03-14 19:42:35 +00:00
Linus Torvalds
9fdfbc2bff Merge branch 'perf-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'perf-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  perf: Provide generic perf_sample_data initialization
  MAINTAINERS: Add Arnaldo as tools/perf/ co-maintainer
  perf trace: Don't use pager if scripting
  perf trace/scripting: Remove extraneous header read
  perf, ARM: Modify kuser rmb() call to compile for Thumb-2
  x86/stacktrace: Don't dereference bad frame pointers
  perf archive: Don't try to collect files without a build-id
  perf_events, x86: Fixup fixed counter constraints
  perf, x86: Restrict the ANY flag
  perf, x86: rename macro in ARCH_PERFMON_EVENTSEL_ENABLE
  perf, x86: add some IBS macros to perf_event.h
  perf, x86: make IBS macros available in perf_event.h
  hw-breakpoints: Remove stub unthrottle callback
  x86/hw-breakpoints: Remove the name field
  perf: Remove pointless breakpoint union
  perf lock: Drop the buffers multiplexing dependency
  perf lock: Fix and add misc documentally things
  percpu: Add __percpu sparse annotations to hw_breakpoint
2010-03-13 14:39:42 -08:00
Will Deacon
d10fca9f39 ARM: 5960/1: ARM: perf-events: fix v7 event selection mask
The event selection mask for ARMv7 cores [ARMV7_EVTSEL_MASK]
is incorrectly set to 0x7f. This means that the top bit of an
event ID is ignored, so counting branch misses (id=0x10) and
ISBs (id=0x90) give the same results.

This patch sets the event selection mask to the correct value
of 0xff.

Signed-off-by: Jean Pihet <jpihet@mvista.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-03-13 10:50:29 +00:00
Will Deacon
ddee87f208 ARM: 5959/1: ARM: perf-events: request PMU interrupts with IRQF_NOBALANCING
If IRQ balancing is used on a multicore ARM system, PMU interrupt
lines may be relocated onto CPUs other than the one causing the
counter overflow. This can result in misattribution of events to
the wrong core and, in the case that the CPU handling the interrupt
has not experience counter overflow, the interrupt can be disabled
because the handler returns IRQ_NONE.

This patch adds the IRQF_NOBALANCING flag to the request_irq call
in perf_events.c.

Acked-by: Jamie Iles <jamie.iles@picochip.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-03-13 10:50:28 +00:00