ACPICA commit bd46cb07e614fd85ea69e54c1f6f0ae0a5fb20ab
This structure is used in to parse PRMT in other Operating Systems
that relies on using subtable headers in order to parse ACPI tables.
Although the PRMT doesn't have "subtables" it has a list of module
information structures that act as subtables.
Link: https://github.com/acpica/acpica/commit/bd46cb07
Signed-off-by: Erik Kaneda <erik.kaneda@intel.com>
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
ACPICA commit 8710a708faed728ea2672b8da842b2e9af1cf5bd
IORT revision E.b (ARM DEN 0049E.b) contains a few additions like,
-Added an identifier field in the node descriptors to aid table
cross-referencing.
-Introduced the Reserved Memory Range(RMR) node. This is used
to describe memory ranges that are used by endpoints and require
a unity mapping in SMMU.
-Introduced a flag in the RC node to express support for PRI.
-Added a flag in the RC node to declare support for PASID forward
information.
Please note that IORT Rev E and E.a have known issues and are not
supported.
Link: https://github.com/acpica/acpica/commit/8710a708
Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Erik Kaneda <erik.kaneda@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
ACPICA commit 44ca5f4f9be24bf64524cdb1de46322509319056
This entails adding an optional subtable indicating secure access
components as well as two different types of secure access components
(ID-based or Memory). For definitons and uses, consult the ACPI
specification.
Link: https://github.com/acpica/acpica/commit/44ca5f4f
Signed-off-by: Erik Kaneda <erik.kaneda@intel.com>
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
ACPICA commit eefb865355514048380d921de5efcf30027d6b02
IVHD type 40h uses the same field layout as type 11h, but adds support
for a new device entry type F0h (ACPI HID device entry). The new device
entry type has variable length: after fixed-length fields occupying 22
bytes, there's a field of length up to 255 (as given by the preceding
field).
Link: https://github.com/acpica/acpica/commit/eefb8653
Signed-off-by: Alexander Monakov <amonakov@ispras.ru>
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Erik Kaneda <erik.kaneda@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
ACPICA commit 422166b656565d180bb3aac712009bdce5e70cdd
NHLT (Non-HDAudio Link Table) provides configuration of audio
endpoints for Intel SST (Smart Sound Technology) DSP products.
Similarly to other ACPI tables, data provided by BIOS may not
describe it correctly, thus overriding is required.
ACPI override mechanism checks for unknown signature before
proceeding. Update known signatures array to support NHLT.
Link: https://github.com/acpica/acpica/commit/422166b6
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Erik Kaneda <erik.kaneda@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
ACPICA commit 6ddc19419896e4149ced1b5f35f0dc12516c0399
The AMD IVRS table parsing supported only IVHD type 10h structures.
Parsing an IVHD type 11h caused the iasl to report unknown subtable type.
Add necessary structure definition for IVHD type 11h and apply correct
parsing method based on subtable type.
Link: https://github.com/acpica/acpica/commit/6ddc1941
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Erik Kaneda <erik.kaneda@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
PMCG nodes were added by IORT revision C, with the unfortunate oversight
that it only defined a single base address, and thus was incapable of
properly describing PMCG implementations with PMCG_CFGR.RELOC_CTRS = 1,
where the counters are in a separate page from the control registers.
Revision D corrects this by clarifying the existing field as the page 0
base address and adding a second field to describe the page 1 address
when implemented. With the spec now fit for purpose, let's support it.
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Erik Schmauss <erik.schmauss@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
IORT revision D contains a few additions and fixes to
currently-supported tables:
- SMMUv3 proximity domain field is enlarged to 4 bytes for consistency
with SRAT
- Root complex nodes gain an address size limit field equivalent to that
of named components
- Named component nodes gain a way to describe PASID (substream_ID)
support, encoded in their flags
Additionally, we fix a couple of outstanding points in passing:
- Add the stall support flag for named components defined in revision C
- Fix SMMUv3 HTTU override mask, which should always have been 2 bits
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Erik Schmauss <erik.schmauss@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
ACPICA commit 5ad4f0b7bf9e7ba175bd320cf7950f3b38799ff3
ACPI 6.2 adds support for the Software Delegated Exception Interface,
which is described by "Software Delegated Exception Interface (SDEI)"
ARM DEN0054A.
Add the necessary types in the ACPICA header files and support for
compiling/decompiling the table.
Link: https://github.com/acpica/acpica/commit/5ad4f0b7
Signed-off-by: James Morse <james.morse@arm.com>
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Lv Zheng <lv.zheng@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Pull more ACPI updates from Rafael Wysocki:
"These update the ACPICA code in the kernel to upstream revision
20170303 which adds a few minor fixes and improvements, update ACPI
SoC drivers with new device IDs, platform-related information and
similar, fix the register information in the xpower PMIC driver,
introduce a concept of "always present" devices to the ACPI device
enumeration code and use it to fix a problem with one platform, and
fix a system resume issue related to power resources.
Specifics:
- Update the ACPICA code in the kernel to upstream revision 20170303
which includes:
* Minor fixes and improvements in the core code (Bob Moore,
Seunghun Han).
* Debugger fixes (Colin Ian King, Lv Zheng).
* Compiler/disassembler improvements (Bob Moore, David Box, Lv
Zheng).
* Build-related update (Lv Zheng).
- Add new device IDs and platform-related information to the ACPI
drivers for Intel (LPSS) and AMD (APD) SoCs (Hanjun Guo, Hans de
Goede).
- Make it possible to quirk ACPI-enumerated devices as "always
present" on platforms where they are incorrectly reported as not
present by the AML and add the INT0002 device ID to the list of
"always present" devices (Hans de Goede).
- Fix the register information in the xpower PMIC driver and add
comments to map the registers to symbols used by AML to it (Hans de
Goede).
- Move the code turning off unused ACPI power resources during system
resume to a point after all devices have been resumed to avoid
issues with power resources that do not behave as expected (Hans de
Goede)"
* tag 'acpi-extra-4.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (22 commits)
ACPI / power: Delay turning off unused power resources after suspend
ACPI / PMIC: xpower: Fix power_table addresses
ACPI / LPSS: Call pwm_add_table() for Bay Trail PWM device
ACPICA: Update version to 20170303
ACPICA: iasl: add ASL conversion tool
ACPICA: Local cache support: Allow small cache objects
ACPICA: Disassembler: Do not unconditionally remove temporary names
ACPICA: iasl: Fix IORT SMMU GSI disassembling
ACPICA: Cleanup AML opcode definitions, no functional change
ACPICA: Debugger: Add interpreter blocking mark for single-step mode
ACPICA: debugger: fix memory leak on Pathname
ACPICA: Update for automatic repair code for objects returned by evaluate_object
ACPICA: Namespace: fix operand cache leak
ACPICA: Fix several incorrect invocations of ACPICA return macro
ACPICA: Fix a module for excessive debug output
ACPICA: Update some function headers, no funtional change
ACPICA: Disassembler: Enhance resource descriptor detection
i2c: designware: Add ACPI HID for Hisilicon Hip07/08 I2C controller
ACPI / APD: Add clock frequency for Hisilicon Hip07/08 I2C controller
ACPI / bus: Add INT0002 to list of always-present devices
...
ACPICA commit c04d310039d3e0ed1cb62876fe7e596fbc75ab01
ACPICA commit a65c1df7e6b4bad8e37df822018c40c6c446add9
The key feature of this utility is that the original comments within
the input ASL files are preserved during the conversion process, and
included within the converted ASL+ file -- thus creating a transparent
conversion of existing ASL files to ASL+ (ASL 2.0)
This patch is an automatic generation of the ASL converter commit,
Linux kernel isn't affected by the functionality provided in this
commit, but requires the linuxized changes to support future ACPICA
release automation.
Link: https://github.com/acpica/acpica/commit/c04d3100
Link: https://github.com/acpica/acpica/commit/a65c1df7
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Jung-uk Kim <jkim@FreeBSD.org>
Signed-off-by: Lv Zheng <lv.zheng@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
ACPICA commit 637b88de24a78c20478728d9d66632b06fcaa5bf
If the IORT template is compiled and then iort.aml binary disassembled to
iort.dsl, SMMUv1 node lists incorrect offset for SMMU_Nsg_cfg_irpt Interrupt:
[0ECh 0236 8] SMMU_Nsg_irpt Interrupt : 0000000000000000
[0ECh 0236 8] SMMU_Nsg_cfg_irpt Interrupt : 0000000000000000
This is because iasl hasn't implemented SMMU GSI decoding yet.
This patch fixes this issue by preparing structures for decoding IORT SMMU
GSI. ACPICA BZ 1340, reported by Alexei Fedorov, fixed by Lv Zheng.
Link: https://github.com/acpica/acpica/commit/637b88de
Link: https://bugs.acpica.org/show_bug.cgi?id=1340
Reported-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
Signed-off-by: Lv Zheng <lv.zheng@intel.com>
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Remove a useless constant that slipped through me when I did the code
review. This commit fixes the issue.
Cc: Jiandi An <anjiandi@codeaurora.org>
Fixes: 69c558de63c7 ("tpm/tpm_crb: Enable TPM CRB interface for ARM64")
Signed-off-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
ACPICA commit 9f7c3e148f440049615e2791d73b292f65692d7e
The most recent version of the IORT specification adds in a definition
for a subtable to describe SMMUv3 devices; there is already a subtable
for SMMUv1/v2 devices.
Add in the definition of the subtable, add in the code to compile it,
and add in a template for it.
Link: https://github.com/acpica/acpica/commit/9f7c3e14
Signed-off-by: Al Stone <ahs3@redhat.com>
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Lv Zheng <lv.zheng@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
