Commit Graph

6 Commits

Author SHA1 Message Date
Jon Mason
b1aaf88bb7 ARM: dts: NSP: Add GPIO reboot method to bcm958625hr DTS file
Add the ability to reboot the bcm958625hr board via GPIO.
Unfortunately, not all of the NSP based boards use the same GPIO pin and
one doesn't have the ability to reboot via GPIO at all.  So, this will
need to be specified per DTS file.

Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-08-08 18:41:46 -07:00
Jon Mason
70725d6e97 ARM: dts: NSP: Enable SATA on bcm958625hr
Add SATA support to bcm958625hr DTS

Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-08-08 18:41:22 -07:00
Jon Mason
c53beb47f6 ARM: dts: NSP: Correct RAM amount for BCM958625HR board
The BCM958625HR board has 2GB of RAM available.  Increase the amount
from 512MB to 2GB and add the device type to the memory entry.

Fixes: 9a4865d42f ("ARM: dts: NSP: Specify RAM amount for BCM958625HR board")
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-08-08 11:07:29 -07:00
Florian Fainelli
1bc1d822cd ARM: dts: NSP: Add BCM958625HR switch ports
Add the layout of the switch ports found on the BCM958625HR reference
board. The CPU port is hooked up to the AMAC0 Ethernet controlelr
adapter, so we also enable it.

Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-08-08 11:06:28 -07:00
Florian Fainelli
9a4865d42f ARM: dts: NSP: Specify RAM amount for BCM958625HR board
Add 512MB of memory starting at physical offset 0x6000_0000.

Fixes: 65e9ac208c8e ("ARM: dts: NSP: Add new DT file for bcm958625hr")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-07-06 19:42:43 -07:00
Jon Mason
a7dd623f55 ARM: dts: NSP: Add new DT file for bcm958625hr
Create a new device tree file for the Broadcom Northstar Plus HR SVK.
This SVK is a smaller form factor, and thus only has 2 PCI slots and 1
UART.  Also, it has the ability to reboot via GPIO (instead of the
processor reset).

Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-05-31 10:56:11 -07:00