Commit Graph

20840 Commits

Author SHA1 Message Date
Thomas Petazzoni
c0adb877a2 pinctrl: mvebu: armada-39x: add missing PCIe functions
The latest version of the Armada 39x datasheet documents several new
PCIe related functions on various MPP pins. This commit adds the
description of these new functions to the Armada 39x pinctrl driver as
well as to its DT binding documentation.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-10 14:31:39 +02:00
Thomas Petazzoni
f9dbbe011c pinctrl: mvebu: armada-38x: add ptp functions
The latest version of the Armada 38x datasheet documents several new
PTP related functions on various MPP pins. This commit adds the
description of these new functions to the Armada 38x pinctrl driver as
well as to its DT binding documentation.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-10 14:30:44 +02:00
Thomas Petazzoni
f7ad5b29ce pinctrl: mvebu: armada-38x: add ua1 functions
The latest version of the Armada 38x datasheet documents several new
UART1 related functions on various MPP pins. This commit adds the
description of these new functions to the Armada 38x pinctrl driver as
well as to its DT binding documentation.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-10 14:29:54 +02:00
Thomas Petazzoni
9ce28fccb0 pinctrl: mvebu: armada-38x: add nand functions
The latest version of the Armada 38x datasheet documents several new
NAND related functions on various MPP pins. This commit adds the
description of these new functions to the Armada 38x pinctrl driver as
well as to its DT binding documentation.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-10 14:24:57 +02:00
Thomas Petazzoni
503cfd9f8a pinctrl: mvebu: armada-38x: add sata functions
The latest version of the Armada 38x datasheet documents several new
SATA related functions on various MPP pins. This commit adds the
description of these new functions to the Armada 38x pinctrl driver as
well as to its DT binding documentation.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-10 14:18:27 +02:00
Thomas Petazzoni
b19bf37976 pinctrl: mvebu: armada-xp: add dram functions
The latest Armada XP datasheet documents several new DRAM related
functions on various MPPs. This commit adds the description of these
new functions in the Armada XP pinctrl driver and its DT binding
documentation.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-10 14:11:50 +02:00
Thomas Petazzoni
fb53b61d77 pinctrl: mvebu: armada-xp: add nand rb function
The latest version of the Armada XP datasheet documents a new
NAND-related MPP function on MPP48, for which this commit adds
support.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-10 14:11:01 +02:00
Thomas Petazzoni
88b355f1e4 pinctrl: mvebu: armada-xp: add spi1 function
The latest Armada XP datasheet documents that some of the MPP pins can
be used to access the second SPI bus, labelled 'spi1'. This commit
adds the corresponding pins in the pinctrl driver and its DT binding
documentation.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-10 14:09:49 +02:00
Thomas Petazzoni
50a7d13d24 pinctrl: mvebu: armada-xp: rename spi to spi0
After updating to the latest Armada XP datasheet, we discovered that
there is a second SPI bus accessible from the MPP pins, called 'spi1'.

In order to be consistent with other SoCs having two SPI busses, this
commit renames the functions of the first SPI bus to 'spi0' instead of
just 'spi'.

This commit obviously breaks the DT backward compatibility for the
people using the "spi" function name in their Device Tree.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-10 14:00:54 +02:00
Thomas Petazzoni
9e05db29e2 pinctrl: mvebu: armada-370: align spi1 clock pin naming
Across all SoCs, even on Armada 370 for SPI0, the clock pin uses the
'sck' subname and not 'clk', so this commit adjusts the code and
documentation accordingly.

Since this commit only changes the subname, DT backward compatibility
is not affected.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-10 13:59:40 +02:00
Thomas Petazzoni
bfacb56694 pinctrl: mvebu: armada-370: align VDD cpu-pd pin naming with datasheet
For consistency with the datasheet, this commit renames the VDD
function of the MPP4 pin.

While this changes the DT compatibility, it is not considered to be a
problem since this pin is unlikely to be used for anything but
debugging purposes.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-10 13:57:28 +02:00
Thomas Petazzoni
f1b2db90d0 pinctrl: mvebu: armada-xp: fix binding documentation of ge1 pins
There was an off-by-one in the documentation of the ge1(txd[0-3])
pins, which is fixed by this commit. Since the driver was correct, and
the subnames are anyway not used in the DT binding itself, there is no
need to push this documentation fix for stable.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-10 13:56:34 +02:00
Thomas Petazzoni
a361cbc575 pinctrl: mvebu: armada-{370,xp}: normalize ethernet txclkout pins
This commit normalizes the naming of the Ethernet txclkout pin to be
the same accross Marvell SoCs. It is worth mentioning that the DT
binding documentation of the Armada XP was wrong for MPP12: it said
the function was ge1(txd0), while it is in fact ge1(txclkout). It is
however not really a fix worth sending to stable since it does not
change the behavior, and the driver itself was correct.

Since only the subnames are changed, DT backward compatibility is not
affected.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-10 13:50:17 +02:00
Thomas Petazzoni
f32f01e1ba pinctrl: mvebu: armada-{370,375}: normalize audio pins
This commit aligns the naming of the audio 'lrclk' pin accross Marvell
SoCs.

Since only the subname is changed, the DT backward compatibility is
not affected.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-10 13:43:52 +02:00
Thomas Petazzoni
d4974c16ed pinctrl: mvebu: armada-{370,375}: normalize PCIe pins
This commit normalizes the naming of PCIe pins to use 'rstout' instead
of 'rstoutn' or 'rst-out'.

Since only the subnames are changed, DT compatibility is not affected.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-10 13:40:27 +02:00
Thomas Petazzoni
dae5597f25 pinctrl: mvebu: armada-{370,375,38x,39x,xp}: normalize TDM pins
This commit normalizes the naming of the TDM pins accross the
different Marvell SoCs. Mainly it consists in:

 * Removing the 'n' from signal names: 'intn' becomes 'int' and 'rstn'
   becomes 'rst'

 * Renaming the main name 'tdm2c' to 'tdm' on Armada 38x.

 * Change the main name 'tdm-1' to 'tdm' for one of the pins of the
   Armada XP

The last two changes affect DT compatibility, but since the TDM
interface is nowhere near being supported in mainline, it should not
be considered to be a serious problem at this point.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-10 13:35:33 +02:00
Thomas Petazzoni
5cc0de1faf pinctrl: mvebu: armada-39x: align NAND pin naming
All SoCs use "nand" to designate NAND pins, only Armada 39x is using
"nd", which is not consistent. This commit fixes that by renaming the
corresponding functions.

It also changes the subnames from rbn0/rbn1 to rb0/rb1, to respect the
convention used everywhere that we don't encode the 'n' part of signal
names.

While this commit changes the main name of function, therefore
potentially breaking the DT compatibility, this is not a problem since
Armada 39x is a brand new SoC which isn't used in production yet.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-10 11:11:39 +02:00
Thomas Petazzoni
7bd6a26db6 pinctrl: mvebu: armada-{370,375,38x,39x}: normalize dev pins
This commit modifies the definition of the Device Bus interface pins
to be consistent accross SoCs. Especially, it removes the 'n'
indicators that we don't encode in the subnames of pins:

   'dev(wen0)' becomes 'dev(we0)'
   'dev(wen1)' becomes 'dev(we1)'
   'dev(oen)' becomes 'dev(oe)'
   etc.

In addition, it fixes the Armada 375 DT binding documentation, which
forgot to document the 'dev' function for MPP46, MPP57 and MPP63.

Since only the subnames are changed, this commit does not affect DT
compatibility.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-10 11:10:34 +02:00
Thomas Petazzoni
ddf3f19e21 pinctrl: mvebu: armada-39x: normalize SDIO pin naming
In order to be consistent with the datasheet and some other SoCs, this
commit renames the SDIO pins of the Armada 39x from "sd" to "sd0".

While this changes the DT binding, this is not a problem since Armada
39x is a brand new SoC which isn't used in production yet (so now is
the right time to fix such things).

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-10 11:09:33 +02:00
Thomas Petazzoni
52f83174b3 pinctrl: mvebu: armada-39x: normalize SATA present functionality naming
This commit makes the naming of SATA related MPP functions consistent
accross SoCs by adjusting the Armada 39x definition to use "prsnt"
instead of "present".

Since only the subnames are changed, the DT binding is not modified at
all.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-10 11:08:37 +02:00
Thomas Petazzoni
100dc5d840 pinctrl: mvebu: armada-{38x,39x,xp}: normalize naming of DRAM functions
This commit makes the dram functions naming (both the name and
subname) consistent accross SoC, by using:

  dram(vttctrl)
  dram(deccerr)

in all Marvell SoCs.

Due to the change to the name, it changes the DT binding, but these
functions are not used by any in-tree Device Tree file, and are very
unlikely to be used by anyone.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-10 11:07:36 +02:00
Thomas Petazzoni
9540cf5344 pinctrl: mvebu: armada-{375,38x,39x}: normalize naming of PTP subnames
The subnames are purely informative, but it's nicer when they match
accross SoCs. This commit adjusts the Armada 375, Armada 38x and
Armada 39x MPP definitions so that the subnames of the PTP pins match
the ones used on Armada XP and Kirkwood.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-10 10:58:24 +02:00
Thomas Petazzoni
ea78b9511a pinctrl: mvebu: armada-xp: fix functions of MPP48
There was a mistake in the definition of the functions for MPP48 on
Marvell Armada XP. The second function is dev(clkout), and not tclk.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: <stable@vger.kernel.org> # v3.7+
Fixes: 463e270f76 ("pinctrl: mvebu: add pinctrl driver for Armada XP")
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-10 10:55:59 +02:00
Thomas Petazzoni
80b3d04fea pinctrl: mvebu: armada-xp: remove non-existing VDD cpu_pd functions
The latest version of the Armada XP datasheet no longer documents the
VDD cpu_pd functions, which might indicate they are not working and/or
not supported. This commit ensures the pinctrl driver matches the
datasheet.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: <stable@vger.kernel.org> # v3.7+
Fixes: 463e270f76 ("pinctrl: mvebu: add pinctrl driver for Armada XP")
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-10 10:55:01 +02:00
Thomas Petazzoni
bc99357f36 pinctrl: mvebu: armada-xp: remove non-existing NAND pins
After updating to a more recent version of the Armada XP datasheet, we
realized that some of the pins documented as having a NAND-related
functionality in fact did not have such functionality. This commit
updates the pinctrl driver accordingly.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: <stable@vger.kernel.org> # v3.7+
Fixes: 463e270f76 ("pinctrl: mvebu: add pinctrl driver for Armada XP")
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-10 10:54:30 +02:00
Thomas Petazzoni
e5447d2609 pinctrl: mvebu: armada-375: remove non-existing NAND re/we pins
After updating to a more recent version of the Armada 375, we realized
that some of the pins documented as having a NAND-related
functionality in fact did not have such functionality. This commit
updates the pinctrl driver accordingly.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: <stable@vger.kernel.org> # v3.15+
Fixes: ce3ed59dcd ("pinctrl: mvebu: add pin-muxing driver for the Marvell Armada 375")
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-10 10:53:34 +02:00
Thomas Petazzoni
438881dfdd pinctrl: mvebu: armada-370: fix spi0 pin description
Due to a mistake, the CS0 and CS1 SPI0 functions were incorrectly
named "spi0-1" instead of just "spi0". This commit fixes that.

This DT binding change does not affect any of the in-tree users.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: <stable@vger.kernel.org> # v3.7+
Fixes: 5f597bb2be ("pinctrl: mvebu: add pinctrl driver for Armada 370")
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-10 10:51:45 +02:00
Thomas Petazzoni
331642fbf2 pinctrl: mvebu: armada-38x: fix PCIe functions
A new revision of the Marvell Armada 38x hardware datasheet unveiled
that the definition of some of the PCIe functions were not
correct. This commit fixes the pinctrl driver accordingly.

Some PCIe functions simply do not exist, some of the PCIe functions in
fact were corresponding to other functions, and some PCIe functions
have been added.

Note: the seemingly unrelated removal of spi(cs2) on MPP47 is related:
this function is in fact implemented on MPP43, instead of a PCIe
function.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: <stable@vger.kernel.org> # v3.15+
Fixes: ca6d9a084b ("pinctrl: mvebu: add pin-muxing driver for the Marvell Armada 380/385")
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-10 10:50:36 +02:00
Bjorn Andersson
1bb6fad359 pinctrl: dt-binding: Add DT binding documentation for MSM8660
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-10 10:19:18 +02:00
Vishnu Patekar
7164873e7c pinctrl: sunxi: Add allwinner A33 PIO controller support
A33 PIO has 7 ports which starts from PB and has two interrupt ports.

Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-06-04 10:32:11 +02:00
Wei Chen
f936779329 pinctrl: sirf: add sirf atlas7 pinctrl and gpio support
The Pinctrl module (ioc) controls the Pad's function select
(each pad can have 8 functions), Pad's Drive Strength, Pad's
Pull Select and Pad's Input Disable status.

The ioc has two modules, ioc_top & ioc_rtc. Both of these two
modules have function select/clear, Pull select and Drive
Strength registers. But only ioc_rtc has input-disable
registers. The Pads on ioc_top have to access ioc_rtc to set
their input-disable status and intpu-disable-value.

So have to use one ioc driver instance to drive these two
ioc modules at the same time, and each ioc module will be
treat as one bank on the "IOC Device".

The GPIO Controller controls the GPIO status if the Pad has
been config as GPIO by Pinctrl already. Includes the GPIO
Input/output, Interrupt type, Interrupt Status, and Set/Get
Values.
The GPIO pull up/down are controlled by Pinctrl.

There are 7 GPIO Groups and splited into 3 MACROs in atlas7.
The GPIO Groups in one MACRO share one GPIO controllers, each
GPIO Group are treated as one GPIO bank.

For example:
In VDIFM macro, there is one GPIO Controller, it has 3 banks
to control 3 gpio groups. Its gpio name space is from 0 to 95.

The Device Tree can be written as following:

gpio-ranges = <&pinctrl 0 0 0>,
<&pinctrl 32 0 0>,
<&pinctrl 64 0 0>;

gpio-ranges-group-names = "gnss_gpio_grp",
"lcd_vip_gpio_grp",
"sdio_i2s_gpio_grp";

bank#0 is from 0~31, the pins are from pinctrl's "gnss_gpio_grp".
bank#2 is from 32~63, the pins are from pinctrl's "lcd_vip_gpio_grp".
bank#3 is from 64~95, the pins are from pinctrl's "sdio_i2s_gpio_grp".

Signed-off-by: Wei Chen <Wei.Chen@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-05-19 16:01:30 +02:00
Hongzhou Yang
8a88375c38 pinctrl: mediatek: Modify pinctrl bindings for mt6397.
Since 6397 is no need to support interrupt controller,
moving interrupt controller relate property to optional list.
Also adding mt8173 and mt8127 to bindings.

Signed-off-by: Hongzhou Yang <hongzhou.yang@mediatek.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-05-19 11:10:15 +02:00
Ulrich Hecht
7e15a967a2 pinctrl: sh-pfc: Add renesas,pfc-r8a7793 to binding documentation
Also renames "R-Car M2" to "R-Car M2-W" to avoid confusion.

Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: devicetree@vger.kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-05-12 13:17:43 +02:00
Helmut Buchsbaum
83a21727c3 pinctrl: zynq: configure SPI SSx pins separately
Since SCLK, MISO and MOSI are the only mandatory signals at Zynq's SPI
interfaces, SS0, SS1 and SS2 have to be configured separately as they may
be used as simple GPIO lines.

This, of course, has to be considered in the devicetree, so pin controller
configuration for e.g. an SPI0 using SS0 and SS1 only might look like the
following snippet (derived from the example of chapter "17.5.3
MIO/EMIO" Routing of Zynq-7000 TRM UG585). So MIO20 can now be used
as GPIO instead of being occupied by SPI0 SS2 function. Note the separate
pinmux function for the slave select signals:

pinctrl_spi0_default: spi0-default {
	mux_spi {
		function = "spi0";
		groups = "spi0_0_grp";
	};

	mux_ss {
		function = "spi0_ss";
		groups = "spi0_0_ss0_grp", "spi0_0_ss1_grp";
	}

	conf-output {
		pins = "MIO16", "MIO21";
		slew-rate = <0>;
		bias-disable;
		low-power-disable;
		io-standard = <1>;
	};

	conf-input {
		pins = "MIO17";
		slew-rate = <0>;
		bias-high-impedance;
		low-power-disable;
		io-standard = <1>;
	};

	conf-select {
		pins = "MIO18", "MIO19";
		slew-rate = <0>;
		bias-pull-up;
		low-power-disable;
		io-standard = <1>;
	};
};

pinctrl_gpio0_default {
	mux {
		function = "gpio0";
		groups = "gpio0_20_grp"
	};

	conf {
		pins = "MIO20";
		slew-rate = <0>;
		bias-pull-up;
		low-power-disable;
		io-standard = <1>;
	};
};

Signed-off-by: Helmut Buchsbaum <helmut.buchsbaum@gmail.com>
Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-05-06 15:26:52 +02:00
Linus Walleij
8c4c201634 pinctrl: move strict option to pinmux_ops
While the pinmux_ops are ideally just a vtable for pin mux
calls, the "strict" setting belongs so intuitively with the
pin multiplexing that we should move it here anyway. Putting
it in the top pinctrl_desc makes no sense.

Cc: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-05-06 14:45:19 +02:00
Sonic Zhang
fa76a3db70 pinctrl: allow exlusive GPIO/mux pin allocation
Disallow simultaneous use of the the GPIO and peripheral mux
functions by setting a flag "strict" in struct pinctrl_desc.

The blackfin pinmux and gpio controller doesn't allow user to
set up a pin for both GPIO and peripheral function. So, add flag
strict in struct pinctrl_desc to check both gpio_owner and
mux_owner before approving the pin request.

v2-changes:
- if strict flag is set, check gpio_owner and mux_onwer in if and
  else clause

v3-changes:
- add kerneldoc for this struct
- augment Documentation/pinctrl.txt

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-05-06 14:45:19 +02:00
Andrew Bresticker
abbc48e1c2 pinctrl: Add Pistachio SoC pin control binding document
Add a device-tree binding document for the pin controller present
on the IMG Pistachio SoC.

Signed-off-by: Damien Horsley <Damien.Horsley@imgtec.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-05-06 14:45:18 +02:00
Joachim Eastwood
a9ed9eb634 pinctrl: add DT bindings for lpc1850-scu pinctrl driver
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-05-06 14:45:18 +02:00
Linus Torvalds
180d89f6ef powerpc fixes for 4.1 # 2
- Build fix for SMP=n in book3s_xics.c
 - Fix for Daniel's pci_controller_ops on powernv.
 - Revert the TM syscall abort patch for now.
 - CPU affinity fix from Nathan.
 - Two EEH fixes from Gavin.
 - Fix for CR corruption from Sam.
 - Selftest build fix.
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Merge tag 'powerpc-4.1-3' of git://git.kernel.org/pub/scm/linux/kernel/git/mpe/linux

Pull powerpc fixes from Michael Ellerman:
 - build fix for SMP=n in book3s_xics.c
 - fix for Daniel's pci_controller_ops on powernv.
 - revert the TM syscall abort patch for now.
 - CPU affinity fix from Nathan.
 - two EEH fixes from Gavin.
 - fix for CR corruption from Sam.
 - selftest build fix.

* tag 'powerpc-4.1-3' of git://git.kernel.org/pub/scm/linux/kernel/git/mpe/linux:
  powerpc/powernv: Restore non-volatile CRs after nap
  powerpc/eeh: Delay probing EEH device during hotplug
  powerpc/eeh: Fix race condition in pcibios_set_pcie_reset_state()
  powerpc/pseries: Correct cpu affinity for dlpar added cpus
  selftests/powerpc: Fix the pmu install rule
  Revert "powerpc/tm: Abort syscalls in active transactions"
  powerpc/powernv: Fix early pci_controller_ops loading.
  powerpc/kvm: Fix SMP=n build error in book3s_xics.c
2015-05-03 10:28:36 -07:00
David Howells
9c4249c8e0 modsign: change default key details
Change default key details to be more obviously unspecified.

Reported-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: David Howells <dhowells@redhat.com>
Acked-by: James Morris <james.l.morris@oracle.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2015-04-30 09:35:41 -07:00
Linus Torvalds
dcca8de0aa USB fixes for 4.2-rc1
Here are a number of small USB fixes for 4.2-rc2.  They revert one
 problem patch, fix some minor things, and add some new quirks for
 "broken" devices.
 
 All have been in linux-next successfully.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'usb-4.1-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb

Pull USB fixes from Greg KH:
 "Here are a number of small USB fixes for 4.2-rc2.  They revert one
  problem patch, fix some minor things, and add some new quirks for
  "broken" devices.

  All have been in linux-next successfully"

* tag 'usb-4.1-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb:
  cdc-acm: prevent infinite loop when parsing CDC headers.
  Revert "usb: host: ehci-msm: Use devm_ioremap_resource instead of devm_ioremap"
  usb: chipidea: otg: remove mutex unlock and lock while stop and start role
  uas: Set max_sectors_240 quirk for ASM1053 devices
  uas: Add US_FL_MAX_SECTORS_240 flag
  uas: Allow uas_use_uas_driver to return usb-storage flags
2015-04-30 09:08:53 -07:00
Michael Ellerman
68fc378ce3 Revert "powerpc/tm: Abort syscalls in active transactions"
This reverts commit feba40362b.

Although the principle of this change is good, the implementation has a
few issues.

Firstly we can sometimes fail to abort a syscall because r12 may have
been clobbered by C code if we went down the virtual CPU accounting
path, or if syscall tracing was enabled.

Secondly we have decided that it is safer to abort the syscall even
earlier in the syscall entry path, so that we avoid the syscall tracing
path when we are transactional.

So that we have time to thoroughly test those changes we have decided to
revert this for this merge window and will merge the fixed version in
the next window.

NB. Rather than reverting the selftest we just drop tm-syscall from
TEST_PROGS so that it's not run by default.

Fixes: feba40362b ("powerpc/tm: Abort syscalls in active transactions")
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2015-04-30 15:24:58 +10:00
Hans de Goede
ee136af4a0 uas: Add US_FL_MAX_SECTORS_240 flag
The usb-storage driver sets max_sectors = 240 in its scsi-host template,
for uas we do not want to do that for all devices, but testing has shown
that some devices need it.

This commit adds a US_FL_MAX_SECTORS_240 flag for such devices, and
implements support for it in uas.c, while at it it also adds support
for US_FL_MAX_SECTORS_64 to uas.c.

Cc: stable@vger.kernel.org # 3.16
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-04-28 12:48:57 +02:00
Linus Torvalds
2decb2682f Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Pull networking fixes from David Miller:

 1) mlx4 doesn't check fully for supported valid RSS hash function, fix
    from Amir Vadai

 2) Off by one in ibmveth_change_mtu(), from David Gibson

 3) Prevent altera chip from reporting false error interrupts in some
    circumstances, from Chee Nouk Phoon

 4) Get rid of that stupid endless loop trying to allocate a FIN packet
    in TCP, and in the process kill deadlocks.  From Eric Dumazet

 5) Fix get_rps_cpus() crash due to wrong invalid-cpu value, also from
    Eric Dumazet

 6) Fix two bugs in async rhashtable resizing, from Thomas Graf

 7) Fix topology server listener socket namespace bug in TIPC, from Ying
    Xue

 8) Add some missing HAS_DMA kconfig dependencies, from Geert
    Uytterhoeven

 9) bgmac driver intends to force re-polling but does so by returning
    the wrong value from it's ->poll() handler.  Fix from Rafał Miłecki

10) When the creater of an rhashtable configures a max size for it,
    don't bark in the logs and drop insertions when that is exceeded.
    Fix from Johannes Berg

11) Recover from out of order packets in ppp mppe properly, from Sylvain
    Rochet

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (41 commits)
  bnx2x: really disable TPA if 'disable_tpa' option is set
  net:treewide: Fix typo in drivers/net
  net/mlx4_en: Prevent setting invalid RSS hash function
  mdio-mux-gpio: use new gpiod_get_array and gpiod_put_array functions
  netfilter; Add some missing default cases to switch statements in nft_reject.
  ppp: mppe: discard late packet in stateless mode
  ppp: mppe: sanity error path rework
  net/bonding: Make DRV macros private
  net: rfs: fix crash in get_rps_cpus()
  altera tse: add support for fixed-links.
  pxa168: fix double deallocation of managed resources
  net: fix crash in build_skb()
  net: eth: altera: Resolve false errors from MSGDMA to TSE
  ehea: Fix memory hook reference counting crashes
  net/tg3: Release IRQs on permanent error
  net: mdio-gpio: support access that may sleep
  inet: fix possible panic in reqsk_queue_unlink()
  rhashtable: don't attempt to grow when at max_size
  bgmac: fix requests for extra polling calls from NAPI
  tcp: avoid looping in tcp_send_fin()
  ...
2015-04-27 14:05:19 -07:00
Linus Torvalds
78d4256772 platform-drivers-x86 for 4.1
dell-laptop: Add support for keyboard backlight.
 toshiba_acpi: Adaptive keyboard, hotkey, USB sleep and charge,
               and backlight updates. Update sysfs documentation.
 toshiba_bluetooth: Fix enabling/disabling loop on recent devices
 apple-gmux: lock iGP IO to protect from vgaarb changes
 other: Fix typos, clear gcc warnings, clarify pr_* messages,
        correct return types, update MAINTAINERS.
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Merge tag 'platform-drivers-x86-v4.1-1' of git://git.infradead.org/users/dvhart/linux-platform-drivers-x86

Pull x86 platform driver updates from Darren Hart:
 "This series includes significant updates to the toshiba_acpi driver
  and the reintroduction of the dell-laptop keyboard backlight additions
  I had to revert previously.  Also included are various fixes for
  typos, warnings, correctness, and minor bugs.

  Specifics:

  dell-laptop:
     - add support for keyboard backlight.

  toshiba_acpi:
     - adaptive keyboard, hotkey, USB sleep and charge, and backlight
       updates.  Update sysfs documentation.

  toshiba_bluetooth:
     - fix enabling/disabling loop on recent devices

  apple-gmux:
     - lock iGP IO to protect from vgaarb changes

  other:
     - Fix typos, clear gcc warnings, clarify pr_* messages, correct
       return types, update MAINTAINERS"

* tag 'platform-drivers-x86-v4.1-1' of git://git.infradead.org/users/dvhart/linux-platform-drivers-x86: (25 commits)
  toshiba_acpi: Do not register vendor backlight when acpi_video bl is available
  MAINTAINERS: Add me on list of Dell laptop drivers
  platform: x86: dell-laptop: Add support for keyboard backlight
  Documentation/ABI: Update sysfs-driver-toshiba_acpi entry
  toshiba_acpi: Fix pr_* messages from USB Sleep Functions
  toshiba_acpi: Update and fix USB Sleep and Charge modes
  wmi: Use bool function return values of true/false not 1/0
  toshiba_bluetooth: Fix enabling/disabling loop on recent devices
  toshiba_bluetooth: Clean up *_add function and disable BT device at removal
  toshiba_bluetooth: Add three new functions to the driver
  toshiba_acpi: Fix the enabling of the Special Functions
  toshiba_acpi: Use the Hotkey Event Type function for keymap choosing
  toshiba_acpi: Add Hotkey Event Type function and definitions
  x86/wmi: delete unused wmi_data_lock mutex causing gcc warning
  apple-gmux: lock iGP IO to protect from vgaarb changes
  MAINTAINERS: Add missing Toshiba devices and add myself as maintainer
  toshiba_acpi: Update events in toshiba_acpi_notify
  intel-oaktrail: Fix trivial typo in comment
  thinkpad_acpi: off by one in adaptive_keyboard_hotkey_notify_hotkey()
  thinkpad_acpi: signedness bugs getting current_mode
  ...
2015-04-26 13:44:46 -07:00
Linus Torvalds
36a8032d77 platform/chrome: Updates for v4.1
Here's a set of updates to the Chrome OS platform drivers for this merge window.
 
 Main new things this cycle is:
 
 - Driver changes to expose the lightbar to users. With this, you can make your
   own blinkenlights on Chromebook Pixels.
 - Changes in the way that the atmel_mxt trackpads are probed. The laptop driver
   is trying to be smart and not instantiate the devices that don't answer to
   probe. For the trackpad that can come up in two modes (bootloader or regular),
   this gets complicated since the driver already knows how to handle the two
   modes including the actual addresses used. So now the laptop driver needs to
   know more too, instantiating the regular address even if the bootloader one
   is the probe that passed.
 - mfd driver improvements by Javier Martines Canillas, and a few bugfixes
   from him, kbuild and myself.
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Merge tag 'chrome-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/olof/chrome-platform

Pull chrome platform updates from Olof Johansson:
 "Here's a set of updates to the Chrome OS platform drivers for this
  merge window.

  Main new things this cycle is:

   - Driver changes to expose the lightbar to users.  With this, you can
     make your own blinkenlights on Chromebook Pixels.

   - Changes in the way that the atmel_mxt trackpads are probed.  The
     laptop driver is trying to be smart and not instantiate the devices
     that don't answer to probe.  For the trackpad that can come up in
     two modes (bootloader or regular), this gets complicated since the
     driver already knows how to handle the two modes including the
     actual addresses used.  So now the laptop driver needs to know more
     too, instantiating the regular address even if the bootloader one
     is the probe that passed.

   - mfd driver improvements by Javier Martines Canillas, and a few
     bugfixes from him, kbuild and myself"

* tag 'chrome-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/olof/chrome-platform:
  platform/chrome: chromeos_laptop - instantiate Atmel at primary address
  platform/chrome: cros_ec_lpc - Depend on X86 || COMPILE_TEST
  platform/chrome: cros_ec_lpc - Include linux/io.h header file
  platform/chrome: fix platform_no_drv_owner.cocci warnings
  platform/chrome: cros_ec_lightbar - fix duplicate const warning
  platform/chrome: cros_ec_dev - fix Unknown escape '%' warning
  platform/chrome: Expose Chrome OS Lightbar to users
  platform/chrome: Create sysfs attributes for the ChromeOS EC
  mfd: cros_ec: Instantiate ChromeOS EC character device
  platform/chrome: Add Chrome OS EC userspace device interface
  platform/chrome: Add cros_ec_lpc driver for x86 devices
  mfd: cros_ec: Add char dev and virtual dev pointers
  mfd: cros_ec: Use fixed size arrays to transfer data with the EC
2015-04-26 13:36:02 -07:00
Linus Torvalds
7f9f44308c CRIS changes for 4.1
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Merge tag 'cris-for-4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/jesper/cris

Pull arch/cris updates from Jesper Nilsson:
 "Some much needed love for the CRIS-port.

  There's a bunch of changes this time, giving the CRISv32 port a bit of
  modern makeover with device-tree, irq domain and gpiolib support, and
  more switchover to generic frameworks.

  Some small fixes and removal of the theoretical SMP support brings up
  the rear"

* tag 'cris-for-4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/jesper/cris:
  cris: fix integer overflow in ELF_ET_DYN_BASE
  CRISv32: use GENERIC_SCHED_CLOCK
  CRISv32: use MMIO clocksource
  CRISv32: use generic clockevents
  CRIS: use generic headers via Kbuild
  CRIS: use generic cmpxchg.h
  CRIS: use generic atomic.h
  CRIS: use generic atomic bitops
  CRISv10: remove redundant macros from system.h
  CRIS: remove SMP code
  CRISv32: don't enable irqs in INIT_THREAD
  CRISv32: handle multiple signals
  CRISv32: prevent bogus restarts on sigreturn
  CRISv32: don't attempt syscall restart on irq exit
  Add binding documentation for CRIS
  CRIS: add Axis 88 board device tree
  CRISv32: add device tree support
  CRISv32: add irq domains support
  CRIS: enable GPIOLIB
2015-04-26 13:31:05 -07:00
Eric Dumazet
a31196b07f net: rfs: fix crash in get_rps_cpus()
Commit 567e4b7973 ("net: rfs: add hash collision detection") had one
mistake :

RPS_NO_CPU is no longer the marker for invalid cpu in set_rps_cpu()
and get_rps_cpu(), as @next_cpu was the result of an AND with
rps_cpu_mask

This bug showed up on a host with 72 cpus :
next_cpu was 0x7f, and the code was trying to access percpu data of an
non existent cpu.

In a follow up patch, we might get rid of compares against nr_cpu_ids,
if we init the tables with 0. This is silly to test for a very unlikely
condition that exists only shortly after table initialization, as
we got rid of rps_reset_sock_flow() and similar functions that were
writing this RPS_NO_CPU magic value at flow dismantle : When table is
old enough, it never contains this value anymore.

Fixes: 567e4b7973 ("net: rfs: add hash collision detection")
Signed-off-by: Eric Dumazet <edumazet@google.com>
Cc: Tom Herbert <tom@herbertland.com>
Cc: Ben Hutchings <ben@decadent.org.uk>
Signed-off-by: David S. Miller <davem@davemloft.net>
2015-04-26 16:07:57 -04:00
Linus Torvalds
eadf16a912 This mostly includes the PPC changes for 4.1, which this time cover
Book3S HV only (debugging aids, minor performance improvements and some
 cleanups).  But there are also bug fixes and small cleanups for ARM,
 x86 and s390.
 
 The task_migration_notifier revert and real fix is still pending review,
 but I'll send it as soon as possible after -rc1.
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Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm

Pull second batch of KVM changes from Paolo Bonzini:
 "This mostly includes the PPC changes for 4.1, which this time cover
  Book3S HV only (debugging aids, minor performance improvements and
  some cleanups).  But there are also bug fixes and small cleanups for
  ARM, x86 and s390.

  The task_migration_notifier revert and real fix is still pending
  review, but I'll send it as soon as possible after -rc1"

* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (29 commits)
  KVM: arm/arm64: check IRQ number on userland injection
  KVM: arm: irqfd: fix value returned by kvm_irq_map_gsi
  KVM: VMX: Preserve host CR4.MCE value while in guest mode.
  KVM: PPC: Book3S HV: Use msgsnd for signalling threads on POWER8
  KVM: PPC: Book3S HV: Translate kvmhv_commence_exit to C
  KVM: PPC: Book3S HV: Streamline guest entry and exit
  KVM: PPC: Book3S HV: Use bitmap of active threads rather than count
  KVM: PPC: Book3S HV: Use decrementer to wake napping threads
  KVM: PPC: Book3S HV: Don't wake thread with no vcpu on guest IPI
  KVM: PPC: Book3S HV: Get rid of vcore nap_count and n_woken
  KVM: PPC: Book3S HV: Move vcore preemption point up into kvmppc_run_vcpu
  KVM: PPC: Book3S HV: Minor cleanups
  KVM: PPC: Book3S HV: Simplify handling of VCPUs that need a VPA update
  KVM: PPC: Book3S HV: Accumulate timing information for real-mode code
  KVM: PPC: Book3S HV: Create debugfs file for each guest's HPT
  KVM: PPC: Book3S HV: Add ICP real mode counters
  KVM: PPC: Book3S HV: Move virtual mode ICP functions to real-mode
  KVM: PPC: Book3S HV: Convert ICS mutex lock to spin lock
  KVM: PPC: Book3S HV: Add guest->host real mode completion counters
  KVM: PPC: Book3S HV: Add helpers for lock/unlock hpte
  ...
2015-04-26 13:06:22 -07:00
Linus Torvalds
c6668726d2 Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/nab/target-pending
Pull SCSI target updates from Nicholas Bellinger:
 "Lots of activity in target land the last months.

  The highlights include:

   - Convert fabric drivers tree-wide to target_register_template() (hch
     + bart)

   - iser-target hardening fixes + v1.0 improvements (sagi)

   - Convert iscsi_thread_set usage to kthread.h + kill
     iscsi_target_tq.c (sagi + nab)

   - Add support for T10-PI WRITE_STRIP + READ_INSERT operation (mkp +
     sagi + nab)

   - DIF fixes for CONFIG_DEBUG_SG=y + UNMAP file emulation (akinobu +
     sagi + mkp)

   - Extended TCMU ABI v2 for future BIDI + DIF support (andy + ilias)

   - Fix COMPARE_AND_WRITE handling for NO_ALLLOC drivers (hch + nab)

  Thanks to everyone who contributed this round with new features,
  bug-reports, fixes, cleanups and improvements.

  Looking forward, it's currently shaping up to be a busy v4.2 as well"

* 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/nab/target-pending: (69 commits)
  target: Put TCMU under a new config option
  target: Version 2 of TCMU ABI
  target: fix tcm_mod_builder.py
  target/file: Fix UNMAP with DIF protection support
  target/file: Fix SG table for prot_buf initialization
  target/file: Fix BUG() when CONFIG_DEBUG_SG=y and DIF protection enabled
  target: Make core_tmr_abort_task() skip TMFs
  target/sbc: Update sbc_dif_generate pr_debug output
  target/sbc: Make internal DIF emulation honor ->prot_checks
  target/sbc: Return INVALID_CDB_FIELD if DIF + sess_prot_type disabled
  target: Ensure sess_prot_type is saved across session restart
  target/rd: Don't pass incomplete scatterlist entries to sbc_dif_verify_*
  target: Remove the unused flag SCF_ACK_KREF
  target: Fix two sparse warnings
  target: Fix COMPARE_AND_WRITE with SG_TO_MEM_NOALLOC handling
  target: simplify the target template registration API
  target: simplify target_xcopy_init_pt_lun
  target: remove the unused SCF_CMD_XCOPY_PASSTHROUGH flag
  target/rd: reduce code duplication in rd_execute_rw()
  tcm_loop: fixup tpgt string to integer conversion
  ...
2015-04-24 10:22:09 -07:00