Commit Graph

5 Commits

Author SHA1 Message Date
Jean-Christophe PLAGNIOL-VILLARD
5f29d0a0ee ARM: at91: uncompress: autodetect the uart to use
This will now autodetect the first uart enabled by the bootloader
and will use it for uncompress. This will still assume that the bootloader
configured it (pins and clock).

This also allows to include all soc headers together.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-04-17 11:00:19 +02:00
Jean-Christophe PLAGNIOL-VILLARD
a7776ec625 ARM: at91: add ram controller DT support
We can now drop the call to ioremap_registers() as we have the binding for the
SDRAM/DDR Controller.

Drop ioremap_registers() for sam9x5 too.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-03-15 23:37:56 +08:00
Jean-Christophe PLAGNIOL-VILLARD
b55149529d ARM: at91/PMC: make register base soc independent
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Reviewed-by: Ryan Mallon <rmallon@gmail.com>
2012-02-23 14:57:57 +01:00
Jean-Christophe PLAGNIOL-VILLARD
f363c407b4 ARM: at91: make sdram/ddr register base soc independent
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-02-23 14:57:56 +01:00
Dan Liang
8c83a607a5 ARM: at91/at91sam9x5: overall definition
Add the definitions of peripheral and system registers for sam9x5 chips family.

Signed-off-by: Dan Liang <dan.liang@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-02-03 15:36:38 +01:00