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3 Commits

Author SHA1 Message Date
Gary R Hook
e28c190db6 csrypto: ccp - Expand RSA support for a v5 ccp 
A version 5 CCP can handle an RSA modulus up to 16k bits.

Signed-off-by: Gary R Hook <gary.hook@amd.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
 2017-07-28 17:58:06 +08:00
Brijesh Singh
f4d18d656f crypto: ccp - Abstract interrupt registeration 
The CCP and PSP devices part of AMD Secure Procesor may share the same
interrupt. Hence we expand the SP device to register a common interrupt
handler and provide functions to CCP and PSP devices to register their
interrupt callback which will be invoked upon interrupt.

Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Acked-by: Gary R Hook <gary.hook@amd.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
 2017-07-18 17:57:14 +08:00
Brijesh Singh
720419f018 crypto: ccp - Introduce the AMD Secure Processor device 
The CCP device is part of the AMD Secure Processor. In order to expand
the usage of the AMD Secure Processor, create a framework that allows
functional components of the AMD Secure Processor to be initialized and
handled appropriately.

Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Acked-by: Gary R Hook <gary.hook@amd.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
 2017-07-18 17:51:19 +08:00