Commit Graph

230 Commits

Author SHA1 Message Date
Atsushi Nemoto
c4eee283e0 [MIPS] Move inclusing of kernel/time/Kconfig menu to appropriate place
CONFIG_NO_HZ, CONFIG_HIGH_RES_TIMERS should be selected in "Kernel
type" menu, not in "CPU selection" menu.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-07 15:32:03 +00:00
Ralf Baechle
00a5825332 Fix oprofile configuration breakage
The cleanup 09cadedbdc broke the oprofile
configuration for MIPS by allowing oprofile support to be built for
kernel models where oprofile doesn't have a chance in hell to work.

Just a dependecy list on a number of architectures is - surprise - broken
and should as per past discussions probably in most considered to be
broken in most cases.  So I introduce a dependency for the oprofile
configuration on ARCH_SUPPORTS_OPROFILE.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-12-06 09:37:03 -08:00
Thomas Bogendoerfer
68de480372 [MIPS] IP22: Fix broken EISA interrupt setup by switching to generic i8259
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-26 17:26:14 +00:00
Ralf Baechle
cce335ae47 [MIPS] 64-bit Sibyte kernels need DMA32.
Sibyte SOCs only have 32-bit PCI.  Due to the sparse use of the address
space only the first 1GB of memory is mapped at physical addresses
below 1GB.  If a system has more than 1GB of memory 32-bit DMA will
not be able to reach all of it.

For now this patch is good enough to keep Sibyte users happy but it seems
eventually something like swiotlb will be needed for Sibyte.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-26 17:26:14 +00:00
Ralf Baechle
940f6b48a1 [MIPS] Only build r4k clocksource for systems that work ok with it.
In particular as-is it's not suited for multicore and mutiprocessors
systems where there is on guarantee that the counter are synchronized
or running from the same clock at all.  This broke Sibyte and probably
others since the "[MIPS] Handle R4000/R4400 mfc0 from count register."
commit.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-26 17:26:14 +00:00
Ralf Baechle
f6771dbb27 [MIPS] Fix shadow register support.
Shadow register support would not possibly have worked on multicore
systems.  The support code for it was also depending not on MIPS R2 but
VSMP or SMTC kernels even though it makes perfect sense with UP kernels.

SR sets are a scarce resource and the expected usage pattern is that
users actually hardcode the register set numbers in their code.  So fix
the allocator by ditching it.  Move the remaining CPU probe bits into
the generic CPU probe.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-15 23:21:49 +00:00
Ralf Baechle
a57c228935 [MIPS] Qemu: Add early printk, your friend in a cold night.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-15 23:21:48 +00:00
Ralf Baechle
651194f820 [MIPS] Bigsur supports highmem.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-02 16:13:49 +00:00
Ralf Baechle
217dd11e9d [MIPS] Sibyte: Split and move clock code.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-02 16:13:47 +00:00
Atsushi Nemoto
229f773ef4 [MIPS] txx9tmr clockevent/clocksource driver
Convert jmr3927_clock_event_device to more generic
txx9tmr_clock_event_device which supports one-shot mode.  The
txx9tmr_clock_event_device can be used for TX49 too if the cp0 timer
interrupt was not available.

Convert jmr3927_hpt_read to txx9_clocksource driver which does not
depends jiffies anymore.  The txx9_clocksource itself can be used for
TX49, but normally TX49 uses higher precision clocksource_mips.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29 19:35:35 +00:00
Yoichi Yuasa
1097c6ac33 [MIPS] time: Add GT641xx timer0 clockevent driver
And make use of it for Cobalt.  A few others such as the Malta could make
use of it as well.

Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-22 22:09:00 +01:00
Matt LaPlante
01dd2fbf0d typo fixes
Most of these fixes were already submitted for old kernel versions, and were
approved, but for some reason they never made it into the releases.

Because this is a consolidation of a couple old missed patches, it touches both
Kconfigs and documentation texts.

Signed-off-by: Matt LaPlante <kernel1@cyberdogtech.com>
Acked-by: Randy Dunlap <randy.dunlap@oracle.com>
Signed-off-by: Adrian Bunk <bunk@kernel.org>
2007-10-20 01:34:40 +02:00
Mathieu Desnoyers
09cadedbdc Combine instrumentation menus in kernel/Kconfig.instrumentation
Quoting Randy:

"It seems sad that this patch sources Kconfig.marker, a 7-line file,
20-something times.  Yes, you (we) don't want to put those 7 lines into
20-something different files, so sourcing is the right thing.

However, what you did for avr32 seems more on the right track to me: make
_one_ Instrumentation support menu that includes PROFILING, OPROFILE, KPROBES,
and MARKERS and then use (source) that in all of the arches."

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca>
Acked-by: Randy Dunlap <randy.dunlap@oracle.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-10-19 11:53:54 -07:00
Ralf Baechle
42f77542f4 [MIPS] time: Move R4000 clockevent device code to separate configurable file
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-18 18:11:47 +01:00
Ralf Baechle
a5ccfe5c1a [MIPS] Lasat: Fix build by conversion to irq_cpu.c.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-16 18:23:47 +01:00
Ralf Baechle
dd67b1556e [MIPS] IP32: Fix build by conversion to irq_cpu.c.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-16 18:23:45 +01:00
Ralf Baechle
d865bea4da [MIPS] i8253 PIT clocksource and clockevent drivers
Derived from the i386 variant with a few x86 complexities chopped off.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11 23:46:10 +01:00
Ralf Baechle
ea5804015c [MIPS] Dyntick support for SMTC:
The kernel currently only supports broadcasting of the timer interrupt
from a single timer, not multicasting into two multicast groups of
processors.  So the implemented mechanism for SMTC works by broadcasting
the cp0 compare interrupt on VPE 0 and ignoring it on any additional VPEs.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11 23:46:09 +01:00
Ralf Baechle
7bcf7717b6 [MIPS] Implement clockevents for R4000-style cp0 count/compare interrupt
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11 23:46:09 +01:00
Ralf Baechle
90b02340dc [MIPS] Switch from to_tm to rtc_time_to_tm
This replaces the MIPS-specific to_tm function with the generic
rtc_time_to_tm function.  The big difference between the two functions is
that rtc_time_to_tm uses epoch 70 while to_tm uses 1970, so the result of
rtc_time_to_tm needs to be fixed up.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11 23:46:09 +01:00
Ralf Baechle
f5ff0a2802 [MIPS] Use generic NTP code for all MIPS platforms
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11 23:46:08 +01:00
Aurelien Jarno
25e5fb9741 [MIPS] Add CFE support to BCM47XX
Add CFE support to the BCM47XX code.  That includes querying CFE environment
variables as well as using CFE to print messages before the serial port is
initialized (early printk).
    
Signed-off-by: Aurelien Jarno <aurel32@farad.aurel32.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11 23:46:06 +01:00
Aurelien Jarno
df78b5c8fa [MIPS] Move CFE code into arch/mips/fw/cfe
Move the platform independent part of the CFE code to arch/mips/fw/cfe from
arch/mips/sibyte/cfe.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11 23:46:05 +01:00
Yoichi Yuasa
d5ab1a6910 [MIPS] Add GT641xx IRQ routines.
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11 23:46:04 +01:00
Ralf Baechle
abb4ae4630 [MIPS] PCI: Always enable CONFIG_PCI_DOMAINS
The cost is just too low.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11 23:46:03 +01:00
Aurelien Jarno
1c0c13eb93 [MIPS] Add support for BCM47XX CPUs.
Note that the BCM4710 does not support the wait instruction, this
is not a mistake in the code.
    
It originally comes from the OpenWrt patches.
    
Cc: Michael Buesch <mb@bu3sch.de>
Cc: Felix Fietkau <nbd@openwrt.org>
Cc: Florian Schirmer <jolt@tuxbox.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11 23:46:02 +01:00
Thomas Bogendoerfer
ea202c632a [MIPS] JAZZ fixes
- restructured irq handling
- switched vdma to use memory allocated via get_free_pages
- setup platform devices for serial, jazz_esp and jazzsonic
- fixed cmos rtc access

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11 23:46:00 +01:00
Brian Murphy
1f21d2bde0 [MIPS] Add back support for LASAT platforms
Signed-off-by: Brian Murphy <brian@murphy.dk>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11 23:46:00 +01:00
Franck Bui-Huu
adff90a933 [MIPS] Automatically set CONFIG_BUILD_ELF64
We do not rely on user anymore to setup this config correctly.
Instead we make our choice depending on the load address.

If we want to force Kbuild to use ELF64 format whatever
the load address we can still do:

        $ make BUILD_ELF32=no

Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11 23:45:59 +01:00
Kevin D. Kissell
f571eff0a2 [MIPS] IRQ Affinity Support for SMTC on Malta Platform
Signed-off-by: Kevin D. Kissell <kevink@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11 23:45:57 +01:00
Yoichi Yuasa
4386307465 [MIPS] Ocelot: remove remaining bits
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-09-10 21:25:28 +01:00
Ralf Baechle
9308816c9f [MIPS] Kconfig: whitespace cleanup.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-09-10 21:25:28 +01:00
Ralf Baechle
23dd6d351a [MIPS] Fulong doesn't need ISA DMA.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-08-27 02:17:00 +01:00
Ralf Baechle
8313da304c [MIPS] Sort out handling of ISA-less PCI systems.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-08-27 02:17:00 +01:00
Ralf Baechle
3f478a8739 [MIPS] Excite: disable 64-bit kernel support.
CC      arch/mips/basler/excite/excite_prom.o
arch/mips/basler/excite/excite_prom.c:136:3: #error 64 bit support not implemented

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-08-27 02:16:55 +01:00
Ralf Baechle
dbb74540ae [MIPS] Kconfig: Fix configuration warning by hardwiring HOTPLUG_CPU to n.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-08-27 02:16:55 +01:00
Ralf Baechle
d98cc84dd1 [MIPS] SEAD: Don't mark as experimental.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-08-27 02:16:54 +01:00
Atsushi Nemoto
ad99876ad4 [MIPS] Drop unneeded config options for RBTX4938
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-08-27 02:16:53 +01:00
Atsushi Nemoto
c87abd75b3 [MIPS] Cleanup TX39/TX49 irq code
Cleanup jmr3927, tx4927 and tx4938 irq codes, using common IRQ_CPU,
I8259 and IRQ_TXX9 irq routines.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-08-27 02:16:53 +01:00
Atsushi Nemoto
8420fd00e8 [MIPS] The irq_chip for TX39/TX49 SoCs
Add generic irq_chip for TX39/TX49 SoCs.  This can be replace
jmr3927_irq_irc, tx4927_irq_pic_type and tx4938_irq_pic_type.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-08-27 02:16:52 +01:00
Yoichi Yuasa
f201b46328 [MIPS] Remove unused pnx8550 Kconfig
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-08-27 02:16:49 +01:00
Ralf Baechle
d806cb2b60 [MIPS] Kconfig: Enable 64BIT_PHYS_ADDR only through select.
The user should not have to have any clue about this setting.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-08-27 02:16:49 +01:00
Yoichi Yuasa
ff32b062ea [MIPS] DDB5477: Remove support
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-31 21:35:34 +01:00
Ralf Baechle
0b0ef2ea00 [MIPS] Remove Momentum Ocelot support.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-31 21:35:29 +01:00
Ralf Baechle
07cc0c9e65 [MIPS] MT: Enable coexistence of AP/SP with VSMP and SMTC.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-31 21:35:24 +01:00
Yoichi Yuasa
ade299d899 [MIPS] Sort system types alphabetically
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-31 21:35:23 +01:00
Yoichi Yuasa
08a91283e5 [MIPS] Fix RBTX49x7 board name
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-31 21:35:22 +01:00
Ralf Baechle
293c5bd13f [MIPS] Fixup secure computing stuff.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-31 21:35:21 +01:00
Ralf Baechle
17099b1142 [MIPS] Make support for weakly ordered LL/SC a config option.
None of weakly ordered processor supported in tree need this but it seems
like this could change ...

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-20 18:57:39 +01:00
Ralf Baechle
de61b542b8 [MIPS] Rename PC speaker code
While the PC speaker is wired up to the i8254 there is more to the i8254
than just the PC speaker so this code was getting in the way under its
current name.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-12 17:41:23 +01:00