Do success callback in channel when shutdown. For those task not finish,
callback with error code thus client has chance to cleanup or reset.
Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Reviewed-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Add gce v4 hardware support with different thread number and shift.
Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Some gce hardware shift pc and end address in register to support
large dram addressing.
Implement gce address shift when write or read pc and end register.
And add shift bit in platform definition.
Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Add documentation for the mt6779 gce.
Add gce header file defined the gce hardware event,
subsys number and constant for mt6779.
Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Reviewed-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
MSM8994 has an APCS block similar to 8916, but
with a different clock driver due to the former
one having 2 clusters.
Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
The Qualcomm SDM660 platform has a APCS HMSS GLOBAL block, add the
compatible for this.
Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
When CONFIG_PM and CONFIG_PM_SLEEP are unset, the following warnings
occur:
drivers/mailbox/imx-mailbox.c:638:12: warning: 'imx_mu_runtime_resume'
defined but not used [-Wunused-function]
638 | static int imx_mu_runtime_resume(struct device *dev)
| ^~~~~~~~~~~~~~~~~~~~~
drivers/mailbox/imx-mailbox.c:629:12: warning: 'imx_mu_runtime_suspend'
defined but not used [-Wunused-function]
629 | static int imx_mu_runtime_suspend(struct device *dev)
| ^~~~~~~~~~~~~~~~~~~~~~
drivers/mailbox/imx-mailbox.c:611:12: warning: 'imx_mu_resume_noirq'
defined but not used [-Wunused-function]
611 | static int imx_mu_resume_noirq(struct device *dev)
| ^~~~~~~~~~~~~~~~~~~
drivers/mailbox/imx-mailbox.c:601:12: warning: 'imx_mu_suspend_noirq'
defined but not used [-Wunused-function]
601 | static int imx_mu_suspend_noirq(struct device *dev)
| ^~~~~~~~~~~~~~~~~~~~
Mark these functions as __maybe_unused, which is the standard procedure
for PM functions.
Fixes: bb2b2624db ("mailbox: imx: Add runtime PM callback to handle MU clocks")
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
The acpi_get_table() should be coupled with acpi_put_table() if
the mapped table is not used at runtime to release the table
mapping.
In acpi_pcc_probe(), the PCCT table entries will be used as private
data for communication chan at runtime, but the table should be put
for error path.
Signed-off-by: Hanjun Guo <guohanjun@huawei.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
If both the HTTP and HTTPS versions
return 200 OK and serve the same content:
Replace HTTP with HTTPS.
Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
On big-endian architectures like OpenRISC, sparse outputs below warnings on
asm-generic/io.h. This is due to io statements like:
__raw_writel(cpu_to_le32(value), PCI_IOBASE + addr);
The __raw_writel() function expects native endianness, however
cpu_to_le32() returns __le32. On little-endian machines these match up
and there is no issue. However, on big-endian we get warnings, for IO
that is defined as little-endian the mismatch is expected.
The fix I propose is to __force to native endian.
Warnings:
./include/asm-generic/io.h:166:15: warning: cast to restricted __le16
./include/asm-generic/io.h:166:15: warning: cast to restricted __le16
./include/asm-generic/io.h:166:15: warning: cast to restricted __le16
./include/asm-generic/io.h:166:15: warning: cast to restricted __le16
./include/asm-generic/io.h:179:15: warning: cast to restricted __le32
./include/asm-generic/io.h:179:15: warning: cast to restricted __le32
./include/asm-generic/io.h:179:15: warning: cast to restricted __le32
./include/asm-generic/io.h:179:15: warning: cast to restricted __le32
./include/asm-generic/io.h:179:15: warning: cast to restricted __le32
./include/asm-generic/io.h:179:15: warning: cast to restricted __le32
./include/asm-generic/io.h:215:22: warning: incorrect type in argument 1 (different base types)
./include/asm-generic/io.h:215:22: expected unsigned short [usertype] value
./include/asm-generic/io.h:215:22: got restricted __le16 [usertype]
./include/asm-generic/io.h:225:22: warning: incorrect type in argument 1 (different base types)
./include/asm-generic/io.h:225:22: expected unsigned int [usertype] value
./include/asm-generic/io.h:225:22: got restricted __le32 [usertype]
Signed-off-by: Stafford Horne <shorne@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
- Eliminate significant AML processing overhead related to using
operation regions in system memory by reworking the management
of memory mappings in the ACPI code to defer unmap operations
(to do them outside of the ACPICA locks, among other things) and
making the memory operation reagion handler avoid releasing memory
mappings created by it too early (Rafael Wysocki).
- Update the ACPICA code in the kernel to upstream revision
20200717:
* Prevent operation region reference counts from overflowing in
some cases (Erik Kaneda).
* Replace one-element array with flexible-array (Gustavo A. R.
Silva).
- Fix ACPI PCI hotplug reference counting (Rafael Wysocki).
- Drop last bits of the ACPI procfs interface (Thomas Renninger).
- Drop some redundant checks from the code parsing ACPI tables
related to NUMA (Hanjun Guo).
- Avoid redundant object evaluation in the ACPI device properties
handling code (Heikki Krogerus).
- Avoid unecessary memory overhead related to storing the signatures
of the ACPI tables recognized by the kernel (Ard Biesheuvel).
- Add missing newline characters when printing module parameter
values in some places (Xiongfeng Wang).
- Update the link to the ACPI specifications in some places (Tiezhu
Yang).
- Use the fallthrough pseudo-keyword in the ACPI code (Gustavo A. R.
Silva).
- Drop redundant variable initialization from the APEI code (Colin
Ian King).
- Drop uninitialized_var() from the ACPI PAD driver (Jason Yan).
- Replace HTTP links with HTTPS ones in the ACPI code (Alexander A.
Klimov).
-----BEGIN PGP SIGNATURE-----
iQJGBAABCAAwFiEE4fcc61cGeeHD/fCwgsRv/nhiVHEFAl8oO8gSHHJqd0Byand5
c29ja2kubmV0AAoJEILEb/54YlRx2nUP/iSRAW0DK4PYDNLDV1Q+y5RrQw44iMDf
yfLQu3agardM1KGtPuYw5zmU0UoEYtW8s2r027bxw9Hvn0IzBh5TiDvcVjMEnbVC
+6m/fWg3EStfZ9w2dxDzXDMIk/oiEZsjtWSRaDTfAIH2jc/xVcSXDojlMgBPQDu5
hIITjMbGGx783o4PNCYbIZy1ReJgd8MNQ+Xp3MCpTgbFgHMHKBOJ6B/nS8aTfilO
eE5JvzhXED7qITaXYWxI9OZpRTPTNQ3eaEPbWvnw4KJ5boMfyREMGdTBipXO+kSA
SwKhFysYEUAZM7Ffq0eTnWSCU7VWogAsTauIgs4+d9z8VrGhWi5+b6N/E/uwTKtj
HF98xtk+Loe8V24LwN0snvv51O7P5nAH47QxwIBvQssfR8ZSgdwHtUQcckybAJhx
LLmPtJrM8ZAefc9H4o0eVqumjoh1amGKC9dTY0g1j0UIE0y3ZIFHTvDNvhpTzgBk
5uUHHEiolGNWHVrs1LIMOEejqx62m+EjVc9b8XUdJqHoboTccMM73DRk/00meP/7
br/VfMI0aTjPLssvSC/ZSlTZt+ddrBm+cXw9eqruDQwdQaqxpJu+D3odjdaYSjpg
luiYQrQdoDmIDh4UNuJbvG/Hub3CLzvJSqGWLExNbX7nWXxH4HIx/8PcNtVkKZRV
qBXotIc+i4VD
=Nn2Q
-----END PGP SIGNATURE-----
Merge tag 'acpi-5.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm
Pull ACPI updates from Rafael Wysocki:
"These eliminate significant AML processing overhead related to using
operation regions in system memory, update the ACPICA code in the
kernel to upstream revision 20200717 (including a fix to prevent
operation region reference counts from overflowing in some cases),
remove the last bits of the (long deprecated) ACPI procfs interface
and do some assorted cleanups.
Specifics:
- Eliminate significant AML processing overhead related to using
operation regions in system memory by reworking the management of
memory mappings in the ACPI code to defer unmap operations (to do
them outside of the ACPICA locks, among other things) and making
the memory operation reagion handler avoid releasing memory
mappings created by it too early (Rafael Wysocki).
- Update the ACPICA code in the kernel to upstream revision 20200717:
* Prevent operation region reference counts from overflowing in
some cases (Erik Kaneda).
* Replace one-element array with flexible-array (Gustavo A. R.
Silva).
- Fix ACPI PCI hotplug reference counting (Rafael Wysocki).
- Drop last bits of the ACPI procfs interface (Thomas Renninger).
- Drop some redundant checks from the code parsing ACPI tables
related to NUMA (Hanjun Guo).
- Avoid redundant object evaluation in the ACPI device properties
handling code (Heikki Krogerus).
- Avoid unecessary memory overhead related to storing the signatures
of the ACPI tables recognized by the kernel (Ard Biesheuvel).
- Add missing newline characters when printing module parameter
values in some places (Xiongfeng Wang).
- Update the link to the ACPI specifications in some places (Tiezhu
Yang).
- Use the fallthrough pseudo-keyword in the ACPI code (Gustavo A. R.
Silva).
- Drop redundant variable initialization from the APEI code (Colin
Ian King).
- Drop uninitialized_var() from the ACPI PAD driver (Jason Yan).
- Replace HTTP links with HTTPS ones in the ACPI code (Alexander A.
Klimov)"
* tag 'acpi-5.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (22 commits)
ACPI: APEI: remove redundant assignment to variable rc
ACPI: NUMA: Remove the useless 'node >= MAX_NUMNODES' check
ACPI: NUMA: Remove the useless sub table pointer check
ACPI: tables: Remove the duplicated checks for acpi_parse_entries_array()
ACPICA: Update version to 20200717
ACPICA: Do not increment operation_region reference counts for field units
ACPICA: Replace one-element array with flexible-array
ACPI: Replace HTTP links with HTTPS ones
ACPI: Use valid link to the ACPI specification
ACPI: OSL: Clean up the removal of unused memory mappings
ACPI: OSL: Use deferred unmapping in acpi_os_unmap_iomem()
ACPI: OSL: Use deferred unmapping in acpi_os_unmap_generic_address()
ACPICA: Preserve memory opregion mappings
ACPI: OSL: Implement deferred unmapping of ACPI memory
ACPI: Use fallthrough pseudo-keyword
PCI: hotplug: ACPI: Fix context refcounting in acpiphp_grab_context()
ACPI: tables: avoid relocations for table signature array
ACPI: PAD: Eliminate usage of uninitialized_var() macro
ACPI: sysfs: add newlines when printing module parameters
ACPI: EC: add newline when printing 'ec_event_clearing' module parameter
...
- Make the Energy Model cover non-CPU devices (Lukasz Luba).
- Add Ice Lake server idle states table to the intel_idle driver
and eliminate a redundant static variable from it (Chen Yu,
Rafael Wysocki).
- Eliminate all W=1 build warnings from cpufreq (Lee Jones).
- Add support for Sapphire Rapids and for Power Limit 4 to the
Intel RAPL power capping driver (Sumeet Pawnikar, Zhang Rui).
- Fix function name in kerneldoc comments in the idle_inject power
capping driver (Yangtao Li).
- Fix locking issues with cpufreq governors and drop a redundant
"weak" function definition from cpufreq (Viresh Kumar).
- Rearrange cpufreq to register non-modular governors at the
core_initcall level and allow the default cpufreq governor to
be specified in the kernel command line (Quentin Perret).
- Extend, fix and clean up the intel_pstate driver (Srinivas
Pandruvada, Rafael Wysocki):
* Add a new sysfs attribute for disabling/enabling CPU
energy-efficiency optimizations in the processor.
* Make the driver avoid enabling HWP if EPP is not supported.
* Allow the driver to handle numeric EPP values in the sysfs
interface and fix the setting of EPP via sysfs in the active
mode.
* Eliminate a static checker warning and clean up a kerneldoc
comment.
- Clean up some variable declarations in the powernv cpufreq
driver (Wei Yongjun).
- Fix up the ->enter_s2idle callback definition to cover the case
when it points to the same function as ->idle correctly (Neal
Liu).
- Rearrange and clean up the PSCI cpuidle driver (Ulf Hansson).
- Make the PM core emit "changed" uevent when adding/removing the
"wakeup" sysfs attribute of devices (Abhishek Pandit-Subedi).
- Add a helper macro for declaring PM callbacks and use it in the
MMC jz4740 driver (Paul Cercueil).
- Fix white space in some places in the hibernate code and make the
system-wide PM code use "const char *" where appropriate (Xiang
Chen, Alexey Dobriyan).
- Add one more "unsafe" helper macro to the freezer to cover the NFS
use case (He Zhe).
- Change the language in the generic PM domains framework to use
parent/child terminology and clean up a typo and some comment
fromatting in that code (Kees Cook, Geert Uytterhoeven).
- Update the operating performance points OPP framework (Lukasz
Luba, Andrew-sh.Cheng, Valdis Kletnieks):
* Refactor dev_pm_opp_of_register_em() and update related drivers.
* Add a missing function export.
* Allow disabled OPPs in dev_pm_opp_get_freq().
- Update devfreq core and drivers (Chanwoo Choi, Lukasz Luba, Enric
Balletbo i Serra, Dmitry Osipenko, Kieran Bingham, Marc Zyngier):
* Add support for delayed timers to the devfreq core and make the
Samsung exynos5422-dmc driver use it.
* Unify sysfs interface to use "df-" as a prefix in instance names
consistently.
* Fix devfreq_summary debugfs node indentation.
* Add the rockchip,pmu phandle to the rk3399_dmc driver DT
bindings.
* List Dmitry Osipenko as the Tegra devfreq driver maintainer.
* Fix typos in the core devfreq code.
- Update the pm-graph utility to version 5.7 including a number of
fixes related to suspend-to-idle (Todd Brandt).
- Fix coccicheck errors and warnings in the cpupower utility (Shuah
Khan).
- Replace HTTP links with HTTPs ones in multiple places (Alexander
A. Klimov).
-----BEGIN PGP SIGNATURE-----
iQJGBAABCAAwFiEE4fcc61cGeeHD/fCwgsRv/nhiVHEFAl8oO24SHHJqd0Byand5
c29ja2kubmV0AAoJEILEb/54YlRx7ZQP/0lQ0yABnASnwomdOH6+K/m7rvc+e9FE
zx5pTDQswhU5tM7SQAIKqe0uSI+okF2UrBrT5onA16F+JUbnrbexJLazBPfVTTGF
AKpKEQ7Wh69Wz+Y6cQZjm1dTuRL+dlBJuBrzR2tLSnONPMMHuFcO3xd7lgE9UAxC
oGEf393taA6OqcUNRQIa2gqbq+k1qhKjeDucGkbOaoJ6CL0ZyWI+Tfw1WWaBBGv0
/2wBd6V513OH8WtQCW6H3YpHmhYW6OwL8w19KyGcjPRGJaeaIP4W/Ng7mkvgL5ZB
vZqg3XiufFV9uTe8W1NQaVv/NjlN256OteuK809aosTVjD0dhFkhBYg5TLu6HbQq
C/NciZ+78oLedWLT73EUfw3NyS+V0jk6X2EIlBUwNi0Qw1B1pCifGOCKzWFFe5cr
ci4xr4FG7dBkxScOxwFAU2s5TdPHLOkGkQtg4jZr0OYDrzkyLEdsnZEUjLPORo+0
6EBXGfTOSy2CBHcYswRtzJr/1pUTzj7oejhTAMCCuYW2r3VyQtnYcVjlehtp20if
6BfmGisk8nmtxlSm+/Y2FqKa4bNnSTMmr0UJQ+Rjp0tHs47QeucI0ORfZ5nPaBac
+ptvIjWmn3xejT/+oAehpH9066Iuy66vzHdnj7x5+WAsmYS8n8OFtlBFkYELmLJB
3xI5hIl7WtGo
=8cUO
-----END PGP SIGNATURE-----
Merge tag 'pm-5.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm
Pull power management updates from Rafael Wysocki:
"The most significant change here is the extension of the Energy Model
to cover non-CPU devices (as well as CPUs) from Lukasz Luba.
There is also some new hardware support (Ice Lake server idle states
table for intel_idle, Sapphire Rapids and Power Limit 4 support in the
RAPL driver), some new functionality in the existing drivers (eg. a
new switch to disable/enable CPU energy-efficiency optimizations in
intel_pstate, delayed timers in devfreq), some assorted fixes (cpufreq
core, intel_pstate, intel_idle) and cleanups (eg. cpuidle-psci,
devfreq), including the elimination of W=1 build warnings from cpufreq
done by Lee Jones.
Specifics:
- Make the Energy Model cover non-CPU devices (Lukasz Luba).
- Add Ice Lake server idle states table to the intel_idle driver and
eliminate a redundant static variable from it (Chen Yu, Rafael
Wysocki).
- Eliminate all W=1 build warnings from cpufreq (Lee Jones).
- Add support for Sapphire Rapids and for Power Limit 4 to the Intel
RAPL power capping driver (Sumeet Pawnikar, Zhang Rui).
- Fix function name in kerneldoc comments in the idle_inject power
capping driver (Yangtao Li).
- Fix locking issues with cpufreq governors and drop a redundant
"weak" function definition from cpufreq (Viresh Kumar).
- Rearrange cpufreq to register non-modular governors at the
core_initcall level and allow the default cpufreq governor to be
specified in the kernel command line (Quentin Perret).
- Extend, fix and clean up the intel_pstate driver (Srinivas
Pandruvada, Rafael Wysocki):
* Add a new sysfs attribute for disabling/enabling CPU
energy-efficiency optimizations in the processor.
* Make the driver avoid enabling HWP if EPP is not supported.
* Allow the driver to handle numeric EPP values in the sysfs
interface and fix the setting of EPP via sysfs in the active
mode.
* Eliminate a static checker warning and clean up a kerneldoc
comment.
- Clean up some variable declarations in the powernv cpufreq driver
(Wei Yongjun).
- Fix up the ->enter_s2idle callback definition to cover the case
when it points to the same function as ->idle correctly (Neal Liu).
- Rearrange and clean up the PSCI cpuidle driver (Ulf Hansson).
- Make the PM core emit "changed" uevent when adding/removing the
"wakeup" sysfs attribute of devices (Abhishek Pandit-Subedi).
- Add a helper macro for declaring PM callbacks and use it in the MMC
jz4740 driver (Paul Cercueil).
- Fix white space in some places in the hibernate code and make the
system-wide PM code use "const char *" where appropriate (Xiang
Chen, Alexey Dobriyan).
- Add one more "unsafe" helper macro to the freezer to cover the NFS
use case (He Zhe).
- Change the language in the generic PM domains framework to use
parent/child terminology and clean up a typo and some comment
fromatting in that code (Kees Cook, Geert Uytterhoeven).
- Update the operating performance points OPP framework (Lukasz Luba,
Andrew-sh.Cheng, Valdis Kletnieks):
* Refactor dev_pm_opp_of_register_em() and update related drivers.
* Add a missing function export.
* Allow disabled OPPs in dev_pm_opp_get_freq().
- Update devfreq core and drivers (Chanwoo Choi, Lukasz Luba, Enric
Balletbo i Serra, Dmitry Osipenko, Kieran Bingham, Marc Zyngier):
* Add support for delayed timers to the devfreq core and make the
Samsung exynos5422-dmc driver use it.
* Unify sysfs interface to use "df-" as a prefix in instance
names consistently.
* Fix devfreq_summary debugfs node indentation.
* Add the rockchip,pmu phandle to the rk3399_dmc driver DT
bindings.
* List Dmitry Osipenko as the Tegra devfreq driver maintainer.
* Fix typos in the core devfreq code.
- Update the pm-graph utility to version 5.7 including a number of
fixes related to suspend-to-idle (Todd Brandt).
- Fix coccicheck errors and warnings in the cpupower utility (Shuah
Khan).
- Replace HTTP links with HTTPs ones in multiple places (Alexander A.
Klimov)"
* tag 'pm-5.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (71 commits)
cpuidle: ACPI: fix 'return' with no value build warning
cpufreq: intel_pstate: Fix EPP setting via sysfs in active mode
cpufreq: intel_pstate: Rearrange the storing of new EPP values
intel_idle: Customize IceLake server support
PM / devfreq: Fix the wrong end with semicolon
PM / devfreq: Fix indentaion of devfreq_summary debugfs node
PM / devfreq: Clean up the devfreq instance name in sysfs attr
memory: samsung: exynos5422-dmc: Add module param to control IRQ mode
memory: samsung: exynos5422-dmc: Adjust polling interval and uptreshold
memory: samsung: exynos5422-dmc: Use delayed timer as default
PM / devfreq: Add support delayed timer for polling mode
dt-bindings: devfreq: rk3399_dmc: Add rockchip,pmu phandle
PM / devfreq: tegra: Add Dmitry as a maintainer
PM / devfreq: event: Fix trivial spelling
PM / devfreq: rk3399_dmc: Fix kernel oops when rockchip,pmu is absent
cpuidle: change enter_s2idle() prototype
cpuidle: psci: Prevent domain idlestates until consumers are ready
cpuidle: psci: Convert PM domain to platform driver
cpuidle: psci: Fix error path via converting to a platform driver
cpuidle: psci: Fail cpuidle registration if set OSI mode failed
...
This release we've seen a couple of updates to make some DT based APIs
use fwnode instead, allowing their use with ACPI systems, and a few
cleanups.
-----BEGIN PGP SIGNATURE-----
iQFHBAABCgAxFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAl8n+AMTHGJyb29uaWVA
a2VybmVsLm9yZwAKCRAk1otyXVSH0H+yB/43CbpxIM81f7RpbQDMkMLcj8sMVJjn
DCgltv0JMuLT01g9ZRHE1b6nX2SWqfQsbNj3BC/9+eTKgEeT4xQXtF8xM66bIiDU
YFV2L71YmdDtRdMPLJwYw1iJUvrlSNsTX3nxneI3s9L2ko5Gku5V3Xuqw1/nAVff
FVAiFW7PzaP1+/+Wrxrw09wQtDS2U9PmuL5Z3Ysgnm5mt5mk/3BPl9nwNu4ExGvP
wtCVYlIr+/2FhGT7syijbDU2iaX6UGMGHXVtbz50OxWNXL1Oynr9urj8rgVlR37b
GthMmYWqM1bs8jahq2g2/CZi4dx2HgnVXIBRYuPZi0vL0gmz1YlRZgYi
=Meuj
-----END PGP SIGNATURE-----
Merge tag 'regmap-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap
Pull regmap updates from Mark Brown:
"This release we've seen a couple of updates to make some DT based APIs
use fwnode instead, allowing their use with ACPI systems, and a few
cleanups"
* tag 'regmap-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap:
regmap: fix duplicated word in <linux/regmap.h>
regmap: Switch to use fwnode instead of OF one
regmap-irq: use fwnode instead of device node in add_irq_chip()
regmap: remove stray space
regmap: convert all regmap_update_bits() and co. macros to static inlines
A fairly quiet release for SPI, nothing really going on in the core
although there's been quite a bit of driver related activity. This pull
request includes the addition of some shared code in drivers/memory for
the Renesas RPC-IF which is used by a newly added SPI driver, the memory
subsystem doesn't seem to have a fixed maintainer at the minute and this
seemed like the most sensible way to get that hardware supported.
- Quite a few cleanups and optimizations for the Altera, Qualcomm GENI,
sun6i and lantiq drivers.
- Several more GPIO descriptor conversions.
- Move the Cadence QuadSPI driver from drivers/mtd to drivers/spi.
- New support for Mediatek MT8192 and Renesas RPC-IF, R8A7742 and
R8A774e1.
-----BEGIN PGP SIGNATURE-----
iQFHBAABCgAxFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAl8oBFoTHGJyb29uaWVA
a2VybmVsLm9yZwAKCRAk1otyXVSH0P2UB/47NlDsAadOiOB0ZzPKdn4Nr5BLvUza
TP63gAsxD4BErzgf/p/0D8qUTZPzmlfA833gj9hkIavJlTmv3fGrH0XeHg2OuCJb
yhyw9pE7MPpnARVOJHz1MZkAT/dY+sF3TaUXysmymlvs6CLqRnsLTOwK2f92SeGH
ygpC4J1tfD961xWmv2Zt8wNuQXtH+JePLXeZFSx2ZkpToFT56QO6kFpWjVfDquY4
/F8bc7qyXX6FcsBYAG6Ly35OSxbPazVLkTaDWQr5V4TAD0DXw0NOyvxg2OccqE31
y1jjx3hn98sN73m/VLzlEOer4w9313K5BOISaN0z7TQSQ55XRZKe4EQj
=K1PB
-----END PGP SIGNATURE-----
Merge tag 'spi-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi updates from Mark Brown:
"A fairly quiet release for SPI, nothing really going on in the core
although there's been quite a bit of driver related activity.
This includes the addition of some shared code in drivers/memory for
the Renesas RPC-IF which is used by a newly added SPI driver, the
memory subsystem doesn't seem to have a fixed maintainer at the minute
and this seemed like the most sensible way to get that hardware
supported.
- Quite a few cleanups and optimizations for the Altera, Qualcomm
GENI, sun6i and lantiq drivers.
- Several more GPIO descriptor conversions.
- Move the Cadence QuadSPI driver from drivers/mtd to drivers/spi.
- New support for Mediatek MT8192 and Renesas RPC-IF, R8A7742 and
R8A774e1"
* tag 'spi-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (119 commits)
dt-bindings: lpspi: New property in document DT bindings for LPSPI
spi: lpspi: fix using CS discontinuously on i.MX8DXLEVK
spi: lpspi: remove unused fsl_lpspi->chipselect
spi: lpspi: Fix kernel warning dump when probe fail after calling spi_register
spi: rockchip: Fix error in SPI slave pio read
spi: rockchip: Support 64-location deep FIFOs
spi: rockchip: Config spi rx dma burst size depend on xfer length
spi: spi-topcliff-pch: drop call to wakeup-disable
spi: spidev: Align buffers for DMA
spi: correct kernel-doc inconsistency
spi: sun4i: update max transfer size reported
spi: imx: enable runtime pm support
spi: update bindings for MT8192 SoC
spi: mediatek: add spi support for mt8192 IC
spi: Add bindings for Lightning Mountain SoC
spi: lantiq: Add support to Lightning Mountain SoC
spi: lantiq: Move interrupt configuration to SoC specific data structure
spi: lantiq: Add fifo size bit mask in SoC specific data structure
spi: lantiq: Add support to acknowledge interrupt
spi: lantiq: Move interrupt control register offesets to SoC specific data structure
...
This time around the bulk of the work on the regulator API has been
cleanups of various kinds, partly but not entirely inspired by the W=1
stuff that 0day turned on. There's also been a fairly large crop of new
drivers, and a few bugfixes for existing drivers.
- Mode setting support for MT6397 and DA9211.
- New drivers for ChromeOS embedded controllers, Fairchild FAN53880,
NXP PCA9450, Qualcomm LABIBB, MP5496, and VBUS booster, and Silergy
SY8827N
-----BEGIN PGP SIGNATURE-----
iQFHBAABCgAxFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAl8n+tcTHGJyb29uaWVA
a2VybmVsLm9yZwAKCRAk1otyXVSH0AbDB/9d9/CX9OK0qy4qMew7t/+bmHNKWB4O
jlVSp6Raj9dF3siLCaWT70jKrCEKBUIMSiA6c6UqWGHPbHLvvsTuu1aau2APIi/w
PDrnAfcku7J6CJMl4wwkn1Sh8vobXtqeZbT0Ydfx7QRzI+AMqz7CWLrOh9ET3Z3S
lN85GT7lqiG1hD+frep1FzpZDorzZa4Xvml7/7ns51IRn9NezdjRFBTG1dsZuKy6
GPEFXgLCfhaYs7zY1Tk9l5sMAdG/1OU/OvT4w4xmo7PkEZGYAHLSJfHQdRu2LwZU
r9YSVJ+COOfqaoml08XbFx1U12zWHgln+5ty+EuLxNNl4taBPpLqZDBC
=JJHu
-----END PGP SIGNATURE-----
Merge tag 'regulator-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator
Pull regulator updates from Mark Brown:
"This time around the bulk of the work on the regulator API has been
cleanups of various kinds, partly but not entirely inspired by the W=1
stuff that 0day turned on.
There's also been a fairly large crop of new drivers, and a few
bugfixes for existing drivers.
- Mode setting support for MT6397 and DA9211.
- New drivers for ChromeOS embedded controllers, Fairchild FAN53880,
NXP PCA9450, Qualcomm LABIBB, MP5496, and VBUS booster, and Silergy
SY8827N"
* tag 'regulator-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator: (67 commits)
regulator: add the sub node names for the MP5496 PMIC
regulator: cros-ec-regulator: Fix double free of desc->name.
platform/chrome: cros_ec: Fix host command for regulator control.
regulator: pca9450: Convert to use module_i2c_driver
regulator: fix memory leak on error path of regulator_register()
regulator: Replace HTTP links with HTTPS ones
regulator: convert QCOM SMD-RPM regulator document to YAML schema
regulator: gpio: Honor regulator-boot-on property
regulator: core: Add destroy_regulator()
regulator: Correct kernel-doc inconsistency
regulator: Add labibb regulator binding
regulator: qcom: Add labibb driver
regulator: Allow regulators to verify enabled during enable()
regulator: cros-ec: Constify cros_ec_regulator_voltage_ops
regulator: devres: Standardise on function documentation headers
regulator: of_regulator: Add missing colon for rdev kerneldoc argument
regulator: devres: Fix issues with kerneldoc headers
regulator: fan53880: Add support for COMPILE_TEST
regulator: fan53880: Add missing .owner field in regulator_desc
dt-bindings: regulator: add pca9450 regulator yaml
...
e370f886fe ("EDAC: Remove edac_get_dimm_by_index()")
b9cae27728 ("EDAC/ghes: Scan the system once on driver init")
b001694d60 ("EDAC/ghes: Remove unused members of struct ghes_edac_pvt, rename it to ghes_pvt")
cb51a371d0 ("EDAC/ghes: Setup DIMM label from DMI and use it in error reports")
8807e15597 ("EDAC, {skx,i10nm}: Use CPU stepping macro to pass configurations")
e9ff6636d3 ("EDAC/mc: Call edac_inc_ue_error() before panic")
30bf38e434 ("EDAC, pnd2: Set MCE_PRIO_EDAC priority for pnd2_mce_dec notifier")
-----BEGIN PGP SIGNATURE-----
iIoEABYIADIWIQQW3WBGcnu5yJnSXn0kTJLX0iGMLAUCXyNSJxQcdG9ueS5sdWNr
QGludGVsLmNvbQAKCRAkTJLX0iGMLLX+AP0RHxHv0kYI8EScLpdHFnoGAKdKJ8Zb
UmTTWqz4GwdoFgD/VIQ/RueIfsV+Hlqj+U+84+NJwPEcbJxY6WLo9ZHUkgc=
=aFwG
-----END PGP SIGNATURE-----
Merge tag 'edac_updates_for_5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras
Pull EDAC updates from Tony Luck:
"Boris is on vacation and aske me to send you the EDAC changes"
* tag 'edac_updates_for_5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras:
EDAC: Fix reference count leaks
EDAC: Remove edac_get_dimm_by_index()
EDAC/ghes: Scan the system once on driver init
EDAC/ghes: Remove unused members of struct ghes_edac_pvt, rename it to ghes_pvt
EDAC/ghes: Setup DIMM label from DMI and use it in error reports
EDAC, {skx,i10nm}: Use CPU stepping macro to pass configurations
EDAC/mc: Call edac_inc_ue_error() before panic
EDAC, pnd2: Set MCE_PRIO_EDAC priority for pnd2_mce_dec notifier
There are three SoC families newly dded to the 32-bit and
64-bit Arm architecture code in the kernel this time:
- Daniel Palmer adds initial support for two chips made by MStar, a
taiwanese SoC manufacturer that became part of Mediatek in 2012. For
now, the added support is fairly minimal, with just two of its
Cortex-A7 based 32-bit camera chips getting support for a limited
set of on-chip peripherals.
- Lars Povlsen from Microchip adds support for their new Sparx5
family of ethernet switch chips using 64-bit Cortex-A53 cores.
These are descended from earlier VSC7xxx SparX and Ocelot chips
using 32-bit MIPS cores.
- Daniele Alessandrelli from Intel adds support for the new Keem Bay
SoC for computer vision, built around a Movidius VPU with Linux
running on Arm Cortex-A53 cores.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAl8j31MACgkQmmx57+YA
GNnS7Q//achCOtBeIblV8Fyfp/lTYNpT9hFTQ5cGaoyjl9Lm1rcVCISCEGqIEJAV
FRQBz3YcQWA9pIWIf79oh6QphcoW/wUTCE+cjnHP+EOkqvw9aGFBm4nOUt4Gz92a
+gGs9HqcrxB+3ysQEDGugwRrE6htrOoCnWyurh5zZNvAEry+MV6LBwfxSUrLKy8b
iwnwl/KvWI47mWAj5nJ7fbXAgxRjFdEz+mvNBjqKhJ/OELsnWRXcxmJxF651DEb6
e/ydD7OtrWI1+81/yQxS7SeDlatFHE0JvP4WZHBGm6TB7Z3pdqIZI598UN0lVvbR
jvtljiAa2UA7h6NjscD6ECWktrF8LO8i/8ref7Fr3za/FKiLTYP2BQymnlk5nLAj
RuCvR8oriqBbseZlkGrs4afjpfwurUKNhhjVse/M3ORYYK++Bra6GZWL4gnlA2wB
GbFZ6MAw2bnbKrO6rRTu+F1NFq5/l71LP1r3Li3xbyfZ7I/XJ5aiE6knQ+vtk6Np
pfvCYSILOSnulYZvdaL/W4HV98mzjHSE4eUegGDTMKNv2dVNRGI3Mnnur7+kSXLu
550qg+GXv8JkQlkFkT2BsuaiPULOUKHFtK42fo2XhQL/zoaFlBU7HehtSBdtcKPy
XIlEEk32q+QyABKav2QJnGJMcWzfq2SSmsUliVU72zD38dG/0Fw=
=Yy3D
-----END PGP SIGNATURE-----
Merge tag 'arm-newsoc-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull new ARM SoC support from Arnd Bergmann:
"There are three SoC families newly dded to the 32-bit and 64-bit Arm
architecture code in the kernel this time:
- Daniel Palmer adds initial support for two chips made by MStar, a
taiwanese SoC manufacturer that became part of Mediatek in 2012.
For now, the added support is fairly minimal, with just two of its
Cortex-A7 based 32-bit camera chips getting support for a limited
set of on-chip peripherals.
- Lars Povlsen from Microchip adds support for their new Sparx5
family of ethernet switch chips using 64-bit Cortex-A53 cores.
These are descended from earlier VSC7xxx SparX and Ocelot chips
using 32-bit MIPS cores.
- Daniele Alessandrelli from Intel adds support for the new Keem Bay
SoC for computer vision, built around a Movidius VPU with Linux
running on Arm Cortex-A53 cores"
* tag 'arm-newsoc-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (38 commits)
ARM: mstar: Correct the compatible string for pmsleep
dt-bindings: arm: mstar: remove the binding description for mstar,pmsleep
dt-bindings: mfd: syscon: add compatible string for mstar,msc313-pmsleep
ARM: mstar: Add reboot support
ARM: mstar: Add "pmsleep" node to base dtsi
ARM: mstar: Add PMU
ARM: mstar: Adjust IMI size for infinity3
ARM: mstar: Adjust IMI size for mercury5
ARM: mstar: Adjust IMI size of infinity
ARM: mstar: Add IMI SRAM region
dt-bindings: arm: mstar: Move existing MStar binding descriptions
dt-bindings: arm: mstar: Add binding details for mstar, pmsleep
ARM: mstar: Fix dts filename for 70mai midrive d08
ARM: mstar: Add dts for 70mai midrive d08
ARM: mstar: Add dts for msc313(e) based BreadBee boards
ARM: mstar: Add mercury5 series dtsis
ARM: mstar: Add infinity/infinity3 family dtsis
ARM: mstar: Add Armv7 base dtsi
ARM: mstar: Add binding details for mstar,l3bridge
ARM: mstar: Add machine for MStar/Sigmastar Armv7 SoCs
...
A couple of subsystems have their own subsystem maintainers but choose
to have the code merged through the soc tree as upstream, as the code
tends to be used across multiple SoCs or has SoC specific drivers itself:
- memory controllers:
Krzysztof Kozlowski takes ownership of the drivers/memory
subsystem and its drivers, starting out with a set of cleanup
patches.
A larger driver for the Tegra memory controller that was accidentally
missed for v5.8 is now added.
- reset controllers:
Only minor updates to drivers/reset this time
- firmware:
The "turris mox" firmware driver gains support for signed firmware blobs
The tegra firmware driver gets extended to export some debug information
Various updates to i.MX firmware drivers, mostly cosmetic
- ARM SCMI/SCPI:
A new mechanism for platform notifications is added, among a number
of minor changes.
- optee:
Probing of the TEE bus is rewritten to better support detection of
devices that depend on the tee-supplicant user space.
A new firmware based trusted platform module (fTPM) driver is added
based on OP-TEE
- SoC attributes:
A new driver is added to provide a generic soc_device for identifying
a machine through the SMCCC ARCH_SOC_ID firmware interface rather than
by probing SoC family specific registers.
The series also contains some cleanups to the common soc_device code.
There are also a number of updates to SoC specific drivers,
the main ones are:
- Mediatek cmdq driver gains a few in-kernel interfaces
- Minor updates to Qualcomm RPMh, socinfo, rpm drivers, mostly adding
support for additional SoC variants
- The Qualcomm GENI core code gains interconnect path voting and
performance level support, and integrating this into a number of
device drivers.
- A new driver for Samsung Exynos5800 voltage coupler for
- Renesas RZ/G2H (R8A774E1) SoC support gets added to a couple of SoC
specific device drivers
- Updates to the TI K3 Ring Accelerator driver
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAl8j3y4ACgkQmmx57+YA
GNm8Iw//euEC37KaiBDhlK3mcAL7NOdITqZpq4m+ZJZBsF02NDMWktJR8bYuOgmp
kjR4LjCxa2i+UOq1Ln+zYSlS27AngZLHFM+YSG3jqDho12GYIe4OBZB/q/hkDu71
L5jCPNrZV9+GIcean2u8LOWDNlQ4SZQyZ1/gcCK7y7I8W1pVulmJRhtJ0MNkezni
gDQ+OH+6+6XY8AethWK9ubsYH7SeJX/U6I8t5KJGhPr6FlaJFZOO5RTdUkBFMHpS
i4UaT4meuqZUjwz4BhjvoYul5AT6Zc8OOTQwk1FM7dIe47aI8VkWrWci/IekxoLh
UXtKbAJxerCIdehfiygX4pKtOmRKSisS2ocWsKg46Htu11ltv0XMRgyLyGv4Vm84
g+fKfKUL0SUueDqr+jKEq2aZdyLxwV5ZUoFt3IVsXdHRkZtxpN8jmOHOjV6erLVY
m7S85U5eclNdK5Ap7RSVvQa4NP3NTUvJd1IDNIneUVyACRkxzWEKmE3ZuEO4qttS
WSDW74m5ja80pltv1umFbGAsOUTZWA+WGULeXPv4CIooaD8RL6Jzs+7tkZEEhleU
WlGBFE4eJi/ChMeyTKXPvEqsQncLSf0mGzM4/DVY6XRSTIrW+cuj1/Gsso1BJdod
aZZ76uMNHJdAt0PcxL47lDUDxhJDkTwBsfGNJseZ3sYlAQ7Wmqo=
=nezz
-----END PGP SIGNATURE-----
Merge tag 'arm-drivers-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC driver updates from Arnd Bergmann:
"A couple of subsystems have their own subsystem maintainers but choose
to have the code merged through the soc tree as upstream, as the code
tends to be used across multiple SoCs or has SoC specific drivers
itself:
- memory controllers:
Krzysztof Kozlowski takes ownership of the drivers/memory subsystem
and its drivers, starting out with a set of cleanup patches.
A larger driver for the Tegra memory controller that was
accidentally missed for v5.8 is now added.
- reset controllers:
Only minor updates to drivers/reset this time
- firmware:
The "turris mox" firmware driver gains support for signed firmware
blobs The tegra firmware driver gets extended to export some debug
information Various updates to i.MX firmware drivers, mostly
cosmetic
- ARM SCMI/SCPI:
A new mechanism for platform notifications is added, among a number
of minor changes.
- optee:
Probing of the TEE bus is rewritten to better support detection of
devices that depend on the tee-supplicant user space. A new
firmware based trusted platform module (fTPM) driver is added based
on OP-TEE
- SoC attributes:
A new driver is added to provide a generic soc_device for
identifying a machine through the SMCCC ARCH_SOC_ID firmware
interface rather than by probing SoC family specific registers.
The series also contains some cleanups to the common soc_device
code.
There are also a number of updates to SoC specific drivers, the main
ones are:
- Mediatek cmdq driver gains a few in-kernel interfaces
- Minor updates to Qualcomm RPMh, socinfo, rpm drivers, mostly adding
support for additional SoC variants
- The Qualcomm GENI core code gains interconnect path voting and
performance level support, and integrating this into a number of
device drivers.
- A new driver for Samsung Exynos5800 voltage coupler for
- Renesas RZ/G2H (R8A774E1) SoC support gets added to a couple of SoC
specific device drivers
- Updates to the TI K3 Ring Accelerator driver"
* tag 'arm-drivers-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (164 commits)
soc: qcom: geni: Fix unused label warning
soc: qcom: smd-rpm: Fix kerneldoc
memory: jz4780_nemc: Only request IO memory the driver will use
soc: qcom: pdr: Reorder the PD state indication ack
MAINTAINERS: Add Git repository for memory controller drivers
memory: brcmstb_dpfe: Fix language typo
memory: samsung: exynos5422-dmc: Correct white space issues
memory: samsung: exynos-srom: Correct alignment
memory: pl172: Enclose macro argument usage in parenthesis
memory: of: Correct kerneldoc
memory: omap-gpmc: Fix language typo
memory: omap-gpmc: Correct white space issues
memory: omap-gpmc: Use 'unsigned int' for consistency
memory: omap-gpmc: Enclose macro argument usage in parenthesis
memory: omap-gpmc: Correct kerneldoc
memory: mvebu-devbus: Align with open parenthesis
memory: mvebu-devbus: Add missing braces to all arms of if statement
memory: bt1-l2-ctl: Add blank lines after declarations
soc: TI knav_qmss: make symbol 'knav_acc_range_ops' static
firmware: ti_sci: Replace HTTP links with HTTPS ones
...
These are mostly cosmetic changes and minor bugfixes for the SoC
specific code, across the 32-bit at91, mvebu, davinci, samsung, and
omap platforms.
The main notable changes are for the Samsung Exynos platform, which
sees a rewrite of gpio handling and a change to restore and adds
a workaround for a problem with cpuidle support.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAl8j32AACgkQmmx57+YA
GNkoXA//RHlx49SRw9RXxrMHwPTq0L12R2YJsHoCw3GYmAi7MkLiSy+VsR0b8LON
vtflUwyVBDr6THlPYKqq/nBEaXQAHUd8xm5HQSwsgWdAcxwpvI2VQ8AFwCUIJOn5
I2a2kVNMTV7I7E1j64RpdoErtJiGlIFR6Yv7j1ENUBurTXT5KzGyugms1eHqSmNi
I1zVHzbvJji+vTxnDy2ooUyig04GP+8hY1/ZrwvStfruWZYckaeXCQIWvkExaqp5
pPnCTPrrnhKg44Nlco88QjoScz8vzGcLBXF0VpLhjD3J/IO/ySWuyBmRLZNS4VzU
c2zyQ6xnSLbC6QnQa6YYMwC6xVmYfzdudXORVM2sLAGsUH1XMV6zHbJ+dP6WGTjd
yfgkgr2bindbhSTuYKoyP5Km2MizW7ndTStpBKbdSR63kwF70POEAZPR9SZsoZcR
6gyaKNVqd3Xcuht3MfndR0WrYcTnzsz+EcioLP3AdQxfI2fM3l5NIqbtOt9txHi0
CcaVfK9k7sKGWkWHlcurrkB6kTDnlJYR6S1ZiiJMb+nriQAXkQjw+wuF6hb9qvIJ
sCKNFdVc8x+b0qf/CO1iss/H0s5dv2bzlXL/YgRUcpcLJ/zVEb1Cgl+Dx496pEwl
dEsMueRlfx9kvmZLkVJMHY5hTBDHaaDRHqmqaQpTcHdHDIwAGA4=
=IHpg
-----END PGP SIGNATURE-----
Merge tag 'arm-soc-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC updates from Arnd Bergmann:
"These are mostly cosmetic changes and minor bugfixes for the SoC
specific code, across the 32-bit at91, mvebu, davinci, samsung, and
omap platforms.
The main notable changes are for the Samsung Exynos platform, which
sees a rewrite of gpio handling and a change to restore and adds a
workaround for a problem with cpuidle support"
* tag 'arm-soc-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
ARM: socfpga: PM: add missing put_device() call in socfpga_setup_ocram_self_refresh()
MAINTAINERS: arm/amlogic: add designated reviewers
ARM: davinci: dm646x-evm: Simplify error handling in 'evm_sw_setup()'
ARM: davinci: Fix trivial spelling
ARM: davinci: Replace HTTP links with HTTPS ones
ARM: s3c24xx: Replace HTTP links with HTTPS ones
ARM: orion/gpio: Make use of for_each_requested_gpio()
ARM: at91: Replace HTTP links with HTTPS ones
ARM: at91: pm: add missing put_device() call in at91_pm_sram_init()
ARM: rpc: Change blacklist to quirklist in ecode.c file
ARM: OMAP: Replace HTTP links with HTTPS ones
ARM: s3c24xx: leds: Convert to use GPIO descriptors
udc: lpc32xx: mark local function static
ARM: exynos: MCPM: Restore big.LITTLE cpuidle support
ARM: exynos: clear L310_AUX_CTRL_FULL_LINE_ZERO in default l2c_aux_val
As usual, there are many patches addressing minor issues in existing
DTS files, such as DTC warnings, or adding support for additional
peripherals.
There are three added SoCs in existing product families:
- Amazon:
Alpine v3 is a 16-core Cortex-A72 SoC from Amazon's Annapurna Labs,
otherwise known as AL73400 or first-generation Graviton, and following
the already supported Cortex-A1`5 and Cortex-A57 based Alpine chips.
This one is added together with the official Evaluation platform.
- Qualcomm:
The Snapdragon SDM630 platform is a family of mid-range mobile phone
chips from 2017 based on Cortex-A53 or Kryo 260 CPUs.
A total of five end-user products are added based on these, all
Android phones from Sony: Xperia 10, 10 Plus, XA2, XA2 Plus and
XA2 Ultra.
- Renesas:
RZ/G2H (r8a774e1) is currently the top model in the Renesas RZ/G
family, and apparently closely related to the RZ/G2N and RZ/G2M
models we already support but has a faster GPU and additional
on-chip peripherals.
It is added along with the HopeRun HiHope RZ/G2H development board
A small number of new boards for already supported SoCs also debut:
- Allwinner sunxi:
Only one new machine, revision v1.2 of the Pine64 PinePhone
(non-Android) smartphone, containing minor changes compared to
earlier versions.
- Amlogic Meson:
WeTek Core2 is an Amlogic S912 (GXM) based Set-top-box
- Aspeed:
EthanolX is AMD's EPYC data center rerence platform, using an
ASpeed AST2600 baseboard management controller.
- Mediatek:
Lenovo IdeaPad Duet 10.1" (kukui/krane) is a new Chromebook
based on the MT8183 (Helio P60t) SoC.
- Nvidia Tegra:
ASUS Google Nexus 7 and Acer Iconia Tab A500 are two Android
tablets from around 2012 using Tegra 3 and Tegra 2, respectively.
Thanks to PostmarketOS, these can now run mainline kernels
and become useful again.
The Jetson Xavier NX Developer Kit uses a SoM and carrier board
for the Tegra194, their latest 64-bit chip based on Carmel CPU
cores and Volta graphics.
- NXP i.MX:
Five new boards based on the 32-bit i.MX6 series are added:
The MYiR MYS-6ULX single-board computer, and four different
models of industrial computers from Protonic.
- Qualcomm:
MikroTik RouterBoard 3011 is a rackmounted router based on the
32-bit IPQ8064 networking SoC
Three older phones get added, the Snapdragon 808 (msm8992) based
Xiaomi Libra (Mi 4C) and Microsoft Lumia 950, originally running
Windows Phone, and the Snapdragon 810 (msm8994) based Sony
Xperia Z5.
- Renesas:
In addition to the HiHope RZ/G2H board mentioned above, we gain
support for board versions 3.0 and 4.0 of the earlier RZ/G2M and
RZ/G2N reference boards.
Beacon EmbeddedWorks adds another SoM+Carrier development board
for RZ/G2M.
- Rockchips:
Radxa Rock Pi N8 development board and the VMARC RK3288 SoM it
is based on, using the high-end 32-bit rk3288 SoC.
Notable updates to existing platforms are usually for added on-chip
peripherals, including:
- ASpeed AST2xxx (various)
- Allwinner (cpufreq, thermal, Pinephone touchscreen)
- Amlogic Meson (audio, gpu dvdfs, board updates)
- Arm Versatile
- Broadcom (board updates for switch ports, Raspberry pi clock updates)
- Hisilicon (various)
- Intel/Altera SoCFPGA (various)
- Marvell Armada 7xxx/8xxx (smmu)
- Marvell MMP (GPU on mmp2/mmp3)
- Mediatek mt8183 (USB, pericfg)
- NXP Layerscape (VPU, thermal, DSPI)
- NXP i.MX (VPU, bindings, board updates)
- Nvidia Tegra194 (GPU)
- Qualcomm (GPU, Interconnect, ...)
- Renesas R-Car (SPI, IPMMU, board updates)
- STMicroelectronics STM32 (various)
- Samsung Exynos (various)
- Socionext Uniphier (updates to serial, and pcie)
- TI K3 (serdes, usb3, audio, sd, chipid)
- TI OMAP (IPU/DSP remoteproc changes, dropping platform data)
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAl8j3zoACgkQmmx57+YA
GNlOAQ//RuU0v5AyUyZZGsYKcKltg0qCiUj+CWldlaHS41oJQ9UC4e2kqhZtR28V
Cqe853h976Xm74Fr7Hci4OCo9wxGrNLXFgNkNrYzR9ud76eEcSTQX8Jj9slZvLVu
fEzNOK4VD0cIDRkw5xNZfGHGUSN7ttOV+NClVSA2zBiKv8jNivRI24+vvc+f92yb
d5P7+aeex19xSOiMmuuj5yBbU+85pbR5aoRRS5Ohe5mVL5wW9LQTs7Otsk989FBe
jOCthKfPFtxTTYMrWmM3P0DcHku/MNAsRQKUysrJlMcSefXOgkfMuN6cw4xypXAS
OvFNnIp8cigt8MLWIyU2AiLkkr3FpEsZQliy4XTBl1n6mGlRHB5wD8i294cLtQlJ
EO5yu3I3UimIyG7i4aWCy0sJMYedDrnoYisQk00aDbzea7quSuXC9yo9IompdBsr
Fqn5D7tFnVs79v/2zDhqlMU8GmFSoqPyfPSE3dgLCOHlMdd2ToD9I4ahtsJVZTjk
1Ro9TMFK+b5LIQot1inOPff0aurpZPLA7wmxUfez51IwG4UdVsmtawwPCl6OrgYm
TttK+J1yuCMSxds7QC3rPfiubc+RLEy+IQxP1tR55THg72RDWRnwXTXb5AvAu/vx
GbY1AzGszdr1+mR04CKbFyICG0l0vlyuX9qSsknRW48MaYgn8GQ=
=Tpj3
-----END PGP SIGNATURE-----
Merge tag 'arm-dt-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC DT updates from Arnd Bergmann:
"As usual, there are many patches addressing minor issues in existing
DTS files, such as DTC warnings, or adding support for additional
peripherals.
There are three added SoCs in existing product families:
- Amazon:
Alpine v3 is a 16-core Cortex-A72 SoC from Amazon's Annapurna Labs,
otherwise known as AL73400 or first-generation Graviton, and
following the already supported Cortex-A1`5 and Cortex-A57 based
Alpine chips. This one is added together with the official
Evaluation platform.
- Qualcomm:
The Snapdragon SDM630 platform is a family of mid-range mobile
phone chips from 2017 based on Cortex-A53 or Kryo 260 CPUs. A total
of five end-user products are added based on these, all Android
phones from Sony: Xperia 10, 10 Plus, XA2, XA2 Plus and XA2 Ultra.
- Renesas:
RZ/G2H (r8a774e1) is currently the top model in the Renesas RZ/G
family, and apparently closely related to the RZ/G2N and RZ/G2M
models we already support but has a faster GPU and additional
on-chip peripherals. It is added along with the HopeRun HiHope
RZ/G2H development board
A small number of new boards for already supported SoCs also debut:
- Allwinner sunxi:
Only one new machine, revision v1.2 of the Pine64 PinePhone
(non-Android) smartphone, containing minor changes compared to
earlier versions.
- Amlogic Meson:
WeTek Core2 is an Amlogic S912 (GXM) based Set-top-box
- Aspeed:
EthanolX is AMD's EPYC data center rerence platform, using an
ASpeed AST2600 baseboard management controller.
- Mediatek:
Lenovo IdeaPad Duet 10.1" (kukui/krane) is a new Chromebook based
on the MT8183 (Helio P60t) SoC.
- Nvidia Tegra:
ASUS Google Nexus 7 and Acer Iconia Tab A500 are two Android
tablets from around 2012 using Tegra 3 and Tegra 2, respectively.
Thanks to PostmarketOS, these can now run mainline kernels and
become useful again.
The Jetson Xavier NX Developer Kit uses a SoM and carrier board for
the Tegra194, their latest 64-bit chip based on Carmel CPU cores
and Volta graphics.
- NXP i.MX:
Five new boards based on the 32-bit i.MX6 series are added: The
MYiR MYS-6ULX single-board computer, and four different models of
industrial computers from Protonic.
- Qualcomm:
MikroTik RouterBoard 3011 is a rackmounted router based on the
32-bit IPQ8064 networking SoC
Three older phones get added, the Snapdragon 808 (msm8992) based
Xiaomi Libra (Mi 4C) and Microsoft Lumia 950, originally running
Windows Phone, and the Snapdragon 810 (msm8994) based Sony Xperia
Z5.
- Renesas:
In addition to the HiHope RZ/G2H board mentioned above, we gain
support for board versions 3.0 and 4.0 of the earlier RZ/G2M and
RZ/G2N reference boards. Beacon EmbeddedWorks adds another
SoM+Carrier development board for RZ/G2M.
- Rockchips:
Radxa Rock Pi N8 development board and the VMARC RK3288 SoM it is
based on, using the high-end 32-bit rk3288 SoC.
Notable updates to existing platforms are usually for added on-chip
peripherals, including:
- ASpeed AST2xxx (various)
- Allwinner (cpufreq, thermal, Pinephone touchscreen)
- Amlogic Meson (audio, gpu dvdfs, board updates)
- Arm Versatile
- Broadcom (board updates for switch ports, Raspberry pi clock updates)
- Hisilicon (various)
- Intel/Altera SoCFPGA (various)
- Marvell Armada 7xxx/8xxx (smmu)
- Marvell MMP (GPU on mmp2/mmp3)
- Mediatek mt8183 (USB, pericfg)
- NXP Layerscape (VPU, thermal, DSPI)
- NXP i.MX (VPU, bindings, board updates)
- Nvidia Tegra194 (GPU)
- Qualcomm (GPU, Interconnect, ...)
- Renesas R-Car (SPI, IPMMU, board updates)
- STMicroelectronics STM32 (various)
- Samsung Exynos (various)
- Socionext Uniphier (updates to serial, and pcie)
- TI K3 (serdes, usb3, audio, sd, chipid)
- TI OMAP (IPU/DSP remoteproc changes, dropping platform data)"
* tag 'arm-dt-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (605 commits)
arm64: dts: meson: odroid-n2: add jack audio output support
arm64: dts: meson: odroid-n2: enable audio loopback
ARM: dts: berlin: Align L2 cache-controller nodename with dtschema
arm64: dts: qcom: Add Microsoft Lumia 950 (Talkman) device tree
arm64: dts: qcom: Add Xiaomi Libra (Mi 4C) device tree
arm64: dts: qcom: msm8992: Add RPMCC node
arm64: dts: qcom: msm8992: Add PSCI support.
arm64: dts: qcom: msm8992: Add PMU node
arm64: dts: qcom: msm8992: Add BLSP2_UART2 and I2C nodes
arm64: dts: qcom: msm8992: Add SPMI PMIC arbiter device
arm64: dts: qcom: msm8992: Add a SCM node
arm64: dts: qcom: msm8992: Add a proper CPU map
arm64: dts: qcom: bullhead: Move UART pinctrl to SoC
arm64: dts: qcom: bullhead: Add qcom,msm-id
arm64: dts: qcom: msm8992: Fix SDHCI1
arm64: dts: qcom: msm8992: Modernize the DTS style
arm64: dts: qcom: Add support for Sony Xperia Z5 (SoMC Sumire-RoW)
arm64: dts: qcom: Move msm8994-smd-rpm contents to lg-bullhead.
arm64: dts: qcom: msm8994: Add support for SMD RPM
arm64: dts: qcom: msm8992: Add a label to rpm-requests
...
Up until now when flushing pages from the TLB on SMP OpenRISC was always
resorting to flush the entire TLB on all CPUs. This patch adds the
mechanics for flushing specific ranges and pages based on the usage.
The function switch_mm is updated to account for cpu usage by updating
mm_struct's cpumask. This is used in the SMP flush routines.
This mostly follows the riscv implementation.
Signed-off-by: Stafford Horne <shorne@gmail.com>
When dumping a stack with 'cat /proc/#/stack' the kernel would oops.
For example:
# cat /proc/690/stack
Unable to handle kernel access
at virtual address 0x7fc60f58
Oops#: 0000
CPU #: 0
PC: c00097fc SR: 0000807f SP: d6f09b9c
GPR00: 00000000 GPR01: d6f09b9c GPR02: d6f09bb8 GPR03: d6f09bc4
GPR04: 7fc60f5c GPR05: c00099b4 GPR06: 00000000 GPR07: d6f09ba3
GPR08: ffffff00 GPR09: c0009804 GPR10: d6f08000 GPR11: 00000000
GPR12: ffffe000 GPR13: dbb86000 GPR14: 00000001 GPR15: dbb86250
GPR16: 7fc60f63 GPR17: 00000f5c GPR18: d6f09bc4 GPR19: 00000000
GPR20: c00099b4 GPR21: ffffffc0 GPR22: 00000000 GPR23: 00000000
GPR24: 00000001 GPR25: 000002c6 GPR26: d78b6850 GPR27: 00000001
GPR28: 00000000 GPR29: dbb86000 GPR30: ffffffff GPR31: dbb862fc
RES: 00000000 oGPR11: ffffffff
Process cat (pid: 702, stackpage=d79d6000)
Stack:
Call trace:
[<598977f2>] save_stack_trace_tsk+0x40/0x74
[<95063f0e>] stack_trace_save_tsk+0x44/0x58
[<b557bfdd>] proc_pid_stack+0xd0/0x13c
[<a2df8eda>] proc_single_show+0x6c/0xf0
[<e5a737b7>] seq_read+0x1b4/0x688
[<2d6c7480>] do_iter_read+0x208/0x248
[<2182a2fb>] vfs_readv+0x64/0x90
This was caused by the stack trace code in save_stack_trace_tsk using
the wrong stack pointer. It was using the user stack pointer instead of
the kernel stack pointer. Fix this by using the right stack.
Also for good measure we add try_get_task_stack/put_task_stack to ensure
the task is not lost while we are walking it's stack.
Fixes: eecac38b04 ("openrisc: support framepointers and STACKTRACE_SUPPORT")
Signed-off-by: Stafford Horne <shorne@gmail.com>
In OpenRISC we set the initrd_start and initrd_end based on the symbols
we setup in vmlinux.lds.S. However, this is not needed if we use the
generic linker description in INIT_DATA_SECTION.
Removing our own initrd setup reduces code, but also the generic code
supports loading external initrd images. A bootloader can load a rootfs
image into memory and we can configure devicetree to load it with:
chosen {
bootargs = "earlycon";
stdout-path = "uart0:115200";
linux,initrd-start = < 0x08000100 >;
linux,initrd-end = < 0x08200000 >;
};
Reported-by: Mateusz Holenko <mholenko@antmicro.com>
Signed-off-by: Stafford Horne <shorne@gmail.com>
When booting on 32-bit machines (seen on OpenRISC) I saw this warning
with CONFIG_DEBUG_MUTEXES turned on.
------------[ cut here ]------------
WARNING: CPU: 0 PID: 0 at kernel/locking/mutex.c:1242 __mutex_unlock_slowpath+0x328/0x3ec
DEBUG_LOCKS_WARN_ON(__owner_task(owner) != current)
Modules linked in:
CPU: 0 PID: 0 Comm: swapper Not tainted 5.8.0-rc1-simple-smp-00005-g2864e2171db4-dirty #179
Call trace:
[<(ptrval)>] dump_stack+0x34/0x48
[<(ptrval)>] __warn+0x104/0x158
[<(ptrval)>] ? __mutex_unlock_slowpath+0x328/0x3ec
[<(ptrval)>] warn_slowpath_fmt+0x7c/0x94
[<(ptrval)>] __mutex_unlock_slowpath+0x328/0x3ec
[<(ptrval)>] mutex_unlock+0x18/0x28
[<(ptrval)>] __cpuhp_setup_state_cpuslocked.part.0+0x29c/0x2f4
[<(ptrval)>] ? page_alloc_cpu_dead+0x0/0x30
[<(ptrval)>] ? start_kernel+0x0/0x684
[<(ptrval)>] __cpuhp_setup_state+0x4c/0x5c
[<(ptrval)>] page_alloc_init+0x34/0x68
[<(ptrval)>] ? start_kernel+0x1a0/0x684
[<(ptrval)>] ? early_init_dt_scan_nodes+0x60/0x70
irq event stamp: 0
I traced this to kernel/locking/mutex.c storing 3 bits of MUTEX_FLAGS in
the task_struct pointer (mutex.owner). There is a comment saying that
task_structs are always aligned to L1_CACHE_BYTES. This is not true for
the init_task.
On 64-bit machines this is not a problem because symbol addresses are
naturally aligned to 64-bits providing 3 bits for MUTEX_FLAGS. Howerver,
for 32-bit machines the symbol address only has 2 bits available.
Fix this by setting init_task alignment to at least L1_CACHE_BYTES.
Signed-off-by: Stafford Horne <shorne@gmail.com>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
raw_copy_to_user()'s prototype seems to be a copy & paste of
raw_copy_from_user() and as such has the __user annotation
in the 'from' argument instead of the 'to'.
So, move the __user annotation in the prototype to the 'to'.
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Luc Van Oostenryck <luc.vanoostenryck@gmail.com>
Signed-off-by: Stafford Horne <shorne@gmail.com>
Daniel Borkmann says:
====================
pull-request: bpf-next 2020-08-04
The following pull-request contains BPF updates for your *net-next* tree.
We've added 73 non-merge commits during the last 9 day(s) which contain
a total of 135 files changed, 4603 insertions(+), 1013 deletions(-).
The main changes are:
1) Implement bpf_link support for XDP. Also add LINK_DETACH operation for the BPF
syscall allowing processes with BPF link FD to force-detach, from Andrii Nakryiko.
2) Add BPF iterator for map elements and to iterate all BPF programs for efficient
in-kernel inspection, from Yonghong Song and Alexei Starovoitov.
3) Separate bpf_get_{stack,stackid}() helpers for perf events in BPF to avoid
unwinder errors, from Song Liu.
4) Allow cgroup local storage map to be shared between programs on the same
cgroup. Also extend BPF selftests with coverage, from YiFei Zhu.
5) Add BPF exception tables to ARM64 JIT in order to be able to JIT BPF_PROBE_MEM
load instructions, from Jean-Philippe Brucker.
6) Follow-up fixes on BPF socket lookup in combination with reuseport group
handling. Also add related BPF selftests, from Jakub Sitnicki.
7) Allow to use socket storage in BPF_PROG_TYPE_CGROUP_SOCK-typed programs for
socket create/release as well as bind functions, from Stanislav Fomichev.
8) Fix an info leak in xsk_getsockopt() when retrieving XDP stats via old struct
xdp_statistics, from Peilin Ye.
9) Fix PT_REGS_RC{,_CORE}() macros in libbpf for MIPS arch, from Jerry Crunchtime.
10) Extend BPF kernel test infra with skb->family and skb->{local,remote}_ip{4,6}
fields and allow user space to specify skb->dev via ifindex, from Dmitry Yakunin.
11) Fix a bpftool segfault due to missing program type name and make it more robust
to prevent them in future gaps, from Quentin Monnet.
12) Consolidate cgroup helper functions across selftests and fix a v6 localhost
resolver issue, from John Fastabend.
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
This patchset introduces some updates to mlx5 driver.
1) Jakub converts mlx5 to use the new udp tunnel infrastructure.
Starting with a hack to allow drivers to request a static configuration
of the default vxlan port, and then a patch that converts mlx5.
2) Parav implements change_carrier ndo for VF eswitch representors,
to speedup link state control of representors netdevices.
3) Alex Vesker, makes a simple update to software steering to fix an issue
with push vlan action sequence
4) Leon removes a redundant dump stack on error flow.
-----BEGIN PGP SIGNATURE-----
iQEzBAABCAAdFiEEGhZs6bAKwk/OTgTpSD+KveBX+j4FAl8oRdgACgkQSD+KveBX
+j4/LQgAkSjNzOaS7bVDzhoYL3aBQOMIzgocJUeVi7xXH8IO1uy55mNDrKBqjxbW
dy9U9VsvV5i2V2qkkQLvHVkoDSg8Buo2Uxu4OrZHOLN0KfbFrra4VvmB1CzEBix8
FICnQaZZcE7529P04TgZ8Mo9vRb5VdJFhqED5Nvegy+y8FolEsQYbjIoDBE6wa0j
Meqa/29+XCE5FzTOjbbQWizAnRZMbkxtSSreDNgeHxke9eMSO+fmwKScng63QUfl
7nfU6dW6A0d1kHhpL5RqAFOcmkpSdqYaA3SA+/8pPT9X3yOAkxE6KTKGIixpB9JX
zQt+Wkna49jJ/JfDQB5vgww5c0HjAQ==
=j0fG
-----END PGP SIGNATURE-----
Merge tag 'mlx5-updates-2020-08-03' of git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux
Saeed Mahameed says:
====================
mlx5-updates-2020-08-03
This patchset introduces some updates to mlx5 driver.
1) Jakub converts mlx5 to use the new udp tunnel infrastructure.
Starting with a hack to allow drivers to request a static configuration
of the default vxlan port, and then a patch that converts mlx5.
2) Parav implements change_carrier ndo for VF eswitch representors,
to speedup link state control of representors netdevices.
3) Alex Vesker, makes a simple update to software steering to fix an issue
with push vlan action sequence
4) Leon removes a redundant dump stack on error flow.
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
Edward Cree says:
====================
sfc: driver for EF100 family NICs, part 2
This series implements the data path and various other functionality
for Xilinx/Solarflare EF100 NICs.
Changed from v2:
* Improved error handling of design params (patch #3)
* Removed 'inline' from .c file in patch #4
* Don't report common stats to ethtool -S (patch #8)
Changed from v1:
* Fixed build errors on CONFIG_RFS_ACCEL=n (patch #5) and 32-bit
(patch #8)
* Dropped patch #10 (ethtool ops) as it's buggy and will need a
bigger rework to fix.
====================
Acked-by: Jakub Kicinski <kuba@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
We don't yet have a .sriov_configure() to create them, though.
Signed-off-by: Edward Cree <ecree@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Self-tests for event and interrupt reception and NVRAM.
Signed-off-by: Edward Cree <ecree@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
MAC stats work much the same as on EF10, with a periodic DMA to a region
specified via an MCDI.
Signed-off-by: Edward Cree <ecree@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Bring down the TX and RX queues at ifdown, so that we can then fini the
EVQs (otherwise the MC would return EBUSY because they're still in use).
Signed-off-by: Edward Cree <ecree@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Includes checksum offload and TSO, so declare those in our netdev features.
Signed-off-by: Edward Cree <ecree@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Several parts of the EF100 architecture are parameterised (to allow
varying capabilities on FPGAs according to resource constraints), and
these parameters are exposed to the driver through a TLV-encoded
region of the BAR.
For the most part we either don't care about these values at all or
just need to sanity-check them against the driver's assumptions, but
there are a number of TSO limits which we record so that we will be
able to check against them in the TX path when handling GSO skbs.
Signed-off-by: Edward Cree <ecree@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
In the future, EF100 is planned to have a credit-based scheme for
handling unsolicited events, which drivers will need to use in order
to function correctly. However, current EF100 hardware does not yet
generate unsolicited events and the credit scheme has not yet been
implemented in firmware. To prevent compatibility problems later if
the current driver is used with future firmware which does implement
it, we check for the corresponding capability flag (which that
future firmware will set), and if found, we refuse to probe.
Signed-off-by: Edward Cree <ecree@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Early in EF100 development there was a different format of event
descriptor; if the NIC is somehow running the very old firmware
which will use that format, fail the probe.
Signed-off-by: Edward Cree <ecree@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The driver calls napi_schedule_irqoff() from a context where, in RT,
hardirqs are not disabled, since the IRQ handler is force-threaded.
In the call path of this function, __raise_softirq_irqoff() is modifying
its per-CPU mask of pending softirqs that must be processed, using
or_softirq_pending(). The or_softirq_pending() function is not atomic,
but since interrupts are supposed to be disabled, nobody should be
preempting it, and the operation should be safe.
Nonetheless, when running with hardirqs on, as in the PREEMPT_RT case,
it isn't safe, and the pending softirqs mask can get corrupted,
resulting in softirqs being lost and never processed.
To have common code that works with PREEMPT_RT and with mainline Linux,
we can use plain napi_schedule() instead. The difference is that
napi_schedule() (via __napi_schedule) also calls local_irq_save, which
disables hardirqs if they aren't already. But, since they already are
disabled in non-RT, this means that in practice we don't see any
measurable difference in throughput or latency with this patch.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The driver calls napi_schedule_irqoff() from a context where, in RT,
hardirqs are not disabled, since the IRQ handler is force-threaded.
In the call path of this function, __raise_softirq_irqoff() is modifying
its per-CPU mask of pending softirqs that must be processed, using
or_softirq_pending(). The or_softirq_pending() function is not atomic,
but since interrupts are supposed to be disabled, nobody should be
preempting it, and the operation should be safe.
Nonetheless, when running with hardirqs on, as in the PREEMPT_RT case,
it isn't safe, and the pending softirqs mask can get corrupted,
resulting in softirqs being lost and never processed.
To have common code that works with PREEMPT_RT and with mainline Linux,
we can use plain napi_schedule() instead. The difference is that
napi_schedule() (via __napi_schedule) also calls local_irq_save, which
disables hardirqs if they aren't already. But, since they already are
disabled in non-RT, this means that in practice we don't see any
measurable difference in throughput or latency with this patch.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
net: dsa: loop: Preparatory changes for 802.1Q data path
Florian Fainelli says:
====================
These patches are all meant to help pave the way for a 802.1Q data path
added to the mockup driver, making it more useful than just testing for
configuration. Sending those out now since there is no real need to
wait.
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
We only support DSA_LOOP_NUM_PORTS in the switch, do not tell the DSA
core to allocate up to DSA_MAX_PORTS which is nearly the double (6 vs.
11).
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
For now we simply store the port MTU into a per-port member.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
In preparation for adding support for a mockup data path, move the
driver data structures to include/linux/dsa/loop.h such that we can
share them between net/dsa/ and drivers/net/dsa/ later on.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Allocate a 4K array of VLANs instead of limiting ourselves to just 5
which is arbitrary.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
The PVID should be per-port, this is a preliminary change to support a
802.1Q data path in the driver.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
