Add a separate pinctrl node for the UART3 CTS and RTS pins shared between
the A10s and A13.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
The uart3 pins are shared between the A10s and A13, move the pinctrl node
to the common DTSI to avoid duplication.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
The R8 is very close to the A13, but it still has a few differences,
notably a composite output, which the A13 lacks.
Add a DTSI based on the A13's to hold those differences.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Enable the otg/drc usb controller on the pcDuino1/2 board. Note
that the pcDuino1 FEX file from the vendor contains the following
information in the [usbc0] section:
usb_id_gpio = port:PH04<0><1><default><default>
usb_det_vbus_gpio = port:PH05<0><0><default><default>
usb_drv_vbus_gpio = port:PB09<1><0><default><0>
While the pcDuino2 FEX has:
usb_id_gpio = port:PH04<0><1><default><default>
usb_det_vbus_gpio = port:PH05<0><0><default><default>
usb_drv_vbus_gpio = port:PD02<1><0><default><0>
The ID pin is indeed PH4. The PD2 pin can be used to switch power
on/off for the USB Type A receptacle on pcDuino2, but it has nothing
to do with the MicroUSB OTG receptacle. The VBUS pin of the MicroUSB
receptacle is always connected to 5V according to the schematics
(both pcDuino1 and pcDuino2) and confirmed by doing some tests on
pcDuino2. The PH5 pin is just one of the pins on the J8 expansion
header and has nothing to do with USB OTG. The PB9 pin is pulled
up and connected to the N_VBUSEN pin of AXP209 PMIC, while the
VBUS pin of AXP209 only has a capacitor between it and the
ground (this pin is not used for anything else).
To sum it up. Only the ID pin (PH4) has a real use. And 5V voltage
is always served to the MicroUSB OTG receptacle no matter what is
the state of the PB9/PD2 pins.
This patch has been tested on pcDuino2 to work fine in a host role
with a USB keyboard connected via an OTG cable. It also works fine
in a device role (cdc_ether) with a regular Micro-B cable connected
to a desktop PC.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The LinkSprite pcDuino2 board is almost identical to the older
LinkSprite pcDuino1 board according to the schematic pdf files.
So we just include the existing "sun4i-a10-pcduino.dts" file and
make the necessary adjustments.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The pcDuino1 board does not use any power switches at all for its
two USB host ports and the VBUS pins are always connected to 5V.
The pcDuino2 board uses the RT9701GB power switch for its single
USB host port, but the USB_EN pin (PD2) is pulled up with a 10K
resistor. So that the USB power is still enabled by default,
resulting in the same behaviour as pcDuino1 if nobody touches
the PD2 pin. This minor difference is going to be handled in a
follow-up patch, introducing a separate dts file for pcDuino2.
The primary reason for this fix is that the current dts file
unnecessarily meddles with the PH3 and PH6 pins. But the PH6 pin
is available on the Arduino-compatible expansion header and may
have a better use for other purposes. This patch fixes the
problem and now the PH6 pin can be used with the GPIO sysfs
interface. Tested on a pcDuino2 board with a multimeter:
echo 230 > /sys/class/gpio/export
echo "out" > /sys/class/gpio/gpio230/direction
echo 0 > /sys/class/gpio/gpio230/value
echo 1 > /sys/class/gpio/gpio230/value
USB still works as expected too.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Enable the otg/drc usb controller on the Bananapi.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
sun7i-a20-bananapi.dts doesn't contain regulator nodes for the AXP209 PMU
driver, so add them to allow for voltage-scaling with cpufreq-dt. Also
add board-specific OPP to use slightly higher voltages at lower
frequencies since Kevin Hilman reported that not all BananaPi boards run
stable at the default voltages inherited by sun7i-a20.dtsi.
Signed-off-by: Timo Sigurdsson <public_timo.s@silentcreek.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Replace console with stdout-path so that we don't have to put the
console on the kernel command line.
Remove earlyprintk to allow the kernel to boot on a system even
if DEBUG_LL is configured for another system.
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Merge "Broadcom devicetree changes for v4.4" from Florian Fainelli:
This pull requests contains the following Broadcom SoCs Device Tree changes:
- Brian Norris documents the BCM7445 SoCs Power Management controllers and
hardware and updates the reference BCM7445 Device Tree with these nodes
- Florian Fainelli documents the BCM7xxx write-pairing feature in the top-level
BCM7xxx binding document
- Hauke Merthens enables the NAND controller for the Asus RT-AC87U and adds the
GPIO pin controlling the USB power supply on Netgear R6250
- Jon Mason adds support for the NorthStar Plus SoC by providing a top-level
binding document and the minimalist device tree skeleton for these SoCs
- Rafal Milecki adds support for the Netgear R7000 (BCM5301x SoC)
- Ray Jui provides a set of Cygnus DT changes that make the Device Tree clearer
and more correct with respect to how the hardware is designed. He also enables
the NAND controller on the bcm911360_entphn design, enables a bunch of
peripherals on the bcm958305k evaluation board, and adds a skeleton .dtsi file
for the touchscreen extansion board(s)
* tag 'arm-soc/for-4.4/devicetree' of http://github.com/Broadcom/stblinux:
ARM: dts: move aliases back to .dts in Cygnus
ARM: dts: fix Cygnus nand device node
ARM: dts: enable touchscreen support on Cygnus
ARM: dts: Enable NAND support on bcm911360_entphn
ARM: dts: Enable various peripherals on bcm958305k
ARM: dts: Reorder Cygnus peripherals
ARM: dts: Move all Cygnus peripherals into axi bus
ARM: dts: Put Cygnus core components under core bus
ARM: dts: Use label for device nodes in Cygnus dts
ARM: dts: consolidate aliases for Cygnus dt files
ARM: BCM5301X: Netgear R6250 add USB GPIO
Documentation: bindings: brcmstb: Document write-pairing
ARM: dts: brcmstb: add BCM7445 system PM DT nodes
Documentation: dt: brcmstb: add system PM bindings
ARM: BCM5301X: add NAND flash chip description for Asus RT-AC87U
ARM: BCM5301X: Add DT for Netgear R7000
ARM: NSP: add minimal Northstar Plus device tree
dt-bindings: Create Documentation for NSP DT bindings
system-on-module as well as the square baseboard. On top of that
a lot of mmc-related changes to improve speeds on the Cortex-A9
socs and also setting up the supplies for rk3288 mmc-controllers
for the following mmc-tuning support. And of course the dts-part
of the rk3288 power-domains.
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Merge tag 'v4.4-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Merge "Rockchip dts32 changes for 4.4" from Heiko Stuebner:
DTS changes including one new Veyron-board and the Radxa Rock2
system-on-module as well as the square baseboard. On top of that
a lot of mmc-related changes to improve speeds on the Cortex-A9
socs and also setting up the supplies for rk3288 mmc-controllers
for the following mmc-tuning support. And of course the dts-part
of the rk3288 power-domains.
* tag 'v4.4-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: add the support power-domain node on RK3288 SoCs
ARM: dts: rockchip: add rk3288-firefly iodomains
ARM: dts: rockchip: fixup firefly mmc supplies
ARM: dts: rockchip: add rk3288-popmetal iodomains
ARM: dts: rockchip: add rk3288-popmetal mmc supplies
ARM: dts: rockchip: add rk3288-popmetal board to dtb list
ARM: dts: rockchip: Add dtb for the Radxa Rock 2 Square board
ARM: dts: rockchip: support highspeed sd-cards on rk3066a boards
ARM: dts: rockchip: support highspeed sd-cards for rk3188-radxarock
ARM: dts: rockchip: Add the hdmi-ddc pinctrl settings for rk3288
ARM: dts: rockchip: Remove specific cts pullup from veyron
ARM: dts: rockchip: pull up cts lines on rk3288
ARM: dts: rockchip: add veyron-jaq board
ARM: dts: rockchip: Add support for SD/MMC on MarsBoard-RK3066
dt-bindings: add power-domain header for RK3288 SoCs
Explicitly use the SoC specific compatible strings in kirkwood.dtsi and
dove.dtsi, so that the crypto devices have access to the TDMA feature
when attached to the new CESA driver.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The new bindings split the crypto and sram node in two separate devices.
Modify the existing crypto nodes to match the new representation.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Define the crypto SRAM ranges so that the resources referenced by the
sa-sram node can be properly extracted from the DT.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Add crypto related nodes in armada-38x.dtsi.
[gregory.clement@free-electrons.com: Fix typo for compatible string
armada38x instead of armada375]
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The SCP firmware on Juno provides access to SoC sensors via the
SCPI. Add the sensor nodes to the device tree to enable this support.
Signed-off-by: Punit Agrawal <punit.agrawal@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
This patch adds the CPU clocks so that the CPU DVFS can be enabled.
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
Cc: Jon Medhurst (Tixy) <tixy@linaro.org>
This patch adds CPU topology on Juno. It will be useful for ther other
IP blocks depending on this topology.
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
Cc: Jon Medhurst (Tixy) <tixy@linaro.org>
This patch adds support for the MHU mailbox peripheral used on Juno by
application processors to communicate with remote SCP handling most of
the CPU/system power management. It also adds the SRAM reserving the
shared memory and SCPI message protocol using that shared memory.
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
Cc: Jon Medhurst (Tixy) <tixy@linaro.org>
Define the Porter board dependent part of the VIN0 device node.
Add the device node for Analog Devices ADV7180 video decoder to I2C2 bus.
Add the necessary subnodes to interconnect VIN0 and ADV7180 devices.
This patch is analogous to the commit 8d62f4f753 ("ARM: shmobile:
henninger: add VIN0/ADV7180 DT support") as there are no differences
between the boards in this respect.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the Porter board dependent part of the I2C2 device node.
This patch is analogous to the commit 29a647c396 ("ARM: shmobile:
henninger: add I2C2 DT support") as there are no differences between
the boards in this respect.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add device tree binding documentation for the Qualcom Shared Memory
Manager.
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Andy Gross <agross@codeaurora.org>
We can add more domains node in the future.
This patch add the needed clocks into power-controller.
As the discuess about all the device clocks being listed in
the power-domains itself.
There are several reasons as follows:
Firstly, the clocks need be turned off to save power when
the system enter the suspend state. So we need to enumerate
the clocks in the dts. In order to power domain can turn on and off.
Secondly, the reset-circuit should reset be synchronous on RK3288,
then sync revoked. So we need to enable clocks of all devices.
In other words, we have to enable the clocks before you operate them
if all the device clocks are included in someone domians.
Thirdly, as the chip designs for PM hardhare. we need turn on the noc
clocks, if we are operating the "pd_vio" domain to enter the idle status.
The device's clock be included in domains that needed turn on if do that.
The clocks in the dts are needed to enable before you want to happy work.
At the moment, This patch is very good work for PM hardware.
Also, we can add these clocks in the future if we have some hidden clocks.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Reviewed-by: Michael Turquette <mturquette@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
[add necessary power-domain properties to keep drm subsys working]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add the iodomains node and reference the correct regulator for each
domain. This also includes adding the currently unused dvp regulators.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Fix some incorrect references to mmc regulators.
vccio_wl for example is the io-voltage supply not the core supply
of the wifi module itself, which is vbat_wl instead.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add the iodomains node and reference the correct regulator for each
domain. This also includes adding the currently unused dvp regulators
and fixing up two regulators to follow the naming in the schematics.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The popmetal board was not included in the list of Rockchip boards,
so was only built when explicitly called with make rk3288-popmetal.dtb
but not in a generic make dtbs, so add the missing entry.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The Radxa Rock 2 Square board is a combination of the Radxa Rock 2 SoM
with the Square baseboard. Add a dtsi for the SoM which can be included
into the dts for the various baseboards (e.g. full and square) and a dts
for the square board.
Currently supported are serial console, wired networking, hdmi output,
eMMC and SD storage and USB.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add cap-sd-highspeed and cap-mmc-highspeed for rk3066a-bqcurie2
and rk3066a-rayeager boards to make sd cards run faster.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add cap-sd-highspeed and cap-mmc-highspeed for rk3188-radxarock
board to make sd cards running faster.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The pins for i2c5 can either be configured as "I2C5" which means that
they're controlled by the normal RK3288 I2C controller or as "EDP / HDMI
I2C". It's unclear why EDP is referenced here since apparently setting
the mux to this position enables I2C communication using the dw_hdmi
block with a patch like <https://patchwork.kernel.org/patch/7098101/>.
There appear to be some reasons why using the builtin I2C controller in
dw_hdmi is better than using the normal RK3288 I2C controller, so boards
based on rk3288 might eventually want to use this pinmux if it's known
to work.
Once driver support in dw_hdmi lands, boards would use this by selecting
this pinctrl for the HDMI block and then _not_ specifying a ddc-i2c-bus
and _not_ setting the status to "okay" for i2c5 (which uses the same
pins).
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
With the previous patch ("rk3288: pull up cts lines") this is redundant,
I sent that patch for the same reason this existed here, so the lines don't
wiggle randomly when disconnected.
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The flow control lines from a user accessible UART are optional,
the user might not have anything connected to those pins.
In order to prevent random interrupts happening and noise affecting
the cts pin should be pulled up.
Note that the default state for that pin on the rk3288 is pulled up,
so this patch merely restores them.
This is similar to what we're already doing with the RX pin,
so it should be safe. At worst it might be a slightly higher power usage
(through ~50 kohms) when the cts is low.
Suggested-by: Neil Hendin <nhendin@chromium.org>
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
a.k.a. Haier Chromebook 11, and others
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This enables SDMMC0 on the board and gives a basic support for SD cards.
Signed-off-by: Romain Perier <romain.perier@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Tronfy is an emerging brand in China specializing in Home Theater
solutions for the normal consumers.
Signed-off-by: Carlo Caione <carlo@endlessm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Add missing CPG/MSTP Clock Domain for sound on r8a779[01] SoCs
* Tidy up SCI resource region on r8a779[018] SoCs
* Add pinmux for iic0 on Lager board
* Use CCF for audio clock on Lager and Koelsch boards
* Use serial0 and 1 as serial ports on Marzen board
* Use adxl345-specific compatible property for KZM9G board
* Document compat string for Silk board
* Enable GPIO, I2C, PCI, QSPI, USB PHY and HS, and VIN support on r8a7794/Silk
* Add initial support for r8a7791/porter
* Add common file for AA121TD01 panel
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Merge tag 'renesas-dt-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Merge "Renesas ARM Based SoC DT Updates for v4.4" from Simon Horman:
* Add missing CPG/MSTP Clock Domain for sound on r8a779[01] SoCs
* Tidy up SCI resource region on r8a779[018] SoCs
* Add pinmux for iic0 on Lager board
* Use CCF for audio clock on Lager and Koelsch boards
* Use serial0 and 1 as serial ports on Marzen board
* Use adxl345-specific compatible property for KZM9G board
* Document compat string for Silk board
* Enable GPIO, I2C, PCI, QSPI, USB PHY and HS, and VIN support on r8a7794/Silk
* Add initial support for r8a7791/porter
* Add common file for AA121TD01 panel
* tag 'renesas-dt-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (28 commits)
ARM: shmobile: porter: add Ether DT support
ARM: shmobile: fix SILK board name
ARM: shmobile: r8a7794: add HS-USB DT support
ARM: shmobile: dts: Add common file for AA121TD01 panel
ARM: shmobile: r8a7794: link PCI USB devices to USB PHY
ARM: shmobile: silk: enable USB PHY
ARM: shmobile: r8a7794: add USB PHY DT support
ARM: shmobile: porter: initial device tree
ARM: shmobile: add Porter board DT bindings
ARM: shmobile: silk: enable internal PCI
ARM: shmobile: r8a7794: add internal PCI bridge nodes
ARM: shmobile: r8a7790: lager: add pinmux for iic0
ARM: shmobile: r8a7778: tidyup SSI resource region
ARM: shmobile: r8a7791: tidyup SSI resource region
ARM: shmobile: r8a7790: tidyup SSI resource region
ARM: shmobile: lager: use CCF for audio clock
ARM: shmobile: koelsch: use CCF for audio clock
ARM: shmobile: silk: add VIN0/ADV7180 DT support
ARM: shmobile: r8a7794: add VIN DT support
ARM: shmobile: silk: add I2C1 DT support
...
Enable SATA0 device for the Porter board.
This patch is analogous to the commit 5a62ec5700 ("ARM: shmobile:
henninger: enable SATA0") as there are no differences between the boards
in this respect.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The board DTS are using numeric values instead of the defined GPIO
constanst to express polarity, use them to make the DTS more clear.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
The board DTS are using numeric values instead of the defined GPIO
constanst to express polarity, use them to make the DTS more clear.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
The board DTS are using numeric values instead of the defined GPIO
constanst to express polarity, use them to make the DTS more clear.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
The board DTS are using numeric values instead of the defined GPIO
constanst to express polarity, use them to make the DTS more clear.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
