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12 Commits

Author SHA1 Message Date
Tom St Denis
5e2e211995 drm/amd/amdgpu: add SI defines/registers 
Add missing gca MMIO registers and defines necessary for the
next patch which re-works a lot of gfx v6 to use the new SI
headers.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-11-11 10:21:08 -05:00
Tom St Denis
de2bdb3dcf drm/amd/amdgpu: Introduction of SI registers (v2) 
This introduces the SI registers in the amdgpu
driver style.

v2: squash duplicates fix

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-11-11 10:21:07 -05:00
Rex Zhu
9a88d22bb0 drm/amd/powerplay: add shared definitions for di/dt feature. 
v1: delete some comflict definitions between polaris and fiji.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 15:06:22 -04:00
Ken Wang
a334bc7df0 drm/amdgpu: remove gfx8 registers that vary between asics 
those register mask definitions are different in polaris compare to
former gfx 8 gpus, so remove them from misusing.

Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 15:06:21 -04:00
Tom St Denis
78f73bf03c drm/amdgpu/gfx80: Add QUICK_PG bit to GFX header and use it. 
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-07-07 14:51:19 -04:00
Flora Cui
d7120b8f22 drm/amdgpu: add mmRLC_CGCG_CGLS_CTRL_3D & mmRLC_CGCG_RAMP_CTRL_3D 
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-05-04 20:25:02 -04:00
Flora Cui
b9c743b85d drm/amdgpu/gfx7: add MTYPE definition 
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
 2016-03-17 13:15:43 -04:00
Alex Deucher
aa5e24e5f8 drm/amd: add new gfx8 register definitions for EDC 
EDC is a RAS feature for on chip memory.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-12-02 15:54:18 -05:00
Alex Deucher
6bd53c4125 drm/amdgpu: add GFX 8.1 register headers 
Minor differences compared to GFX 8.0

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-10-28 16:49:03 -04:00
Alex Deucher
675892a184 drm/amdgpu: add GCA 8.0 register headers 
These are register headers for the GCA (Graphics and Compute Array)
block on the GPU.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-06-03 21:02:56 -04:00
Alex Deucher
46d5a27269 drm/amdgpu: add GCA 7.2 register headers 
These are register headers for the GCA (Graphics and Compute Array)
block on the GPU.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-06-03 21:02:55 -04:00
Alex Deucher
9f24d8ce25 drm/amdgpu: add GCA 7.0 register headers 
These are register headers for the GCA (Graphics and Compute Array)
block on the GPU.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-06-03 21:02:55 -04:00