forked from Minki/linux
ad40bdafb4
7387 Commits
| Author | SHA1 | Message | Date | |
|---|---|---|---|---|
Jason A. Donenfeld
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ad40bdafb4 |
arm64: support __int128 with clang
Commit
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Mark Rutland
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9478f1927e |
arm64: only advance singlestep for user instruction traps
Our arm64_skip_faulting_instruction() helper advances the userspace singlestep state machine, but this is also called by the kernel BRK handler, as used for WARN*(). Thus, if we happen to hit a WARN*() while the user singlestep state machine is in the active-no-pending state, we'll advance to the active-pending state without having executed a user instruction, and will take a step exception earlier than expected when we return to userspace. Let's fix this by only advancing the state machine when skipping a user instruction. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Cc: Andrey Konovalov <andreyknvl@google.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> |
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Kim Phillips
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ed231ae384 |
arm64/kernel: rename module_emit_adrp_veneer->module_emit_veneer_for_adrp
Commit |
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Mark Rutland
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59275a0c03 |
arm64: ptrace: remove addr_limit manipulation
We transiently switch to KERNEL_DS in compat_ptrace_gethbpregs() and compat_ptrace_sethbpregs(), but in either case this is pointless as we don't perform any uaccess during this window. let's rip out the redundant addr_limit manipulation. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Mark Rutland <mark.rutland@arm.com> Cc: Will Deacon <will.deacon@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> |
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Shaokun Zhang
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907e21c15c |
arm64: mm: drop addr parameter from sync icache and dcache
The addr parameter isn't used for anything. Let's simplify and get rid of it, like arm. Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com> Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com> Signed-off-by: Will Deacon <will.deacon@arm.com> |
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Mark Rutland
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71c751f2a4 |
arm64: add sentinel to kpti_safe_list
We're missing a sentinel entry in kpti_safe_list. Thus is_midr_in_range_list()
can walk past the end of kpti_safe_list. Depending on the contents of memory,
this could erroneously match a CPU's MIDR, cause a data abort, or other bad
outcomes.
Add the sentinel entry to avoid this.
Fixes:
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Mark Rutland
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b2d71b3cda |
arm64: signal: don't force known signals to SIGKILL
Since commit: |
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Mark Rutland
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800cb2e553 |
arm64: kasan: avoid pfn_to_nid() before page array is initialized
In arm64's kasan_init(), we use pfn_to_nid() to find the NUMA node a span of memory is in, hoping to allocate shadow from the same NUMA node. However, at this point, the page array has not been initialized, and thus this is bogus. Since commit: |
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Linus Torvalds
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ca71b3ba4c |
Kbuild updates for v4.17 (2nd)
- pass HOSTLDFLAGS when compiling single .c host programs - build genksyms lexer and parser files instead of using shipped versions - rename *-asn1.[ch] to *.asn1.[ch] for suffix consistency - let the top .gitignore globally ignore artifacts generated by flex, bison, and asn1_compiler - let the top Makefile globally clean artifacts generated by flex, bison, and asn1_compiler - use safer .SECONDARY marker instead of .PRECIOUS to prevent intermediate files from being removed - support -fmacro-prefix-map option to make __FILE__ a relative path - fix # escaping to prepare for the future GNU Make release - clean up deb-pkg by using debian tools instead of handrolled source/changes generation - improve rpm-pkg portability by supporting kernel-install as a fallback of new-kernel-pkg - extend Kconfig listnewconfig target to provide more information -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJa0krLAAoJED2LAQed4NsGyCAP/3Vsb8A4sea7sE3LV6/aFUJp WcAm6PXcip1MXy7GI5yxFciwen3Z3ghQUer7fJKDcHR5c4mRSfKaqWp+TLHd6uux 7I4pV0FNx2PapcPu5T7wNZHN96p3xZC0Z66sq9BCZ/+gNyYmZLIDcBUSIOEk0nzJ IsvD46zy6R6KtEnycShKVscg4JyPXJIw1UBqsPDEFHg5l16ARkghND7e5zTW62Fi 2MqQxNXAksIKpxxoxPH/fIcNp1kFKVxYBH2CW4LQtOjC3GmrozdeV5PUc7yTezPc dpqOuEcIAbMH91bkvhhF+ZBi34YrxRoT4S8B3G9iCXRz+2LRZZaitqO4dAH8Kjbn 0KjkqzNc5TosJXQ8RPTcQlRBi+JmE1bHxICvTx3XNJcqJMqIH0vs3ez/LJKOwhB4 DbAROoxQNfVcOdouHcx2EuCSdHn24BEyzaGFhi04LACpbRLxr8IJS7hSGXRloBYp K3ydRvG/dCZjFRTS+xWWSi3Nzjih2mCctQlH3D4nf4M3vtCX+/k5B9IMEYFfHlvL KoNlK4/1vP/dAJZj0iOqd2ksCA1G6iLoHrFp3E5pdtmb4sVe2Ez3gMt+pxz3htR9 XvjuHOzkWE9eiihs1NsFgQuyP/o3UmNKpDDW0irQ06IFEPXkA/y1mVmeTU3qtrII ZDiwGozIkMMEy/MLkcjE =tD6R -----END PGP SIGNATURE----- Merge tag 'kbuild-v4.17-2' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild Pull more Kbuild updates from Masahiro Yamada: - pass HOSTLDFLAGS when compiling single .c host programs - build genksyms lexer and parser files instead of using shipped versions - rename *-asn1.[ch] to *.asn1.[ch] for suffix consistency - let the top .gitignore globally ignore artifacts generated by flex, bison, and asn1_compiler - let the top Makefile globally clean artifacts generated by flex, bison, and asn1_compiler - use safer .SECONDARY marker instead of .PRECIOUS to prevent intermediate files from being removed - support -fmacro-prefix-map option to make __FILE__ a relative path - fix # escaping to prepare for the future GNU Make release - clean up deb-pkg by using debian tools instead of handrolled source/changes generation - improve rpm-pkg portability by supporting kernel-install as a fallback of new-kernel-pkg - extend Kconfig listnewconfig target to provide more information * tag 'kbuild-v4.17-2' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild: kconfig: extend output of 'listnewconfig' kbuild: rpm-pkg: use kernel-install as a fallback for new-kernel-pkg Kbuild: fix # escaping in .cmd files for future Make kbuild: deb-pkg: split generating packaging and build kbuild: use -fmacro-prefix-map to make __FILE__ a relative path kbuild: mark $(targets) as .SECONDARY and remove .PRECIOUS markers kbuild: rename *-asn1.[ch] to *.asn1.[ch] kbuild: clean up *-asn1.[ch] patterns from top-level Makefile .gitignore: move *-asn1.[ch] patterns to the top-level .gitignore kbuild: add %.dtb.S and %.dtb to 'targets' automatically kbuild: add %.lex.c and %.tab.[ch] to 'targets' automatically genksyms: generate lexer and parser during build instead of shipping kbuild: clean up *.lex.c and *.tab.[ch] patterns from top-level Makefile .gitignore: move *.lex.c *.tab.[ch] patterns to the top-level .gitignore kbuild: use HOSTLDFLAGS for single .c executables |
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Linus Torvalds
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e4e57f20fa |
Additional arm64 updates for 4.17
A few late updates to address some issues arising from conflicts with
other trees:
- Removal of Qualcomm-specific Spectre-v2 mitigation in favour of the
generic SMCCC-based firmware call
- Fix EL2 hardening capability checking, which was bodged to reduce
conflicts with the KVM tree
- Add some currently unused assembler macros for managing SIMD registers
which will be used by some crypto code in the next merge window
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Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
Pull more arm64 updates from Will Deacon:
"A few late updates to address some issues arising from conflicts with
other trees:
- Removal of Qualcomm-specific Spectre-v2 mitigation in favour of the
generic SMCCC-based firmware call
- Fix EL2 hardening capability checking, which was bodged to reduce
conflicts with the KVM tree
- Add some currently unused assembler macros for managing SIMD
registers which will be used by some crypto code in the next merge
window"
* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
arm64: assembler: add macros to conditionally yield the NEON under PREEMPT
arm64: assembler: add utility macros to push/pop stack frames
arm64: Move the content of bpi.S to hyp-entry.S
arm64: Get rid of __smccc_workaround_1_hvc_*
arm64: capabilities: Rework EL2 vector hardening entry
arm64: KVM: Use SMCCC_ARCH_WORKAROUND_1 for Falkor BP hardening
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Ard Biesheuvel
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24534b3511 |
arm64: assembler: add macros to conditionally yield the NEON under PREEMPT
Add support macros to conditionally yield the NEON (and thus the CPU) that may be called from the assembler code. In some cases, yielding the NEON involves saving and restoring a non trivial amount of context (especially in the CRC folding algorithms), and so the macro is split into three, and the code in between is only executed when the yield path is taken, allowing the context to be preserved. The third macro takes an optional label argument that marks the resume path after a yield has been performed. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Dave Martin <Dave.Martin@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> |
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Ard Biesheuvel
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0f468e221c |
arm64: assembler: add utility macros to push/pop stack frames
We are going to add code to all the NEON crypto routines that will turn them into non-leaf functions, so we need to manage the stack frames. To make this less tedious and error prone, add some macros that take the number of callee saved registers to preserve and the extra size to allocate in the stack frame (for locals) and emit the ldp/stp sequences. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Dave Martin <Dave.Martin@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> |
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Marc Zyngier
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e8b22d0f45 |
arm64: Move the content of bpi.S to hyp-entry.S
bpi.S was introduced as we were starting to build the Spectre v2 mitigation framework, and it was rather unclear that it would become strictly KVM specific. Now that the picture is a lot clearer, let's move the content of that file to hyp-entry.S, where it actually belong. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> |
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Marc Zyngier
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22765f30db |
arm64: Get rid of __smccc_workaround_1_hvc_*
The very existence of __smccc_workaround_1_hvc_* is a thinko, as KVM will never use a HVC call to perform the branch prediction invalidation. Even as a nested hypervisor, it would use an SMC instruction. Let's get rid of it. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> |
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Marc Zyngier
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8892b71885 |
arm64: capabilities: Rework EL2 vector hardening entry
Since
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Shanker Donthineni
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4bc352ffb3 |
arm64: KVM: Use SMCCC_ARCH_WORKAROUND_1 for Falkor BP hardening
The function SMCCC_ARCH_WORKAROUND_1 was introduced as part of SMC V1.1 Calling Convention to mitigate CVE-2017-5715. This patch uses the standard call SMCCC_ARCH_WORKAROUND_1 for Falkor chips instead of Silicon provider service ID 0xC2001700. Cc: <stable@vger.kernel.org> # 4.14+ Signed-off-by: Shanker Donthineni <shankerd@codeaurora.org> [maz: reworked errata framework integration] Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> |
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Matthew Wilcox
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427c896f26 |
arm64: turn flush_dcache_mmap_lock into a no-op
ARM64 doesn't walk the VMA tree in its flush_dcache_page() implementation, so has no need to take the tree_lock. Link: http://lkml.kernel.org/r/20180313132639.17387-4-willy@infradead.org Signed-off-by: Matthew Wilcox <mawilcox@microsoft.com> Reviewed-by: Will Deacon <will.deacon@arm.com> Cc: Darrick J. Wong <darrick.wong@oracle.com> Cc: Dave Chinner <david@fromorbit.com> Cc: Jeff Layton <jlayton@kernel.org> Cc: Ryusuke Konishi <konishi.ryusuke@lab.ntt.co.jp> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org> |
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Masahiro Yamada
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2dd8a62c64 |
linux/const.h: move UL() macro to include/linux/const.h
ARM, ARM64 and UniCore32 duplicate the definition of UL(): #define UL(x) _AC(x, UL) This is not actually arch-specific, so it will be useful to move it to a common header. Currently, we only have the uapi variant for linux/const.h, so I am creating include/linux/const.h. I also added _UL(), _ULL() and ULL() because _AC() is mostly used in the form either _AC(..., UL) or _AC(..., ULL). I expect they will be replaced in follow-up cleanups. The underscore-prefixed ones should be used for exported headers. Link: http://lkml.kernel.org/r/1519301715-31798-4-git-send-email-yamada.masahiro@socionext.com Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Russell King <rmk+kernel@armlinux.org.uk> Cc: David Howells <dhowells@redhat.com> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Will Deacon <will.deacon@arm.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org> |
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Kees Cook
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8f2af155b5 |
exec: pass stack rlimit into mm layout functions
Patch series "exec: Pin stack limit during exec". Attempts to solve problems with the stack limit changing during exec continue to be frustrated[1][2]. In addition to the specific issues around the Stack Clash family of flaws, Andy Lutomirski pointed out[3] other places during exec where the stack limit is used and is assumed to be unchanging. Given the many places it gets used and the fact that it can be manipulated/raced via setrlimit() and prlimit(), I think the only way to handle this is to move away from the "current" view of the stack limit and instead attach it to the bprm, and plumb this down into the functions that need to know the stack limits. This series implements the approach. [1] |
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Linus Torvalds
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d8312a3f61 |
ARM:
- VHE optimizations
- EL2 address space randomization
- speculative execution mitigations ("variant 3a", aka execution past invalid
privilege register access)
- bugfixes and cleanups
PPC:
- improvements for the radix page fault handler for HV KVM on POWER9
s390:
- more kvm stat counters
- virtio gpu plumbing
- documentation
- facilities improvements
x86:
- support for VMware magic I/O port and pseudo-PMCs
- AMD pause loop exiting
- support for AMD core performance extensions
- support for synchronous register access
- expose nVMX capabilities to userspace
- support for Hyper-V signaling via eventfd
- use Enlightened VMCS when running on Hyper-V
- allow userspace to disable MWAIT/HLT/PAUSE vmexits
- usual roundup of optimizations and nested virtualization bugfixes
Generic:
- API selftest infrastructure (though the only tests are for x86 as of now)
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Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm
Pull kvm updates from Paolo Bonzini:
"ARM:
- VHE optimizations
- EL2 address space randomization
- speculative execution mitigations ("variant 3a", aka execution past
invalid privilege register access)
- bugfixes and cleanups
PPC:
- improvements for the radix page fault handler for HV KVM on POWER9
s390:
- more kvm stat counters
- virtio gpu plumbing
- documentation
- facilities improvements
x86:
- support for VMware magic I/O port and pseudo-PMCs
- AMD pause loop exiting
- support for AMD core performance extensions
- support for synchronous register access
- expose nVMX capabilities to userspace
- support for Hyper-V signaling via eventfd
- use Enlightened VMCS when running on Hyper-V
- allow userspace to disable MWAIT/HLT/PAUSE vmexits
- usual roundup of optimizations and nested virtualization bugfixes
Generic:
- API selftest infrastructure (though the only tests are for x86 as
of now)"
* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (174 commits)
kvm: x86: fix a prototype warning
kvm: selftests: add sync_regs_test
kvm: selftests: add API testing infrastructure
kvm: x86: fix a compile warning
KVM: X86: Add Force Emulation Prefix for "emulate the next instruction"
KVM: X86: Introduce handle_ud()
KVM: vmx: unify adjacent #ifdefs
x86: kvm: hide the unused 'cpu' variable
KVM: VMX: remove bogus WARN_ON in handle_ept_misconfig
Revert "KVM: X86: Fix SMRAM accessing even if VM is shutdown"
kvm: Add emulation for movups/movupd
KVM: VMX: raise internal error for exception during invalid protected mode state
KVM: nVMX: Optimization: Dont set KVM_REQ_EVENT when VMExit with nested_run_pending
KVM: nVMX: Require immediate-exit when event reinjected to L2 and L1 event pending
KVM: x86: Fix misleading comments on handling pending exceptions
KVM: x86: Rename interrupt.pending to interrupt.injected
KVM: VMX: No need to clear pending NMI/interrupt on inject realmode interrupt
x86/kvm: use Enlightened VMCS when running on Hyper-V
x86/hyper-v: detect nested features
x86/hyper-v: define struct hv_enlightened_vmcs and clean field bits
...
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Masahiro Yamada
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54a702f705 |
kbuild: mark $(targets) as .SECONDARY and remove .PRECIOUS markers
GNU Make automatically deletes intermediate files that are updated
in a chain of pattern rules.
Example 1) %.dtb.o <- %.dtb.S <- %.dtb <- %.dts
Example 2) %.o <- %.c <- %.c_shipped
A couple of makefiles mark such targets as .PRECIOUS to prevent Make
from deleting them, but the correct way is to use .SECONDARY.
.SECONDARY
Prerequisites of this special target are treated as intermediate
files but are never automatically deleted.
.PRECIOUS
When make is interrupted during execution, it may delete the target
file it is updating if the file was modified since make started.
If you mark the file as precious, make will never delete the file
if interrupted.
Both can avoid deletion of intermediate files, but the difference is
the behavior when Make is interrupted; .SECONDARY deletes the target,
but .PRECIOUS does not.
The use of .PRECIOUS is relatively rare since we do not want to keep
partially constructed (possibly corrupted) targets.
Another difference is that .PRECIOUS works with pattern rules whereas
.SECONDARY does not.
.PRECIOUS: $(obj)/%.lex.c
works, but
.SECONDARY: $(obj)/%.lex.c
has no effect. However, for the reason above, I do not want to use
.PRECIOUS which could cause obscure build breakage.
The targets specified as .SECONDARY must be explicit. $(targets)
contains all targets that need to include .*.cmd files. So, the
intermediates you want to keep are mostly in there. Therefore, mark
$(targets) as .SECONDARY. It means primary targets are also marked
as .SECONDARY, but I do not see any drawback for this.
I replaced some .SECONDARY / .PRECIOUS markers with 'targets'. This
will make Kbuild search for non-existing .*.cmd files, but this is
not a noticeable performance issue.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Frank Rowand <frowand.list@gmail.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
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Linus Torvalds
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167569343f |
ARM: SoC platform updates for 4.17
This release brings up a new platform based on the old ARM9 core: the Nuvoton NPCM is used as a baseboard management controller, competing with the better known ASpeed AST2xx series. Another important change is the addition of ARMv7-A based chips in mach-stm32. The older parts in this platform are ARMv7-M based microcontrollers, now they are expanding to general-purpose workloads. The other changes are the usual defconfig updates to enable additional drivers, lesser bugfixes. The largest updates as often are the ongoing OMAP cleanups, but we also have a number of changes for the older PXA and davinci platforms this time. For the Renesas shmobile/r-car platform, some new infrastructure is needed to make the watchdog work correctly. Supporting Multiprocessing on Allwinner A80 required a significant amount of new code, but is not doing anything unexpected. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJaxibSAAoJEGCrR//JCVInPwcP/2ZdLMXXXaJBM+rCRPhT+vR1 FsKqcTCC5RHbVcKW+N54nmlsqofy2GadlmyfOdrFXtbf+Sm2dRNsDrHDOhvoPp37 fwBd0wGw0PLjNE8SEPp/ldtFe11Dbg0WGBzJ4PAPJgt1W4hvW8//VzVW1XsiRrVc 9SlZ66DwR95UQ5pwy+dfE8f9A/WW4XaMq0UHQ3/deQ/Te/64b/C6CJtT3W73WAlR 83UHgkwq3WvI+hhvg4QX9H0Q6dcK2JLUWsAB0xnZP8Q8t30NdDpl61uZL0A4Mh9Y 38lPhUjPUyUpsGrOttmMEQNzbAk4m/nzQxByYYmhkx3x+mlhjdA9KNavxDYVxXN2 1tzz62wst8pLePqVt2UsFqsaruJGMuTIooOdc5iCjG1c2N2kQGdBsuOvLjYu9kV6 XPTfvvAYkMo9rC0MbdPuobG+h/WrYHuc9SD2Mnt+kNaw1yJL08fWENjSuwP7kheb 2A5jdAFNrGqgcrWMsQOw8eYYC7z7WojkLq0kHrBbwIlVD7KIZurv2fm/iVo4+xPH Gig5HuehMUtVYAf+Q1KWFlqS01fXMErt2pDGI5f1mNumXCB5kdWoSKbU8lOg03f8 ZqBHlfly+QDMOx0qfkxFX+phHPWHTOC+45yHK2Xq+n9urXmQbzYZxTzq5zCu6jcm 4yH0jaykoHODGNLIt50f =HD9V -----END PGP SIGNATURE----- Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform updates from Arnd Bergmann: "This release brings up a new platform based on the old ARM9 core: the Nuvoton NPCM is used as a baseboard management controller, competing with the better known ASpeed AST2xx series. Another important change is the addition of ARMv7-A based chips in mach-stm32. The older parts in this platform are ARMv7-M based microcontrollers, now they are expanding to general-purpose workloads. The other changes are the usual defconfig updates to enable additional drivers, lesser bugfixes. The largest updates as often are the ongoing OMAP cleanups, but we also have a number of changes for the older PXA and davinci platforms this time. For the Renesas shmobile/r-car platform, some new infrastructure is needed to make the watchdog work correctly. Supporting Multiprocessing on Allwinner A80 required a significant amount of new code, but is not doing anything unexpected" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (179 commits) arm: npcm: modify configuration for the NPCM7xx BMC. MAINTAINERS: update entry for ARM/berlin ARM: omap2: fix am43xx build without L2X0 ARM: davinci: da8xx: simplify CFGCHIP regmap_config ARM: davinci: da8xx: fix oops in USB PHY driver due to stack allocated platform_data ARM: multi_v7_defconfig: add NXP FlexCAN IP support ARM: multi_v7_defconfig: enable thermal driver for i.MX devices ARM: multi_v7_defconfig: add RN5T618 PMIC family support ARM: multi_v7_defconfig: add NXP graphics drivers ARM: multi_v7_defconfig: add GPMI NAND controller support ARM: multi_v7_defconfig: add OCOTP driver for NXP SoCs ARM: multi_v7_defconfig: configure I2C driver built-in arm64: defconfig: add CONFIG_UNIPHIER_THERMAL and CONFIG_SNI_AVE ARM: imx: fix imx6sll-only build ARM: imx: select ARM_CPU_SUSPEND for CPU_IDLE as well ARM: mxs_defconfig: Re-sync defconfig ARM: imx_v4_v5_defconfig: Use the generic fsl-asoc-card driver ARM: imx_v4_v5_defconfig: Re-sync defconfig arm64: defconfig: enable stmmac ethernet to defconfig ARM: EXYNOS: Simplify code in coupled CPU idle hot path ... |
||
|
Linus Torvalds
|
b240b419db |
ARM: SoC device tree updates for 4.17
This is the usual set of changes for device trees, with over 700
non-merged changesets. There is an ongoing set of dtc warning fixes and
the usual bugfixes, cleanups and added device support.
The most interesting bit as usual is support for new machines listed
below:
- The Allwinner H6 makes its debut with the Pine-H64 board, and we get
two new machines based on its older siblings: the H5 based OrangePi
Zero+ and the A64 based Teres-I Laptop from Olimex. On the 32-bit side,
we add The Olimex som204 based on Allwinner A20, and the Banana Pi M2
Zero development board (based on H2).
- NVIDIA adds support for Tegra194 aka "Xavier", plus their p2972
development board and p2888 CPU module.
- The Nuvoton npcm750 is a BMC that was newly added, for now we only
support running on the evaluation board.
- STmicroelectronics stm32 gains support for the stm32mp157c and two
evaluation boards.
- The Toradex Colibri board family grows a few members based on the
i.MX6ULL variant.
- The Advantec DMS-BA16 is a Qseven module using the NXP i.MX6
family of chips.
- The Phytec phyBOARD Mira is a family of industrial boards based on
i.MX6. For now, four models get added.
- TI am335x based PDU-001 is an industrial embedded machine used for
traffic monitoring
- The Aspeed platform now supports running on the BMC on the Qualcomm
Centriq 2400 server
- Samsung Exynos4 based Galaxy S3 is a family of mobile phones Qualcomm
msm8974 based Galaxy S5 is a rather different phone made by the same
company.
- The Xilinx Zynq and ZynqMP platforms now gained a lot of dts file
for the various boards made by Xilinx themselves, as well as the
Digilent Zybo Z7.
- The ARM Versatile family now supports the "IB2" interface board.
- The Renesas H2 based "Stout" and the H3 based Salvator-X are more
evaluation boards named after a kind of beer, as most of them are.
The r8a77980 (V3H) based "Condor" apparently doesn't follow that
tradition. ;-)
- ROC-RK3328-CC is a simple developement board from the Libre Computer
Project, based on the Rockchips RK3328 SoC
- Haiku is another development board plus Qseven module based on Rockchips
RK3368 and made by Theobroma Systems.
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC device tree updates from Arnd Bergmann:
"This is the usual set of changes for device trees, with over 700
non-merged changesets. There is an ongoing set of dtc warning fixes
and the usual bugfixes, cleanups and added device support.
The most interesting bit as usual is support for new machines listed
below:
- The Allwinner H6 makes its debut with the Pine-H64 board, and we
get two new machines based on its older siblings: the H5 based
OrangePi Zero+ and the A64 based Teres-I Laptop from Olimex. On the
32-bit side, we add The Olimex som204 based on Allwinner A20, and
the Banana Pi M2 Zero development board (based on H2).
- NVIDIA adds support for Tegra194 aka "Xavier", plus their p2972
development board and p2888 CPU module.
- The Nuvoton npcm750 is a BMC that was newly added, for now we only
support running on the evaluation board.
- STmicroelectronics stm32 gains support for the stm32mp157c and two
evaluation boards.
- The Toradex Colibri board family grows a few members based on the
i.MX6ULL variant.
- The Advantec DMS-BA16 is a Qseven module using the NXP i.MX6 family
of chips.
- The Phytec phyBOARD Mira is a family of industrial boards based on
i.MX6. For now, four models get added.
- TI am335x based PDU-001 is an industrial embedded machine used for
traffic monitoring
- The Aspeed platform now supports running on the BMC on the Qualcomm
Centriq 2400 server
- Samsung Exynos4 based Galaxy S3 is a family of mobile phones
Qualcomm msm8974 based Galaxy S5 is a rather different phone made
by the same company.
- The Xilinx Zynq and ZynqMP platforms now gained a lot of dts file
for the various boards made by Xilinx themselves, as well as the
Digilent Zybo Z7.
- The ARM Versatile family now supports the "IB2" interface board.
- The Renesas H2 based "Stout" and the H3 based Salvator-X are more
evaluation boards named after a kind of beer, as most of them are.
The r8a77980 (V3H) based "Condor" apparently doesn't follow that
tradition. ;-)
- ROC-RK3328-CC is a simple developement board from the Libre
Computer Project, based on the Rockchips RK3328 SoC
- Haiku is another development board plus Qseven module based on
Rockchips RK3368 and made by Theobroma Systems"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (701 commits)
arm: dts: modify Nuvoton NPCM7xx device tree structure
arm: dts: modify Makefile NPCM750 configuration name
arm: dts: modify clock binding in NPCM750 device tree
arm: dts: modify timer register size in NPCM750 device tree
arm: dts: modify UART compatible name in NPCM750 device tree
arm: dts: add watchdog device to NPCM750 device tree
arm64: dts: uniphier: add ethernet node for PXs3
ARM: dts: uniphier: add pinctrl groups of ethernet for second instance
arm: dts: kirkwood*.dts: use SPDX-License-Identifier for board using GPL-2.0+
arm: dts: kirkwood*.dts: use SPDX-License-Identifier for boards using GPL-2.0+/MIT
arm: dts: kirkwood*.dts: use SPDX-License-Identifier for boards using GPL-2.0
arm: dts: armada-385-turris-omnia: use SPDX-License-Identifier
arm: dts: armada-385-db-ap: use SPDX-License-Identifier
arm: dts: armada-388-rd: use SPDX-License-Identifier
arm: dts: armada-xp-db-xc3-24g4xg: use SPDX-License-Identifier
arm: dts: armada-xp-db-dxbc2: use SPDX-License-Identifier
arm: dts: armada-370-db: use SPDX-License-Identifier
arm: dts: armada-*.dts: use SPDX-License-Identifier for most of the Armada based board
arm: dts: armada-xp-98dx: use SPDX-License-Identifier for prestara 98d SoCs
arm: dts: armada-*.dtsi: use SPDX-License-Identifier for most of the Armada SoCs
...
|
||
|
Linus Torvalds
|
9c2dd8405c |
DeviceTree updates for 4.17:
- Sync dtc to upstream version v1.4.6-9-gaadd0b65c987. This adds a bunch more warnings (hidden behind W=1). - Build dtc lexer and parser files instead of using shipped versions. - Rework overlay apply API to take an FDT as input and apply overlays in a single step. - Add a phandle lookup cache. This improves boot time by hundreds of msec on systems with large DT. - Add trivial mcp4017/18/19 potentiometers bindings. - Remove VLA stack usage in DT code. -----BEGIN PGP SIGNATURE----- iQItBAABCAAXBQJaxiUdEBxyb2JoQGtlcm5lbC5vcmcACgkQ+vtdtY28YcM0+w/+ L7nkug1Hz2476eRrsn5bm6oOO0vCrhQcDTJ/AlvU1YO8XBVgGEetLDs8drmvD0/O FQDcpumX6G0eFoHTnTNWD7keM+0nY5jZBIAqKQNa9a0HKkjYc4HO5Ot9E02XG8W8 759vvCcGeJpysoCls9u8OplzqiDyNVQJd1a0fLivtafdKypuE/Ywh15wrzckPO+F bxqWQd+uwm98ZVz8/o3vfYtAOJmA06A+hsyVLXYu7iKQcXYVxi+ZNbRV44MQ50NI 1w5m8GgtWe4A2lpXjmeXk1VmLPO3eEgQKnBoH7gcJmCHaVg/SVfMgBscuGSQZRQa rQvaYRUNGJ0Mtji8EZpZb5Vip4ZCDtZCQBB3snN24CvGXI6WuIIg/8ncXt0AfLqn pxFmC32ZcwvJR2NCpPVfTgILm6foT9IzJWKl6SQLVtqqVp9nPFua7T3l8AQak7FB 2MMaaqh7L0l0za0ZgArZZo/IWUHRb0MwZdXAkqBZlQ6f3IBqGQeKCnkclAeH8qYr OorCOmC2OlKXLPHoz8XHeBzPRdnv1dQ//gEkKXBJ2igLU03hRWv9dxnGju/45sun Ifo79uBAUc9s3F4Kjd/zs2iLztuPrYCSICHtJh9LPeOxoV1ZUNt+6Cm23yQ014Uo /GsFW+lzh7c9wB1eETjPHd1WuYXiSrmE4zvbdykyLCk= =ZWpa -----END PGP SIGNATURE----- Merge tag 'devicetree-for-4.17' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull DeviceTree updates from Rob Herring: - Sync dtc to upstream version v1.4.6-9-gaadd0b65c987. This adds a bunch more warnings (hidden behind W=1). - Build dtc lexer and parser files instead of using shipped versions. - Rework overlay apply API to take an FDT as input and apply overlays in a single step. - Add a phandle lookup cache. This improves boot time by hundreds of msec on systems with large DT. - Add trivial mcp4017/18/19 potentiometers bindings. - Remove VLA stack usage in DT code. * tag 'devicetree-for-4.17' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (26 commits) of: unittest: fix an error code in of_unittest_apply_overlay() of: unittest: move misplaced function declaration of: unittest: Remove VLA stack usage of: overlay: Fix forgotten reference to of_overlay_apply() of: Documentation: Fix forgotten reference to of_overlay_apply() of: unittest: local return value variable related cleanups of: unittest: remove unneeded local return value variables dt-bindings: trivial: add various mcp4017/18/19 potentiometers of: unittest: fix an error test in of_unittest_overlay_8() of: cache phandle nodes to reduce cost of of_find_node_by_phandle() dt-bindings: rockchip-dw-mshc: use consistent clock names MAINTAINERS: Add linux/of_*.h headers to appropriate subsystems scripts: turn off some new dtc warnings by default scripts/dtc: Update to upstream version v1.4.6-9-gaadd0b65c987 scripts/dtc: generate lexer and parser during build instead of shipping powerpc: boot: add strrchr function of: overlay: do not include path in full_name of added nodes of: unittest: clean up changeset test arm64/efi: Make strrchr() available to the EFI namespace ARM: boot: add strrchr function ... |
||
|
Linus Torvalds
|
9eb31227cb |
Merge branch 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
Pull crypto updates from Herbert Xu: "API: - add AEAD support to crypto engine - allow batch registration in simd Algorithms: - add CFB mode - add speck block cipher - add sm4 block cipher - new test case for crct10dif - improve scheduling latency on ARM - scatter/gather support to gcm in aesni - convert x86 crypto algorithms to skcihper Drivers: - hmac(sha224/sha256) support in inside-secure - aes gcm/ccm support in stm32 - stm32mp1 support in stm32 - ccree driver from staging tree - gcm support over QI in caam - add ks-sa hwrng driver" * 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (212 commits) crypto: ccree - remove unused enums crypto: ahash - Fix early termination in hash walk crypto: brcm - explicitly cast cipher to hash type crypto: talitos - don't leak pointers to authenc keys crypto: qat - don't leak pointers to authenc keys crypto: picoxcell - don't leak pointers to authenc keys crypto: ixp4xx - don't leak pointers to authenc keys crypto: chelsio - don't leak pointers to authenc keys crypto: caam/qi - don't leak pointers to authenc keys crypto: caam - don't leak pointers to authenc keys crypto: lrw - Free rctx->ext with kzfree crypto: talitos - fix IPsec cipher in length crypto: Deduplicate le32_to_cpu_array() and cpu_to_le32_array() crypto: doc - clarify hash callbacks state machine crypto: api - Keep failed instances alive crypto: api - Make crypto_alg_lookup static crypto: api - Remove unused crypto_type lookup function crypto: chelsio - Remove declaration of static function from header crypto: inside-secure - hmac(sha224) support crypto: inside-secure - hmac(sha256) support .. |
||
|
Linus Torvalds
|
23221d997b |
arm64 updates for 4.17
Nothing particularly stands out here, probably because people were tied up with spectre/meltdown stuff last time around. Still, the main pieces are: - Rework of our CPU features framework so that we can whitelist CPUs that don't require kpti even in a heterogeneous system - Support for the IDC/DIC architecture extensions, which allow us to elide instruction and data cache maintenance when writing out instructions - Removal of the large memory model which resulted in suboptimal codegen by the compiler and increased the use of literal pools, which could potentially be used as ROP gadgets since they are mapped as executable - Rework of forced signal delivery so that the siginfo_t is well-formed and handling of show_unhandled_signals is consolidated and made consistent between different fault types - More siginfo cleanup based on the initial patches from Eric Biederman - Workaround for Cortex-A55 erratum #1024718 - Some small ACPI IORT updates and cleanups from Lorenzo Pieralisi - Misc cleanups and non-critical fixes -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAABCgAGBQJaw1TCAAoJELescNyEwWM0gyQIAJVMK4QveBW+LwF96NYdZo16 p90Aa+nqKelh/s93govQArDMv1gxyuXdFlQZVOGPQHfqpz6RhJWmBA2tFsUbQrUc OBcioPrRihqTmKBe+1r1XORwZxkVX6GGmCn0LYpPR7I3TjxXZpvxqaxGxiUvHkci yVxWlDTyN/7eL3akhCpCDagN3Fxwk3QnJLqE3fxOFMlY7NvQcmUxcITiUl/s469q xK6SWH9SRH1JK8jTHPitwUBiU//3FfCqSI9HLEdDIDoTuPcVM8UetWvi4QzrzJL1 UYg8lmU0CXNmflDzZJDaMf+qFApOrGxR0YVPpBzlQvxe0JIY69g48f+JzDPz8nc= =+gNa -----END PGP SIGNATURE----- Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 updates from Will Deacon: "Nothing particularly stands out here, probably because people were tied up with spectre/meltdown stuff last time around. Still, the main pieces are: - Rework of our CPU features framework so that we can whitelist CPUs that don't require kpti even in a heterogeneous system - Support for the IDC/DIC architecture extensions, which allow us to elide instruction and data cache maintenance when writing out instructions - Removal of the large memory model which resulted in suboptimal codegen by the compiler and increased the use of literal pools, which could potentially be used as ROP gadgets since they are mapped as executable - Rework of forced signal delivery so that the siginfo_t is well-formed and handling of show_unhandled_signals is consolidated and made consistent between different fault types - More siginfo cleanup based on the initial patches from Eric Biederman - Workaround for Cortex-A55 erratum #1024718 - Some small ACPI IORT updates and cleanups from Lorenzo Pieralisi - Misc cleanups and non-critical fixes" * tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (70 commits) arm64: uaccess: Fix omissions from usercopy whitelist arm64: fpsimd: Split cpu field out from struct fpsimd_state arm64: tlbflush: avoid writing RES0 bits arm64: cmpxchg: Include linux/compiler.h in asm/cmpxchg.h arm64: move percpu cmpxchg implementation from cmpxchg.h to percpu.h arm64: cmpxchg: Include build_bug.h instead of bug.h for BUILD_BUG arm64: lse: Include compiler_types.h and export.h for out-of-line LL/SC arm64: fpsimd: include <linux/init.h> in fpsimd.h drivers/perf: arm_pmu_platform: do not warn about affinity on uniprocessor perf: arm_spe: include linux/vmalloc.h for vmap() Revert "arm64: Revert L1_CACHE_SHIFT back to 6 (64-byte cache line size)" arm64: cpufeature: Avoid warnings due to unused symbols arm64: Add work around for Arm Cortex-A55 Erratum 1024718 arm64: Delay enabling hardware DBM feature arm64: Add MIDR encoding for Arm Cortex-A55 and Cortex-A35 arm64: capabilities: Handle shared entries arm64: capabilities: Add support for checks based on a list of MIDRs arm64: Add helpers for checking CPU MIDR against a range arm64: capabilities: Clean up midr range helpers arm64: capabilities: Change scope of VHE to Boot CPU feature ... |
||
|
Linus Torvalds
|
5b1f3dc927 |
Merge branch 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull irq updates from Thomas Gleixner:
"The usual pile of boring changes:
- Consolidate tasklet functions to share code instead of duplicating
it
- The first step for making the low level entry handler management on
multi-platform kernels generic
- A new sysfs file which allows to retrieve the wakeup state of
interrupts.
- Ensure that the interrupt thread follows the effective affinity and
not the programmed affinity to avoid cross core wakeups.
- Two new interrupt controller drivers (Microsemi Ocelot and Qualcomm
PDC)
- Fix the wakeup path clock handling for Reneasas interrupt chips.
- Rework the boot time register reset for ARM GIC-V2/3
- Better suspend/resume support for ARM GIV-V3/ITS
- Add missing locking to the ARM GIC set_type() callback
- Small fixes for the irq simulator code
- SPDX identifiers for the irq core code and removal of boiler plate
- Small cleanups all over the place"
* 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (37 commits)
openrisc: Set CONFIG_MULTI_IRQ_HANDLER
arm64: Set CONFIG_MULTI_IRQ_HANDLER
genirq: Make GENERIC_IRQ_MULTI_HANDLER depend on !MULTI_IRQ_HANDLER
irqchip/gic: Take lock when updating irq type
irqchip/gic: Update supports_deactivate static key to modern api
irqchip/gic-v3: Ensure GICR_CTLR.EnableLPI=0 is observed before enabling
irqchip: Add a driver for the Microsemi Ocelot controller
dt-bindings: interrupt-controller: Add binding for the Microsemi Ocelot interrupt controller
irqchip/gic-v3: Probe for SCR_EL3 being clear before resetting AP0Rn
irqchip/gic-v3: Don't try to reset AP0Rn
irqchip/gic-v3: Do not check trigger configuration of partitionned LPIs
genirq: Remove license boilerplate/references
genirq: Add missing SPDX identifiers
genirq/matrix: Cleanup SPDX identifier
genirq: Cleanup top of file comments
genirq: Pass desc to __irq_free instead of irq number
irqchip/gic-v3: Loudly complain about the use of IRQ_TYPE_NONE
irqchip/gic: Loudly complain about the use of IRQ_TYPE_NONE
RISC-V: Move to the new GENERIC_IRQ_MULTI_HANDLER handler
genirq: Add CONFIG_GENERIC_IRQ_MULTI_HANDLER
...
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Palmer Dabbelt
|
667b24d049 |
arm64: Set CONFIG_MULTI_IRQ_HANDLER
arm has an optional MULTI_IRQ_HANDLER, which arm64 copied but didn't make optional. The multi irq handler infrastructure has been copied to generic code selectable with a new config symbol. That symbol can be selected by randconfig builds and can cause build breakage. Introduce CONFIG_MULTI_IRQ_HANDLER as an intermediate step which prevents the core config symbol from being selected. The arm64 local config symbol will be removed once arm64 gets converted to the generic code. Signed-off-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Arnd Bergmann <arnd@arndb.de> Link: https://lkml.kernel.org/r/20180404043130.31277-2-palmer@sifive.com |
||
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Linus Torvalds
|
dc73d6a8d4 |
MMC core:
- Export host capabilities through debugfs - Export card RCA register via sysfs - Improve card initializing sequence while enabling 4-bit bus - Export a function to enable/disable wakeup for card detect IRQ MMC host: - dw_mmc: Add support for new hi3798cv200 variant - dw_mmc: Remove support for some deprecated DT properties - mediatek: Add support for new variant used on MT7622 SoC - sdhci: Improve wakeup support for SDIO IRQs - sdhci: Improve wakeup support for card detect IRQs - sdhci-omap: Add tuning support - sdhci_omap: Add UHS-I mode support - sunxi: Prepare for runtime PM support via a few re-factorings - tmio: deprecate "toshiba,mmc-wrprotect-disable" DT property - tmio/renesas_sdhi: Consolidate code supporting write protect - tmio: Improve DMA vs PIO handling - tmio: Add support for IP-builtin card detection logic -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJaw0MuAAoJEP4mhCVzWIwpW78P/2N2qPt21OfvnIbSexY1nyPd 5+rjScgy+oTUnNxITA9LOnM4P6Wg/9PgvhjUdNdHzd5ZaXIchw372+Xu6hZHdujI vBfnpsI/xtyL1TQ6nvJc9b+Sp4W4LL2MlCqxi+btAKLvTAU3NNm7uJRRP6xRNDd5 8wcsCoIN4C3k5hmh5++DDLCfuzpwmbC1cEbGtL/QEV9xeCY5+fJq4Qpq14L2TJ0g LeDls3X4HAJa3SsgSGOdNr8rttKUSS+j7i1XsShHMyq89DD21PJ8fvMhdzlXJub9 A4PatcOXALS/Xd2YVjeLHrRRlTitssD+Sllt46NsB4eJJOO+DempecY+i0WoW60y p9IUSSX86yokGoyweiL2GI0Ja1Bg8xgdzTGVbfZ6w6UKHjQAcItnojyMghDM5+zt VjDIU59rzm+BEDqcktsbGgLPjOZ0ZWgJPPp2NPkechxsojvCJ9Smm6yPjzaUnZ60 U9PxsYbs4NB+nE9iKDioyA1ABP0N+BloUkTf/cVHdPBBPMmOyI7jYEDS7mqollZU bQCFx+BqcQMbnvI/TZxNDTr4HsiyiXJa0GTCB77sge8tZdcUTjUsWyhc+BYpIqgA 68/dlwTcawSXDliup5XxtYcAjGugtHbPnS/39uBXvscqWVej1WI5RTyzKdC/hnos BP5uz0K1Wic1Dl+jqlWc =2Pd6 -----END PGP SIGNATURE----- Merge tag 'mmc-v4.17' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc Pull MMC updates from Ulf Hansson: "MMC core: - Export host capabilities through debugfs - Export card RCA register via sysfs - Improve card initializing sequence while enabling 4-bit bus - Export a function to enable/disable wakeup for card detect IRQ MMC host: - dw_mmc: Add support for new hi3798cv200 variant - dw_mmc: Remove support for some deprecated DT properties - mediatek: Add support for new variant used on MT7622 SoC - sdhci: Improve wakeup support for SDIO IRQs - sdhci: Improve wakeup support for card detect IRQs - sdhci-omap: Add tuning support - sdhci_omap: Add UHS-I mode support - sunxi: Prepare for runtime PM support via a few re-factorings - tmio: deprecate "toshiba,mmc-wrprotect-disable" DT property - tmio/renesas_sdhi: Consolidate code supporting write protect - tmio: Improve DMA vs PIO handling - tmio: Add support for IP-builtin card detection logic" * tag 'mmc-v4.17' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: (55 commits) mmc: renesas_sdhi: replace EXT_ACC with HOST_MODE mmc: update sdio_claim_irq documentation mmc: Export host capabilities to debugfs. mmc: core: Disable HPI for certain Micron (Numonyx) eMMC cards mmc: block: fix updating ext_csd caches on ioctl call mmc: sunxi: Set our device drvdata earlier mmc: sunxi: Move the reset deassertion before enabling the clocks mmc: sunxi: Move resources management to separate functions mmc: dw_mmc: add support for hi3798cv200 specific extensions of dw-mshc dt-bindings: mmc: add bindings for hi3798cv200-dw-mshc mmc: core: Export card RCA register via sysfs mmc: renesas_sdhi: fix WP detection mmc: core: Use memdup_user() rather than duplicating its implementation mmc: dw_mmc-rockchip: correct property names in debug mmc: sd: Remove redundant err assignment from mmc_read_switch mmc: sdio: Check the return value of sdio_enable_4bit_bus mmc: core: Don't try UHS-I mode if 4-bit mode isn't supported arm64: dts: hi3660: remove 'num-slots' property for dwmmc ARM: dts: lpc18xx: remove 'num-slots' property for dwmmc arm64: dts: stratix10: remove 'num-slots' property for dwmmc ... |
||
|
Linus Torvalds
|
642e7fd233 |
Merge branch 'syscalls-next' of git://git.kernel.org/pub/scm/linux/kernel/git/brodo/linux
Pull removal of in-kernel calls to syscalls from Dominik Brodowski:
"System calls are interaction points between userspace and the kernel.
Therefore, system call functions such as sys_xyzzy() or
compat_sys_xyzzy() should only be called from userspace via the
syscall table, but not from elsewhere in the kernel.
At least on 64-bit x86, it will likely be a hard requirement from
v4.17 onwards to not call system call functions in the kernel: It is
better to use use a different calling convention for system calls
there, where struct pt_regs is decoded on-the-fly in a syscall wrapper
which then hands processing over to the actual syscall function. This
means that only those parameters which are actually needed for a
specific syscall are passed on during syscall entry, instead of
filling in six CPU registers with random user space content all the
time (which may cause serious trouble down the call chain). Those
x86-specific patches will be pushed through the x86 tree in the near
future.
Moreover, rules on how data may be accessed may differ between kernel
data and user data. This is another reason why calling sys_xyzzy() is
generally a bad idea, and -- at most -- acceptable in arch-specific
code.
This patchset removes all in-kernel calls to syscall functions in the
kernel with the exception of arch/. On top of this, it cleans up the
three places where many syscalls are referenced or prototyped, namely
kernel/sys_ni.c, include/linux/syscalls.h and include/linux/compat.h"
* 'syscalls-next' of git://git.kernel.org/pub/scm/linux/kernel/git/brodo/linux: (109 commits)
bpf: whitelist all syscalls for error injection
kernel/sys_ni: remove {sys_,sys_compat} from cond_syscall definitions
kernel/sys_ni: sort cond_syscall() entries
syscalls/x86: auto-create compat_sys_*() prototypes
syscalls: sort syscall prototypes in include/linux/compat.h
net: remove compat_sys_*() prototypes from net/compat.h
syscalls: sort syscall prototypes in include/linux/syscalls.h
kexec: move sys_kexec_load() prototype to syscalls.h
x86/sigreturn: use SYSCALL_DEFINE0
x86: fix sys_sigreturn() return type to be long, not unsigned long
x86/ioport: add ksys_ioperm() helper; remove in-kernel calls to sys_ioperm()
mm: add ksys_readahead() helper; remove in-kernel calls to sys_readahead()
mm: add ksys_mmap_pgoff() helper; remove in-kernel calls to sys_mmap_pgoff()
mm: add ksys_fadvise64_64() helper; remove in-kernel call to sys_fadvise64_64()
fs: add ksys_fallocate() wrapper; remove in-kernel calls to sys_fallocate()
fs: add ksys_p{read,write}64() helpers; remove in-kernel calls to syscalls
fs: add ksys_truncate() wrapper; remove in-kernel calls to sys_truncate()
fs: add ksys_sync_file_range helper(); remove in-kernel calls to syscall
kernel: add ksys_setsid() helper; remove in-kernel call to sys_setsid()
kernel: add ksys_unshare() helper; remove in-kernel calls to sys_unshare()
...
|
||
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Linus Torvalds
|
bc16d4052f |
Merge branch 'efi-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull EFI updates from Ingo Molnar:
"The main EFI changes in this cycle were:
- Fix the apple-properties code (Andy Shevchenko)
- Add WARN() on arm64 if UEFI Runtime Services corrupt the reserved
x18 register (Ard Biesheuvel)
- Use efi_switch_mm() on x86 instead of manipulating %cr3 directly
(Sai Praneeth)
- Fix early memremap leak in ESRT code (Ard Biesheuvel)
- Switch to L"xxx" notation for wide string literals (Ard Biesheuvel)
- ... plus misc other cleanups and bugfixes"
* 'efi-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/efi: Use efi_switch_mm() rather than manually twiddling with %cr3
x86/efi: Replace efi_pgd with efi_mm.pgd
efi: Use string literals for efi_char16_t variable initializers
efi/esrt: Fix handling of early ESRT table mapping
efi: Use efi_mm in x86 as well as ARM
efi: Make const array 'apple' static
efi/apple-properties: Use memremap() instead of ioremap()
efi: Reorder pr_notice() with add_device_randomness() call
x86/efi: Replace GFP_ATOMIC with GFP_KERNEL in efi_query_variable_store()
efi/arm64: Check whether x18 is preserved by runtime services calls
efi/arm*: Stop printing addresses of virtual mappings
efi/apple-properties: Remove redundant attribute initialization from unmarshal_key_value_pairs()
efi/arm*: Only register page tables when they exist
|
||
Dominik Brodowski
|
a90f590a1b |
mm: add ksys_mmap_pgoff() helper; remove in-kernel calls to sys_mmap_pgoff()
Using this helper allows us to avoid the in-kernel calls to the sys_mmap_pgoff() syscall. The ksys_ prefix denotes that this function is meant as a drop-in replacement for the syscall. In particular, it uses the same calling convention as sys_mmap_pgoff(). This patch is part of a series which removes in-kernel calls to syscalls. On this basis, the syscall entry path can be streamlined. For details, see http://lkml.kernel.org/r/20180325162527.GA17492@light.dominikbrodowski.net Cc: Andrew Morton <akpm@linux-foundation.org> Cc: linux-mm@kvack.org Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net> |
||
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Linus Torvalds
|
616d8cf0fa |
ARM: SoC fixes for 4.16
Here are are a couple of last-minute fixes for 4.16, mostly for
regressions. As usual, the majory are device tree changes:
- USB 3 support on rk3399 didn't work and is being reverted for now
- One fix for an old suspend/resume bug on rk3399
- A few regulator related fixes on Banana Pi M2, and on imx7d-sdb
- A boot regression fix for all Aspeed SoCs failing to find
their memory
- One more dtc warning fix
The other changes are:
- A few updates to the MAINTAINERS file
- A revert for an incorrect orion5x cleanup
- Two power management fixes for OMAP
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Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Arnd Bergmann:
"Here are are a couple of last-minute fixes for 4.16, mostly for
regressions. As usual, the majory are device tree changes:
- USB 3 support on rk3399 didn't work and is being reverted for now
- One fix for an old suspend/resume bug on rk3399
- A few regulator related fixes on Banana Pi M2, and on imx7d-sdb
- A boot regression fix for all Aspeed SoCs failing to find their
memory
- One more dtc warning fix
The other changes are:
- A few updates to the MAINTAINERS file
- A revert for an incorrect orion5x cleanup
- Two power management fixes for OMAP"
* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: OMAP: Fix SRAM W+X mapping
ARM: dts: aspeed: Add default memory node
mailmap: Update email address for Gregory CLEMENT
ARM: davinci: fix the GPIO lookup for omapl138-hawk
MAINTAINERS: Update Tegra IOMMU maintainer
ARM: dts: imx7d-sdb: Fix regulator-usb-otg2-vbus node name
ARM: ux500: Fix PMU IRQ regression
ARM: dts: rockchip: Add missing #sound-dai-cells on rk3288
Revert "arm64: dts: rockchip: add usb3-phy otg-port support for rk3399"
arm64: dts: rockchip: Fix rk3399-gru-* s2r (pinctrl hogs, wifi reset)
ARM: OMAP: Fix dmtimer init for omap1
MAINTAINERS: update email address for Maxime Ripard
ARM: dts: sun6i: a31s: bpi-m2: add missing regulators
ARM: dts: sun6i: a31s: bpi-m2: improve pmic properties
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Arnd Bergmann
|
3ac3a2f9b2 |
UniPhier ARM SoC DT updates for v4.17 (2nd)
- add syscon property to sound nodes - add more ethernet pin groups - add ethernet support for PXs3 SoC -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJaum/TAAoJED2LAQed4NsG6awP/AnSPRIV7tCdbB2P4m3WdIh8 TU3FCW5kZ4XzyIys/Kp5WMVjc0iPmTaZlxXRtz2jZC6zRAibNvqJmR3ebLG8aWqe 3Hncqr3ZyhuqjSUsAE0wQ2dKR0lgQp48PY9b3Aiy0T0R2IavGZNfGkw89FiBEvb1 yas7T/UyrONxw9EDfNFVKdKuCKRVKTGgWEJHWKzCrpz5SChJhUGKvFFPm4kC5K9Z 1RMRYacXB20DRxB8zO6Xgl+EPGsclRf+B5gAp+Up9ssOCzWrIpxO+BrW416nt1Ao BMcUDKRi499lhCHlsMWLt1mWxb8JadSJalsPcc8MsoOBq95mt09OeuRiFvNeTZHd pnX3la6ntnIIbVYkEEWNZsNXBxOxeEqOcYXgEybm+mru4n+EJttzZaNotBuYwyd4 2HzcceB6w1dzM4vgxvu1EE4Nu2lgglVIf4cv1kA6SYItg17EPjI/sSJcA5vQBKsF 2+3tZNKyQHjtgzy+QZlSZ7AlexpZwJkes1vltJJnfYJTr55kzeRd0vj0B1qIX4Ka 4D6AoPWbHWXIrUqGRnvlBuVvzRBXnuct8i7zBhXhn0eUYdm1E3igkQOdWpoUAlPh xSHv9aocFn/GJpKY3JDI3UmvUeRcy5m9QviQ0Q7MIeeAit4jyD0OKE9+wJEJHzvf othbtLBhqWu1dniwvCes =5fxa -----END PGP SIGNATURE----- Merge tag 'uniphier-dt-v4.17-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into next/dt Pull "UniPhier ARM SoC DT updates for v4.17 (2nd)" from Masahiro Yamada: - add syscon property to sound nodes - add more ethernet pin groups - add ethernet support for PXs3 SoC * tag 'uniphier-dt-v4.17-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier: arm64: dts: uniphier: add ethernet node for PXs3 ARM: dts: uniphier: add pinctrl groups of ethernet for second instance ARM: dts: uniphier: add syscon property for UniPhier sound system arm64: dts: uniphier: add syscon property for UniPhier sound system |
||
|
Arnd Bergmann
|
fd553821a9 |
The rk3399 gained support its Cadence displayport controller and some
minor additions like pins for 2ch i2s0 and the cif test clocks as well as a default rate for ACLK_VIO that should be 400MHz according to the TRM. The rk3328 got uart dmas fixed - a non-critical fix, as nobody was using that so far. New boards are the rk3328-based roc-rk3328-cc, the rk3368-based Lion-SOM + baseborad from Theobroma Systems and a standalone variant of the Sapphire board, as a lot of people where using that without the Exkavator baseboard. Sapphire also saw a lot of small cleanups of things that are not part of the actual Sapphire board, but the baseboard instead. The rk3399-puma board got i2s and tsadc support and Gru got its DP node enabled. -----BEGIN PGP SIGNATURE----- iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAlqpTQoQHGhlaWtvQHNu dGVjaC5kZQAKCRDzpnnJnNEdgZ0uCACl6GsROypjpCGLtCsxlaAXdjk0EuBI3rzy wW2AkmeJQHvMPYIAodVUTqEJW7w2M4V0LbF1YOzebSyLMckejKy2jQGNcjQeQ//p QAIilflqxqYHTzx9Abv1EpX9uYVsLA46TUnInHAlo+SyDcDAx5/D37oASS+EvlKS AHniQE5XfH/zf/0ASRqyzKXI+rxhovinUCeVxsJmWS5+jUchUy/PTgx3OBnTahd+ JYjEOygTfPJoVXI3LBsQhuZdGZAVoCrDETsur8tMBBHwUHDQxy2rpLwzqv72C+SR kdO93Xgjz1+mML3qivJPKYPlc4OabFKgP9BzMnBsALJPXykX7cQw =Ay+8 -----END PGP SIGNATURE----- Merge tag 'v4.17-rockchip-dts64-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt Pull "Rockchip dts64 changes for 4.17" from Heiko Stübner: The rk3399 gained support its Cadence displayport controller and some minor additions like pins for 2ch i2s0 and the cif test clocks as well as a default rate for ACLK_VIO that should be 400MHz according to the TRM. The rk3328 got uart dmas fixed - a non-critical fix, as nobody was using that so far. New boards are the rk3328-based roc-rk3328-cc, the rk3368-based Lion-SOM + baseborad from Theobroma Systems and a standalone variant of the Sapphire board, as a lot of people where using that without the Exkavator baseboard. Sapphire also saw a lot of small cleanups of things that are not part of the actual Sapphire board, but the baseboard instead. The rk3399-puma board got i2s and tsadc support and Gru got its DP node enabled. * tag 'v4.17-rockchip-dts64-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: arm64: dts: rockchip: remove keep-power-in-suspend from sdhci of rk3399-sapphire arm64: dts: rockchip: assign clock rate for ACLK_VIO on rk3399 arm64: dts: rockchip: add a standalone version of the rk3399 sapphire arm64: dts: rockchip: move rk3399-sapphire pwr_btn to daughterboard arm64: dts: rockchip: move rk3399-sapphire i2s2 to daughterboard arm64: dts: rockchip: move rk3399-sapphire sdio to excavator baseboard arm64: dts: rockchip: enable I2S codec on rk3399-puma-haikou arm64: dts: rockchip: move i2s0 node from baseboard to SoM on rk3399-puma arm64: dts: rockchip: vdd_log on rk3399-sapphire is not an i2c slave arm64: dts: rockchip: add Haikou baseboard with RK3368-uQ7 SoM arm64: dts: rockchip: add RK3368-uQ7 (Lion) SoM dt-bindings: add RK3368-uQ7 SoM and EVK base board arm64: dts: rockchip: Fix RK3328 UART DMAs arm64: dts: rockchip: enable DP for rk3399-gru arm64: dts: rockchip: add cdn-dp node for rk3399. arm64: dts: rockchip: add i2s0-2ch-bus pins on rk3399 arm64: dts: rockchip: enable tsadc on rk3399-puma arm64: dts: rockchip: add roc-rk3328-cc board arm64: dts: rockchip: Add cif test clocks for rk3399 |
||
Dave Martin
|
65896545b6 |
arm64: uaccess: Fix omissions from usercopy whitelist
When the hardend usercopy support was added for arm64, it was
concluded that all cases of usercopy into and out of thread_struct
were statically sized and so didn't require explicit whitelisting
of the appropriate fields in thread_struct.
Testing with usercopy hardening enabled has revealed that this is
not the case for certain ptrace regset manipulation calls on arm64.
This occurs because the sizes of usercopies associated with the
regset API are dynamic by construction, and because arm64 does not
always stage such copies via the stack: indeed the regset API is
designed to avoid the need for that by adding some bounds checking.
This is currently believed to affect only the fpsimd and TLS
registers.
Because the whitelisted fields in thread_struct must be contiguous,
this patch groups them together in a nested struct. It is also
necessary to be able to determine the location and size of that
struct, so rather than making the struct anonymous (which would
save on edits elsewhere) or adding an anonymous union containing
named and unnamed instances of the same struct (gross), this patch
gives the struct a name and makes the necessary edits to code that
references it (noisy but simple).
Care is needed to ensure that the new struct does not contain
padding (which the usercopy hardening would fail to protect).
For this reason, the presence of tp2_value is made unconditional,
since a padding field would be needed there in any case. This pads
up to the 16-byte alignment required by struct user_fpsimd_state.
Acked-by: Kees Cook <keescook@chromium.org>
Reported-by: Mark Rutland <mark.rutland@arm.com>
Fixes:
|
||
|
Dave Martin
|
20b8547277 |
arm64: fpsimd: Split cpu field out from struct fpsimd_state
In preparation for using a common representation of the FPSIMD
state for tasks and KVM vcpus, this patch separates out the "cpu"
field that is used to track the cpu on which the state was most
recently loaded.
This will allow common code to operate on task and vcpu contexts
without requiring the cpu field to be stored at the same offset
from the FPSIMD register data in both cases. This should avoid the
need for messing with the definition of those parts of struct
vcpu_arch that are exposed in the KVM user ABI.
The resulting change is also convenient for grouping and defining
the set of thread_struct fields that are supposed to be accessible
to copy_{to,from}_user(), which includes user_fpsimd_state but
should exclude the cpu field. This patch does not amend the
usercopy whitelist to match: that will be addressed in a subsequent
patch.
Signed-off-by: Dave Martin <Dave.Martin@arm.com>
[will: inline fpsimd_flush_state for now]
Signed-off-by: Will Deacon <will.deacon@arm.com>
|
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Philip Elcan
|
7f170499f7 |
arm64: tlbflush: avoid writing RES0 bits
Several of the bits of the TLBI register operand are RES0 per the ARM ARM, so TLBI operations should avoid writing non-zero values to these bits. This patch adds a macro __TLBI_VADDR(addr, asid) that creates the operand register in the correct format and honors the RES0 bits. Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Philip Elcan <pelcan@codeaurora.org> Signed-off-by: Will Deacon <will.deacon@arm.com> |
||
Radim Krčmář
|
abe7a4586f |
KVM/ARM updates for v4.17
- VHE optimizations - EL2 address space randomization - Variant 3a mitigation for Cortex-A57 and A72 - The usual vgic fixes - Various minor tidying-up -----BEGIN PGP SIGNATURE----- iQJJBAABCAAzFiEEn9UcU+C1Yxj9lZw9I9DQutE9ekMFAlq7iucVHG1hcmMuenlu Z2llckBhcm0uY29tAAoJECPQ0LrRPXpDqlIP+QFzxcxiCROxzFrQWLgmO4iI0AzU x4vOsXRDpZDwOB9YajROG3MYgyGgoiY5IFgozp88G+/dpj+GMC506zq+cc47KYxp DHNOp6zIMy+Ku6u0zZt97cS1PzQl/lhYiO1AtAiVyBRCVHX53Y26Sg720FfLp+fn 5KYpMSCxJndLKfYKW6JFxIp3TSOKrLPFqWP2Gl7NM05pFclJDbGY5+Cka6iJf2KG frm1H8Xpwmt+sZFC6K3yeoVGBq+vc00uryIM43tqFBOvGkCjZFfWFRnduWtjSZSQ Ix01XEi6jmh5NSnSsgJ1XT8jIp8o5CZsk35kLVPAlry0S33UAJQTiDkuDvurBhdn MQ+QWocFZeCIMTgll3Z9kpfYosQy2Xq4kVBfg2eMsaH+C/A/xEXlr9NGEnQIjM93 65K+HepCkffx3jEbS57v1T1Y1eIbGVhHFhVJlzAFroWAC46jfRynYTAYy7dD6tj8 rONJSDEGa8uu/R45DAV17ukBDz+hLOOI7PX7dtqQijcns9M2ZEzkqzfCDTpEKYf0 UURa8pEfCsVlY9mzysBQwHoop3BexbFIoGccFJcZiGN51aSZFp83SXWmI4m+Kh/L Ac4CI1l9s6zDN8znjpTCnM4Tujqjh3w/SkVn3tuuL6lq52wHiGS/E4QDjugqGekV Cu5dBqX0ZUluD7KD =9sa2 -----END PGP SIGNATURE----- Merge tag 'kvm-arm-for-v4.17' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm KVM/ARM updates for v4.17 - VHE optimizations - EL2 address space randomization - Variant 3a mitigation for Cortex-A57 and A72 - The usual vgic fixes - Various minor tidying-up |
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Marc Zyngier
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dc6ed61d2f |
arm64: Add temporary ERRATA_MIDR_ALL_VERSIONS compatibility macro
MIDR_ALL_VERSIONS is changing, and won't have the same meaning in 4.17, and the right thing to use will be ERRATA_MIDR_ALL_VERSIONS. In order to cope with the merge window, let's add a compatibility macro that will allow a relatively smooth transition, and that can be removed post 4.17-rc1. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> |
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Marc Zyngier
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adc91ab785 |
Revert "arm64: KVM: Use SMCCC_ARCH_WORKAROUND_1 for Falkor BP hardening"
Creates far too many conflicts with arm64/for-next/core, to be
resent post -rc1.
This reverts commit
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Kunihiko Hayashi
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aba054a1cd |
arm64: dts: uniphier: add ethernet node for PXs3
Add nodes of the AVE ethernet controller for PXs3 and the boards. This SoC has two controllers. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
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Kunihiko Hayashi
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d28db34a56 |
arm64: defconfig: add CONFIG_UNIPHIER_THERMAL and CONFIG_SNI_AVE
Enable the thermal monitor driver and the AVE ethernet driver implemented on UniPhier SoCs. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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99600b165f |
ARM64: stratix10: defconfig updates for 4.17
-enables STMMAC_ETH controller that is present on Stratix10 -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJatR8yAAoJEBmUBAuBoyj0VKwQAKqhi0tzhJe2dnlu7ic5kNLv lfZ90As+XbPxhyyyCCNldd0d7fZltRrHRC5iYV43+ZIe3T/FCQ3bM6uCKMdiUP8i OtfchVf3SOO3x2AaVrRpetNiS6poV/1hugH3/4B/n9MFKMb8ZeLszRp3oUFcX9UZ ZdhzyNPPAuTV/j4IaXR3d7++cbVM+ep0vUMuR8T7sW3wjCqnhV1GieYN00w05Y6A cbS20o6yju3IXBSlzo6nyMlUuAcGYPCmth6F7gVLjWXfaiRYGcLMrqspaErcCJCC L32W0Fz9YqF6jI2zkghO1vhYiqR8qQPS38TU4OpkMMOP4utUYYOa7tvNTB+Yx2D5 h6st3wbidr40RtnP/3ZVpd5bSvBQOkGg0643Hx8x14Z0TUzeUjdUqmmWlq3Y7Zet /aiwoPz7PtCRMvL5gwdR3JwPGNGaIPRmodhN7RjWre5CMOy7H8ICEKEReN4T++/9 zDDPpgV3r5RbrcVY4B0yXBbPX02JgOEy/6H+hLBoF9JWJrvzq3tCeyzchGfWaEdo eyL3uzjIU4spd4YTsO38IK7KQPe8FVf+ymxZTxTRXAwRFyO/o4u+sGQ/g4sasSQQ zOKw832Bu2tqmGMQY3Tjej0Dv+Qze5Ub4ydhHwBNbTzMS/F+RPa3vlXMNYY+TDHh vV/21qw9lXEq9+KYro6i =53dx -----END PGP SIGNATURE----- Merge tag 'stratix10_defconfig_for_v4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/soc Pull "ARM64: stratix10: defconfig updates for 4.17" from Dinh Nguyen: -enables STMMAC_ETH controller that is present on Stratix10 * tag 'stratix10_defconfig_for_v4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: arm64: defconfig: enable stmmac ethernet to defconfig Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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b899e52261 |
Qualcomm ARM64 Based defconfig Updates for v4.17
* Enable cpufreq governors, QCOM TSENS, and QCOM APCS driver -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJasG8nAAoJEFKiBbHx2RXVLN4P/0iQyD8opqOynFRBPwgbLrVp VFF/TwALktbr0/0RneQG82ZWWFRgcx0ymAyJWpxZmTubLjwFAYvyEUL37cIN2DSM Oy8j7gvP7NB8F9lrjEaFgLMh8umsooPB9qpi2i/EgO9kzQayEo+ZmRu0bOAVzcA8 Jua/GHFWdHOHPnPPdKkLLxhz7+KG07I6xVcnEitHOobg9cMEM9n6h0f1/jpm9seK /9d0MtU6LkcSyosbv9rH1Z305P1mJqmFXXq/LBr1B0y5O3ccNE3jU5m0Rn4WS4ML TIt478tZfUwifwTrfWKAHsuxmuuOLjEXREk+jk9NZXLKNl98nn57fdJOsl5ExrcW WpU17VUe3NihEa6XYPJYDLfUPfsD/E61fsvNX2gqcWJzPEnQnP0dBHzAOQqpu5Gd muvyFdDB8iaJ2j8RKPh/qxJftB0lVfIdnAsfuCugc0hC1Lw3LWhACtGtJRLb14JO Y7hi44GpuA00MX+QewoOPKat03j1TUQ5tKr36F3GymsLnzkDtwZ5x3GNsIT/zP2F ttGAYv8DHVttpdctspsw+9gcZRPdmmGG2nxcWLuxG+1ak0Wwb9ySHRQKRm41O7QV vXzRpQaBQWvIqMF0JGsB6/9tyULPvxkIIizJQTHm8MwcKXI+z2HR5wqS+e1oO7Zr Dk+oS9TZ6Tj42pNDiO0H =VRMu -----END PGP SIGNATURE----- Merge tag 'qcom-arm64-defconfig-for-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/soc Pull "Qualcomm ARM64 Based defconfig Updates for v4.17" from Andy Gross: * Enable cpufreq governors, QCOM TSENS, and QCOM APCS driver * tag 'qcom-arm64-defconfig-for-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/agross/linux: arm64: defconfig: enable more cpufreq governors arm64: defconfig: enable thermal sensor on QCOM platforms arm64: defconfig: Enable the APCS IPC driver on Qualcomm platforms Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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8d361e4018 |
Amlogic defconfig fixes for v4.17
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Arnd Bergmann
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89fe3e9b55 |
Renesas ARM64 Based SoC Defconfig Updates for v4.17
Enable the following to allow them to be more widely exercised: * Newly added R8A77965 and R8A77980 SoCs * PWM and USB as used on R-Car Gen3 SoCs -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE4nzZofWswv9L/nKF189kaWo3T74FAlqrsFAACgkQ189kaWo3 T74aUA//XqcEz2mbp+CnO6tfAhRnWP9tAQ4MTOvs9TaWR0k97dFIWskVta5Q78eE NHsHtmsck0WX+MsBq/aLJ6Vch2QsUn+e/KcaV2UyjLOeL4g4KJYLF2S0iVoiNRW+ 7HmL0Lv5HyI64fGRHzO8BrrGFEYm0l54eRkg74GiQoLApyJmd/2sMsgxT7cWVpp7 pjQzTfIzI+Z0h5S83paCInZVaLztmvTnm1ZVoxjHwgtHOHgjmm+6Tn5YDyv5AxG1 xkfYH5rREOPpdj7ZcLktzQ7XPfXqGiwT3qPmx8MuXSRrG4AcTaNSYtqfr2S6yLm5 PlY0352xLSt+sBZw3va0sobcZOGxkPAmwwycw6yU0FST/hSgpbVIKmCetFD2aYIg jltBUzRN5ST1A0/i9IAG1lruwYyzzVH/h40AQcH4CT5HvLI8k1e0Omp0N2eJie4c 1esYFW453l1+VyHPGan7Nmj/dgh8pDvu1GQyqdEPnMoP1YnkiMkhc9JuMDTrARWS KdRLc9ysPUpHsyEh1RH/0nlc0262tw7l+HEQiPCT8iaY+x6iYLoxwXkRz8KYiwN9 MrZo3eqOjJdL5FXO8C/Z577jOYaZv8/do9FeEQdmVdqObgnDcJdKYenFxBXpr3RX mruqjrctjcUwQ632ZSR0gf/su7E4rS3qpH+X8T8D6RxbER232fg= =heZq -----END PGP SIGNATURE----- Merge tag 'renesas-arm64-defconfig-for-v4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc Pull "Renesas ARM64 Based SoC Defconfig Updates for v4.17" from Simon Horman: Enable the following to allow them to be more widely exercised: * Newly added R8A77965 and R8A77980 SoCs * PWM and USB as used on R-Car Gen3 SoCs * tag 'renesas-arm64-defconfig-for-v4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/horms/renesas: arm64: defconfig: enable R8A77965 SoC arm64: defconfig: Enable PWM and USB for R-Car arm64: defconfig: enable R8A77980 SoC |
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Arnd Bergmann
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6a5f82e06a |
arm64: Default configuration updates for v4.17-rc1
Enable the BPMP thermal and CPU frequency drivers as well as make sure that the Tegra SMMU is enabled by default because there's no fun without it. Also enable initial Tegra194 support. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAlqr0O4THHRyZWRpbmdA bnZpZGlhLmNvbQAKCRDdI6zXfz6zocYJD/sFwO8dYXUhaRH9rS586XhNzxdMaRFe q6/NDZ/K0KQ92BMvMDYYJBn8TqeuesEDCv08DWizYO8Bjpw1jcJyKZe3so631kak CvAI8RZHVAe/E7jKLxvS+WcYxblMfZ9/4k9/ASVK7VreodNwRx07ftHaLv41tXUl prgIf8xaeRAjs8pWAOYVT5wjMVK/1qORyZty0C93BapawMGDKLl6+geVyb8JlH2K RQ1VNbMzeLfOHLNuU/34cViO4LaGlesjIxuVtKqmsp0qBFoqqtLfCtdpZ5BZj519 3FGwXdO5KZMQ8SosNmE8nfdU7fixDSjmu67Kei185Huko9F+jFLNsMsefBYOG9Hh EmU0+KPJTpcEUlWi//Vr3VRXJ+1iwLrAmgCYYgTPSApasTs5jBPdM2PM1bxDdkqc zB7daX8DAK5mb7Hfld70ZpfuWGMkHqNabDcnvL5bDOMVgFH0animARxX/Gr4ktCa KBp4zwlv7xJq9yLIMbvOgCwjEWqMAYrPHPaQ15AgMkzucb32j7WCpnk+M2YmXuOh pgzziU27pGO5D/NbHjSVku4O/XZWjFiCHy2tbYtFEt0pz4QLGRG/jm2CA1woAIVp J5NDKqZ8irfyk5ZIKUA6lhkg2SxZ9E/Ua8WyvF07DjpPykGrNDwRcazh/LYXryYh raRtzJij4wdoJA== =Lnk+ -----END PGP SIGNATURE----- Merge tag 'tegra-for-4.17-arm64-defconfig' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/soc Pull "arm64: Default configuration updates for v4.17-rc1" from Thierry Reding: Enable the BPMP thermal and CPU frequency drivers as well as make sure that the Tegra SMMU is enabled by default because there's no fun without it. Also enable initial Tegra194 support. * tag 'tegra-for-4.17-arm64-defconfig' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux: arm64: defconfig: Enable the Tegra SMMU by default arm64: defconfig: Enable CONFIG_TEGRA_BPMP_THERMAL arm64: defconfig: Enable CONFIG_ARM_TEGRA186_CPUFREQ arm64: defconfig: Enable NVIDIA Tegra194 support |
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Arnd Bergmann
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610bf412e4 |
Freescale arm64 device tree fixups for 4.17:
- It reverts a couple of patches that "fix" DTC warnings on IFC memory
controller in a wrong way. We will start over agagin to address the
DTC warnings later.
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Merge tag 'imx-dt64-4.17-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
Pull "Freescale arm64 device tree fixups for 4.17" from Shawn Guo:
- It reverts a couple of patches that "fix" DTC warnings on IFC memory
controller in a wrong way. We will start over agagin to address the
DTC warnings later.
* tag 'imx-dt64-4.17-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
Revert "dt-bindings: ifc: Fix the unit address format in the examples"
Revert "arm64: dts: fsl: fix ifc simple-bus unit address format warnings"
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Arnd Bergmann
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38d03be7cb |
SoCFPGA DTS updates for v4.17
- Fix GIC PPI warning - Stratix10 platform updates - Disable over-current for Arria10 devkit - Enable watchdog timer -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJatRq4AAoJEBmUBAuBoyj0W4gP/03TAWE15A2ClnErWoy8Vr9C l0Ery0xv+U3KBpAgtqZobDDBC2YMe1kf4KR8XeoeU01lYvaiEZHNRenvVcMxpFKy cgTMGadiJRKHwx77Toa0GZeIGQuPcl5bwTvq91fEMMW9YTXl7Wn+IHdX5f+6Xupw mplRAvpcZC4fQylPtYnYpShA2lnZbcjzpt8FvtD4PTQEg5QMye6pf56zEp5MXM05 SaLEjqOX0DtsXCfuGq4BmAsgo6IV1AzO9QE1T3AoCm0km7B4y9sd4lbpBKOfvO0t 1b1dANhj9Evxw39er/4NYL+XDLjZEbEWHwjekmfiNx7Z+9Fj3QTbkaNnWi6EyPdX M8SlRZHOnpoWigPChS54no68vLbGNaI4mBdXcdogA32EkEeXJWwLOjqzoZ8dYdeq ubUWvTIpJzgJsYtBJOWVAloiMhtJF/nplVYdfElSz7wCYkJXmy239/ddM0FaLYcs diXgxQKSxQmKXXze/RQ0bT1agfisOQ0H09yja/XUKNeuWvoCyNasnMveQd4MPVjk sNMPsKSvnynGgFePhU8qt/MjREsZOQ8uBfWsbNYRLcNYNc2boBUAcW6gwIWWhtsw 9QlXGbreHVOjXzbPTHoEAALuDPT5OxYGjigZAbAfqzrDqW1JuKX2S8ePv624pcte fSHRpAPrtqLEPR5ES/kD =PpB0 -----END PGP SIGNATURE----- Merge tag 'socfpga_dts_for_v4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/dt Pull "SoCFPGA DTS updates for v4.17" from Dinh Nguyen: - Fix GIC PPI warning - Stratix10 platform updates - Disable over-current for Arria10 devkit - Enable watchdog timer * tag 'socfpga_dts_for_v4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: arm: dts: socfpga: fix GIC PPI warning arm64: dts: stratix10: disable false USB overcurrent on devkit arm64: dts: stratix10: enable watchdog timer on the S10 devkit |