Move the definition of 'struct pm_ops' and related functions from <linux/pm.h>
to <linux/suspend.h> .
There are, at least, the following reasons to do that:
* 'struct pm_ops' is specifically related to suspend and not to the power
management in general.
* As long as 'struct pm_ops' is defined in <linux/pm.h>, any modification of it
causes the entire kernel to be recompiled, which is unnecessary and annoying.
* Some suspend-related features are already defined in <linux/suspend.h>, so it
is logical to move the definition of 'struct pm_ops' into there.
* 'struct hibernation_ops', being the hibernation-related counterpart of
'struct pm_ops', is defined in <linux/suspend.h> .
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Acked-by: Pavel Machek <pavel@ucw.cz>
Cc: Len Brown <lenb@kernel.org>
Cc: Greg KH <greg@kroah.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This patch adds support for the other three palette formats possible with
the PXA LCD controller. This is required on boards where an LCD is connected
with all its 18 bits. With this patch, it's possible to use an 8-bit mode
with 18-bit palette entries. This used to be possible in 2.4 kernels but
disappeared in 2.6. With current kernels, you can only get wrong colours
out of an LCD connected this way.
Users can choose the palette format by doing something like this
in their board definition:
static struct pxafb_mach_info my_fb_info = {
[...]
.lccr3 = LCCR3_OutEnH | LCCR3_PixFlEdg | LCCR3_PDFOR_3,
.lccr4 = LCCR4_PAL_FOR_2,
[...]
};
Signed-off-by: Hans J. Koch <hjk@linutronix.de>
Signed-off-by: Antonino Daplas <adaplas@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This patch provides core support for CM-X270 platform.
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
pxa_gpio_mode() is a universal call that fiddles with the GAFR
(gpio alternate function register.) GAFR does not exist on PXA3
CPUs, but instead the alternate functions are controlled via the
MFP support code.
Platforms are expected to configure the MFP according to their
needs in their platform support code rather than drivers. We
extend this idea to the GAFR, and make the gpio_direction_*()
functions purely operate on the GPIO level.
This means platform support code is entirely responsible for
configuring the GPIOs alternate functions on all PXA CPU types.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Make the cpu_is_pxaXXX() macros define to zero when support for a
particular CPU is disabled. This allows us to eliminate code for
CPUs which aren't enabled.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This definition produces processor specific code in generic function
pxa_gpio_mode(), thus creating inconsistencies for support of pxa25x
and pxa27x in a single zImage.
As David Brownell suggests, make it a run-time variable and initialize
at run-time according to the number of GPIOs on the processor. For now
the initialization happens in pxa_init_irq_gpio(), since there is
already a parameter for that, besides, this is and MUST be earlier
than any subsequent calls to pxa_gpio_mode().
Signed-off-by: eric miao <eric.y.miao@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Extracted from patch by Eric Miao, this adds the cpu_is_xxx() macros
for identifying PXA3 SoCs.
Signed-off-by: eric miao <eric.y.miao@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Allow the generic clock support code to fiddle with the CKEN register
and mark pxa_set_cken() deprecated.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
get_lcdclk_frequency_10khz() is now redundant, remove it. Hide
pxa27x_get_lcdclk_frequency_10khz() from public view.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Convert the corgi backlight driver to a more generic version
so it can be reused by other code rather than being Zaurus/PXA
specific.
Signed-off-by: Richard Purdie <rpurdie@rpsys.net>
1. split pxa_cpu_suspend to pxa25x_cpu_suspend and pxa27x_cpu_suspend
and make pxa25x_cpu_pm_enter() and pxa27x_cpu_pm_enter() to invoke
the corresponding _suspend functions, thus remove all those ugly
#ifdef .. #endif out of sleep.S
2. move the declarations of those suspend functions to pm.h
note: this is not a clean enough solution until all the pxa25x and
pxa27x specific part is further removed out of sleep.S, sleep.S is
supposed to contain generic code only
Signed-off-by: eric miao <eric.y.miao@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
1. introduce a structure pxa_cpu_pm_fns for pxa25x/pxa27x specific
operations as follows:
struct pxa_cpu_pm_fns {
int save_size;
void (*save)(unsigned long *);
void (*restore)(unsigned long *);
int (*valid)(suspend_state_t state);
void (*enter)(suspend_state_t state);
}
2. processor specific registers saving and restoring are performed
by calling the corresponding (*save) and (*restore)
3. pxa_cpu_pm_fns->save_size should be initialized to the required
size for processor specific registers saving, the allocated
memory address will be passed to (*save) and (*restore)
memory allocation happens early in pxa_pm_init(), and save_size
should be assigned prior to this (which is usually true, since
pxa_pm_init() happens in device_initcall()
4. there're some redundancies for those SLEEP_SAVE_XXX and related
macros, will be fixed later, one way possible is for the system
devices to handle the specific registers saving and restoring
Signed-off-by: eric miao <eric.y.miao@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch lets the pxa2xx_udc use the generic gpio layer,
on the relevant PXA and IXP systems.
Signed-off-by: Milan Svoboda <msvoboda@ra.rockwell.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Since the number of dma channels varies between pxa25x and pxa27x, it
introduces some specific code in dma.c. This patch moves the specific
code to pxa25x.c and pxa27x.c and makes dma.c more generic.
1. add pxa_init_dma() for dma initialization, the number of channels
are passed in by the argument
2. add a "prio" field to the "struct pxa_dma_channel" for the channel
priority, and is initialized in pxa_init_dma()
3. use a general priority comparison with the channels "prio" field so
to remove the processor specific pxa_for_each_dma_prio macro, this
is not lightning fast as the original one, but it is acceptable as
it happens when requesting dma, which is usually not so performance
critical
Signed-off-by: eric miao <eric.miao@marvell.com>
Acked-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
ICIP2 is not examined during IRQ entrance, this patch add the
checking if the processor is PXA27x or later, with CoreG bits
in CPUID (Core Generation) > 1
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
1. define PXA_GPIO_IRQ_BASE to be right after the internal IRQs,
and define PXA_GPIO_IRQ_NUM to be 128 for all PXA2xx variants
2. make the code specific to the high IRQ numbers (32..64) to be
PXA27x specific
3. add a function pxa_init_irq_high() to initialize the internal
high IRQ chip, the invoke of this function could be moved to
PXA27x specific initialization code
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
1. PXA_IRQ_SKIP is defined to be 7 on PXA25x so that the first IRQ
starts from zero. This makes IRQ numbering inconsistent between
PXA25x and PXA27x. Remove this macro so that the same IRQ_XXXXX
definition has the same value on both PXA25x and PXA27x.
2. make IRQ_SSP3..IRQ_PWRI2C valid only if PXA27x is defined, this
avoids unintentional use of these macros on PXA25x
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
pxamci.h redefines the MMC registers differently so they can be used
with ioremap. Remove the incompatible definitions from pxa-regs.h.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
pxa_pm_finish() does nothing but return zero. The core code
does nothing with this return value, and will not try to call
the finish method in the pm_ops structure if it is NULL.
Therefore, we can remove this useless function.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The default value passed through to pxa_gpio_mode() is lost
due to a missing GPIO_DFLT_HIGH mask for nonzero values. The enclosed
patch fixes this programming error.
Signed-off-by: Bill Gatliff <bgat@billgatliff.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/drzeus/mmc: (46 commits)
mmc-omap: Clean up omap set_ios and make MMC_POWER_ON work
mmc-omap: Fix omap to use MMC_POWER_ON
mmc-omap: add missing '\n'
mmc: make tifm_sd_set_dma_data() static
mmc: remove old card states
mmc: support unsafe resume of cards
mmc: separate out reading EXT_CSD
mmc: break apart switch function
MMC: Fix handling of low-voltage cards
MMC: Consolidate voltage definitions
mmc: add bus handler
wbsd: check for data opcode earlier
mmc: Separate out protocol ops
mmc: Move core functions to subdir
mmc: deprecate mmc bus topology
mmc: remove card upon suspend
mmc: allow suspended block driver to be removed
mmc: Flush pending detects on host removal
mmc: Move host and card drivers to subdirs
mmc: Move queue functions to mmc_block
...
All host drivers were #include:ing mmc/protocol.h just to
get access to the OCR bit defines. Move these to host.h instead.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
This patch removes the unnecessary bit number from CKENnn_XXXX
definitions for PXA, so that
CKEN0_PWM0 --> CKEN_PWM0
CKEN1_PWM1 --> CKEN_PWM1
...
CKEN24_CAMERA --> CKEN_CAMERA
The reasons for the change of these defitions are:
1. they do not scale - they are currently valid for pxa2xx, but
definitely not valid for pxa3xx, e.g., pxa3xx has bit 3 for camera
instead of bit 24
2. they are unnecessary - the peripheral name within the definition
has already announced its usage, we don't need those bit numbers
to know which peripheral we are going to enable/disable clock for
3. they are inconvenient - think about this: a driver programmer
for pxa has to remember which bit in the CKEN register to turn
on/off
Another change in the patch is to make the definitions equal to its
clock bit index, so that
#define CKEN_CAMERA (24)
instead of
#define CKEN_CAMERA (1 << 24)
this change, however, will add a run-time bit shift operation in
pxa_set_cken(), but the benefit of this change is that it scales
when bit index exceeds 32, e.g., pxa3xx has two registers CKENA
and CKENB, totally 64 bit for this, suppose CAMERA clock enabling
bit is CKENB:10, one can simply define CKEN_CAMERA to be (32 + 10)
and so that pxa_set_cken() need minimum change to adapt to that.
Signed-off-by: eric miao <eric.y.miao@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Reposted patch for kernel 2.6.21-rc2.
The driver i2c-pxa doesn't set the class member in i2c_adapter, which
is used to register the I2C adapter. The hwmon (sensors) drivers (e.g.
adm1021) that are connected to a i2c-pxa adapter don't attach because
they expect that the adapter supports class I2C_CLASS_HWMON.
This patch adds functionality to allow platforms to set the class and
pass it as platform_data to the i2c-pxa driver. Sample usage in
platform code:
static struct i2c_pxa_platform_data my_i2c_platform_data = {
.class = I2C_CLASS_HWMON
};
static void __init my_platform_init(void)
{
(void) platform_add_devices(devices, ARRAY_SIZE(devices));
pxa_set_i2c_info(&my_i2c_platform_data);
}
Signed-off-by: Matej Kenda <matej.kenda@hermes-softlab.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
It has been reported by Julian Deng that configuring the pxa27x i2c SCL line as output generates a short negative pulse on it during the call to pxa_gpio_mode(GPIO117_I2CSCL_MD); as it first switches it to output and then configures it for the alternate function. The SCL line is in fact bidirectional and can also be configured as 117 | GPIO_ALT_FN_1_IN, in which case the pulse is not generated. This is exactly what this patch does.
Author: Julian Deng <dengtj@sitek.cn>
Signed-off-by: G. Liakhovetski <gl@dsa-ac.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
It's been pointed out that output GPIOs should have an initial value, to
avoid signal glitching ... among other things, it can be some time before
a driver is ready. This patch corrects that oversight, fixing
- documentation
- platforms supporting the GPIO interface
- users of that call (just one for now, others are pending)
There's only one user of this call for now since most platforms are still
using non-generic GPIO setup code, which in most cases already couples the
initial value with its "set output mode" request.
Note that most platforms are clear about the hardware letting the output
value be set before the pin direction is changed, but the s3c241x docs are
vague on that topic ... so those chips might not avoid the glitches.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Acked-by: Andrew Victor <andrew@sanpeople.com>
Acked-by: Milan Svoboda <msvoboda@ra.rockwell.com>
Acked-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Cc: Russell King <rmk@arm.linux.org.uk>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Based on the discussion last december (http://lkml.org/lkml/2006/12/20/242),
this patch:
- moves the PXA_LAST_GPIO check into pxa_gpio_mode
- fixes comment and includes in gpio.h
- replaces the gpio_set/get_value macros with inline
functions and adds a non-inline version to avoid
code explosion when gpio is not a constant.
Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Nicolas Pitre <nico@cam.org>
Cc: Russell King <rmk@arm.linux.org.uk>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (117 commits)
[ARM] 4058/2: iop32x: set ->broken_parity_status on n2100 onboard r8169 ports
[ARM] 4140/1: AACI stability add ac97 timeout and retries
[ARM] 4139/1: AACI record support
[ARM] 4138/1: AACI: multiple channel support for IRQ handling
[ARM] 4211/1: Provide a defconfig for ns9xxx
[ARM] 4210/1: base for new machine type "NetSilicon NS9360"
[ARM] 4222/1: S3C2443: Remove reference to missing S3C2443_PM
[ARM] 4221/1: S3C2443: DMA support
[ARM] 4220/1: S3C24XX: DMA system initialised from sysdev
[ARM] 4219/1: S3C2443: DMA source definitions
[ARM] 4218/1: S3C2412: fix CONFIG_CPU_S3C2412_ONLY wrt to S3C2443
[ARM] 4217/1: S3C24XX: remove the dma channel show at startup
[ARM] 4090/2: avoid clash between PXA and SA1111 defines
[ARM] 4216/1: add .gitignore entries for ARM specific files
[ARM] 4214/2: S3C2410: Add Armzone QT2410
[ARM] 4215/1: s3c2410 usb device: per-platform vbus_draw
[ARM] 4213/1: S3C2410 - Update definition of ADCTSC_XY_PST
[ARM] 4098/1: ARM: rtc_lock only used with rtc_cmos
[ARM] 4137/1: Add kexec support
[ARM] 4201/1: SMP barriers pair needed for the secondary boot process
...
Fix up conflict due to typedef removal in sound/arm/aaci.h
get_irqnr_preamble allows machines to take some action before entering the
get_irqnr_and_base loop. On iop we enable cp6 access.
arch_ret_to_user is added to the userspace return path to allow individual
architectures to take actions, like disabling coprocessor access, before
the final return to userspace.
Per Nicolas Pitre's note, there is no need to cp_wait on the return to user
as the latency to return is sufficient.
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The Lubbock platform uses both a PXA25x and a SA1111 at the same time.
Both chips have the same "Serial Audio Controller" registers although
the SA1111 one is never expected to be used in preference to the PXA25x
one. So let's disable the SA1111 defines whenever compilation is for a
PXA architecture and make the PXA defines always defined.
This removes a bunch of "already defined" warnings as well since the
current hack to prevent them depended on include ordering which wasn't
always right.
While at it, clean up the SA1111 defines allowing to get rid of the
__CCREG() macro.
Signed-off-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patchs adds some missing register bit defs for the PXA SSP ports audio registers and fixes up some other broken bit definitions as noticed by Russell.
Signed-off-by: Liam Girdwood <liam.girdwood@wolfsonmicro.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch renames pxa_gpio_set/get functions defined in drivers/usb/gadget/pxa2xx_udc.h to udc_gpio_set/get.
These functions are moved from drivers/usb/gadget/pxa2xx_udc.h to include/asm-arm/arch-pxa2xx/udc.h
Creates new functions: udc_gpio_to_irq, udc_gpio_init_vbus, udc_gpio_init_pullup in include/asm-arm/arch-pxa2xx/udc.h. These functions are used in drivers/usb/gadget/pxa2xx_udc.c instead of direct low-level (pxa2xx only) functions.
Creates all these udc_gpio_* functions in include/asm-arm/arch-ixp4xx/udc.h. This implementation has no real code because ixp4xx doesn't use vbus - only vbus uses all these gpio functions (and because ixp4xx misses any function which converts number of gpio pin into it's irq).
This is next step to make pxa2xx_udc fully work on ixp4xx platform.
Signed-off-by: Milan Svoboda <msvoboda@ra.rockwell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Of the possible SSP frame formats (FRF bits in SSCR0), only SSCR0_PSP is defined. Other possible formats are Motorola SPI (0<<4), TI SSP (1<<4) and Microwire (2<<4). Attached patch adds a definition SSCR0_TISSP.
This mode is used for the sound codec attached to the PXA272 SSP1 of some HTC PDA phones.
Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The SSCR0_SlotsPerFrm macro writes a 3-bit value to bits [2:0], while the correct location of FRDC in SSCR0 is at bits [26:24]. This patch adds the missing "<< 24".
Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Stabilize PIO mode transfers against a range of word sizes and FIFO
thresholds and fixes word size setup/override issues.
1) 16 and 32 bit DMA/PIO transfers broken due to timing differences.
2) Potential for bad transfer counts due to transfer size assumptions.
3) Setup function broken is multiple ways.
4) Per transfer bit_per_word changes break DMA setup in pump_tranfers.
5) False positive timeout are not errors.
6) Changes in pxa2xx_spi_chip not effective in calls to setup.
7) Timeout scaling wrong for PXA255 NSSP.
8) Driver leaks memory while busy during unloading.
Known issues:
SPI_CS_HIGH and SPI_LSB_FIRST settings in struct spi_device are not handled.
Testing:
This patch has been test against the "random length, random bits/word,
random data (verified on loopback) and stepped baud rate by octaves
(3.6MHz to 115kHz)" test. It is robust in PIO mode, using any
combination of tx and rx thresholds, and also in DMA mode (which
internally computes the thresholds).
Much thanks to Ned Forrester for exhaustive reviews, fixes and testing.
The driver is substantially better for his efforts.
Signed-off-by: Stephen Street <stephen@streetfiresound.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Merge:
Atmel AT91RM9200 and AT91SAM9260 changes
General ARM developments
Disconfiguous memory cleanups
64-bit/32-bit division and sched_clock extension patches
EP93xx support changes
IOP support changes
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Most architectures have fairly simple discontiguous memory - a
simple set of successive regions each containing some memory.
These can be described simply as a log2 of their maximum size,
along with the base address of the first region and the number
of regions.
The base address is already described by PHYS_PFN_OFFSET, and
the number of regions via the MAX_NUMNODES and the number of
online nodes.
If we then supply the log2 of their maximum size, all the other
discontigmem macros can move into generic code.
There is one exception: lh7a40x seems to have a more complicated
setup; this is left alone.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch updates a bit definition name to align with the PXA27x
spec.EORINTR(End-Of-Receive Intr) bit in DCSR register (DMA Channel
Control/Status Register)
Signed-off-by: Stanley Cai <stanley.w.cai@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
