Commit Graph

59 Commits

Author SHA1 Message Date
Jean-Christophe PLAGNIOL-VILLARD
82015c4eae ARM: at91: add Shutdown Controller (SHDWC) DT support
Use a string to specific the wakeup mode to make it more readable.

Add the Real-time Clock Wake-up support too for sam9g45 and sam9x5.
Add AT91_SHDW_CPTWK0_MAX to specific the Max of the Wakeup Counter.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-03-15 23:38:02 +08:00
Jean-Christophe PLAGNIOL-VILLARD
a7776ec625 ARM: at91: add ram controller DT support
We can now drop the call to ioremap_registers() as we have the binding for the
SDRAM/DDR Controller.

Drop ioremap_registers() for sam9x5 too.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-03-15 23:37:56 +08:00
Jean-Christophe PLAGNIOL-VILLARD
c8082d344a ARM: at91: add RSTC (Reset Controller) dt support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-03-15 23:31:22 +08:00
Jean-Christophe PLAGNIOL-VILLARD
eb5e76ffd4 ARM: at91: add pmc DT support
Specified the main Oscillator via clock binding.
This will allow to do not hardcode it anymore in the DT board at 12MHz.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-03-15 23:31:14 +08:00
Jean-Christophe PLAGNIOL-VILLARD
10f71c28b6 ARM: at91: sam9x5 add i2c DT support
For now on use i2c-gpio driver on the same pin as the hardware IP.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-03-15 23:29:48 +08:00
Jean-Christophe PLAGNIOL-VILLARD
86a89f4ff6 ARM: at91: sam9x5 add nand support
Enable the nand in the cpu module with the partition.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-03-15 23:29:19 +08:00
Nicolas Ferre
582d5fbd4e ARM: at91/pio: add new PIO3 features
This patch adds the support for new PIO controller found on some
at91sam SOCs.
- more peripheral multiplexing
- more features to configure on a PIO (pull-down, Schmitt trigger, debouncer)
- support for several IRQ triggering features (type and polarity)

Support for those new features are retrieved from the device tree
compatibility string.

Debugfs at91_gpio file is updated to monitor configuration.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-03-01 13:38:50 +01:00
Nicolas Ferre
21f8187278 ARM: at91/gpio: add irqdomain and DT support
Add "legacy" type of irqdomain to preserve old-style numbering
and allow smooth transition for both DT and non-DT cases.

Original idea and code by Jean-Christophe Plagniol-Villard.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-03-01 13:29:01 +01:00
Nicolas Ferre
467f1cf504 ARM: at91/at91sam9x5: Device tree definition files
Device tree include file for the AT91SAM9x5 SoC family.
An additional .dtsi file is created to describe the generic
SAM9x5 CPU Module (CM).
Device tree source files for each Evaluation Kit that are using
the generic CPU Module and the carrier board. The selection of
available peripherals is done in this .dts file.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-02-03 15:36:41 +01:00