This device requires a fundamental reset when recovering from EEH.
Signed-off-by: Ron Mercer <ron.mercer@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This line was accidentally left out of the previous commit #
da03945140 ("qlge: Fix firmware mailbox
command timeout.").
Signed-off-by: Ron Mercer <ron.mercer@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The mailbox command process would only process a maximum of 5 unrelated
firmware events while waiting for it's command completion status.
It should process an unlimited number of events while waiting for a maximum of 5 seconds.
Signed-off-by: Ron Mercer <ron.mercer@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Clean up driver resources without touch the hardware. Add pci
save/restore state.
Signed-off-by: Ron Mercer <ron.mercer@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This was accidentally omitted from one of the previous patches for firmware event
handling. The handler needs to the enable firmware irq mask when it's done
processing or it may not get any more events interrupts.
Signed-off-by: Ron Mercer <ron.mercer@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Call set_multi API after reset recovery. This was exposed by tripping
tx_timeout.
Signed-off-by: Ron Mercer <ron.mercer@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Add wait for NIC fifo and MGMNT fifo to empty before applying reset.
Otherwise broken frames can be processed by management processor and
cause it to hang.
Signed-off-by: Ron Mercer <ron.mercer@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The addresses were being added to the filter properly, but were not
being enabled. This adds enable bit to filter write.
Signed-off-by: Ron Mercer <ron.mercer@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Broadcast/multicast should always be routed to the default (zeroeth) rx
ring. Broadcast frames are already routed correctly. This fixes
routing for multicast frames.
Signed-off-by: Ron Mercer <ron.mercer@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Currently frames are routed based on their type and MAC address. This
patch adds the port number on which the frame arrived to the routing.
This prevents problems in the case where both interfaces have the same MAC address in
a routing configuration.
Signed-off-by: Ron Mercer <ron.mercer@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Fix RX queue table size and change from random to default hash values.
Signed-off-by: Ron Mercer <ron.mercer@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Get rid of spinlock and private mutex usage for exclusive access to the
HW semaphore register. rtnl_lock already creates exclusive access to
this register in all driver API.
Add rtnl to firmware worker threads that also use the HW semaphore register.
Signed-off-by: Ron Mercer <ron.mercer@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Check that we are not already polling firmware events before we queue the
firmware event worker, then disable firmware interrupts.
Otherwise we can queue the same event multiple times.
Signed-off-by: Ron Mercer <ron.mercer@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Move the call to rtnl_lock() to before the internal call to
ql_adapter_down()/ql_adapter_up(). This prevents collisions that can
happen when recovering from an asic error.
Signed-off-by: Ron Mercer <ron.mercer@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
ql_clear_routing_entries() takes/gives it's own hardware semaphore since
it is called from more than one place. ql_route_initialize() should
make this call and THEN take it's own semaphore before doing it's work.
Signed-off-by: Ron Mercer <ron.mercer@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
In a couple of cases collapse some extra code like:
int retval = NETDEV_TX_OK;
...
return retval;
into
return NETDEV_TX_OK;
Signed-off-by: Stephen Hemminger <shemminger@vyatta.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
TX completions were running in a workqueue queued by the ISR. This
patch moves the processing of TX completions to an existing RSS NAPI
context.
Now each irq vector runs NAPI for one RSS ring and one or more TX
completion rings.
Signed-off-by: Ron Mercer <ron.mercer@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Currently we downshift to MSI/Legacy if we don't get enough vectors for
cpu_count RSS rings plus cpu_count TX completion rings. This patch
allows running MSIX with the vector count that the platform provides.
Signed-off-by: Ron Mercer <ron.mercer@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Currently we have three types of RX rings.
1) Default ring - services rx_ring for broadcast/multicast, handles
firmware events, and errors.
2) TX completion ring - handles only outbound completions.
3) RSS ring - handles only inbound completions.
This patch gets rid of the default ring type and moves it's functionality
into the first RSS ring. This makes better use of MSIX vectors since
they are a limited resource on some platforms.
Signed-off-by: Ron Mercer <ron.mercer@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
PCI drivers that implement the struct pci_error_handlers' error_detected
callback should return PCI_ERS_RESULT_DISCONNECT if the state passed in is
pci_channel_io_perm_failure. This patch fixes the issue for qlge.
Signed-off-by: Dean Nelson <dnelson@redhat.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Some usage was only sizing a pointer rather than the data type.
Signed-off-by: Ron Mercer <ron.mercer@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
We need to set/clear the mac address register when the link goes up/down
respectively. Without this both ports of a 2-port device can end up
with the same mac address in a bonding scenario.
The new ql_link_on() and ql_link_off() will also be used in handling
certain firmware events.
Signed-off-by: Ron Mercer <ron.mercer@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This addes functionality to set/clear the MAC address in the hardware
when the link goes up/down.
The MAC address register is persistent across function resets. In
bonding the same address can bounce from one port to the other. This
can cause packets to be delivered to the wrong port.
This patch clears the MAC address in the hardware when the link is down
and sets it when the link comes up.
It was found that pulling/pushing the cable from one port to another
causes the same MAC address to be in both ports.
The next patch in this series will use this functionality as well.
Signed-off-by: Ron Mercer <ron.mercer@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The caller will free acquired resouces if a failure occurs.
Signed-off-by: Ron Mercer <ron.mercer@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
We were turning on the carrier without verifying the link was up.
This adds link up to the link initialize check before turning carrier
on.
Signed-off-by: Ron Mercer <ron.mercer@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Not clearing the routing bits can cause frames to erroneously get routed to
management processor.
Signed-off-by: Ron Mercer <ron.mercer@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The hardware semaphore covers the configuration register as well as the
ICB registers. The ICB high and low regs contain the address of the
initialization control block and the config register is used to signal
the hardware that a block is ready to be downloaded. Currently we were
only protecting the ICB regs. This changes expands to cover the config
register as well.
Signed-off-by: Ron Mercer <ron.mercer@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
RX buffer rings can be comprised of non-contiguous fixed
size chunks of memory. The ring is given to the hardware
as a pointer to a location that stores the location of
the queue. If the queue is greater than 4096 bytes then
the hardware gets a list of said pointers.
This patch addes the necessary logic to generate the list if
the queue size exceeds 4096.
Signed-off-by: Ron Mercer <ron.mercer@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The alignment was on size of queue boundary, but the hardware
only requires 4-byte alignment.
Signed-off-by: Ron Mercer <ron.mercer@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Currently we support only PCIe NIC functions zero and one, and FCoE
functions as 3 and 4. Future configurations can mix these up in any
fashion.
This patch removes the 0-1 dependancy and allows usage of any of the 4
functions. We also find the alternate NIC function (if exist) and
determine our port number based on the comparison of the two functions:
Lower function number gets first port, higher function gets second port.
Signed-off-by: Ron Mercer <ron.mercer@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Extract either manufacturer or Bladecenter Open Fabric
Manager (BOFM) MAC address. BOFM may indicate an
alternate MAC address. This patch honors that request
by extracting the MAC address from a different
flash location if a flag is set.
Signed-off-by: Ron Mercer <ron.mercer@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The max frame size register is set higher than the MTU to
accomodate FCoE frames.
Signed-off-by: Ron Mercer <ron.mercer@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Not necessary if hardware supports 65536 as it's the default setting.
Signed-off-by: Ron Mercer <ron.mercer@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Some firmware mailbox commands require the firmware to
communicate with the FCoE driver running on another
PCI function. This can potentially take several seconds.
This wait is done in process context only.
Signed-off-by: Ron Mercer <ron.mercer@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
There are 8 banks of 'sub-registers' each of which are accessed
through address/data register pair. An example would be reading
flash or the xgmac. Accessing these require the driver to wait for
a ready bit before writing the address and then accessing the data.
This patch increases the timeout to 100us to prevent timeouts
that have been seen on some platforms.
These register are accessed in process context only.
Signed-off-by: Ron Mercer <ron.mercer@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Since an FCoE function shares a port with this NIC function, the
jumbo settings must always be in place. This patch causes the
hardware to be set up for jumbo if it is not already done.
Signed-off-by: Ron Mercer <ron.mercer@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Each firmware mailbox command can have a different number of
valid data elements. When waiting for a mailbox command to
complete it the process passes it's element count and
waits for the completion. It is possible that while waiting
an unrelated firmware async event (AE) can arrive. When this
happens, the handler will over write the element count
with the value for the newly arrived AE. This can cause
the mailbox command to not get all of it's data.
This patch restores original mailbox count at the end
of the handler.
Signed-off-by: Ron Mercer <ron.mercer@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
