Commit Graph

1014064 Commits

Author SHA1 Message Date
Marek Behún
c7dce05e63 net: phy: marvell10g: change module description
This module supports not only Alaska X, but also Alaska M.

Change module description appropriately.

Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-04-08 13:15:34 -07:00
Marek Behún
0fca947cbb net: phy: marvell10g: differentiate 88E2110 vs 88E2111
88E2111 is a variant of 88E2110 which does not support 5 gigabit speeds.

Differentiate these variants via the match_phy_device() method, since
they have the same PHY ID.

Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-04-08 13:15:34 -07:00
Marek Behún
53f111cbfa net: phy: add constants for 2.5G and 5G speed in PCS speed register
Add constants for 2.5G and 5G speed in PCS speed register into mdio.h.

Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-04-08 13:15:33 -07:00
Marek Behún
c89f27d4d2 net: phy: marvell10g: fix driver name for mv88e2110
The driver name "mv88x2110" should be instead "mv88e2110".

Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-04-08 13:15:33 -07:00
Marek Behún
9885d016ff net: phy: marvell10g: add separate structure for 88X3340
The 88X3340 contains 4 cores similar to 88X3310, but there is a
difference: it does not support xaui host mode. Instead the
corresponding MACTYPE means
  rxaui / 5gbase-r / 2500base-x / sgmii without AN

Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-04-08 13:15:33 -07:00
Marek Behún
ccbf2891de net: phy: marvell10g: support other MACTYPEs
Currently the only "changing" MACTYPE we support is when the PHY changes
between
  10gbase-r / 5gbase-r / 2500base-x / sgmii

Add support for
  usxgmii
  xaui / 5gbase-r / 2500base-x / sgmii
  rxaui / 5gbase-r / 2500base-x / sgmii
and also
  5gbase-r / 2500base-x / sgmii
for 88E2110.

Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-04-08 13:15:33 -07:00
Marek Behún
884d9a6758 net: phy: marvell10g: store temperature read method in chip strucutre
Now that we have a chip structure, we can store the temperature reading
method in this structure (OOP style).

Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-04-08 13:15:33 -07:00
Marek Behún
261a74c64b net: phy: marvell10g: check for correct supported interface mode
The 88E2110 does not support xaui nor rxaui modes. Check for correct
interface mode for different chips.

Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-04-08 13:15:33 -07:00
Marek Behún
97bbe3bd69 net: phy: marvell10g: support all rate matching modes
Add support for all rate matching modes for 88X3310 (currently only
10gbase-r is supported, but xaui and rxaui can also be used).

Add support for rate matching for 88E2110 (on 88E2110 the MACTYPE
register is at a different place).

Currently rate matching mode is selected by strapping pins (by setting
the MACTYPE register). There is work in progress to enable this driver
to deduce the best MACTYPE from the knowledge of which interface modes
are supported by the host, but this work is not finished yet.

Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-04-08 13:15:33 -07:00
Marek Behún
9ab0fbd0ff net: phy: marvell10g: add MACTYPE definitions for 88E21xx
Add all MACTYPE definitions for 88E2110, 88E2180, 88E2111 and 88E2181.

Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-04-08 13:15:33 -07:00
Marek Behún
f8ee45fcbc net: phy: marvell10g: add all MACTYPE definitions for 88X33x0
Add all MACTYPE definitions for 88X3310, 88X3310P, 88X3340 and 88X3340P.

In order to have consistent naming, rename
MV_V2_33X0_PORT_CTRL_MACTYPE_RATE_MATCH to
MV_V2_33X0_PORT_CTRL_MACTYPE_10GBASER_RATE_MATCH.

Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-04-08 13:15:33 -07:00
Marek Behún
9893f31690 net: phy: marvell10g: indicate 88X33x0 only port control registers
Rename port control registers to indicate that they are valid only for
88X33x0, not for 88E21x0.

Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-04-08 13:15:33 -07:00
Marek Behún
0d3755428d net: phy: marvell10g: allow 5gbase-r and usxgmii
These modes are also supported by these PHYs.

Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-04-08 13:15:33 -07:00
Marek Behún
283828142f net: phy: marvell10g: fix typo
This space should be a tab instead.

Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-04-08 13:15:33 -07:00
Marek Behún
bd79d9aa61 net: phy: marvell10g: rename register
The MV_V2_PORT_MAC_TYPE_* is part of the CTRL register. Rename to
MV_V2_PORT_CTRL_MACTYPE_*.

Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-04-08 13:15:33 -07:00
Cristian Ciocaltea
d8fcfbf38f ARM: dts: owl-s500-roseapplepi: Add ATC2603C PMIC
Add device tree node for ATC2603C PMIC and remove the 'fixed-3.1V'
dummy regulator used for the uSD supply.

Additionally, add 'SYSPWR' fixed regulator and provide cpu0 supply.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: Manivannan Sadhasivam <mani@kernel.org>
Link: https://lore.kernel.org/r/2e0a2931ae3757f016948e7c78e8e54afa325ae0.1615538629.git.cristian.ciocaltea@gmail.com
Link: https://lore.kernel.org/r/20210408062232.3575-1-mani@kernel.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-08 22:09:23 +02:00
Arnd Bergmann
e3e1276295 mvebu dt for 5.13 (part 1)
Add support for ATL-x530 Board (Armada 38x based)
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Merge tag 'mvebu-dt-5.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/dt

mvebu dt for 5.13 (part 1)

Add support for ATL-x530 Board (Armada 38x based)

* tag 'mvebu-dt-5.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
  ARM: dts: mvebu: Add device tree for ATL-x530 Board

Link: https://lore.kernel.org/r/87v98xbzir.fsf@BL-laptop
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-08 22:08:32 +02:00
Arnd Bergmann
2de5bb9956 Defconfig changes for omaps for v5.13
Update defconfig to have nefilter available as loadable modules
 to make the defconfig more usable for networked devices. And we now
 select SIMPLE_PM_BUS so it can be dropped. And some devices use
 EEPROM_AT25 so let's add it as a loadable module.
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Merge tag 'omap-for-v5.13/defconfig-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/defconfig

Defconfig changes for omaps for v5.13

Update defconfig to have nefilter available as loadable modules
to make the defconfig more usable for networked devices. And we now
select SIMPLE_PM_BUS so it can be dropped. And some devices use
EEPROM_AT25 so let's add it as a loadable module.

* tag 'omap-for-v5.13/defconfig-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: omap2plus_defconfig: Add AT25 EEPROM module
  ARM: omap2plus_defconfig: Enable Netfilter components as modules
  ARM: omap2plus_defconfig: Update for dropped simple-pm-bus

Link: https://lore.kernel.org/r/pull-1617703816-65652@atomide.com-3
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-08 22:05:50 +02:00
Arnd Bergmann
d515102f56 Qualcomm ARM64 defconfig udpate for 5.13
This enables the SM8350 TLMM and GCC drivers, needed to boot the
 platform.
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Merge tag 'qcom-arm64-defconfig-for-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/defconfig

Qualcomm ARM64 defconfig udpate for 5.13

This enables the SM8350 TLMM and GCC drivers, needed to boot the
platform.

* tag 'qcom-arm64-defconfig-for-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  arm64: defconfig: Enable Qualcomm SM8350 TLMM and GCC

Link: https://lore.kernel.org/r/20210404164841.712845-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-08 22:04:21 +02:00
Arnd Bergmann
a0c97a6bd6 Samsung mach/soc changes for v5.13
1. Update Krzysztof Kozlowski's email address in Maintainers.
 2. Replace deprecated pwm_request() with pwm_get() in S3C24xx.
 3. Correct kerneldoc.
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Merge tag 'samsung-soc-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/soc

Samsung mach/soc changes for v5.13

1. Update Krzysztof Kozlowski's email address in Maintainers.
2. Replace deprecated pwm_request() with pwm_get() in S3C24xx.
3. Correct kerneldoc.

* tag 'samsung-soc-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  ARM: exynos: correct kernel doc in platsmp
  ARM: s3c: Use pwm_get() in favour of pwm_request() in RX1950
  MAINTAINERS: use Krzysztof Kozlowski's Canonical address

Link: https://lore.kernel.org/r/20210407065828.7213-3-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-08 22:02:11 +02:00
Arnd Bergmann
f47e8e1437 SoC changes for omaps for v5.13
Minor non-urgent fixes for issues found by robots and few typo fixes:
 
 - Use DEFINE_DEBUGFS_ATTRIBUTE
 
 - Add missing of_node_put()
 
 - Use true and false for bool variable
 
 - Use DEFINE_SPINLOCK
 
 - Fix incorrect kerneldoc usage
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Merge tag 'omap-for-v5.13/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/soc

SoC changes for omaps for v5.13

Minor non-urgent fixes for issues found by robots and few typo fixes:

- Use DEFINE_DEBUGFS_ATTRIBUTE

- Add missing of_node_put()

- Use true and false for bool variable

- Use DEFINE_SPINLOCK

- Fix incorrect kerneldoc usage

* tag 'omap-for-v5.13/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP1: fix incorrect kernel-doc comment syntax in file
  ARM: OMAP2+: fix incorrect kernel-doc comment syntax in file
  ARM: OMAP2+: Use DEFINE_SPINLOCK() for spinlock
  ARM: OMAP2+: use true and false for bool variable
  ARM: OMAP2+: add missing call to of_node_put()
  ARM: OMAP2+: Replace DEFINE_SIMPLE_ATTRIBUTE with DEFINE_DEBUGFS_ATTRIBUTE

Link: https://lore.kernel.org/r/pull-1617703816-65652@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-08 21:56:11 +02:00
Arnd Bergmann
d74b25572a HiSilicon ARMv7 SoC updates for v5.13
- Correct the HiSilicon copyright
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Merge tag 'hisi-armv7soc-for-5.13' of git://github.com/hisilicon/linux-hisi into arm/soc

HiSilicon ARMv7 SoC updates for v5.13

- Correct the HiSilicon copyright

* tag 'hisi-armv7soc-for-5.13' of git://github.com/hisilicon/linux-hisi:
  ARM: hisi: use the correct HiSilicon copyright

Link: https://lore.kernel.org/r/eba8b55e-0969-8ca2-eca3-7c471cb0ff6f@hisilicon.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-08 21:54:57 +02:00
Arnd Bergmann
1bb2fd3880 Apple M1 SoC platform bring-up
This series brings up initial support for the Apple M1 SoC, used in the
 2020 Mac Mini, MacBook Pro, and MacBook Air models.
 
 The following features are supported in this initial port:
 
 - UART (samsung-style) with earlycon support
 - Interrupts, including affinity and IPIs (Apple Interrupt Controller)
 - SMP (through standard spin-table support)
 - simplefb-based framebuffer
 - Devicetree for the Mac Mini (should work for the others too at this
   stage)
 
 == Merge notes ==
 
 This tag is based on v5.12-rc3 and includes the following two
 dependencies merged in:
 
 * Tip of arm64/for-next/fiq: 3889ba7010
   This is a hard (build) dependency that adds support for FIQ
   interrupts, which is required for this SoC and the included AIC
   irqchip driver. It is already merged in the arm64 tree.
 
 * From tty/tty-next: 71b25f4df9
   This commit includes the Samsung UART changes that have already
   been merged into the tty tree. It is nominally a soft dependency,
   but if this series is merged first it would trigger devicetree
   validation failures as the DT included in it depends on bindings
   introduced in the tty tree.
 
   There was a merge conflict here. It has been resolved the same
   way gregkh resolved it in a later tty merge, and both tty-next
   and torvalds/master merge cleanly with this series at this time.
 
 This series additionally depends on the nVHE changes in [1] to boot,
 but we are letting those get merged through arm64.
 
 [1] https://lore.kernel.org/linux-arm-kernel/20210408131010.1109027-1-maz@kernel.org/T/#u
 
 == Testing notes ==
 
 This has been tested on an Apple M1 Mac Mini booting to a framebuffer
 and serial console, with SMP and KASLR, with an arm64 defconfig
 (+ CONFIG_FB_SIMPLE for the fb). In addition, the AIC driver now supports
 running in EL1, tested in UP mode only.
 
 == About the hardware ==
 
 These machines officially support booting unsigned/user-provided
 XNU-like kernels, with a very different boot protocol and devicetree
 format. We are developing an initial bootloader, m1n1 [1], to take care
 of as many hardware peculiarities as possible and present a standard
 Linux arm64 boot protocol and device tree. In the future, I expect that
 production setups will add U-Boot and perhaps GRUB into the boot chain,
 to make the boot process similar to other ARM64 platforms.
 
 The machines expose their debug UART over USB Type C, triggered with
 vendor-specific USB-PD commands. Currently, the easiest way to get a
 serial console on these machines is to use a second M1 box and a simple
 USB C cable [2]. You can also build a DIY interface using an Arduino, a
 FUSB302 chip or board, and a 1.2V UART-TTL adapter [3]. In the coming
 weeks we will be designing an open hardware project to provide
 serial/debug connectivity to these machines (and, hopefully, also
 support other UART-over-Type C setups from other vendors). Please
 contact me privately if you are interested in getting an early prototype
 version of one of these devices.
 
 We also have WIP/not merged yet support for loading kernels and
 interacting via dwc3 usb-gadget, which works with a standard C-C or C-A
 cable and any Linux host.
 
 A quickstart guide to booting Linux kernels on these machines is
 available at [4], and we are documenting the hardware at [5].
 
 [1] https://github.com/AsahiLinux/m1n1/
 [2] https://github.com/AsahiLinux/macvdmtool/
 [3] https://github.com/AsahiLinux/vdmtool/
 [4] https://github.com/AsahiLinux/docs/wiki/Developer-Quickstart
 [5] https://github.com/AsahiLinux/docs/wiki
 
 == Project Blurb ==
 
 Asahi Linux is an open community project dedicated to developing and
 maintaining mainline support for Apple Silicon on Linux. Feel free to
 drop by #asahi and #asahi-dev on freenode to chat with us, or check
 our website for more information on the project:
 
 https://asahilinux.org/
 
 Signed-off-by: Hector Martin <marcan@marcan.st>
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Merge tag 'm1-soc-bringup-v5' of https://github.com/AsahiLinux/linux into arm/apple-m1

Apple M1 SoC platform bring-up

This series brings up initial support for the Apple M1 SoC, used in the
2020 Mac Mini, MacBook Pro, and MacBook Air models.

The following features are supported in this initial port:

- UART (samsung-style) with earlycon support
- Interrupts, including affinity and IPIs (Apple Interrupt Controller)
- SMP (through standard spin-table support)
- simplefb-based framebuffer
- Devicetree for the Mac Mini (should work for the others too at this
  stage)

== Merge notes ==

This tag is based on v5.12-rc3 and includes the following two
dependencies merged in:

* Tip of arm64/for-next/fiq: 3889ba7010
  This is a hard (build) dependency that adds support for FIQ
  interrupts, which is required for this SoC and the included AIC
  irqchip driver. It is already merged in the arm64 tree.

* From tty/tty-next: 71b25f4df9
  This commit includes the Samsung UART changes that have already
  been merged into the tty tree. It is nominally a soft dependency,
  but if this series is merged first it would trigger devicetree
  validation failures as the DT included in it depends on bindings
  introduced in the tty tree.

  There was a merge conflict here. It has been resolved the same
  way gregkh resolved it in a later tty merge, and both tty-next
  and torvalds/master merge cleanly with this series at this time.

This series additionally depends on the nVHE changes in [1] to boot,
but we are letting those get merged through arm64.

[1] https://lore.kernel.org/linux-arm-kernel/20210408131010.1109027-1-maz@kernel.org/T/#u

== Testing notes ==

This has been tested on an Apple M1 Mac Mini booting to a framebuffer
and serial console, with SMP and KASLR, with an arm64 defconfig
(+ CONFIG_FB_SIMPLE for the fb). In addition, the AIC driver now supports
running in EL1, tested in UP mode only.

== About the hardware ==

These machines officially support booting unsigned/user-provided
XNU-like kernels, with a very different boot protocol and devicetree
format. We are developing an initial bootloader, m1n1 [1], to take care
of as many hardware peculiarities as possible and present a standard
Linux arm64 boot protocol and device tree. In the future, I expect that
production setups will add U-Boot and perhaps GRUB into the boot chain,
to make the boot process similar to other ARM64 platforms.

The machines expose their debug UART over USB Type C, triggered with
vendor-specific USB-PD commands. Currently, the easiest way to get a
serial console on these machines is to use a second M1 box and a simple
USB C cable [2]. You can also build a DIY interface using an Arduino, a
FUSB302 chip or board, and a 1.2V UART-TTL adapter [3]. In the coming
weeks we will be designing an open hardware project to provide
serial/debug connectivity to these machines (and, hopefully, also
support other UART-over-Type C setups from other vendors). Please
contact me privately if you are interested in getting an early prototype
version of one of these devices.

We also have WIP/not merged yet support for loading kernels and
interacting via dwc3 usb-gadget, which works with a standard C-C or C-A
cable and any Linux host.

A quickstart guide to booting Linux kernels on these machines is
available at [4], and we are documenting the hardware at [5].

[1] https://github.com/AsahiLinux/m1n1/
[2] https://github.com/AsahiLinux/macvdmtool/
[3] https://github.com/AsahiLinux/vdmtool/
[4] https://github.com/AsahiLinux/docs/wiki/Developer-Quickstart
[5] https://github.com/AsahiLinux/docs/wiki

== Project Blurb ==

Asahi Linux is an open community project dedicated to developing and
maintaining mainline support for Apple Silicon on Linux. Feel free to
drop by #asahi and #asahi-dev on freenode to chat with us, or check
our website for more information on the project:

https://asahilinux.org/

Signed-off-by: Hector Martin <marcan@marcan.st>

* tag 'm1-soc-bringup-v5' of https://github.com/AsahiLinux/linux:
  arm64: apple: Add initial Apple Mac mini (M1, 2020) devicetree
  dt-bindings: display: Add apple,simple-framebuffer
  arm64: Kconfig: Introduce CONFIG_ARCH_APPLE
  irqchip/apple-aic: Add support for the Apple Interrupt Controller
  dt-bindings: interrupt-controller: Add DT bindings for apple-aic
  arm64: Move ICH_ sysreg bits from arm-gic-v3.h to sysreg.h
  of/address: Add infrastructure to declare MMIO as non-posted
  asm-generic/io.h: implement pci_remap_cfgspace using ioremap_np
  arm64: Implement ioremap_np() to map MMIO as nGnRnE
  docs: driver-api: device-io: Document ioremap() variants & access funcs
  docs: driver-api: device-io: Document I/O access functions
  asm-generic/io.h:  Add a non-posted variant of ioremap()
  arm64: arch_timer: Implement support for interrupt-names
  dt-bindings: timer: arm,arch_timer: Add interrupt-names support
  arm64: cputype: Add CPU implementor & types for the Apple M1 cores
  dt-bindings: arm: cpus: Add apple,firestorm & icestorm compatibles
  dt-bindings: arm: apple: Add bindings for Apple ARM platforms
  dt-bindings: vendor-prefixes: Add apple prefix

Link: https://lore.kernel.org/r/bdb18e9f-fcd7-1e31-2224-19c0e5090706@marcan.st
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-08 21:49:34 +02:00
Arnd Bergmann
5b8c86b92c Merge branch 'apple/m1-dependency' into arm/apple-m1
Pull in two dependency branches from the tty and arm64 trees
to make it possible to build all the remaining patches for
the Apple M1 series added next.

* apple/m1-dependency: (61 commits)
  arm64: irq: allow FIQs to be handled
  arm64: Always keep DAIF.[IF] in sync
  arm64: entry: factor irq triage logic into macros
  arm64: irq: rework root IRQ handler registration
  arm64: don't use GENERIC_IRQ_MULTI_HANDLER
  tty: serial: samsung_tty: Add earlycon support for Apple UARTs
  tty: serial: samsung_tty: Add support for Apple UARTs
  dt-bindings: serial: samsung: Add apple,s5l-uart compatible
  tty: serial: samsung_tty: Use devm_ioremap_resource
  tty: serial: samsung_tty: IRQ rework
  tty: serial: samsung_tty: Add s3c24xx_port_type
  tty: serial: samsung_tty: Separate S3C64XX ops structure
  tty: serial: samsung_tty: Add ucon_mask parameter
  ...

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-08 21:46:58 +02:00
Peter Zijlstra
40c7fd3fdf block: Fix sys_ioprio_set(.which=IOPRIO_WHO_PGRP) task iteration
do_each_pid_thread() { } while_each_pid_thread() is a double loop and
thus break doesn't work as expected. Also, it should be used under
tasklist_lock because otherwise we can race against change_pid() for
PGID/SID.

Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lore.kernel.org/r/YG7Q5C4Rb5dx5GFx@hirez.programming.kicks-ass.net
Signed-off-by: Jens Axboe <axboe@kernel.dk>
2021-04-08 13:43:53 -06:00
Pavel Begunkov
c60eb049f4 io-wq: cancel unbounded works on io-wq destroy
WARNING: CPU: 5 PID: 227 at fs/io_uring.c:8578 io_ring_exit_work+0xe6/0x470
RIP: 0010:io_ring_exit_work+0xe6/0x470
Call Trace:
 process_one_work+0x206/0x400
 worker_thread+0x4a/0x3d0
 kthread+0x129/0x170
 ret_from_fork+0x22/0x30

INFO: task lfs-openat:2359 blocked for more than 245 seconds.
task:lfs-openat      state:D stack:    0 pid: 2359 ppid:     1 flags:0x00000004
Call Trace:
 ...
 wait_for_completion+0x8b/0xf0
 io_wq_destroy_manager+0x24/0x60
 io_wq_put_and_exit+0x18/0x30
 io_uring_clean_tctx+0x76/0xa0
 __io_uring_files_cancel+0x1b9/0x2e0
 do_exit+0xc0/0xb40
 ...

Even after io-wq destroy has been issued io-wq worker threads will
continue executing all left work items as usual, and may hang waiting
for I/O that won't ever complete (aka unbounded).

[<0>] pipe_read+0x306/0x450
[<0>] io_iter_do_read+0x1e/0x40
[<0>] io_read+0xd5/0x330
[<0>] io_issue_sqe+0xd21/0x18a0
[<0>] io_wq_submit_work+0x6c/0x140
[<0>] io_worker_handle_work+0x17d/0x400
[<0>] io_wqe_worker+0x2c0/0x330
[<0>] ret_from_fork+0x22/0x30

Cancel all unbounded I/O instead of executing them. This changes the
user visible behaviour, but that's inevitable as io-wq is not per task.

Suggested-by: Jens Axboe <axboe@kernel.dk>
Signed-off-by: Pavel Begunkov <asml.silence@gmail.com>
Link: https://lore.kernel.org/r/cd4b543154154cba055cf86f351441c2174d7f71.1617842918.git.asml.silence@gmail.com
Signed-off-by: Jens Axboe <axboe@kernel.dk>
2021-04-08 13:33:17 -06:00
Pavel Begunkov
9728463737 io_uring: fix rw req completion
WARNING: at fs/io_uring.c:8578 io_ring_exit_work.cold+0x0/0x18

As reissuing is now passed back by REQ_F_REISSUE and kiocb_done()
internally uses __io_complete_rw(), it may stop after setting the flag
so leaving a dangling request.

There are tricky edge cases, e.g. reading beyound file, boundary, so
the easiest way is to hand code reissue in kiocb_done() as
__io_complete_rw() was doing for us before.

Fixes: 230d50d448 ("io_uring: move reissue into regular IO path")
Signed-off-by: Pavel Begunkov <asml.silence@gmail.com>
Link: https://lore.kernel.org/r/f602250d292f8a84cca9a01d747744d1e797be26.1617842918.git.asml.silence@gmail.com
Signed-off-by: Jens Axboe <axboe@kernel.dk>
2021-04-08 13:32:59 -06:00
Leon Romanovsky
d1c803a9cc RDMA/addr: Be strict with gid size
The nla_len() is less than or equal to 16.  If it's less than 16 then end
of the "gid" buffer is uninitialized.

Fixes: ae43f82867 ("IB/core: Add IP to GID netlink offload")
Link: https://lore.kernel.org/r/20210405074434.264221-1-leon@kernel.org
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Mark Bloch <mbloch@nvidia.com>
Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2021-04-08 16:14:56 -03:00
Lang Cheng
69455df04e RDMA/hns: Prevent le32 from being implicitly converted to u32
Replace BUILD_BUG_ON_ZERO() with BUILD_BUG_ON() to avoid sparse
complaining "restricted __le32 degrades to integer".

Link: https://lore.kernel.org/r/1617354454-47840-10-git-send-email-liweihang@huawei.com
Signed-off-by: Lang Cheng <chenglang@huawei.com>
Signed-off-by: Weihang Li <liweihang@huawei.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2021-04-08 16:08:22 -03:00
Yixing Liu
782832f254 RDMA/hns: Simplify the function config_eqc()
Use "hr_reg_write" replace "roce_set_filed".

Link: https://lore.kernel.org/r/1617354454-47840-9-git-send-email-liweihang@huawei.com
Signed-off-by: Yixing Liu <liuyixing1@huawei.com>
Signed-off-by: Weihang Li <liweihang@huawei.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2021-04-08 16:08:22 -03:00
Wenpeng Liang
495c24808c RDMA/hns: Add XRC subtype in QPC and XRC type in SRQC
A field to distuiguish basic SRQ from XRC SRQ in SRQC and a field in QPC
to determine whether a QP is XRC TGT QP or XRC INI QP are missing.

Fixes: 32548870d4 ("RDMA/hns: Add support for XRC on HIP09")
Link: https://lore.kernel.org/r/1617354454-47840-8-git-send-email-liweihang@huawei.com
Signed-off-by: Wenpeng Liang <liangwenpeng@huawei.com>
Signed-off-by: Weihang Li <liweihang@huawei.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2021-04-08 16:08:22 -03:00
Wenpeng Liang
537bc924f3 RDMA/hns: Remove unsupported QP types
The hns ROCEE does not support UC QP currently.

Link: https://lore.kernel.org/r/1617354454-47840-7-git-send-email-liweihang@huawei.com
Signed-off-by: Wenpeng Liang <liangwenpeng@huawei.com>
Signed-off-by: Weihang Li <liweihang@huawei.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2021-04-08 16:08:22 -03:00
Yangyang Li
7bd5d90d8f RDMA/hns: Delete unused members in the structure hns_roce_hw
Some structure members in hns_roce_hw have never been used and need to be
deleted.

Fixes: 9a4435375c ("IB/hns: Add driver files for hns RoCE driver")
Fixes: b156269d88 ("RDMA/hns: Add modify CQ support for hip08")
Fixes: c7bcb13442 ("RDMA/hns: Add SRQ support for hip08 kernel mode")
Link: https://lore.kernel.org/r/1617354454-47840-6-git-send-email-liweihang@huawei.com
Signed-off-by: Yangyang Li <liyangyang20@huawei.com>
Signed-off-by: Weihang Li <liweihang@huawei.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2021-04-08 16:08:21 -03:00
Wenpeng Liang
2371efab97 RDMA/hns: Delete redundant abnormal interrupt status
The hardware supports only two types of abnormal interrupts.

Fixes: a5073d6054 ("RDMA/hns: Add eq support of hip08")
Link: https://lore.kernel.org/r/1617354454-47840-5-git-send-email-liweihang@huawei.com
Signed-off-by: Wenpeng Liang <liangwenpeng@huawei.com>
Signed-off-by: Weihang Li <liweihang@huawei.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2021-04-08 16:08:21 -03:00
Yangyang Li
714a597baa RDMA/hns: Delete redundant condition judgment related to eq
The register value related to the eq interrupt depends only on
enable_flag, so the redundant condition judgment is deleted.

Fixes: a5073d6054 ("RDMA/hns: Add eq support of hip08")
Link: https://lore.kernel.org/r/1617354454-47840-4-git-send-email-liweihang@huawei.com
Signed-off-by: Yangyang Li <liyangyang20@huawei.com>
Signed-off-by: Weihang Li <liweihang@huawei.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2021-04-08 16:08:21 -03:00
Weihang Li
9eab614338 RDMA/hns: Fix missing assignment of max_inline_data
When querying QP, the ULPs should be informed of the max length of inline
data supported by the hardware.

Fixes: 30b707886a ("RDMA/hns: Support inline data in extented sge space for RC")
Link: https://lore.kernel.org/r/1617354454-47840-3-git-send-email-liweihang@huawei.com
Signed-off-by: Weihang Li <liweihang@huawei.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2021-04-08 16:08:21 -03:00
Weihang Li
24f3f1cd51 RDMA/hns: Avoid enabling RQ inline on UD
RQ inline is not supported on UD/GSI QP, it should be disabled in QPC.

Link: https://lore.kernel.org/r/1617354454-47840-2-git-send-email-liweihang@huawei.com
Signed-off-by: Weihang Li <liweihang@huawei.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2021-04-08 16:08:20 -03:00
Wenpeng Liang
8d78e7b478 RDMA/hns: Modify prints for mailbox and command queue
Use ratelimited print in mbox and cmq. And print mailbox operation if
mailbox fails because it's useful information for the user.

Link: https://lore.kernel.org/r/1617262341-37571-4-git-send-email-liweihang@huawei.com
Signed-off-by: Wenpeng Liang <liangwenpeng@huawei.com>
Signed-off-by: Lang Cheng <chenglang@huawei.com>
Signed-off-by: Weihang Li <liweihang@huawei.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2021-04-08 16:05:04 -03:00
Lang Cheng
0835cf5839 RDMA/hns: Support more return types of command queue
Add error code definition according to the return code from firmware to
help find out more detailed reasons why a command fails to be sent.

Link: https://lore.kernel.org/r/1617262341-37571-3-git-send-email-liweihang@huawei.com
Signed-off-by: Lang Cheng <chenglang@huawei.com>
Signed-off-by: Weihang Li <liweihang@huawei.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2021-04-08 16:05:03 -03:00
Lang Cheng
a389d016c0 RDMA/hns: Enable all CMDQ context
Fix error of cmd's context number calculation algorithm to enable all of
32 cmd entries and support 32 concurrent accesses.

Link: https://lore.kernel.org/r/1617262341-37571-2-git-send-email-liweihang@huawei.com
Signed-off-by: Lang Cheng <chenglang@huawei.com>
Signed-off-by: Weihang Li <liweihang@huawei.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2021-04-08 16:05:03 -03:00
Bob Pearson
ea49225189 RDMA/rxe: Fix missing acks from responder
All responder errors from request packets that do not consume a receive
WQE fail to generate acks for RC QPs.  This patch corrects this behavior
by making the flow follow the same path as request packets that do consume
a WQE after the completion.

Link: https://lore.kernel.org/r/20210402001016.3210-1-rpearson@hpe.com
Link: https://lore.kernel.org/linux-rdma/1a7286ac-bcea-40fb-2267-480134dd301b@gmail.com/
Signed-off-by: Bob Pearson <rpearson@hpe.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2021-04-08 15:59:28 -03:00
Linus Torvalds
3fb4f979b4 s390 updates for 5.12-rc7
- fix incorrect dereference of the ext_params2 external interrupt parameter,
   which leads to an instant kernel crash if a pfault interrupt occurs.
 
 - add forgotten stack unwinder support, and fix memory leak for the new
   machine check handler stack.
 
 - fix inline assembly register clobbering due to KASAN code instrumentation.
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Merge tag 's390-5.12-6' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux

Pull s390 fixes from Heiko Carstens:

 - fix incorrect dereference of the ext_params2 external interrupt
   parameter, which leads to an instant kernel crash if a pfault
   interrupt occurs.

 - add forgotten stack unwinder support, and fix memory leak for the
   new machine check handler stack.

 - fix inline assembly register clobbering due to KASAN code
   instrumentation.

* tag 's390-5.12-6' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux:
  s390/setup: use memblock_free_late() to free old stack
  s390/irq: fix reading of ext_params2 field from lowcore
  s390/unwind: add machine check handler stack
  s390/cpcmd: fix inline assembly register clobbering
2021-04-08 11:09:25 -07:00
Rafael J. Wysocki
71f4dd3441 Merge back earlier cpuidle updates for v5.13. 2021-04-08 20:05:49 +02:00
Rafael J. Wysocki
31c6ae4762 - Fix the C7 state on the tegra114 by setting the L2-no-flush flag
unconditionally (Dmitry Osipenko)
 
 - Remove the do_idle firmware call as it is not supported by the ATF
   on tegra SoC (Dmitry Osipenko)
 
 - Add a missing dependency on CONFIG_MMU to prevent linkage error (He
   Ying)
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Merge tag 'cpuidle-v5.13-rc1' of https://git.linaro.org/people/daniel.lezcano/linux

Pull ARM cpuidle updates for v5.13 from Daniel Lezcano:

"- Fix the C7 state on the tegra114 by setting the L2-no-flush flag
   unconditionally (Dmitry Osipenko)

 - Remove the do_idle firmware call as it is not supported by the ATF
   on tegra SoC (Dmitry Osipenko)

 - Add a missing dependency on CONFIG_MMU to prevent linkage error (He
   Ying)"

* tag 'cpuidle-v5.13-rc1' of https://git.linaro.org/people/daniel.lezcano/linux:
  cpuidle: Fix ARM_QCOM_SPM_CPUIDLE configuration
  cpuidle: tegra: Remove do_idle firmware call
  cpuidle: tegra: Fix C7 idling state on Tegra114
2021-04-08 20:04:41 +02:00
Angela Czubak
d08a745729 resource: Prevent irqresource_disabled() from erasing flags
Some Chromebooks use hard-coded interrupts in their ACPI tables.
This is an excerpt as dumped on Relm:

...
            Name (_HID, "ELAN0001")  // _HID: Hardware ID
            Name (_DDN, "Elan Touchscreen ")  // _DDN: DOS Device Name
            Name (_UID, 0x05)  // _UID: Unique ID
            Name (ISTP, Zero)
            Method (_CRS, 0, NotSerialized)  // _CRS: Current Resource Settings
            {
                Name (BUF0, ResourceTemplate ()
                {
                    I2cSerialBusV2 (0x0010, ControllerInitiated, 0x00061A80,
                        AddressingMode7Bit, "\\_SB.I2C1",
                        0x00, ResourceConsumer, , Exclusive,
                        )
                    Interrupt (ResourceConsumer, Edge, ActiveLow, Exclusive, ,, )
                    {
                        0x000000B8,
                    }
                })
                Return (BUF0) /* \_SB_.I2C1.ETSA._CRS.BUF0 */
            }
...

This interrupt is hard-coded to 0xB8 = 184 which is too high to be mapped
to IO-APIC, so no triggering information is propagated as acpi_register_gsi()
fails and irqresource_disabled() is issued, which leads to erasing triggering
and polarity information.

Do not overwrite flags as it leads to erasing triggering and polarity
information which might be useful in case of hard-coded interrupts.
This way the information can be read later on even though mapping to
APIC domain failed.

Signed-off-by: Angela Czubak <acz@semihalf.com>
[ rjw: Changelog rearrangement ]
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-04-08 20:01:54 +02:00
Nathan Chancellor
2bc6262c61 ACPI: CPPC: Replace cppc_attr with kobj_attribute
All of the CPPC sysfs show functions are called via indirect call in
kobj_attr_show(), where they should be of type

ssize_t (*show)(struct kobject *kobj, struct kobj_attribute *attr, char *buf);

because that is the type of the ->show() member in
'struct kobj_attribute' but they are actually of type

ssize_t (*show)(struct kobject *kobj, struct attribute *attr, char *buf);

because of the ->show() member in 'struct cppc_attr', resulting in a
Control Flow Integrity violation [1].

$ cat /sys/devices/system/cpu/cpu0/acpi_cppc/highest_perf
3400

$ dmesg | grep "CFI failure"
[  175.970559] CFI failure (target: show_highest_perf+0x0/0x8):

As far as I can tell, the only difference between 'struct cppc_attr'
and 'struct kobj_attribute' aside from the type of the attr parameter
is the type of the count parameter in the ->store() member (ssize_t vs.
size_t), which does not actually matter because all of these nodes are
read-only.

Eliminate 'struct cppc_attr' in favor of 'struct kobj_attribute' to fix
the violation.

[1]: https://lore.kernel.org/r/20210401233216.2540591-1-samitolvanen@google.com/

Fixes: 158c998ea4 ("ACPI / CPPC: add sysfs support to compute delivered performance")
Link: https://github.com/ClangBuiltLinux/linux/issues/1343
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-04-08 19:58:12 +02:00
Rafael J. Wysocki
c830dbcfcc ACPI: scan: Call acpi_get_object_info() from acpi_set_pnp_ids()
Notice that it is not necessary to call acpi_get_object_info() from
acpi_add_single_object() in order to pass the pointer returned by it
to acpi_init_device_object() and from there to acpi_set_pnp_ids().

It is more straightforward to call acpi_get_object_info() from
acpi_set_pnp_ids() and avoid unnecessary pointer passing, so change
the code accordingly.

No intentional functional impact.

Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
2021-04-08 19:55:40 +02:00
Rafael J. Wysocki
f5d9ab1d80 ACPI: scan: Drop sta argument from acpi_init_device_object()
Use the observation that the initial status check for
ACPI_BUS_TYPE_PROCESSOR objects can be carried out in the same way
as for ACPI_BUS_TYPE_DEVICE objects and it is not necessary to fail
acpi_add_single_object() if acpi_bus_get_status_handle() returns an
error for a processor (its status can be set to 0 instead) to
simplify acpi_add_single_object().

Accordingly, drop the "sta" argument from acpi_init_device_object()
as it can always set the initial status to ACPI_STA_DEFAULT and let
its caller correct that later on.

Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
2021-04-08 19:55:40 +02:00
Rafael J. Wysocki
f926e94338 ACPI: scan: Drop sta argument from acpi_add_single_object()
Move the initial status check for ACPI_BUS_TYPE_PROCESSOR objects
into acpi_add_single_object() so it is not necessary to pass the
"sta" argument to it, get rid of that argument from there and update
the callers of that function accordingly.

No intentional functional impact.

Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
2021-04-08 19:55:40 +02:00
Rafael J. Wysocki
02056a4f92 ACPI: scan: Rearrange checks in acpi_bus_check_add()
Rearrange the checks in acpi_bus_check_add() to avoid checking
the "type" twice and take "check_dep" into account only for
ACPI_TYPE_DEVICE objects.

No intentional functional impact.

Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
2021-04-08 19:55:40 +02:00