Commit Graph

9764 Commits

Author SHA1 Message Date
Tony Luck
a5f8ee0291 [IA64] Need export for csum_ipv6_magic
Now we have our own highly optimized assembly code version of
this routine (Thanks Ken!) we should export it so that it can
be used.

Signed-off-by: Tony Luck <tony.luck@intel.com>
2006-12-07 13:18:57 -08:00
Venkatesh Pallipadi
17e77b1cc3 [PATCH] Add support for type argument in PAL_GET_PSTATE
PAL_GET_PSTATE accepts a type argument to return different kinds of
frequency information.
Refer: Intel Itanium®Architecture Software Developer's Manual -
Volume 2: System Architecture, Revision 2.2
(http://developer.intel.com/design/itanium/manuals/245318.htm)

Add the support for type argument and use Instantaneous frequency
in the acpi driver.

Also fix a bug, where in return value of PAL_GET_PSTATE was getting compared
with 'control' bits instead of 'status' bits.

Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2006-12-07 11:21:55 -08:00
Chen, Kenneth W
6dbfc19b7e [IA64] tidy up return value of ip_fast_csum
While working on implementing csum_ipv6_magic, I noticed that current
version of ip_fast_csum will potentially return bits above "unsigned
short" as 1.  While no harm is done right now because all call sites
will chop off the upper bits when it uses the return value.  However,
this is still dangerous and buggy.  Here is a patch to enforce that the
function really returns unsigned short in the native register format.

The fix is free as there are plenty open slot to add one more asm instruction.

Signed-off-by: Ken Chen <kenneth.w.chen@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2006-12-07 11:19:59 -08:00
Chen, Kenneth W
007d77d0c5 [IA64] implement csum_ipv6_magic for ia64.
The asm version is 4.4 times faster than the generic C version and
10X smaller in code size.

Signed-off-by: Ken Chen <kenneth.w.chen@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2006-12-07 11:17:26 -08:00
Russ Anderson
5b4d5681ff [IA64] More Itanium PAL spec updates
Additional updates to conform with Rev 2.2 of Volume 2 of "Intel
Itanium Architecture Software Developer's Manual" (January 2006).

Add pal_bus_features_s bits 52 & 53 (page 2:347)
Add pal_vm_info_2_s field max_purges (page 2:2:451)
Add PAL_GET_HW_POLICY call (page 2:381)
Add PAL_SET_HW_POLICY call (page 2:439)

Sample output before:
---------------------------------------------------------------------
cobra:~ # cat /proc/pal/cpu0/vm_info
Physical Address Space         : 50 bits
Virtual Address Space          : 61 bits
Protection Key Registers(PKR)  : 16
Implemented bits in PKR.key    : 24
Hash Tag ID                    : 0x2
Size of RR.rid                 : 24
Supported memory attributes    : WB, UC, UCE, WC, NaTPage
---------------------------------------------------------------------

Sample output after:
---------------------------------------------------------------------
cobra:~ # cat /proc/pal/cpu0/vm_info
Physical Address Space         : 50 bits
Virtual Address Space          : 61 bits
Protection Key Registers(PKR)  : 16
Implemented bits in PKR.key    : 24
Hash Tag ID                    : 0x2
Max Purges                     : 1
Size of RR.rid                 : 24
Supported memory attributes    : WB, UC, UCE, WC, NaTPage
---------------------------------------------------------------------

Signed-off-by: Russ Anderson (rja@sgi.com)
Signed-off-by: Tony Luck <tony.luck@intel.com>
2006-12-07 11:10:16 -08:00
Russ Anderson
895309ff6f [IA64] Update processor_info features
Add the printing of additional processor features to proc_features.

Based on Rev 2.2 of Volume 2 of "Intel Itanium Architecture Software
Developer's Manual" (January 2006) fields (pages 2:430-2:432).
This patch gets the features back in sync with the spec.

Sample output before:
--------------------------------------------------------------
cobra:~ # cat /proc/pal/cpu0/processor_info
XIP,XPSR,XFS implemented                 : On NoCtrl
XR1-XR3 implemented                      : On NoCtrl
Disable dynamic predicate prediction     : NotImpl
Disable processor physical number        : NotImpl
Disable dynamic data cache prefetch      : NotImpl
Disable dynamic inst cache prefetch      : NotImpl
Disable dynamic branch prediction        : NotImpl
Disable BINIT on processor time-out      : On Ctrl
Disable dynamic power management (DPM)   : NotImpl
Disable coherency                        : NotImpl
Disable cache                            : NotImpl
Enable CMCI promotion                    : Off Ctrl
Enable MCA to BINIT promotion            : Off Ctrl
Enable MCA promotion                     : NotImpl
Enable BERR promotion                    : NotImpl
cobra:~ #
--------------------------------------------------------------

Sample output after:
--------------------------------------------------------------
cobra:~ # cat /proc/pal/cpu0/processor_info
Unimplemented instruction address fault  : NotImpl
INIT, PMI, and LINT pins                 : NotImpl
Simple unimplimented instr addresses     : On NoCtrl
Variable P-state performance             : NotImpl
Virtual machine features implemeted      : On NoCtrl
XIP,XPSR,XFS implemented                 : On NoCtrl
XR1-XR3 implemented                      : On NoCtrl
Disable dynamic predicate prediction     : NotImpl
Disable processor physical number        : NotImpl
Disable dynamic data cache prefetch      : NotImpl
Disable dynamic inst cache prefetch      : NotImpl
Disable dynamic branch prediction        : NotImpl
Disable P-states                         : Off Ctrl
Enable MCA on Data Poisoning             : Off Ctrl
Enable vmsw instruction                  : On Ctrl
Enable extern environmental notification : NotImpl
Disable BINIT on processor time-out      : On Ctrl
Disable dynamic power management (DPM)   : NotImpl
Disable coherency                        : NotImpl
Disable cache                            : NotImpl
Enable CMCI promotion                    : Off Ctrl
Enable MCA to BINIT promotion            : Off Ctrl
Enable MCA promotion                     : NotImpl
Enable BERR promotion                    : NotImpl
cobra:~ #
--------------------------------------------------------------

Signed-off-by: Russ Anderson (rja@sgi.com)
Signed-off-by: Tony Luck <tony.luck@intel.com>
2006-12-07 11:06:35 -08:00
John Keller
c69577711a [IA64] SN: Correctly update smp_affinty mask
On Altix systems, the /proc/irq/nn/smp_affinity mask is not being setup
at device iniitalization, or updated after an interrupt redirection.
This patch resolves those issues.

Signed-off-by: John Keller <jpk@sgi.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2006-12-07 10:50:09 -08:00
Matthew Wilcox
d61b49c1aa [IA64] sparse cleanups
0/NULL confusion and some missing UL on constants.

Signed-off-by: Matthew Wilcox <matthew@wil.cx>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2006-12-07 10:48:19 -08:00
Zou Nan hai
a79561134f [IA64] IA64 Kexec/kdump
Changes and updates.

1. Remove fake rendz path and related code according to discuss with Khalid Aziz.
2. fc.i offset fix in relocate_kernel.S.
3. iospic shutdown code eoi and mask race fix from Fujitsu.
4. Warm boot hook in machine_kexec to SN SAL code from Jack Steiner.
5. Send slave to SAL slave loop patch from Jay Lan.
6. Kdump on non-recoverable MCA event patch from Jay Lan
7. Use CTL_UNNUMBERED in kdump_on_init sysctl.

Signed-off-by: Zou Nan hai <nanhai.zou@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2006-12-07 09:51:35 -08:00
Linus Torvalds
3f5e573a08 Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
  [MIPS] Import updates from i386's i8259.c
  [MIPS] *-berr: Header inclusions for DEC bus error handlers
  [MIPS] Compile __do_IRQ() when really needed
  [MIPS] genirq: use name instead of typename
  [MIPS] Do not use handle_level_irq for ioasic_dma_irq_type.
  [MIPS] pte_offset(dir,addr): parenthesis fix
2006-12-06 16:17:37 -08:00
Peter Chubb
c7f570a5ec [IA64] Fix pci.c kernel compilation breakage.
The recent change to convert the is_enabled flag in the PCI device to an
atomic count broke the IA64 compilation.

As pcibios_disable_device is only ever called if the reference count
is zero, convert the if to a BUG_ON.

Signed-off-by: Peter Chubb <peterc@gelato.unsw.edu.au>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2006-12-06 14:13:38 -08:00
Atsushi Nemoto
2cafe97846 [MIPS] Import updates from i386's i8259.c
Import many updates from i386's i8259.c, especially genirq transitions.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-12-06 20:16:09 +00:00
Maciej W. Rozycki
49afb1f67b [MIPS] *-berr: Header inclusions for DEC bus error handlers
A fixup to add missing header inclusions for bus error handlers for
DECstation system after the recent switch to get_irq_regs().

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-12-06 20:16:09 +00:00
Franck Bui-Huu
e77c232cfc [MIPS] Compile __do_IRQ() when really needed
__do_IRQ() is needed only by irq handlers that can't use
default handlers defined in kernel/irq/chip.c.

For others platforms there's no need to compile this function
since it won't be used. For those platforms this patch defines
GENERIC_HARDIRQS_NO__DO_IRQ symbol which is used exactly for
this purpose.

Futhermore for platforms which do not use __do_IRQ(), end()
method which is part of the 'irq_chip' structure is not used.
This patch simply removes this method in this case.

Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-12-06 20:16:08 +00:00
Atsushi Nemoto
1ccd1c1c35 [MIPS] genirq: use name instead of typename
The "typename" field was obsoleted by the "name" field.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-12-06 20:16:08 +00:00
Atsushi Nemoto
25ba2f506c [MIPS] Do not use handle_level_irq for ioasic_dma_irq_type.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-12-06 20:16:08 +00:00
Linus Torvalds
dd6a7c19e4 Merge master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6: (43 commits)
  sh: sh775x/titan fixes for irq header changes.
  sh: update r7780rp defconfig.
  sh: compile fixes for header cleanup.
  sh: Fixup pte_mkhuge() build failure.
  sh: set KBUILD_IMAGE to something sensible.
  sh: show held locks in stack trace with lockdep.
  sh: platform_pata support for R7780RP
  sh: stacktrace/lockdep/irqflags tracing support.
  sh: Fixup movli.l/movco.l atomic ops for gcc4.
  sh: dyntick infrastructure.
  sh: Clock framework tidying.
  sh: Turn off IRQs around get_timer_offset() calls.
  sh: Get the PGD right in oops case with 64-bit PTEs.
  sh: Fix store queue bitmap end.
  sh: More flexible + SH7780 earlyprintk SCIF support.
  sh: Fixup various PAGE_SIZE == 4096 assumptions.
  sh: Fixup 4K irq stacks.
  sh: dma-api channel capability extensions.
  sh: Drop name overload in dma-sh.
  sh: Make dma-isa depend on ISA_DMA_API.
  ...
2006-12-06 08:10:55 -08:00
Linus Torvalds
dd8856bda5 Merge git://git.infradead.org/users/dhowells/workq-2.6
* git://git.infradead.org/users/dhowells/workq-2.6:
  Actually update the fixed up compile failures.
  WorkQueue: Fix up arch-specific work items where possible
  WorkStruct: make allyesconfig
  WorkStruct: Pass the work_struct pointer instead of context data
  WorkStruct: Merge the pending bit into the wq_data pointer
  WorkStruct: Typedef the work function prototype
  WorkStruct: Separate delayable and non-delayable events.
2006-12-06 08:01:37 -08:00
Greg Ungerer
dcb1477549 [PATCH] m68knommu: switch 68360 to using rtc_time
Adds support for RTCs (through genrtc) for M68KNOMMU.

Board-specific code will have to link the appropriate RTC driver to the
mach_hwclk callback, at minimum.

This patch switches the 68360 code over to using rtc_time.

Signed-off-by: Gavin Lambert <gavinl@compacsort.com>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-12-06 07:41:26 -08:00
Greg Ungerer
deb77c8501 [PATCH] m68knommu: fix timer register access on 523x ColdFire platforms
The 523x timer TRR register is a full 32bits, the older register (on
other ColdFire parts) was only 16 bits.  Use the right type of
__raw_read when accessing it.

Problem found by Yaroslav Vinogradov <yaroslav.vinogradov@freescale.com>

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-12-06 07:41:26 -08:00
Jamie Lenehan
ea0f8feaa0 sh: sh775x/titan fixes for irq header changes.
The following moves the creation of IPR interupts into setup-7750.c
and updates a few other things to make it all work after the "Drop
CPU subtype IRQ headers" commit. It boots and runs fine on my titan
board.

 - adds an ipr_idx to the ipr_data and uses a function in the subtype
   code to calculate the address of the IPR registers

 - adds a function to enable individual interrupt mode for externals
   in the subtype code and calls that from the titan board code
   instead of doing it directly.

 - I changed the shift in the ipr_data to be the actual # of bits to
   shift, instead of the numnber / 4 - made it easier to match with
   the manual.

Signed-off-by: Jamie Lenehan <lenehan@twibble.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 12:05:02 +09:00
Paul Mundt
fe9687dec0 sh: update r7780rp defconfig.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 12:02:01 +09:00
Paul Mundt
65e5d90de6 sh: compile fixes for header cleanup.
Since some header inclusion paths were cleaned up, compilation
broke. Add in the headers we need directly to build again.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 11:24:48 +09:00
Paul Mundt
f36af73304 sh: set KBUILD_IMAGE to something sensible.
This was missing for sh too, wire it up..

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 11:08:49 +09:00
Paul Mundt
9b8c90eb0d sh: show held locks in stack trace with lockdep.
Follows the same change as other architectures..

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 11:07:51 +09:00
Paul Mundt
0c020e3dfb sh: platform_pata support for R7780RP
This adds a platform device for the directly connected
CF interface on R7780RP boards, for use with the
pata_platform libata driver.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 10:45:40 +09:00
Paul Mundt
afbfb52e47 sh: stacktrace/lockdep/irqflags tracing support.
Wire up all of the essentials for lockdep..

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 10:45:40 +09:00
Paul Mundt
bd156147eb sh: dyntick infrastructure.
This adds basic NO_IDLE_HZ support to the SH timer API so timers
are able to wire it up. Taken from the ARM version, as it fit in
to our API with very few changes needed.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 10:45:40 +09:00
Paul Mundt
1d118562c2 sh: Clock framework tidying.
This syncs up the SH clock framework with the linux/clk.h API,
for which there were only some minor changes required, namely
the clk_get() dev_id and subsequent callsites.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 10:45:40 +09:00
Paul Mundt
e74b56800e sh: Turn off IRQs around get_timer_offset() calls.
Since all of the sys_timer sources currently do this on their own
within the ->get_offset() path, it's more sensible to just have
the caller take care of it when grabbing xtime_lock. Incidentally,
this is more in line with what others (ie, ARM) are doing already.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 10:45:39 +09:00
Paul Mundt
bca7c20764 sh: Get the PGD right in oops case with 64-bit PTEs.
Previously this was using a static pgd shift in the reporting
code, simply flip this to PGDIR_SHIFT which does the right
thing depending on varying PTE magnitudes on the SH-X2 MMU.

While we're at it, and since it's been recently added, use
get_TTB() for fetching the TTB, rather than the open coded
instructions.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 10:45:39 +09:00
Paul Mundt
9f650cf2b8 sh: Fix store queue bitmap end.
The end of the store queue bitmap is miscalculated when searching
for a free range in sq_remap(), missing the PAGE_SHIFT shift that's
done in sq_api_init(). This runs in to workloads where we can scan
beyond the end of the bitmap.

Spotted by Paul Jackson:

	http://marc.theaimsgroup.com/?l=linux-kernel&m=116493191224097&w

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 10:45:39 +09:00
Paul Mundt
6fc21b82ef sh: More flexible + SH7780 earlyprintk SCIF support.
This makes the early printk support somewhat more flexible,
moving the port definition to a config option, and making the
port initialization configurable for sh-ipl+g users.

At the same time, this allows us to trivially wire up the
SH7780 SCIF0, so that's thrown in too more or less for free.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 10:45:39 +09:00
Paul Mundt
510c72ad2d sh: Fixup various PAGE_SIZE == 4096 assumptions.
There were a number of places that made evil PAGE_SIZE == 4k
assumptions that ended up breaking when trying to play with
8k and 64k page sizes, this fixes those up.

The most significant change is the way we load THREAD_SIZE,
previously this was done via:

	mov	#(THREAD_SIZE >> 8), reg
	shll8	reg

to avoid a memory access and allow the immediate load. With
a 64k PAGE_SIZE, we're out of range for the immediate load
size without resorting to special instructions available in
later ISAs (movi20s and so on). The "workaround" for this is
to bump up the shift to 10 and insert a shll2, which gives a
bit more flexibility while still being much cheaper than a
memory access.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 10:45:39 +09:00
Paul Mundt
1dc41e58a5 sh: Fixup 4K irq stacks.
There was a clobber issue with the register we were saving
the stack in, so we switch to a register that we handle in
the clobber list properly already.

This also follows the x86 changes for allowing the softirq
checks from hardirq context.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 10:45:39 +09:00
Mark Glaisher
db9b99d461 sh: dma-api channel capability extensions.
This extends the SH DMA API for allowing handling of DMA
channels based off of their respective capabilities.

A couple of functions are added to the existing API,
the core bits are register_chan_caps() for registering
channel capabilities, and request_dma_bycap() for fetching
a channel dynamically based off of a capability set.

Signed-off-by: Mark Glaisher <mark.glaisher@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 10:45:39 +09:00
Paul Mundt
e803aaf63a sh: Drop name overload in dma-sh.
Pass along the dev_id from request_dma() all the way down,
rather than inserting an artificial name relating to the TEI
line that we were doing before.

This makes the line a bit less obvious, but dev_id is the proper
behaviour for this regardless.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 10:45:39 +09:00
Paul Mundt
49f860bb5d sh: Make dma-isa depend on ISA_DMA_API.
Previously we linked in the ISA DMA wrapper unconditionally.
As there are very few users of this, it's better to make it
conditional.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 10:45:39 +09:00
Paul Mundt
4dfc119f1c sh: dma-sysfs fixes.
Handle the case where no registered DMACs exist somewhat more
gracefully. While we're at it, check for sysdev_create_file()
failing.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 10:45:39 +09:00
Stuart Menefy
e0969e0c9b sh: Fix syscall tracing ordering.
The implementation of system call tracing in the kernel has a
couple of ordering problems:

 - the validity of the system call number is checked before
   calling out to system call tracing code, and should be
   done after

 - the system call number used when tracing is the one the
   system call was invoked with, while the system call tracing
   code can legitimatly change the call number (for example
   strace permutes fork into clone)

This patch fixes both of these problems, and also reoders the
code slightly to make the direct path through the code the
common case.

Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 10:45:38 +09:00
Stuart Menefy
9b3a53ab76 sh: TLB miss fast-path optimizations.
Handle simple TLB miss faults which can be resolved completely
from the page table in assembler.

Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 10:45:38 +09:00
Paul Mundt
9daa0c257d sh: R7780RP push-switch support.
This adds simple push-switch support for the RDBRP-1/RDBREVRP-1 debug
boards found on the R7780RP-1.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 10:45:38 +09:00
Paul Mundt
9f5e8eee5c sh: generic push-switch framework.
This adds support for a generic push switch framework. Adaptable for
various switches, including GPIO switches and the push switches commonly
found on Renesas debug boards.

This allows switch states to be trivially reported through sysfs.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 10:45:38 +09:00
Stuart Menefy
99a596f93b sh: pmd rework.
Remove extra bits from the pmd structure and store a kernel logical
address rather than a physical address. This allows it to be directly
dereferenced. Another piece of wierdness inherited from x86.

Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 10:45:38 +09:00
Stuart Menefy
6e4662ff49 sh: Use MMU.TTB register as pointer to current pgd.
Add TTB accessor functions and give it a sensible default
value. We will use this later for optimizing the fault
path.

Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 10:45:38 +09:00
Stuart Menefy
b5a1bcbee4 sh: Set up correct siginfo structures for page faults.
Remove the previous saving of fault codes into the thread_struct
as they are never used, and appeared to be inherited from x86.

Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 10:45:38 +09:00
Stuart Menefy
f0bc814cfb sh: gcc4 support.
This fixes up the kernel for gcc4. The existing exception handlers
needed some wrapping for pt_regs access, acessing the registers
via a RELOC_HIDE() pointer.

The strcpy() issues popped up here too, so add -ffreestanding and
kill off the symbol export.

Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 10:45:38 +09:00
Paul Mundt
53644087a6 sh: Explicit endian selection support.
Previously big endian was simply assumed if little endian was
not set, which led to some cflags ordering issues. There's not
much point to not having a big endian option, so shove one in
a choice and wire it up in the Makefile.

This lets us clean up some of the cflags ordering while we're
at it.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 10:45:38 +09:00
Paul Mundt
52e27782e1 sh: p3map_sem sem2mutex conversion.
Simple sem2mutex conversion for the p3map semaphores.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 10:45:37 +09:00
Paul Mundt
21440cf04a sh: Preliminary support for SH-X2 MMU.
This adds some preliminary support for the SH-X2 MMU, used by
newer SH-4A parts (particularly SH7785).

This MMU implements a 'compat' mode with SH-X MMUs and an
'extended' mode for SH-X2 extended features. Extended features
include additional page sizes (8kB, 4MB, 64MB), as well as the
addition of page execute permissions.

The extended mode attributes are placed in a second data array,
which requires us to switch to 64-bit PTEs when in X2 mode.

With the addition of the exec perms, we also overhaul the mmap
prots somewhat, now that it's possible to handle them more
intelligently.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06 10:45:37 +09:00