Commit Graph

3005 Commits

Author SHA1 Message Date
Jan Kiszka
a589e211bd gpio: exar: Use correct property prefix and document bindings
The device-specific property should be prefixed with the vendor name,
not "linux,", as Linus Walleij pointed out. Change this and document the
bindings of this platform device.

We didn't ship the old binding in a release yet. So we can still change
it without breaking an official API.

Fixes: 380b1e2f3a ("gpio-exar/8250-exar: Make set of exported GPIOs configurable")
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-08-01 13:43:55 +02:00
Philipp Rosenberger
cc9269f896 gpio: gpio-mxc: Fix: higher 16 GPIOs usable as wake source
In the function gpio_set_wake_irq(), port->irq_high is only checked for
zero. As platform_get_irq() returns a value less then zero if no interrupt
was found, any gpio >= 16 was handled like an irq_high interrupt was
available. On iMX27 for example no high interrupt is available. This lead
to the problem that only some gpios (the lower 16) were useable as wake
sources.

Signed-off-by: Philipp Rosenberger <p.rosenberger@linutronix.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-08-01 10:37:06 +02:00
Masahiro Yamada
c23d200fec gpio: xgene-sb: select IRQ_DOMAIN_HIERARCHY
This driver calls irq_domain_hierarchy() and irq_chip_*_parent().
They are available only when CONFIG_IRQ_DOMAIN_HIERARCHY is enabled.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-08-01 10:06:00 +02:00
Axel Lin
fa8f6d0619 gpio: lp87565: Set proper output level and direction for direction_output
The value argument of lp87565_gpio_direction_output() means output level
rather than gpio direction.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Reviewed-by: Keerthy <j-keerthy@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-07-31 15:26:57 +02:00
Linus Torvalds
6972b007ca Merge (most of) tag 'mfd-next-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd
Pull MFD updates from Lee Jones:
 "New Drivers:
   - Intel Cherry Trail Whiskey Cove PMIC
   - TI LP87565 PMIC

  New Device Support:
   - Add support for Cannonlake to intel-lpss-pci
   - Add support for Simatic IOT2000 to intel_quark_i2c_gpio

  New Functionality:
   - Add Regulator support (axp20x)

  Fix-ups:
   - Rework IRQ handling (intel_soc_pmic_bxtwc, rtsx_pcr, cros_ec)
   - Remove unused/unwelcome code (ipaq-micro, wm831x-core, da9062-core)
   - Provide deregistration on unbind (rn5t618)
   - Rework DT code/documentation (arizona)
   - Constify things (fsl-imx25-tsadc)
   - MAINTAINERS updates (DA9062/61)
   - Kconfig configuration adaptions (INTEL_SOC_PMIC, MFD_AXP20X_I2C)
   - Switch to DMI matching (intel_quark_i2c_gpio)
   - Provide an appropriate level of error checking (wm831x-{i2c,spi},
     twl4030-irq, tc6393xb)
   - Make use of devm_* (resource handling) calls (intel_soc_pmic_bxtwc,
     stm32-timers, atmel-flexcom, cros_ec, fsl-imx25-tsadc,
     exynos-lpass, palmas, qcom-spmi-pmic, smsc-ece1099,
     motorola-cpcap)"

[ Skipped the last commit in that series that added eight thousand
  lines of pointless repeated register definitions.  - Linus ]

* tag 'mfd-next-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (38 commits)
  mfd: Add LP87565 PMIC support
  mfd: cros_ec: Free IRQ on exit
  dt-bindings: vendor-prefixes: Add arctic to vendor prefix
  mfd: da9061: Fix to remove BBAT_CONT register from chip model
  mfd: da9061: Fix to remove BBAT_CONT register from chip model
  mfd: axp20x-i2c: Document that this must be builtin on x86
  mfd: Add Cherry Trail Whiskey Cove PMIC driver
  mfd: tc6393xb: Handle return value of clk_prepare_enable
  mfd: intel_quark_i2c_gpio: Add support for SIMATIC IOT2000 platform
  mfd: intel_quark_i2c_gpio: Use dmi_system_id table for retrieving frequency
  mfd: motorola-cpcap: Use devm_of_platform_populate()
  mfd: smsc-ece: Use devm_of_platform_populate()
  mfd: qcom-spmi-pmic: Use devm_of_platform_populate()
  mfd: palmas: Use devm_of_platform_populate()
  mfd: exynos: Use devm_of_platform_populate()
  mfd: fsl-imx25: Use devm_of_platform_populate()
  mfd: cros_ec: Use devm_of_platform_populate()
  mfd: atmel: Use devm_of_platform_populate()
  mfd: stm32-timers: Use devm_of_platform_populate()
  mfd: intel_soc_pmic: Select designware i2c-bus driver
  ...
2017-07-07 13:30:05 -07:00
Linus Torvalds
c7d28eca1d This is the bulk of GPIO changes for the v4.13 series:
Core:
 - Export add/remove for lookup tables so that modules can export GPIO
   descriptor tables.
 - Handle GPIO sleep states: it is now possible to flag that a GPIO line
   may loose its state during suspend/resume of the system to save
   power. This is used in the Wolfson Micro Arizona driver.
 - ACPI-based GPIO was tightened up a lot around the edges.
 - Use bitmap_fill() to speed up a loop.
 
 New drivers:
 - Exar XRA1403 SPI-based GPIO.
 - MVEBU driver now supports Armada 7K and 8K.
 - LP87565 PMIC GPIO.
 - Renesas R-CAR R8A7743 (RZ/G1M).
 - The new IOT2040 8250 serial/GPIO also comes in through this
   changeset.
 
 Substantial driver changes:
 - Seriously fix the Exar 8250 GPIO portions to work.
 - The MCP23S08 was moved out to a pin control driver.
 - Convert MEVEBU to use regmap for register access.
 - Drop Vulcan support from the Broadcom driver.
 - Serious cleanup and improvement of the mockup driver, giving us a
   better test coverage.
 
 Misc:
 - Lots of janitorial clean up.
 - A bunch of documentation fixes.
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Merge tag 'gpio-v4.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio

Pull GPIO updates from Linus Walleij:
 "This is the bulk of GPIO changes for the v4.13 series.

  Some administrativa:

  I have a slew of 8250 serial patches and the new IOT2040 serial+GPIO
  driver coming in through this tree, along with a whole bunch of Exar
  8250 fixes. These are ACKed by Greg and also hit drivers/platform/*
  where they are ACKed by Andy Shevchenko.

  Speaking about drivers/platform/* there is also a bunch of ACPI stuff
  coming through that route, again ACKed by Andy.

  The MCP23S08 changes are coming in here as well. You already have the
  commits in your tree, so this is just a result of sharing an immutable
  branch between pin control and GPIO.

  Core:
   - Export add/remove for lookup tables so that modules can export GPIO
     descriptor tables.
   - Handle GPIO sleep states: it is now possible to flag that a GPIO
     line may loose its state during suspend/resume of the system to
     save power. This is used in the Wolfson Micro Arizona driver.
   - ACPI-based GPIO was tightened up a lot around the edges.
   - Use bitmap_fill() to speed up a loop.

  New drivers:
   - Exar XRA1403 SPI-based GPIO.
   - MVEBU driver now supports Armada 7K and 8K.
   - LP87565 PMIC GPIO.
   - Renesas R-CAR R8A7743 (RZ/G1M).
   - The new IOT2040 8250 serial/GPIO also comes in through this
     changeset.

  Substantial driver changes:
   - Seriously fix the Exar 8250 GPIO portions to work.
   - The MCP23S08 was moved out to a pin control driver.
   - Convert MEVEBU to use regmap for register access.
   - Drop Vulcan support from the Broadcom driver.
   - Serious cleanup and improvement of the mockup driver, giving us a
     better test coverage.

  Misc:
   - Lots of janitorial clean up.
   - A bunch of documentation fixes"

* tag 'gpio-v4.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (70 commits)
  serial: exar: Add support for IOT2040 device
  gpio-exar/8250-exar: Make set of exported GPIOs configurable
  platform: Accept const properties
  serial: exar: Factor out platform hooks
  gpio-exar/8250-exar: Rearrange gpiochip parenthood
  gpio: exar: Fix iomap request
  gpio-exar/8250-exar: Do not even instantiate a GPIO device for Commtech cards
  serial: uapi: Add support for bus termination
  gpio: rcar: Add R8A7743 (RZ/G1M) support
  gpio: gpio-wcove: Fix GPIO control register offset calculation
  gpio: lp87565: Add support for GPIO
  gpio: dwapb: fix missing first irq for edgeboth irq type
  MAINTAINERS: Take maintainership for GPIO ACPI support
  gpio: exar: Fix reading of directions and values
  gpio: exar: Allocate resources on behalf of the platform device
  gpio-exar/8250-exar: Fix passing in of parent PCI device
  gpio: mockup: use devm_kcalloc() where applicable
  gpio: mockup: add myself as author
  gpio: mockup: improve the error message
  gpio: mockup: don't return magic numbers from probe()
  ...
2017-07-07 12:40:27 -07:00
Linus Torvalds
ac7b75966c This is the big bulk of pin control changes for the v4.13 series:
Core:
 
 - The documentation is moved over to RST.
 - We now have agreed bindings for enabling input and output
   buffers without actually enabling input and/or output on a
   pin. We are chiseling out some details of pin control
   electronics.
 
 New drivers:
 
 - ZTE ZX
 - Renesas RZA1
 - MIPS Ingenic JZ47xx: also switch over existing drivers in the
   tree to use this pin controller and consolidate earlier
   spread out code.
 - Microschip MCP23S08: this driver is migrated from the GPIO
   subsystem and totally rewritten to use proper pin control.
   All users are switched over.
 
 New subdrivers:
 
 - Renesas R8A7743 and R8A7745.
 - Allwinner Sunxi A83T R_PIO.
 - Marvell MVEBU Armada CP110 and AP806.
 - Intel Cannon Lake PCH.
 - Qualcomm IPQ8074.
 
 Notable improvements:
 
 - IRQ support on the Marvell MVEBU Armada 37xx.
 - Meson driver supports HDMI CEC, AO, I2S, SPDIF and PWM.
 - Rockchip driver now supports iomux-route switching for
   RK3228, RK3328 and RK3399.
 - Rockchip A10 and A20 are merged into a single driver.
 - STM32 has improved GPIO support.
 - Samsung Exynos drivers are split per ARMv7 and ARMv8.
 - Marvell MVEBU is converted to use regmap for register
   access.
 
 Maintenance:
 
 - Several Renesas SH-PFC refactorings and updates.
 - Serious code size cut for Mediatek MT7623.
 - Misc janitorial and MAINTAINERS fixes.
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Merge tag 'pinctrl-v4.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "This is the big bulk of pin control changes for the v4.13 series:

  Core:
   - The documentation is moved over to RST.
   - We now have agreed bindings for enabling input and output buffers
     without actually enabling input and/or output on a pin. We are
     chiseling out some details of pin control electronics.

  New drivers:
   - ZTE ZX
   - Renesas RZA1
   - MIPS Ingenic JZ47xx: also switch over existing drivers in the tree
     to use this pin controller and consolidate earlier spread out code.
   - Microschip MCP23S08: this driver is migrated from the GPIO
     subsystem and totally rewritten to use proper pin control. All
     users are switched over.

  New subdrivers:
   - Renesas R8A7743 and R8A7745.
   - Allwinner Sunxi A83T R_PIO.
   - Marvell MVEBU Armada CP110 and AP806.
   - Intel Cannon Lake PCH.
   - Qualcomm IPQ8074.

  Notable improvements:
   - IRQ support on the Marvell MVEBU Armada 37xx.
   - Meson driver supports HDMI CEC, AO, I2S, SPDIF and PWM.
   - Rockchip driver now supports iomux-route switching for RK3228,
     RK3328 and RK3399.
   - Rockchip A10 and A20 are merged into a single driver.
   - STM32 has improved GPIO support.
   - Samsung Exynos drivers are split per ARMv7 and ARMv8.
   - Marvell MVEBU is converted to use regmap for register access.

  Maintenance:
   - Several Renesas SH-PFC refactorings and updates.
   - Serious code size cut for Mediatek MT7623.
   - Misc janitorial and MAINTAINERS fixes"

* tag 'pinctrl-v4.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (137 commits)
  pinctrl: samsung: Remove bogus irq_[un]mask from resource management
  pinctrl: rza1: make structures rza1_gpiochip_template and rza1_pinmux_ops static
  pinctrl: rza1: Remove unneeded wrong check for wrong variable
  pinctrl: qcom: Add ipq8074 pinctrl driver
  pinctrl: freescale: imx7d: make of_device_ids const.
  pinctrl: DT: extend the pinmux property to support integers array
  pinctrl: generic: Add output-enable property
  pinctrl: armada-37xx: Fix number of pin in sdio_sb
  pinctrl: armada-37xx: Fix uart2 group selection register mask
  pinctrl: bcm2835: Avoid warning from __irq_do_set_handler
  pinctrl: sh-pfc: r8a7795: Add PWM support
  MAINTAINERS: Add Qualcomm pinctrl drivers section
  arm: dts: dt-bindings: Add Renesas RZ/A1 pinctrl header
  dt-bindings: pinctrl: Add RZ/A1 bindings doc
  pinctrl: Renesas RZ/A1 pin and gpio controller
  pinctrl: sh-pfc: r8a7792: Add SCIF1 and SCIF2 pin groups
  pinctrl.txt: move it to the driver-api book
  pinctrl: ingenic: checking for NULL instead of IS_ERR()
  pinctrl: uniphier: fix WARN_ON() of pingroups dump on LD20
  pinctrl: uniphier: fix WARN_ON() of pingroups dump on LD11
  ...
2017-07-06 11:38:59 -07:00
Linus Torvalds
974668417b driver core patches for 4.13-rc1
Here is the big driver core update for 4.13-rc1.
 
 The large majority of this is a lot of cleanup of old fields in the
 driver core structures and their remaining usages in random drivers.
 All of those fixes have been reviewed by the various subsystem
 maintainers.  There's also some small firmware updates in here, a new
 kobject uevent api interface that makes userspace interaction easier,
 and a few other minor things.
 
 All of these have been in linux-next for a long while with no reported
 issues.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'driver-core-4.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core

Pull driver core updates from Greg KH:
 "Here is the big driver core update for 4.13-rc1.

  The large majority of this is a lot of cleanup of old fields in the
  driver core structures and their remaining usages in random drivers.
  All of those fixes have been reviewed by the various subsystem
  maintainers. There's also some small firmware updates in here, a new
  kobject uevent api interface that makes userspace interaction easier,
  and a few other minor things.

  All of these have been in linux-next for a long while with no reported
  issues"

* tag 'driver-core-4.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: (56 commits)
  arm: mach-rpc: ecard: fix build error
  zram: convert remaining CLASS_ATTR() to CLASS_ATTR_RO()
  driver-core: remove struct bus_type.dev_attrs
  powerpc: vio_cmo: use dev_groups and not dev_attrs for bus_type
  powerpc: vio: use dev_groups and not dev_attrs for bus_type
  USB: usbip: convert to use DRIVER_ATTR_RW
  s390: drivers: convert to use DRIVER_ATTR_RO/WO
  platform: thinkpad_acpi: convert to use DRIVER_ATTR_RO/RW
  pcmcia: ds: convert to use DRIVER_ATTR_RO
  wireless: ipw2x00: convert to use DRIVER_ATTR_RW
  net: ehea: convert to use DRIVER_ATTR_RO
  net: caif: convert to use DRIVER_ATTR_RO
  TTY: hvc: convert to use DRIVER_ATTR_RW
  PCI: pci-driver: convert to use DRIVER_ATTR_WO
  IB: nes: convert to use DRIVER_ATTR_RW
  HID: hid-core: convert to use DRIVER_ATTR_RO and drv_groups
  arm: ecard: fix dev_groups patch typo
  tty: serdev: use dev_groups and not dev_attrs for bus_type
  sparc: vio: use dev_groups and not dev_attrs for bus_type
  hid: intel-ish-hid: use dev_groups and not dev_attrs for bus_type
  ...
2017-07-03 20:27:48 -07:00
Jan Kiszka
380b1e2f3a gpio-exar/8250-exar: Make set of exported GPIOs configurable
On the SIMATIC, IOT2040 only a single pin is exportable as GPIO, the
rest is required to operate the UART. To allow modeling this case,
expand the platform device data structure to specify a (consecutive) pin
subset for exporting by the gpio-exar driver.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
2017-07-03 08:32:42 +02:00
Jan Kiszka
4076cf08ac gpio-exar/8250-exar: Rearrange gpiochip parenthood
Set the parent of the exar gpiochip to its platform device, like other
gpiochips are doing it. In order to keep the relationship discoverable
for ACPI systems, set the platform device companion to the PCI device.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2017-07-03 08:30:51 +02:00
Jan Kiszka
8847f5f9ef gpio: exar: Fix iomap request
The UART driver already maps the resource for us. Trying to do this here
only fails and leaves us with a non-working device.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2017-07-03 08:30:03 +02:00
Jan Kiszka
a39f2fe716 gpio-exar/8250-exar: Do not even instantiate a GPIO device for Commtech cards
Commtech adapters need the MPIOs for internal purposes, and the
gpio-exar driver already refused to pick them up. But there is actually
no point in even creating the underlying platform device.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-07-03 08:23:09 +02:00
Hans de Goede
c06632ea05 gpio: acpi: Skip _AEI entries without a handler rather then aborting the scan
acpi_walk_resources will stop as soon as the callback passed in returns
an error status. On a x86 tablet I have the first GpioInt in the _AEI
resource list has no handler defined in the DSDT, causing
acpi_walk_resources to abort scanning the rest of the resource list,
which does define valid ACPI GPIO events.

This commit changes the return for not finding a handler from
AE_BAD_PARAMETER to AE_OK so that the rest of the resource list will
get scanned normally in case of missing event handlers.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-06-29 14:55:08 +02:00
Linus Walleij
6183061967 Linux 4.12-rc7
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Merge tag 'v4.12-rc7' into devel

Linux 4.12-rc7
2017-06-29 14:27:39 +02:00
Biju Das
85bb4646f8 gpio: rcar: Add R8A7743 (RZ/G1M) support
Renesas RZ/G1M (R8A7743) SoC GPIO blocks are identical to the R-Car Gen2
family. Add support for its GPIO controllers.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-06-29 14:22:38 +02:00
Kuppuswamy Sathyanarayanan
3a02dc9747 gpio: gpio-wcove: Fix GPIO control register offset calculation
According to Whiskey Cove PMIC GPIO controller specification, for GPIO
pins 0-12, GPIO input and output register control address range from,

0x4e44-0x4e50 for GPIO outputs control register

0x4e51-0x4e5d for GPIO input control register

But, currently when calculating the GPIO register offsets in to_reg()
function, all GPIO pins in the same bank uses the same GPIO control
register address. This logic is incorrect. This patch fixes this
issue.

This patch also adds support to selectively skip register modification
for virtual GPIOs.

In case of Whiskey Cove PMIC, ACPI code may use up 94 virtual GPIOs.
These virtual GPIOs are used by the ACPI code as means to access various
non GPIO bits of PMIC. So for these virtual GPIOs, we don't need to
manipulate the physical GPIO pin register. A similar patch has been
merged recently by Hans for Crystal Cove PMIC GPIO driver. You can
find more details about it in Commit 9a752b4c9a ("gpio: crystalcove:
Do not write regular gpio registers for virtual GPIOs")

Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Reported-by: Jukka Laitinen <jukka.laitinen@intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-06-29 14:03:51 +02:00
Bartosz Golaszewski
ad537b8225 gpiolib: fix filtering out unwanted events
GPIOEVENT_REQUEST_BOTH_EDGES is not a single flag, but a binary OR of
GPIOEVENT_REQUEST_RISING_EDGE and GPIOEVENT_REQUEST_FALLING_EDGE.

The expression 'le->eflags & GPIOEVENT_REQUEST_BOTH_EDGES' we'll get
evaluated to true even if only one event type was requested.

Fix it by checking both RISING & FALLING flags explicitly.

Cc: stable@vger.kernel.org
Fixes: 61f922db72 ("gpio: userspace ABI for reading GPIO line events")
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-06-29 11:33:46 +02:00
Keerthy
5c7f2c76cd gpio: lp87565: Add support for GPIO
Add driver for lp87565 PMIC family GPIOs. Three GPIOs are supported
and can be configured in Open-drain output or Push-pull output.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-06-21 09:36:46 +02:00
Xiaoguang Chen
edadced2bc gpio: dwapb: fix missing first irq for edgeboth irq type
dwapb_irq_set_type overwrites polarity register value for
IRQ_TYPE_EDGE_BOTH case. If the polarity of one gpio is 0
by default, then it will set falling edge irq trigger.
and the gpio may requires rising edge irq for the first time,
and it will be missed.

Do not overwrite polarity register for IRQ_TYPE_EDGE_BOTH case
can solve this issue.

Signed-off-by: Xiaoguang Chen <xgchenshy@gmail.com>
Tested-by: Jisheng Zhang <jszhang@marvell.com>
[Fix some really weird text encoding problem]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-06-21 09:36:46 +02:00
Ralph Sennhauser
6c7515c61f gpio: mvebu: change compatible string for PWM support
As it turns out more than just Armada 370 and XP support using GPIO
lines as PWM lines. For example the Armada 38x family has the same
hardware support. As such "marvell,armada-370-xp-gpio" for the
compatible string is a misnomer.

Change the compatible string to "marvell,armada-370-gpio" before the
driver makes it out of the -rc stage. This also follows the practice of
using only the first device family supported as part of the name.

Also update the documentation and comments in the code accordingly.

Fixes: 757642f9a5 ("gpio: mvebu: Add limited PWM support")
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-06-20 13:42:20 +02:00
Jan Kiszka
7f45a875da gpio: exar: Fix reading of directions and values
First, the logic for translating a register bit to the return code of
exar_get_direction and exar_get_value were wrong. And second, there was
a flip regarding the register bank in exar_get_direction.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-06-20 10:16:23 +02:00
Jan Kiszka
5dab5872e5 gpio: exar: Allocate resources on behalf of the platform device
Do not allocate resources on behalf of the parent device but on our own.
Otherwise, cleanup does not properly work if gpio-exar is removed but
not the parent device.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-06-20 10:14:03 +02:00
Jan Kiszka
d3936d7437 gpio-exar/8250-exar: Fix passing in of parent PCI device
This fixes reloading of the GPIO driver for the same platform device
instance as created by the exar UART driver: First of all, the driver
sets drvdata to its own value during probing and does not restore the
original value on exit. But this won't help anyway as the core clears
drvdata after the driver left.

Set the platform device parent instead.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-06-20 10:12:39 +02:00
Bartosz Golaszewski
f6ac438e5e gpio: mockup: use devm_kcalloc() where applicable
When allocating a zeroed array of objects use devm_kcalloc() instead
of manually calculating the required size and using devm_kzalloc().

Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-06-20 09:19:12 +02:00
Bartosz Golaszewski
c60c7f4c6b gpio: mockup: add myself as author
Just taking credit for the recent changes and new features. :)

Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-06-20 09:19:09 +02:00
Bartosz Golaszewski
ec604f151e gpio: mockup: improve the error message
Indicate the error number and make the message a bit more elaborate.

Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-06-20 09:19:05 +02:00
Bartosz Golaszewski
4dc9d76c98 gpio: mockup: don't return magic numbers from probe()
When the requested number of GPIO lines is 0, return -EINVAL, not
-1 which is -EPERM.

Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-06-20 09:18:59 +02:00
Bartosz Golaszewski
b652336d3f gpio: mockup: improve readability
We currently shift bits here and there without actually explaining
what we're doing. Add some helper variables with names indicating
their purpose to improve the code readability.

Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-06-20 09:18:55 +02:00
Bartosz Golaszewski
b6c2e77d34 gpio: mockup: refuse to accept an odd number of GPIO ranges
Currently we ignore the last odd range value, since each chip is
described by two values. Be more strict and require the user to
pass an even number of ranges.

Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-06-20 09:18:51 +02:00
Bartosz Golaszewski
650b57b083 gpio: mockup: tweak gpio_mockup_event_write()
Invert the logic of the irq_enabled check and only access the private
data after the input is sanitized.

Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-06-20 09:18:47 +02:00
Bartosz Golaszewski
6f9b3e776d gpio: mockup: improve the debugfs input sanitization
We're currently only checking the first character of the input to the
debugfs event files, so a string like '0sdfdsf' is valid and indicates
a falling edge event.

Be more strict and only allow '0', '1', '0\n' & '1\n'.

While we're at it: move the sanitization code before the irq_enabled
check so that we indicate an error on invalid input even if nobody is
waiting for events.

Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-06-20 09:18:33 +02:00
Kuppuswamy Sathyanarayanan
a1d28c5991 mfd: intel_soc_pmic_bxtwc: Remove second level IRQ for gpio device
Currently all PMIC GPIO domain IRQs are consumed by the same
device(bxt_wcove_gpio), so there is no need to export them as
separate interrupts. We can just export only the first level
GPIO IRQ(BXTWC_GPIO_LVL1_IRQ) as an IRQ resource and let the
GPIO device driver(bxt_wcove_gpio) handle the GPIO sub domain
IRQs based on status value of GPIO level2 interrupt status
register. Also, just using only the first level IRQ will eliminate
the bug involved in requesting only the second level IRQ and not
explicitly enable the first level IRQ. For more info on this
issue please read the details at,

https://lkml.org/lkml/2017/2/27/148

This patch also makes relevant change in Whiskey cove GPIO driver to
use only first level PMIC GPIO IRQ.

Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-for-MFD-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-06-19 15:44:44 +01:00
Gregory CLEMENT
b6730b2083 gpio: mvebu: Add support for the Armada 7K/8K SoCs
The Armada 7K and 8K SoCs use the same gpio controller as most of the
other mvebu SoCs. However, the main difference is that the GPIO
controller is part of a bigger system controller, and a syscon is used to
control the overall system controller. Therefore, the driver needs to be
adjusted to retrieve the regmap of the syscon to access registers, and
account for the fact that registers are located at a certain offset
within the regmap.

This commit add the support of the syscon and introduce a new variant for
this case.

It was based on the preliminary work of Thomas Petazzoni.

Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-06-16 11:28:29 +02:00
Gregory CLEMENT
43a2dcecd8 gpio: mvebu: fix regmap_update_bits usage
In some place in the driver regmap_update_bits was misused. Indeed the
last argument is not the value of the bit (or group of bits) itself but
the mask value inside the register.

So when setting the bit N, then the value must be BIT(N) and not 1.

CC: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Tested-by: Chris Packham <Chris.Packham@alliedtelesis.co.nz>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-06-16 11:15:20 +02:00
Soren Brinkmann
3638bd4a06 gpio: zynq: Clarify quirk and provide helper function
The one quirk used in the zynq GPIO driver was called FOO which is not
very descriptive. Rename the quirk to IS_ZYNQ as it indicates whether
the HW is a zynq or zynqmp device to allow handling of device-specific
differences of the HW.
Also provide a helper function to test whether the HW is zynq or zynqmp.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-06-16 11:13:12 +02:00
Andy Shevchenko
ff8c474d15 gpio: merrifield: Remove unused header
I don't remember how linux/gpio.h made the source, now it seems unused.
Remove it.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-06-16 11:13:11 +02:00
Geert Uytterhoeven
ead066e682 gpio: of: Spelling: s/retures/returns/
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-06-16 11:13:10 +02:00
Greg Kroah-Hartman
d83bb159f4 gpio: use class_groups instead of class_attrs
The class_attrs pointer is long depreciated, and is about to be finally
removed, so move to use the class_groups pointer instead.

Acked-by: Linus Walleij <linus.walleij@linaro.org>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: <linux-gpio@vger.kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-06-09 10:41:00 +02:00
Richard Genoud
fc7a906867 gpio: mvebu: fix gpio bank registration when pwm is used
If more than one gpio bank has the "pwm" property, only one will be
registered successfully, all the others will fail with:
mvebu-gpio: probe of f1018140.gpio failed with error -17

That's because in alloc_pwms(), the chip->base (aka "int pwm"), was not
set (thus, ==0) ; and 0 is a meaningful start value in alloc_pwm().
What was intended is mvpwm->chip->base = -1.
Like that, the numbering will be done auto-magically

Moreover, as the region might be already occupied by another pwm, we
shouldn't force:
mvpwm->chip->base = 0
nor
mvpwm->chip->base = id * MVEBU_MAX_GPIO_PER_BANK;

Tested on clearfog-pro (Marvell 88F6828)

Fixes: 757642f9a5 ("gpio: mvebu: Add limited PWM support")
Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-06-09 09:38:27 +02:00
Richard Genoud
c528eb27a3 gpio: mvebu: fix blink counter register selection
The blink counter A was always selected because 0 was forced in the
blink select counter register.
The variable 'set' was obviously there to be used as the register value,
selecting the B counter when id==1 and A counter when id==0.

Tested on clearfog-pro (Marvell 88F6828)

Fixes: 757642f9a5 ("gpio: mvebu: Add limited PWM support")
Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Reviewed-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-06-09 09:36:59 +02:00
Arnd Bergmann
665dff997e gpio: xra1403: select REGMAP_SPI
Without the regmap code, we get a link error:

drivers/gpio/built-in.o: In function `xra1403_probe':
(.text+0x132e0): undefined reference to `__devm_regmap_init_spi'

Fixes: 5704520d78 ("gpio: xra1403: Add EXAR XRA1403 SPI GPIO expander driver")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by:  Nandor Han <nandor.han@ge.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-05-31 02:13:24 +02:00
Arnd Bergmann
073570dcb5 gpiolib: remove unused variable
This was left behind by a cleanup patch:

drivers/gpio/gpiolib.c: In function 'gpiochip_irqchip_init_valid_mask':
drivers/gpio/gpiolib.c:1474:6: error: unused variable 'i' [-Werror=unused-variable]

Fixes: 923a654c18 ("gpiolib: Re-use bitmap_fill() instead of open coded loop")
Reported-by: kbuild test robot <fengguang.wu@intel.com>
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Reported-by: Colin King <colin.king@canonical.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-05-31 02:07:29 +02:00
Linus Walleij
c504985e3b gpio/pinctrl: ingenic: depend on OF
Fix compile errors due to missing OF.

Cc: Paul Cercueil <paul@crapouillou.net>
Reported-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-05-29 13:41:50 +02:00
Wolfram Sang
c1a4634013 gpio: adp5588: move header file out of I2C realm
include/linux/i2c is not for client devices. Move the header file to a
more appropriate location.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-05-29 13:36:45 +02:00
Bartosz Golaszewski
e3fe07e03e gpio: ml-ioh: check the return value of irq_alloc_generic_chip()
This function can fail, so check the return value before dereferencing
the returned pointer.

Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-05-29 13:34:22 +02:00
Bartosz Golaszewski
d76e8babe4 gpio: sta2x11: check the return value of irq_alloc_generic_chip()
This function can fail, so check the return value before dereferencing
the returned pointer.

Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-05-29 13:33:42 +02:00
Bartosz Golaszewski
09445a103e gpio: pch: check the return value of irq_alloc_generic_chip()
This function can fail, so check the return value before dereferencing
the returned pointer.

Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-05-29 13:33:01 +02:00
Bartosz Golaszewski
c7f5326fb4 gpio: mockup: support irqmask and irqunmask
Even though this is a testing module, be nice and actually implement
these functions.

Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-05-29 13:29:40 +02:00
Bartosz Golaszewski
01a3f23c16 gpio: mockup: be quiet unless something goes wrong
When inserting and removing the module repeatedly (e.g. when running
the libgpiod test-suite) the kernel log gets clobbered with messages
reporting successful creation of dummy gpiochips.

Remove this message and only emit logs when something bad happens.

Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-05-29 13:28:58 +02:00
Bartosz Golaszewski
c650c00c10 gpio: mockup: add prefixes to the direction enum
All internal symbols except for the direction enum follow the same
convention and use the gpio_mockup prefix. Add the prefix to the
DIR_IN and DIR_OUT definitions as well for consistency across the
file.

Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-05-29 13:28:09 +02:00