Document a new boolean property of the sdhci-fujitsu binding that
indicates whether the CMD_DAT_DELAY bit needs to be set in the
F_SDH30_ESD_CONTROL register.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Add a description of the External Interrupt Unit (EXIU) interrupt
controller as found on the Socionext SynQuacer SoC.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
In order to use i2c from a cold boot, the i2c peripheral must be taken
out of reset. We request a shared reset controller each time a bus
driver is loaded, as the reset is shared between the 14 i2c buses.
On remove the reset is asserted, which only touches the hardware once
the last i2c bus is removed.
The reset is required as the I2C buses will not work without releasing
the reset. Previously the driver only worked with out of tree hacks
that released this reset before the driver was loaded. Update the
device tree bindings to reflect this.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
IPI driver for the Open Multi-Processor Interrupt Controller (ompic) as
described in the Multi-core support section of the OpenRISC 1.2
architecture specification:
https://github.com/openrisc/doc/raw/master/openrisc-arch-1.2-rev0.pdf
Each OpenRISC core contains a full interrupt controller which is used in
the SMP architecture for interrupt balancing. This IPI device, the
ompic, is the only external device required for enabling SMP on
OpenRISC.
Pending ops are stored in a memory bit mask which can allow multiple
pending operations to be set and serviced at a time. This is mostly
borrowed from the alpha IPI implementation.
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
[shorne@gmail.com: converted ops to bitmask, wrote commit message]
Signed-off-by: Stafford Horne <shorne@gmail.com>
Add OpenRISC.io to vendor prefixes. This is reserved for softcores
developed by the OpenRISC community. The OpenRISC community has
separated from OpenCores.org requiring a new prefix.
Reviewed-by: Andreas Färber <afaerber@suse.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stafford Horne <shorne@gmail.com>
Add devicetree binding documentation for the OpenRISC platform
opencores,or1ksim. This is the main OpenRISC reference platform
supporting multiple FPGA SoC's.
This format is based on some of the mips binding docs as we have
similar requirements.
Also, update maintainers so openrisc related binding changes are visible
to the openrisc team.
Acked-by: Rob Herring <robh@kernel.org>
Suggested-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Stafford Horne <shorne@gmail.com>
From Boris:
"
Core changes:
* Add a flag to mark NANDs that require 3 address cycles to encode a
page address
* Set a default ECC/free layout when NAND_ECC_NONE is requested
* Fix a bug in panic_nand_write()
Driver changes:
* Another batch of cleanups for the denali driver
* Fix PM support in the atmel driver
* Remove support for platform data in the omap driver
* Fix subpage write in the omap driver
* Fix irq handling in the mtk driver
* Change link order of mtk_ecc and mtk_nand drivers to speed up boot
time
* Change log level of ECC error messages in the mxc driver
* Patch the pxa3xx driver to support Armada 8k platforms
* Add BAM DMA support to the qcom driver
* Convert gpio-nand to the GPIO desc API
* Fix ECC handling in the mt29f driver
"
This pull-request contains the following notable changes:
From Cyrille:
"
Core changes:
* Introduce system power management support.
* New mechanism to select the proper .quad_enable() hook by JEDEC ID,
when needed, instead of only by manufacturer ID.
* Add support to new memory parts from Gigadevice, Winbond, Macronix and
Everspin.
Driver changes:
* Maintainance for Cadence, Intel, Mediatek and STM32 drivers.
"
Meson8 uses the same GPIO interrupt controller IP block as the other
Meson SoCs. A total of 134 pins can be spied on, which is the sum of:
- 22 pins on bank GPIOX
- 17 pins on bank GPIOY
- 30 pins on bank GPIODV
- 10 pins on bank GPIOH
- 15 pins on bank GPIOZ
- 7 pins on bank CARD
- 19 pins on bank BOOT
- 14 pins in the AO domain
Acked-by: Kevin Hilman <khilman@baylibre.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Pull "Mediatek: soc driver updates for v4.15" from Matthias Brugger:
- add 32 bit read/write support to pwrap
- add mt7622 support to pwrap
- test build all mediatek soc drivers
- fix compiler issues
- clean up Kconfig description
* tag 'v4.14-next-soc' of https://github.com/mbgg/linux-mediatek:
soc: mediatek: pwrap: fix fatal compiler error
soc: mediatek: pwrap: fix compiler errors
arm64: mediatek: cleanup message for platform selection
soc: Allow test-building of MediaTek drivers
soc: mediatek: place Kconfig for all SoC drivers under menu
soc: mediatek: pwrap: add support for MT7622 SoC
soc: mediatek: pwrap: add common way for setup CS timing extenstion
soc: mediatek: pwrap: add MediaTek MT6380 as one slave of pwrap
soc: mediatek: pwrap: refactor pwrap_init for the various PMIC types
soc: mediatek: pwrap: add pwrap_write32 for writing in 32-bit mode
soc: mediatek: pwrap: add pwrap_read32 for reading in 32-bit mode
dt-bindings: arm: mediatek: add MT7622 string to the PMIC wrapper doc
ARM: mediatek: Cocci spatch "of_table"
soc: mediatek: pwrap: fixup warnings from coding style
Pull "Qualcomm ARM Based Driver Updates for v4.15 Part 2" from Andy Gross:
* Add Qualcomm Remote Filesystem Memory driver
* Add OF linkage for RMTFS
* tag 'qcom-drivers-for-4.15-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/agross/linux:
soc: qcom: Remote filesystem memory driver
dt-binding: soc: qcom: Add binding for rmtfs memory
of: reserved_mem: Accessor for acquiring reserved_mem
of/platform: Generalize /reserved-memory handling
Pull "thermal: tegra: Changes for v4.15-rc1" from Thierry Reding:
This contains the Tegra186 BPMP thermal driver. It is used to monitor
and access several thermal sensors found in the SoC.
* tag 'tegra-for-4.15-thermal' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
thermal: Add Tegra BPMP thermal sensor driver
dt-bindings: Add bindings for nvidia,tegra186-bpmp-thermal
dt-bindings: clock: tegra: Add sor1_out clock
Document the regulators available on pmi8994 and add support for
this PMIC to the SPMI PMIC regulator driver.
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
This patch adds the binding documentation for apmixedsys, bdpsys,
imgsys, imgsys, infracfg, mcucfg, mfgcfg, mmsys, pericfg, topckgen,
vdecsys and vencsys for Mediatek MT2712.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
These compatible strings need to be added to extend support
for the RPM CC to cover MSM8660/APQ8060. We also need to add
enumberators to the include file for a few clocks that were
missing.
Cc: devicetree@vger.kernel.org
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
The concept of "active" clocks is just explained in a bried comment in the
device driver, let's explain it a bit more in the device tree bindings
so everyone understands this.
Cc: devicetree@vger.kernel.org
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Linux 4.14-rc7
Requested by Ben Skeggs for nouveau to avoid major conflicts,
and things were getting a bit conflicty already, esp around amdgpu
reverts.
Next Thing Co. is the company behind the C.H.I.P. and C.H.I.P. Pro
miniature single board computers.
The "nextthing" vendor-prefix is already used for these two board as
well as their own "GR8" SoC.
Cc: Alexander Kaplan <alex@nextthing.co>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Since hub usb2517 is going to be supported by the usb251xb driver,
the bindings need to be properly updated. Particularly:
- add "microchip,usb2517" and "microchip,usb2517i" compatible strings.
- add "boolean" description to all the properties, which really accept
a boolean value including a new one "led-{usb,speed}-mode".
- move reset-gpios property to the optional section. It isn't
defined as required in the code and shouldn't be required at all, since
hardware may handle reset pins by itself.
- add new led-{usb,speed}-mode mode property. USB2517 device supports
two LED modes: USB mode and speed (default) indication mode. The last one
can be switched on by this property.
- add {bp,sp}-max-{total,removable}-current-microamp property measured in
microamp. It hasn't been defined as property before. Since the limitation
specified by these parameters is hardware specific it needs to be defined
in dts.
Signed-off-by: Serge Semin <fancer.lancer@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Pull Renesas clk driver updates from Geert Uytterhoeven:
- Add support for the second display unit clock on RZ/G1E,
- Add git repository to MAINTAINERS,
- Add suspend/resume support for R-Car Gen3 CPG/MSSR,
- Small fixes and cleanups.
* tag 'clk-renesas-for-v4.15-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
clk: renesas: rcar-gen3: Restore R clock during resume
clk: renesas: rcar-gen3: Restore SDHI clocks during resume
clk: renesas: div6: Restore clock state during resume
clk: renesas: cpg-mssr: Add support to restore core clocks during resume
clk: renesas: cpg-mssr: Restore module clocks during resume
MAINTAINERS: Add git repository to Renesas clock driver section
clk: renesas: cpg-mssr: Add du1 clock to R8A7745
clk: renesas: rz: clk-rz is meant for RZ/A1
clk: renesas: r8a77995: Correct parent clock of INTC-AP
clk: renesas: r8a7796: Correct parent clock of INTC-AP
clk: renesas: r8a7795: Correct parent clock of INTC-AP
The original dwmac-sun8i DT bindings have some issue on how to handle
integrated PHY and was reverted in last RC of 4.13.
But now we have a solution so we need to get back that was reverted.
This patch restore dt-bindings documentation about dwmac-sun8i
This reverts commit 8aa33ec2f4 ("dt-bindings: net: Revert sun8i dwmac binding")
Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This is update for supporting additional devices da9223/4/5.
Only device strings is added because only package type is different.
Signed-off-by: James Ban <James.Ban..opensource@diasemi.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Virtual GLINK channels may know what throughput to expect from a
remoteproc. An intent advertises to the remoteproc this channel is
ready to receive data. Allow a channel to define the size and amount of
intents to be prequeued.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Chris Lew <clew@codeaurora.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This patch add support for mss boot on msm8996. Major changes
include initializing mss rproc for msm8996, making appropriate
change for executing mss reset sequence etc.
Tested-and-acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Avaneesh Kumar Dwivedi <akdwived@codeaurora.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Pull Samsung clk driver updates from Sylwester Nawrocki:
- An addition of separate driver for the Exynos 4412 ISP CMU, needed
to model and properly handle the clock controller's dependencies
on the ISP power domain.
- Adding __maybe_unused attributes to the exynos5433_cmu_{suspend,
resume} ops to suppress compiler warnings with CONFIG_PM disabled.
* tag 'clk-v4.15-exynos-pm' of git://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk:
clk: samsung: Add a separate driver for Exynos4412 ISP clocks
clk: samsung: Add dt bindings for Exynos4412 ISP clock controller
clk: samsung: Instantiate Exynos4412 ISP clocks only when available
clk: samsung: exynos5433: mark PM functions as __maybe_unused
Pull "Freescale arm64 device tree updates for 4.15" from Shawn Guo:
- Add GICv3 ITS node and PCIe devcies for LS1088A support.
- Enable PCIe support for LS2088A SoC.
- Add OP-TEE support for various Layerscape SoCs, LS1012A, LS1043A,
LS1046A, LS1088A and LS208XA.
- Update DPAA QBMan nodes to use constant defines in the interrupt
description.
- Add DSPI device to support SPI-NOR on LS1012A based boards.
* tag 'imx-dt64-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
arm64: dts: update the DPAA QBMan nodes
arm64: dts: ls1088a: add PCIe controller DT nodes
arm64: dts: ls1088a: add gicv3 ITS DT node
arm64: dts: ls2088a: add pcie support
arm64: dts: ls: Add optee node
dt-bindings: mtd: add sst25wf040b and en25s64 to sip-nor list
dt-bindings: spi: Add fsl,ls1012a-dspi compatible string
arm64: dts: ls1012a: add the DTS node for DSPI support
Pull "mvebu dt64 for 4.15 (part 1)" from Gregory CLEMENT:
On Armada 7K/8k:
- Improve network support at SoC and board level
- Enable watchdog
- Add UART muxing
- On 7040 DB: add CD SDIO and NAND support
- On 8040 DB: add PCIE more ports and SPI1
On Armada 37xx:
- Fix UART register size
- Add vmmc regulator for SD on 3720 DB
* tag 'mvebu-dt64-4.15-1' of git://git.infradead.org/linux-mvebu:
arm64: dts: marvell: 7040-db: Add the carrier detect pin for SD card on CP
arm64: dts: marvell: 7040-db: Document the gpio expander
arm64: dts: marvell: enable additional PCIe ports on Armada 8040 DB
arm64: dts: marvell: add NAND support on the 7040-DB board
arm64: dts: marvell: Enable Armada-8040-DB CPS SPI1
arm64: dts: marvell: 8040-db: enable the SFP ports
arm64: dts: marvell: 7040-db: enable the SFP port
arm64: dts: marvell: 7040-db: add comphy reference to Ethernet port
arm64: dts: marvell: mcbin: add comphy references to Ethernet ports
arm64: dts: marvell: 37xx: remove empty line
arm64: dts: marvell: cp110: add PPv2 port interrupts
arm64: dts: marvell: add comphy nodes on cp110 master and slave
arm64: dts: marvell: extend the cp110 syscon register area length
arm64: dts: marvell: enable AP806 watchdog
arm64: dts: marvell: Fix A37xx UART0 register size
arm64: dts: marvell: armada-3720-db: Add vmmc regulator for SD slot
arm64: dts: marvell: add UART muxing on Armada 7K/8K
Pull "Allwinner arm64 DT changes for 4.15" from Maxime Ripard:
Most notable changes:
- SPI and DMA support on the a64
- New boards: NanoPi NEO Plus2
* tag 'sunxi-dt64-for-4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm: allwinner: Correct unit name in devicetree binding example
arm64: allwinner: a64: add dma controller references to spi nodes
arm64: allwinner: a64: Add device node for DMA controller
arm64: allwinner: a64: Fix node with unit name and no reg property
arm64: allwinner: a64: Fix simple-bus unit address format error
arm64: allwinner: h5: add NanoPi NEO Plus2 DT support
arm64: allwinner: a64: add SPI nodes
Pull "i.MX device tree updates for 4.15" from Shawn Guo:
- New board support: i.MX51 ZII RDU1, i.MX53 GE Healthcare PPD, i.MX6
TX modules for MB7 from Ka-Ro Electronics, i.MX6 Wandboard revd1
variants, i.MX6 LWN DISPLAY5 board, Pistachio i.MX6Q board, i.MX6SX
Vining-2000 board.
- Use the 'vpcie-supply' property for PCIe device for boards
imx6qdl-sabresd, imx6q-novena and imx6q-cm-fx6.
- A series from Jagan Teki to update imx6qdl-icore board with audio,
touch and CAN support.
- Switch to nvmem for accessing OCOTP from tempmon for i.MX6SX and add
tempmon support for i.MX6UL.
- A bunch of patches from Lothar Waßmann updating Ka-Ro i.MX28, i.MX53
and i.MX6 TX modules.
- Fix DTC warnings in i.MX device trees, dropping leading zeros from
unit address, correcting display nodes notation and display port
names, fixing nodes with unit name and no reg property.
- Other random device updates for various board support.
* tag 'imx-dt-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (63 commits)
ARM: dts: imx53-tx53: fix interrupt flags
ARM: dts: imx28-tx28: fix interrupt flags
ARM: dts: display5: Device tree description of LWN's DISPLAY5 board
ARM: dts: imx53-qsb-common: Fix 'led_gpio7_7@0' node with unit name and no reg property
ARM: dts: imx53-m53evk: Fix 'led_gpio@0' node with unit name and no reg property
ARM: dts: imx53: Fix 'usbphy@x' node with unit name and no reg property
ARM: dts: imx51-ts4800: Fix 'port@0' node with unit name and no reg property
ARM: dts: imx51-apf51dev: Fix 'backlight@bl1' node with unit name and no reg property
ARM: dts: imx: add ZII RDU1 board
ARM: dts: imx: add support for TX6 modules on MB7 baseboard
ARM: dts: imx: add support for TX6QP
ARM: dts: imx6-tx6: add a .dtsi file for the MB7 baseboard
ARM: dts: imx6-tx6: move display configuration to .dtsi file
ARM: dts: imx6-tx6: add support for I2C bus recovery
ARM: dts: imx6-tx6: convert to using simple-audio-card
ARM: dts: imx6-tx6: specify ethernet phy reset post-delay
ARM: dts: imx6-tx6: improve ethernet related pinctrl setup
ARM: dts: imx6-tx6: add trickle-charge config for DS1339
ARM: dts: imx6-tx6: remove obsolete ipu1 alias
ARM: dts: imx6-tx6: remove obsolete eeti,egalax_ts
...
[arnd: made sure we have no new leading zeroes in unit address during merge]
Pull "Amlogic 32-bit platforms: DT updates for v4.15"
- add SDIO MMC controller
- reserved memory fixes
- SoC info driver nodes
- enable USB host controller
* tag 'amlogic-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM: dts: meson: add the SDIO MMC controller
ARM: dts: meson8b: add reserved memory zone to fix silent freezes
ARM: dts: meson: add SoC information nodes
dt-bindings: Amlogic: add documentation for the SoC info register areas
ARM: dts: meson: fixing USB support on Meson6, Meson8 and Meson8b
ARM: dts: meson: enabling the USB Host controller on Odroid-C1/C1+ board
