Commit Graph

871 Commits

Author SHA1 Message Date
Roy Spliet
9c870007e9 drm/nouveau/fb/sddr3: Expand MR generation
Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:04 +10:00
Roy Spliet
941844327c drm/nva3/pwr/memx: Match blob's fb access behaviour
Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:04 +10:00
Roy Spliet
6778911b20 drm/nouveau/pwr/memx: Return debugging information
Time measured from disabling FB to re-enabling, PPWR_IN reveals status of
heads at the end of script. Helps debug various issues (like flicker).

Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:04 +10:00
Roy Spliet
d93e996aed drm/nouveau/pwr/memx: Make FB disable and enable explicit
Needs to be done after wait-for-VBLANK, and NVA3 requires register writes
in between.

Rather than hard-coding register writes, just split out fb_disable and
fb_enable.

v2. Squashed "fb/ramnve0: disable fb before reclocking"

Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:03 +10:00
Roy Spliet
e1a6f7da9a drm/nva3/pwr/memx: Implement "wait for VBLANK"
Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:03 +10:00
Martin Peres
3a405258b2 drm/nouveau/therm/nv84+: do not expose non-calibrated internal temp sensor
Signed-off-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:02 +10:00
Martin Peres
c5b4865e20 drm/nouveau/therm: make sure the temperature settings are sane on nv84+
One of my nv92 has a calibrated internal sensor but it displays 0°C
as the default values use sw calibration values to force the temperature
to 0.

Since we cannot read the temperature from the adt7473 present on this board,
let's re-enable the internal reading!

Signed-off-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:02 +10:00
Martin Peres
3ca6cd435e drm/nouveau/subdev: add a pfuse subdev v2
We will use this subdev to disable temperature reading on cards that did not
get a sensor calibration in the factory.

v2:
- rename "nouveau_fuse_rd32" to "gxXXX_fuse_rd32" as adviced by Christian Costa
- fold the code a little as adviced by Emil Velikov

Signed-off-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:01 +10:00
Roy Spliet
3d40a7176d drm/nva3/clk: Set intermediate core clock on reclocking
Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:01 +10:00
Roy Spliet
a749a1fb55 drm/nva3/clk: For PLL clocks always make sure the PLL is not in use
Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:01 +10:00
Roy Spliet
275dd6f48f drm/nva3/clk: Abort when PLL doesn't lock
Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:00 +10:00
Roy Spliet
70c7995d12 drm/nva3/clk: HOST clock
Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:00 +10:00
Roy Spliet
6a4a47cfd1 drm/nva3/clk: Set PLL refclk
Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:24:59 +10:00
Roy Spliet
3d896d349e drm/nva3/clk: Parse clock control registers more accurately
Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:24:59 +10:00
Pierre Moreau
17eac85a8c drm/nouveau: Fix duplicate definition of NV04_PFB_BOOT_0_*
Signed-off-by: Pierre Moreau <pierre.morrow@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:24:58 +10:00
Ben Skeggs
a2410f5a0f drm/nouveau/pwr: wait for scrubbers to finish before uploading new ucode
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:24:58 +10:00
Martin Peres
4417be553c drm/nouveau/pwr/fuc: make $r1-$r10 registers callee-saved in kernel.fuc
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:24:57 +10:00
Martin Peres
b9fcf971bf drm/nouveau/pwr/fuc: add ld/st macros
Signed-off-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:24:57 +10:00
Martin Peres
d5837df18c drm/nouveau/pwr: add helpers for delay-to-ticks and ticks-to-delay
Signed-off-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:24:56 +10:00
Martin Peres
2befd17de2 drm/nouveau/pwr: add some arith functions (mul32_32_64, subu64 and addu64)
Signed-off-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:24:56 +10:00
Martin Peres
9db66fceac drm/nouveau/pwr: fix the timers implementation with concurent processes
The problem with the current implementation is that adding a timer improperly
checked which process would time up first by not taking into account how much
time elapsed since their timer got scheduled. Rework the re-scheduling
decision t fix this.

The catch with this fix is that we are limited to scheduling timers of up to
2^31 ticks to avoid any potential overflow. Since we are unlikely to need to
wait for more than a second, this won't be a problem :)

Another possible fix would be to decrement the timeouts of all processes but
it would duplicate a lot of code and dealing with edge cases wasn't pretty
last time I checked.

Signed-off-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:24:56 +10:00
Martin Peres
2a5e5fa734 drm/nouveau/ppwr: enable ppwr on gm107
For some reason, it is now required to wait a 20 µs after the 0x200 reset of
the engine.

Signed-off-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:24:55 +10:00
Martin Peres
808a188a33 drm/gm107/therm: add PWM fan support v2
v2: change the copyright ownership from "Nouveau Community" to myself, as per
Illia's recommendation.

Signed-off-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:24:50 +10:00
Martin Peres
90a2c1aaa2 drm/nouveau/therm/fan: do not use the pwm mode when the vbios tells us to use toggle
Signed-off-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:22:14 +10:00
Martin Peres
288c17bd9e drm/nouveau/bios/fan: add support for maxwell's fan management table v2
Re-use the therm-exported fan structure with only two minor modifications:
- pwm_freq: u16 -> u32;
- add fan_type (toggle or PWM)

v2:
- Do not memset the table to 0 as it erases the pre-set default values

Signed-off-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:22:13 +10:00
Ben Skeggs
e0ae679823 drm/nouveau/ltc: allocate tagram from memory that spans all partitions
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:22:13 +10:00
Ben Skeggs
65270a6569 drm/nouveau/core/mm: allow allocation to be confined to a specific slice of heap
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:22:13 +10:00
Ben Skeggs
13dfe1286d drm/nouveau/core/mm: fill in holes with "allocated" nodes
The allocation algorithm doesn't expect there to be holes in the mm, which
causes its alignment/cutoff calculations to choke (and go negative) when
encountering the last chunk of a block before a hole.

The least expensive solution is to simply fill in any holes with nodes
that are pre-marked as being allocated.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:22:13 +10:00
Ben Skeggs
d7bda18c91 drm/nouveau/core/mm: dump mm when trying to tear one down that still has allocations
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:22:13 +10:00
Ben Skeggs
d979ab975e drm/nouveau/core/mm: modify test for if building a mm with holes in it
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:22:13 +10:00
Ben Skeggs
79456e1a10 drm/nouveau/core/mm: make it clearer what (type == 0) means
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:22:13 +10:00
Ben Skeggs
a1fc50b4a5 drm/gf100/ltc: translate interrupt status into more meaningful names
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:22:12 +10:00
Ben Skeggs
9ea97ff827 drm/nouveau/ltc: drop workaround for an interrupt storm that no longer happens
This is really the wrong thing to do, but at the time it was our only
option to prevent worse issues.

We no longer cause quite so much anger from LTC, so it's not needed.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:22:12 +10:00
Ben Skeggs
b38a2322df drm/nv50-/disp: add support for completion events
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:22:12 +10:00
Ben Skeggs
996f5a0823 drm/nouveau/core: pass related object into notify constructor
The event source types/index might need to be derived from it.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:22:12 +10:00
Ben Skeggs
e94654e21d drm/nouveau/bar: ioremap only the areas that we're actually using
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:22:12 +10:00
Alexandre Courbot
5d6d94f761 drm/nouveau/gk20a: add LTC device
LTC device is now required for PGRAPH to work, add it.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-08-15 07:58:39 +10:00
Ben Skeggs
da7c74ea2b drm/gf100-/gr: fix -ENOSPC detection when allocating zbc table entries
Spotted by Coverity.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-08-15 07:58:39 +10:00
Ben Skeggs
147ed897e8 drm/nouveau/ltc: fix tag base address getting truncated if above 4GiB
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-08-15 07:58:39 +10:00
Ben Skeggs
3d9e3921f4 drm/nvc0-/fb/ram: fix use of non-existant ram if partitions aren't uniform
Likely a large part of the GK106 woes..

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-08-15 07:58:38 +10:00
Ben Skeggs
e7d96929a7 drm/nouveau/bar: behave better if ioremap failed
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-08-15 07:58:38 +10:00
Ben Skeggs
7caa63c040 drm/nouveau/nvif: fix a number of notify thinkos
Note to self: more sleep

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-08-15 07:58:38 +10:00
Ben Skeggs
c354080dc8 drm/nv50/disp: shhh compiler
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-08-10 05:28:17 +10:00
Ben Skeggs
d6bd380373 drm/gf100-/gr: implement the proper SetShaderExceptions method
We have another version of it implemented in SW, however, that version
isn't serialised with normal PGRAPH operation and can possibly clobber
the enables for another context.

This is the same method that's implemented by the NVIDIA binary driver.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-08-10 05:28:17 +10:00
Ben Skeggs
e887377338 drm/gf100-/gr: remove some broken ltc bashing, for now
... and hope that the defaults are good enough.  This was always
supposed to be a read/modify/write thing anyway, so we're writing
very wrong stuff for some boards already.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-08-10 05:28:16 +10:00
Ben Skeggs
67cfbfdfec drm/gf100-/gr: unhardcode attribute cb config
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-08-10 05:28:16 +10:00
Ben Skeggs
b81146b03b drm/gf100-/gr: fetch tpcs-per-ppc info on startup
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-08-10 05:28:15 +10:00
Ben Skeggs
f331a15f84 drm/gf100-/gr: unhardcode pagepool config
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-08-10 05:28:15 +10:00
Ben Skeggs
aa2d58c33a drm/gf100-/gr: unhardcode bundle cb config
Should be the same values as before, except:

GF117 has smaller buffer allocated, as per register setup.
GK20A now uses values from Tegra driver, not GK104's.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-08-10 05:28:14 +10:00
Ben Skeggs
694c6caf92 drm/gf100-/gr: improve initial context patch list helpers
Removes need for fixed buffer indices, and allows the functions
utilising them to also be run outside of context generation.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-08-10 05:28:14 +10:00