The ADI TWI peripheral is not binding to the Blackfin processor only.
The bits macros and structs should be put in the generic include header.
And update head file path in drivers accordingly.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Passing a non-simple expression in as the addr arg could incorrectly
apply the pointer cast resulting in misbehavior. Add proper paren.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The documentation for the IMDMA channels appears to be incorrect.
These DMA blocks don't actually have PERIPHERAL_MAP MMRs for us
to access. Attempts to do so lead to system mmr hardware errors.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The documentation is a little iffy as to whether these are actual MMRs,
but reading them on the hardware works, and the previous version of this
logic (the SDH) had PID[4567]. So add it for RSI too.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This code was mostly developed against a BF54x, so some BF537-specific
issues were missed.
The PPI block starts at PPI_CONTROL, not PPI_STATUS (which is the reverse
of the EPPI block).
The MDMA block starts at MDMA_NEXT_DESC_PTR, not MDMA_CONFIG. Seems the
sim does not catch misreads here so that'll need to get fixed.
The gptimer block is mostly 32bit regs, not 16bit. Use the gptimer struct
to figure that out rather than hardcoding it locally.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
