updates the bindings documents and dtsi file according to the review
comments[https://lkml.org/lkml/2015/9/21/670] from Rob Herring <robh@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: yankejian <yankejian@huawei.com>
Signed-off-by: huangdaode <huangdaode@hisilicon.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Subsystem specific bindings for the Arizona devices are being factored
out of the MFD binding document into separate documents for each
subsystem. This patch adds a binding document that covers the existing
regulator specific bindings.
Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This is a major overhaul of the clk-qoriq driver, which I'm merging
via PPC with Stephen Boyd's ack in order to apply subsequent PPC patches
that depend on it.
The SMP release mechanism for FSL book3e is different from when booting
with normal hardware. In theory we could simulate the normal spin
table mechanism, but not at the addresses U-Boot put in the device tree
-- so there'd need to be even more communication between the kernel and
kexec to set that up. Instead, kexec-tools will set a boolean property
linux,booted-from-kexec in the /chosen node.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Cc: devicetree@vger.kernel.org
HW and driver support the GPIO as interrupt-controller.
Document that in the DT binding.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add device tree binding documentation for the watchdog hardware block
on bcm7038 and newer SoCs.
Signed-off-by: Justin Chen <justinpopo6@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
This new compatible string, "brcm,iproc-gpio", should be used for
all new iproc-based future SoCs.
Signed-off-by: Pramod Kumar <pramodku@broadcom.com>
Reviewed-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
If GPIO controller's pins are muxed, pin-controller subsystem
need to be intimated by defining mapping between gpio and
pinmux controller. This patch adds required properties to
define this mapping via DT.
Signed-off-by: Pramod Kumar <pramodku@broadcom.com>
Reviewed-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Sometime only need set MMC_CAP_HW_RESET for one of MMC hosts,
So set it in device tree is better.
Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This patch updates document devicetree bindings
to support multiple devices.
Signed-off-by: Leilk Liu <leilk.liu@mediatek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Align NFC bindgins to use marvell instead of mrvl.
Signed-off-by: Vincent Cuissard <cuissard@marvell.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
This driver adds the support of SPI-based Marvell NFC controller.
Signed-off-by: Vincent Cuissard <cuissard@marvell.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
This driver adds the support of I2C-based Marvell NFC controller.
Signed-off-by: Vincent Cuissard <cuissard@marvell.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
In order to align with st21nfca, dts configuration properties
ese_present and uicc_present are made available in st-nci driver.
So far, in early development firmware, because
nci_nfcee_mode_set(DISABLE) was not supported we had to try to
enable it during the secure element discovery phase.
After several trials on commercial and qualified firmware it appears
that nci_nfcee_mode_set(ENABLE) and nci_nfcee_mode_set(DISABLE) are
properly supported.
Such feature also help us to eventually save some time (~5ms) when
only one secure element is connected.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
With the old binding and driver architecture we had many issues:
No way to assign eDMA channels to event queues, thus not able to tune the
system by moving specific DMA channels to low/high priority servicing. We
moved the cyclic channels to high priority within the code, but that was
just a workaround to this issue.
Memcopy was fundamentally broken: even if the driver scanned the DT/devices
in the booted system for direct DMA users (which is not effective when the
events are going through a crossbar) and created a map of 'used' channels,
this information was not really usable. Since via dmaengien API the eDMA
driver will be called with _some_ channel number, we would try to request
this channel when any channel is requested for memcpy. By luck we got
channel which is not used by any device most of the time so things worked,
but if a device would have been using the given channel, but not requested
it, the memcpy channel would have been waiting for HW event.
The old code had the am33xx/am43xx DMA event router handling embedded. This
should have been done in a separate driver since it is not part of the
actual eDMA IP.
There were no way to 'lock' PaRAM slots to be used by the DSP for example
when booting with DT.
In DT boot the edma node used more than one hwmod which is not a good
practice and the kernel prints warning because of this.
With the new bindings and the changes in the driver we can:
- No regression with Legacy binding and non DT boot
- DMA channels can be assigned to any TC (to set priority)
- PaRAM slots can be reserved for other cores to use
- Dynamic power management for CC and TCs, if only TC0 is used all other TC
can be powered down for example
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
The DMA event crossbar on AM33xx/AM43xx is different from the one found in
DRA7x family.
Instead of a single event crossbar it has 64 identical mux attached to each
eDMA event line. When the 0 event mux is selected, the default mapped event
is going to be routed to the corresponding eDMA event line. If different
mux is selected, then the selected event is going to be routed to the given
eDMA event.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
This commit adds support for UniPhier outer cache controller.
All the UniPhier SoCs are equipped with the L2 cache, while the L3
cache is currently only integrated on PH1-Pro5 SoC.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
* 'for-upstream/juno-pcie' of git://linux-arm.org/linux-ld:
arm64: defconfig: Enable PCI generic host bridge by default
arm64: Juno: Add support for the PCIe host bridge on Juno R1
Documentation: of: Document the bindings used by Juno R1 PCIe host bridge
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch adds support for 4-bit ECC BCH4 for the SPEAr600 SoC. This can
be used by boards equipped with a NAND chip that requires 4-bit ECC
strength. The SPEAr600 HW ECC only supports 1-bit ECC strength.
To enable SW BCH4, you need to specify this in your nand controller
DT node:
nand-ecc-mode = "soft_bch";
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
Tested on a custom SPEAr600 board.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
[Brian: tweaked the comments a bit]
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
synopsys-dw-mshc supports three types of transfer mode. We add
bindings and description for how to use them at runtime.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Renesas R8A7794 SoC also has the MMCIF controller.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
The "compatible" property text contradicts even the example given in the MMCIF
binding document itself; moreover, the Renesas MMCIF driver only matches on
the generic "compatible" string and doesn't look for the SoC specific strings
at all. Thus describe "renesas,sh-mmcif" as a fallback value.
Fixes: b4c27763d7 ("mmc: sh_mmcif: Document DT bindings")
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Add ciu_drive, ciu_sample clocks and default-sample-phase. This will later
be used by tuning code.
We do not touch ciu_drive (and by extension define default-drive-phase).
Drive phase is mostly used to define minimum hold times, while one could
write some code to determine what phase meets the minimum hold time
(ex 10 degrees) this will not work with the current clock phase framework
(which floors angles, so we'll get 0 deg, and there's no way to know what
resolution the floors happen at). We assume that the default drive angles
set by the hardware are good enough.
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
ARM's Juno R1 board used PLDA XpressRICH3-AXI IP to implement a PCIe host
bridge. Introduce "plda" as vendor prefix for PLDA and document the DT
bindings for PLDA XpressRICH3-AXI IP as well as ARM's Juno R1.
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
This pull request contains the DT changes for BCM2835 in 4.4. It
pulls in clk/clk-bcm2835 (which Stephen Boyd has said would be stable)
because the DT changes to enable the clock driver need the driver
itself to be present. These changes include the following:
- Eric Anholt, moves the bcm2835 clock driver under bcm/ where it belongs with
other Broadcom clock providers drivers, defines the binding for new clock
driver, adds support for programming the BCM2835 audio domain, adds the DDC I2C
controller to Device Tree, and finally migrates the Device Tree to use the new
clock driver binding
- Lubomir Rintel adds support for the Raspberry Pi Model A+ and B revision 2, and
remove the I2S controller which is non-existent on Raspberry Pi Model B
- Stefan Wahren adds an uart0 label for referencing the UART adapter
* tag 'arm/soc/for-4.4/rpi-dt-v2' of https://github.com/Broadcom/stblinux:
ARM: bcm2835: Add the DDC I2C controller to the device tree.
ARM: bcm2835: Switch to using the new clock driver support.
ARM: bcm2835: dt: Add Raspberry Pi Model A+
ARM: bcm2835: dt: Add Raspberry Pi Model B rev2
ARM: bcm2835: dt: Raspberry Pi Model B had no I2S
ARM: bcm2835: add label for uart0
clk: bcm2835: Add support for programming the audio domain clocks
clk: bcm2835: Add binding docs for the new platform clock driver.
clk: bcm2835: Move under bcm/ with other Broadcom SoC clk drivers.
Signed-off-by: Olof Johansson <olof@lixom.net>
A first batch of updates targetted at v4.4. There are no substantial
core fixes here, the biggest block of changes is updates to the rcar
drivers and the addition of a CODEC driver for the AK4613.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJWBF7yAAoJECTWi3JdVIfQ1MEH/jnzSyEVIuG+l8UkMaz6gf4w
zGsM1KCn//mfPl7yAoOdsnElOLR+Fmf+0jx4pCPQKrjvBGwjwH/IwBR1rwuEeUPY
7d66efpWOKlTf3qpsF1S7ZIlAZOs0NFvo0jwA1ZY/pc3YEBekyWxbABk/uWAVrM5
HJJKafI7WeiYrF0l0z2sG7BpsFtr8JKqrOVM+SGaPTNn2k+/lQ1bwTk1liOEUbsv
oq8NFNrUWPBCwbUNJQxBOvmoXC6Oa6+JBVO3+SsoS0q2FweNpqtZopjmoqHM8CiN
SkBeFT+wYlSGSnnFgAXXA2+kq74TeP2CvToo6tw+gf4LZXydKIaAdeuT6M9weZA=
=8h3u
-----END PGP SIGNATURE-----
Merge tag 'asoc-v4.3-rc2' into asoc-next
ASoC: Updates for v4.4
A first batch of updates targetted at v4.4. There are no substantial
core fixes here, the biggest block of changes is updates to the rcar
drivers and the addition of a CODEC driver for the AK4613.
# gpg: Signature made Fri 25 Sep 2015 05:37:06 KST using RSA key ID 5D5487D0
# gpg: key CD7BEEBC: no public key for trusted key - skipped
# gpg: key CD7BEEBC marked as ultimately trusted
# gpg: key AF88CD16: no public key for trusted key - skipped
# gpg: key AF88CD16 marked as ultimately trusted
# gpg: key 16005C11: no public key for trusted key - skipped
# gpg: key 16005C11 marked as ultimately trusted
# gpg: key 5621E907: no public key for trusted key - skipped
# gpg: key 5621E907 marked as ultimately trusted
# gpg: key 5C6153AD: no public key for trusted key - skipped
# gpg: key 5C6153AD marked as ultimately trusted
# gpg: Good signature from "Mark Brown <broonie@sirena.org.uk>"
# gpg: aka "Mark Brown <broonie@debian.org>"
# gpg: aka "Mark Brown <broonie@kernel.org>"
# gpg: aka "Mark Brown <broonie@tardis.ed.ac.uk>"
# gpg: aka "Mark Brown <broonie@linaro.org>"
# gpg: aka "Mark Brown <Mark.Brown@linaro.org>"
- use exynos5420-dw-mshc instead of exynos5250 for exynos3250
- add DISP1 clocks and the DISP1 power domain of two closk
on exynos5250 (clock commit got Stephen's ack)
- add vbus regulators on exynos3250, exynos4210 and exynos4412 boards
- fix typo in regulator enable GPIO property on s5pv20-aquila and goni
- document: correct the example of exynos power domain clocks
- document: consolidate exynos SoC dt-bindings and non-Samsung
boards related compatibles (FriendlyARM, Google, Hardkernel
and Insignal)
- update MAINTAINER entries accordingly (documentation)
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJWKp8kAAoJEA0Cl+kVi2xq5fUP/Rf+zO2xnnM+nW31k/6GCQQu
4BgjBfiK6/coAfQ+mq1PNs3aOFDUmO1g3vwoly64vJbhylCd6jFEzPlbgb109ZnI
A7JrqoiZ0LE+i/RXjfgxJm/0v1gn7TOOBKkwWlIEJpgV7i8wWjdCnMxlNw+amSGF
H0pJ14TCN7OfsPZtX1S7dgz/dLSeQzCzMn8cJk4ccPcsN+1LqI4whFQ31ykOYCaT
5b3/EvORjqkn0gdEiQ/i2WtaM1yKgfNUYXaJP69j605ipzKaUCMt9WnBY9EB6RaJ
im36eKNQXW73dYGEuuf1I5L58Hb+poAmlz4TtI4re/ykQ1mrvOj1xYwgfD9Sjw+z
ZS4Io5WMZgdJrmMXFPxnd7BQHu4IbnEfU+408cgOVP/fPrAHxYtO8tVr7/n2lgJ3
3Hio2MBzAWAXMz45IfhCz2n/ITKBCkfjHFOkno7Rmmm/83cORM6ZleldMqtrj5sQ
oqGDcBwI0ijKptZIfaLFQfndMmzUd4t5i+UQTjyIDE1nBmvPyqHgPyetHQttQQM+
bWTCJU+SlKze7CIwogmrrFEfw2RhNU+FS/T9D7t5JCWLb4B5CgLnHt7NWth2cQUQ
NuiTIgoU+znke+t2A1PxE85CmBr5yuezqxq8bJv8qnGHrF/ougPaNCOdXPef0ci4
bfK3nV/axFga/7ag900e
=UPmG
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt
Samsung 2nd DT updates for v4.4
- use exynos5420-dw-mshc instead of exynos5250 for exynos3250
- add DISP1 clocks and the DISP1 power domain of two closk
on exynos5250 (clock commit got Stephen's ack)
- add vbus regulators on exynos3250, exynos4210 and exynos4412 boards
- fix typo in regulator enable GPIO property on s5pv20-aquila and goni
- document: correct the example of exynos power domain clocks
- document: consolidate exynos SoC dt-bindings and non-Samsung
boards related compatibles (FriendlyARM, Google, Hardkernel
and Insignal)
- update MAINTAINER entries accordingly (documentation)
* tag 'samsung-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
MAINTAINERS: Add documentation and dt-bindings for exynos stuff
dt-bindings: EXYNOS: Document compatibles from other vendors
dt-bindings: Consolidate Exynos SoC bindings
ARM: dts: Add clocks to DISP1 domain in exynos5250
dt-bindings: Correct the example for Exynos power domain clocks
ARM: dts: Fix typo in regulator enable GPIO property in s5pv210-goni
ARM: dts: Fix typo in regulator enable GPIO property in s5pv210-aquila
ARM: dts: Add vbus regulator to USB2 phy nodes on exynos3250, exynos4210 and exynos4412 boards
clk: samsung: exynos5250: Add DISP1 clocks
ARM: dts: use exynos5420-dw-mshc compatible for exynos3250
Signed-off-by: Olof Johansson <olof@lixom.net>
Reduced Serial Bus is a proprietary 2-line push-pull serial bus supporting
multiple slave devices. It was developed by Allwinner, Inc. and used by
Allwinner and X-Powers, Inc. for their line of PMICs and other peripheral
ICs.
Recent Allwinner SoCs, starting with the A23, have an RSB controller. This
is used to talk to the PMIC, and later with the A80 and A83 platform, the
audio codec IC.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
- Use mac_pton() helper in the oropn5x board instead of duplicating it
- Add the broken-idle option allowing to boot boards with a mistake in
the hardware design
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iEYEABECAAYFAlYqU/AACgkQCwYYjhRyO9VP1gCfcJsUQ9UlgCypLYuK7FqQShf6
vnEAn3QT7pXLmwYNlRFI6EF8y6l5bgH9
=HKUh
-----END PGP SIGNATURE-----
Merge tag 'mvebu-soc-4.4-2' of git://git.infradead.org/linux-mvebu into next/soc
mvebu soc for 4.4 (part 2)
- Use mac_pton() helper in the oropn5x board instead of duplicating it
- Add the broken-idle option allowing to boot boards with a mistake in
the hardware design
* tag 'mvebu-soc-4.4-2' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: add broken-idle option
ARM: orion5x: use mac_pton() helper
Signed-off-by: Olof Johansson <olof@lixom.net>
Conflicts:
net/ipv6/xfrm6_output.c
net/openvswitch/flow_netlink.c
net/openvswitch/vport-gre.c
net/openvswitch/vport-vxlan.c
net/openvswitch/vport.c
net/openvswitch/vport.h
The openvswitch conflicts were overlapping changes. One was
the egress tunnel info fix in 'net' and the other was the
vport ->send() op simplification in 'net-next'.
The xfrm6_output.c conflicts was also a simplification
overlapping a bug fix.
Signed-off-by: David S. Miller <davem@davemloft.net>
Since the Synopsys DWC3 controller driver inherits the generic bindings
defined in 'usb/generic.txt', this patch tries to capture the same in
the DWC3 binging documentation to avoid any confusion in usage of properties
like 'dr_mode' for certain SoCs like FSL LS2080A.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Update the FSL, GPIO binding documentation to add support
for GPIO controller found on Freescale's LS2080A platform.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Since the same board components can be used across ARM and PPC board families,
this patch moves the FSL board-specific bindings out of bindings/powerpci.
While at it, this patch also adds the bindings for QIXIS FPGA controller
found on FSL LS2080A boards. These boards have an on-board FPGA/CPLD
connected to the IFC controller.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: Jaiprakash Singh <b44839@freescale.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Freescale is renaming the LS2085A SoC to LS2080A. This patch
addresses the same.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Freescale will be a spinning-out a set of ARMv8 based SoCs which
will be based on a similar overall SoC architecture. So, this patch
converts the existing infrastructure in the arm64/dts, arm64/Kconfig
and arm64/configs to use the generic convention ARCH_LAYERSCAPE
in place of the more specific FSL_LS2085A, to save code duplication
later-on.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Document compatibles used on other Exynos-based boards (non-Samsung):
FriendlyARM, Google, Hardkernel and Insignal.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Cc: Hakjoo Kim <ruppi.kim@hardkernel.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
Exynos SoC Device Tree bindings are spread over arm/exynos/ and
arm/samsung/ directories. There is no need for that separation and it
actually confuses. Put power domain bindings under power/ and
remaining samsung-boards.txt under arm/samsung/.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
Implement bus recovery methods for i2c-imx so we can recover from
situations where SCL/SDA are stuck low.
Once i2c bus SCL/SDA are stuck low during transfer, config the i2c
pinctrl to gpio mode by calling pinctrl sleep set function, and then
use GPIO to emulate the i2c protocol to send nine dummy clock to recover
i2c device. After recovery, set i2c pinctrl to default group setting.
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Gao Pan <b54642@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Add support for on-chip I2C controller used on newer UniPhier SoCs
such as PH1-Pro4, PH1-Pro5, etc. This adapter is equipped with
8-depth TX/RX FIFOs.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Add support for on-chip I2C controller used on old UniPhier SoCs
such as PH1-LD4, PH1-sLD8, etc. This adapter is so simple that
it has no FIFO in it.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Since commit 29e5eea06b ("ARM: EXYNOS: Get current parent clock for
power domain on/off") the "pclkN" names of "clock-names" property is not
parsed any more. The bindings and driver were updated but the example
was not. Fix the example now.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
Add the Altera PCIe host controller driver.
[bhelgaas: whitespace, fold in DT and maintainer updates, OF_PCI
dependency from Arnd]
Signed-off-by: Ley Foon Tan <lftan@altera.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Rob Herring <robh@kernel.org> (DT binding)
- Add IOMUXC LPSR (Low Power State Retention) device for i.MX7D.
- Add a few low power mode related devices and touch controller for
i.MX6UL.
- Add a number of devices for i.MX7D SDB board support, USB, Dual FEC,
and eMMC5.0.
- i.MX6 Boundary Devices updates: relicense under GPLv2/X11, add Okaya
LCD, touch and wifi support, add new boards Nitrogen6_Lite and
Nitrogen6_Max.
- Enable touch screen and NAND Flash controller for a few Vybrid
devices.
- Some random and small updates on LS1021A and MXS support.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJWJQUPAAoJEFBXWFqHsHzOo+cH/irx+abVdFV97q6M0VwFsQ3/
Tf4/CsdiTjM5ZDrKZEtXzP8BZl+ZO4tQXLspP+wVceQ+PVUiVvdAHu0l68iuJRrA
+Bj9VrLIzMDf7FVpzbZHZD3kd1NALGh/5i0TerkuZMNl1KH57HyGjLnjKH43n7uz
mFPeZFAQMwSjEnRJj/6217Itqi+LurARJsnXQs6uhQ7feSsA88HU3EQ8QsiZqiAu
MULAJBYaE09shlokuXIKx67t8outdb8C0Uue64nt42y8NR0m5eVVG7NJoF+23T6C
CRX5zveYa7D2QXTkihvjdRpazhLiPnwV3RCVejLOZMk0G14hD9U39jkTp+9ws1w=
=kPBq
-----END PGP SIGNATURE-----
Merge tag 'imx-dt-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
The i.MX device tree changes for 4.4:
- Add IOMUXC LPSR (Low Power State Retention) device for i.MX7D.
- Add a few low power mode related devices and touch controller for
i.MX6UL.
- Add a number of devices for i.MX7D SDB board support, USB, Dual FEC,
and eMMC5.0.
- i.MX6 Boundary Devices updates: relicense under GPLv2/X11, add Okaya
LCD, touch and wifi support, add new boards Nitrogen6_Lite and
Nitrogen6_Max.
- Enable touch screen and NAND Flash controller for a few Vybrid
devices.
- Some random and small updates on LS1021A and MXS support.
* tag 'imx-dt-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (53 commits)
ARM: dts: ls1021a: Add quirk for Erratum A009116
ARM: imx6sx-sdb: Fix typo in regulator enable GPIO property
ARM: dts: imx6: phyFLEX: fix typo in "pinctrl-names"
ARM: dts: imx6: change the core clock of spdif
ARM: dts: vf-colibri: enable NAND flash controller
ARM: dts: vf610twr: add NAND flash controller peripherial
ARM: dts: imx: add Boundary Devices Nitrogen6_Lite board
ARM: dts: imx: add Boundary Devices Nitrogen6_Max board
ARM: dts: imx6dl-nitrogen6x: change manufacturer to Boundary Devices
ARM: dts: imx6q-nitrogen6x: change manufacturer to Boundary Devices
of: Add Boundary Devices Inc. vendor prefix
ARM: dts: imx6qdl-sabrelite: relicense under GPLv2/X11
ARM: dts: imx6qdl-nitrogen6x: relicense under GPLv2/X11
ARM: dts: imx6qdl-nitrogen6x: add wifi wl1271 support
ARM: dts: imx6dql-nitrogen6x: add touchscreen support
ARM: dts: imx6qdl-sabrelite: add Okaya LCD panel
ARM: dts: imx6qdl-nitrogen6x: add Okaya LCD panel
ARM: dts: vf500-colibri: Add device tree node for touchscreen support
ARM: dts: i.MX35: fix cpu compatible value
ARM: dts: i.MX31: fix cpu compatible value
...
Signed-off-by: Olof Johansson <olof@lixom.net>
The regualtor-compatible binding is deprecated, instead the node name
is used.
Mediatek timer driver supports as well mt8127, mt8135 and mt8173. Add
these SOCs to the bindings list.
Power domains venc and venc_lt need clocks two extra clocks to access
their registers. We update the bindings documentation about this.
Update SMP bindings documentation by adding support for mt6589 and mt81xx SOCs.
Update mt8127.dtsi and mt8135.dtsi to enable SMP support.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWI4nIAAoJELQ5Ylss8dNDznQQAK9O/IgeKz069P+UT/HxnflC
K21RbkMX5KKej8QS23yqYxZVz+c2HyZLpYF5sAl/k9p5oMsm1EvfNVfDC7acWmfM
CY65ZgNOPixi9Yrd29qgN0IMtTzsQtMnS7dhiKloyZr9sszuRw0SHeAQOOjGFv2H
rZ+N7fbH3RH6vDeWIurVY8bNppu3FJNeIFm6xbotiXcQvsXX8hJjoN6E8BI7Rzg+
i/p80IEmGRFvxHebZjrRCgVFIdqIfo0M02kxNVc4erH+Z7mLOmHZuYXIg7S3825M
E5W+mJd6fqNh62qbPZUi2/0Y9TAsOPiIpxU+QDp2cBO37nse2/MeWPhJyg6DfCO/
RuC0Y+tJx1fxF+5+/7lkXeWqsvzo5twJTGcLu+D0pPSTVb5Gy0P9671QMJPBknf+
6zy4qqjSYNpsIz+OqbwlZHeQJEuDjt/DEVWqFmvW3DoUr5O8hRjHpFa4lJ6F084u
tvSkSOuiJKtO1htAZLeVmMQOYylAPxpxKTc1AqIcLIiBkgkNKhz7v43vtdwETNIv
8qkJVNKGF8WNDdskM2/GamlC2hTabw8kMoPxeYtqzZz5BYBALeOND0TvclEMecnh
nDzdTwlhJDdHOlT5hQ7ur9UecakFQSMzQnoJ35LbjU+lVKXOyFIphXuBAmlX7Fvi
hgbvHY7WClquwgKJ+PUF
=Lj7i
-----END PGP SIGNATURE-----
Merge tag 'v4.3-next-dts' of https://github.com/mbgg/linux-mediatek into next/dt
Delete regulator-compatible usage in mt8135-evbp1.dts.
The regualtor-compatible binding is deprecated, instead the node name
is used.
Mediatek timer driver supports as well mt8127, mt8135 and mt8173. Add
these SOCs to the bindings list.
Power domains venc and venc_lt need clocks two extra clocks to access
their registers. We update the bindings documentation about this.
Update SMP bindings documentation by adding support for mt6589 and mt81xx SOCs.
Update mt8127.dtsi and mt8135.dtsi to enable SMP support.
* tag 'v4.3-next-dts' of https://github.com/mbgg/linux-mediatek:
ARM: dts: mt8127: enable basic SMP bringup for mt8127
ARM: dts: mt8135: enable basic SMP bringup for mt8135
devicetree: bindings: add new SMP enable method Mediatek SoC
dt-bindings: soc: Add clocks for Mediatek SCPSYS unit
dt-bindings: add more MediaTek SoC to mtk-timer binding
ARM: dts: mt8135-evbp1: remove regulator-compatible usage
Signed-off-by: Olof Johansson <olof@lixom.net>
Add support for the Allwinner R8 SoC used in the CHIP.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWInwoAAoJEBx+YmzsjxAgrsAQAIS7IN6NqaQRMv/H8pOGMqWH
tn2jCqQBavzIRJ8WK/ny+umkM1t7WC9kNVvU/hMO3LoFhjXRXDWZSBaIQv4dnGFM
o7Iw09A9pci4VDvUqnyUiLcYq2azhdKbjMSwVsWx92zWx3j2L+iG6d3FJrDDyNBT
eXDjsvuhQVxE653a9hon1aFFH28wbJhPvpzf31m0J96o4fmizvmyZvIB2cc8BBmy
qLnbhxCkG2FxDkM8vAXfpDF7ypDEzn/rG3/mHXX+tjDY3Fk+53WzAfIqBhnSPJzN
Zrv2ffn2K/n28rjUMSfSkThKGMTWriyKgNy+OosDrEUpX/FsU55BX5oNSDlDS9N5
0cK4dmHUwf1YIes5dum5XoeJd9Tq3vyJUsD7/+OhuMLTSyGxmjAZD6tu3ldmZ9pC
7Fwa8ZTr2YagmNwXdvxq6DbcLTEuNZH+7ztr/prhBn5DQfvPWTX+r4cKYjG9SApX
XVJ5UZb+zkTVPAUSVKJOdiiKmuiibkNAL4isMPj3KKqYIXdsMysgVmsDyr3b00B1
0K5zrDU0mjZHohfNJ3ppjilcLtq/iimH3UAgGa77vGYF3BPosf8kq96BbqL+s5Hx
CMbnA4FRpFdSvWXi1qiPwnN9BzU82OPVRti4o6OdY8BJlSg0dTp7ngnuIrz7HT5/
UWtveTP1w/ePlnlaY4NE
=o6P8
-----END PGP SIGNATURE-----
Merge tag 'sunxi-core-for-4.4' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/soc
Allwinner core changes for 4.4
Add support for the Allwinner R8 SoC used in the CHIP.
* tag 'sunxi-core-for-4.4' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
ARM: sunxi: Add R8 support
Signed-off-by: Olof Johansson <olof@lixom.net>
Rockchip Kconfig options, fixing a possible null-pointer and a
typo in the dt-bindings.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABCAAGBQJWIlknAAoJEPOmecmc0R2BrTkH/3w+1ZZuvtfQmzBkPwJGJ9vJ
zZFZLZqD0NADib8sOhFnJxTfxrhoE/Bfijqk4wPfjdKta2GABfljGbLDanQB8Yr9
Ip+fyflQ6cd925dEuPccHMbumZep+QuSIGYjOGFIuRbbjCdOY5MB+I2Yhvognwus
Xh4FtjS7CL6ruotmyOcMtnpNDCAvc8NSwO7xBqxYRPcgd+DY8+86cD/dUpvmD4Kr
pGtUXkfQpAjBhV9P6RuP63gO42JD1VMb7c6idd+B/tzbJxI08CTDolwqvyujVkHf
KeRvu7g8qKKUwL5ffOImR4tR/T2o1wDLwfxuUJXW+mIVJa72qA+h90aNOhM2iC8=
=Qk94
-----END PGP SIGNATURE-----
Merge tag 'v4.4-rockchip-drivers2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/drivers
Some fixes for the new power-domain driver, including restricting
Rockchip Kconfig options, fixing a possible null-pointer and a
typo in the dt-bindings.
* tag 'v4.4-rockchip-drivers2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
dt-bindings: Correct paths in Rockchip power domains binding document
soc: rockchip: power-domain: don't try to print the clock name in error case
soc: rockchip: Restrict to ARCH_ROCKCHIP
Signed-off-by: Olof Johansson <olof@lixom.net>
The broken-idle option can be activated from the coherency-fabric DT
node. This property allows to disable the idle capability, when the
hardware doesn't support it, like the Seagate Personal Cloud boards.
Signed-off-by: Vincent Donnefort <vdonnefort@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The mailbox framework controls the transmission queue and requires
either its controller implementations or clients to run the state
machine for the Tx queue. The OMAP mailbox controller uses a Tx-ready
interrupt as the equivalent of a Tx-done interrupt to run this Tx
queue state-machine.
The WkupM3 processor on AM33xx and AM43xx SoCs is used to offload
certain PM tasks, like doing the necessary operations for Device
PM suspend/resume or for entering lower c-states during cpuidle.
The CPUIdle on AM33xx requires the messages to be sent without
having to trigger the Tx-ready interrupts, as the interrupt
would immediately terminate the CPUIdle operation. Support for
this has been added by introducing a DT quirk, "ti,mbox-send-noirq"
and using it to modify the normal OMAP mailbox controller behavior
on the sub-mailboxes used to communicate with the WkupM3 remote
processor. This also requires the wkup_m3_ipc driver to adjust
its mailbox usage logic to run the Tx state machine.
NOTE:
- AM43xx does not communicate with WkupM3 for CPU Idle, so is
not affected by this behavior. But, it uses the same IPC driver
for PM suspend/resume functionality, so requires the quirk as
well, because of changes to the common wkup_m3_ipc driver.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
[s-anna@ti.com: revise logic and update comments/patch description]
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
- Use extcon framework for VBUS and ID detect
- Add imx6sx and imx7d support
- Other small changes
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJWKEKdAAoJEEhZKYFQ1nG7dysH/jmFSatDJvgA7woliRZ7p0H/
elNu6AOjqBnsi23Vp54IOVWYTVIDhLsXxlzEOgO6XXfsI99TqFQIIS2VYSo6xues
Eq5hIxh5n9uue3VMnw9bxYHcFkFG9LDAlyMXecEayAB74UqnQLbo2bRDfnSopaf1
dEOq9mdT8llYbtVww6bVXtL78wgwxVk1gTfISllxgt7DEuYwgT+gQJCDLrmkGPn0
XfiaZWamNmDlQd4z/qqoG65+yNmZZMZQKtugCx4MoiBbHVclRN7j2eNsCZ0y6dsZ
qxs+CazL/IeYCqxRRXl5Fopraer1uJeOPeFgA+lRV6WPhMEe7eg6ojkDp/8Y18Y=
=Dh+g
-----END PGP SIGNATURE-----
Merge tag 'usb-ci-v4.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/peter.chen/usb into usb-next
Peter writes:
USB Chipidea updates for v4.4-rc1
- Use extcon framework for VBUS and ID detect
- Add imx6sx and imx7d support
- Other small changes
This pull request is large with a total of 136 non-merge
commits. Because of its size, we will only describe the big things in
broad terms.
Many will be happy to know that dwc3 is now almost twice as fast after
some profiling and speed improvements. Also in dwc3, John Youn from
Synopsys added support for their new DWC USB3.1 IP Core and the HAPS
platform which can be used to validate it.
A series of patches from Robert Baldyga cleaned up uses of
ep->driver_data as a flag for "claimed endpoint" in favor of the new
ep->claimed flag.
Sudip Mukherjee fixed a ton of really old problems on the amd5536udc
driver. That should make a few people happy.
Heikki Krogerus worked on converting dwc3 to the unified device property
interface.
Together with these, there's a ton of non-critical fixes, typos and
stuff like that.
Signed-off-by: Felipe Balbi <balbi@ti.com>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWJoq5AAoJEIaOsuA1yqREOlkQAJTndRGxhcZR5rLzjyRDDags
pYoXJAqaneq5G8BwKY+2AQlPaUr87UEHUOo8pk4S31mdFHlp/d/6YIXLpdlYbEcW
ixGhtxZnUhyvWM0HYGgyoDGQP9YJXy5/MR2lEJhmsqcH/Q0dih5VrDGyJ3BxEboZ
2jXy7iou5fs5nHsR4fpdUH+ER//oKgHopRbbt+mmCwZbRJbuukA0KVDMHO8ix6cy
tG/8zbnv5RY3O4a0lJAST8LNmtpxfF9yUCs83b6muhLgO9GXUGYb+I8DjPJMbwag
klOy8Z1bG5e4ymh6383ZG7wDITf82N5cy5huoyunQHVjYg1L8vDHa9aF72e+yR/3
blb9OYALbKPV072HMwOfH+M9cvcCVDGytbJQIgMot9mjpP6GPhgbGtxb+RWNy2j8
Z2kEaxd3BUXvWiRbvyvn7uQuT/cAF4StrTnQrsbFSt0fKAUkQnGdK7XxYfGGql97
p3u2x2D7YSkurywMWyXjuBsm/mXsImAfTJvoWndyOIHU2PNAzIDM4k9TWaYNNAKA
ilZSuSC/JVnMPEH/J/QpytxMM5wbiGyJOyI4bc4MiAXgCkG3qm8vi0PMZM8x0rEu
q778B+50alg9U7/G75dt0WQP+kqDjn+iUB7i/YUC9sq/Dhlmpp48KvJU+zaco+7I
QsxGXmlgeA7yXX8ywy71
=jPoY
-----END PGP SIGNATURE-----
Merge tag 'usb-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next
Felipe writes:
usb: patches for v4.4 merge window
This pull request is large with a total of 136 non-merge
commits. Because of its size, we will only describe the big things in
broad terms.
Many will be happy to know that dwc3 is now almost twice as fast after
some profiling and speed improvements. Also in dwc3, John Youn from
Synopsys added support for their new DWC USB3.1 IP Core and the HAPS
platform which can be used to validate it.
A series of patches from Robert Baldyga cleaned up uses of
ep->driver_data as a flag for "claimed endpoint" in favor of the new
ep->claimed flag.
Sudip Mukherjee fixed a ton of really old problems on the amd5536udc
driver. That should make a few people happy.
Heikki Krogerus worked on converting dwc3 to the unified device property
interface.
Together with these, there's a ton of non-critical fixes, typos and
stuff like that.
Signed-off-by: Felipe Balbi <balbi@ti.com>
The HDMI controller is new in MDP5 v1.7. As of now, this change
doesn't reflect the novelty and only adds the basics so the probe
gets triggered.
Signed-off-by: Stephane Viau <sviau@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
The current behavior is to try to get optional clocks and print a
dev_err message in case of failure. This looks rather confusing
and may increase with the amount of optional clocks.
We may need a cleaner way to handle per-device clocks but in the
meantime, let's reduce the amount of dev_err messages during the
probe.
Signed-off-by: Stephane Viau <sviau@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
features for arm/arm64 platforms:
- Lorenzo Pieralisi adds support for the PSCI_FEATURES call, manages
various 1.0 specifications updates (power state id and functions return
values) and provides PSCI v1.0 DT bindings
- Sudeep Holla implements PSCI v1.0 system suspend support to enable PSCI
based suspend-to-RAM
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABCAAGBQJWEmNwAAoJEIKLOaai0TZ/unUP/1+90ySUHIChaH70WrvIqJ3Z
YfueoM63cOcRNB7EFx5SrcKWh6tFgeUsT2+4WDA8j0CIvRwO6YaESvtXRHmGfwgQ
F3NWlWnJF3xiCU0kg26YQjvNll9OgQXkwCLzbsk1cdpi8hMfVL4Du8DgjREVIDff
PZ4LiGlYSqvesp+kipXzfAHgHJENXJYISkRv2VwcewOnq28B/Iode3T6Ro8dSjeR
2C9hjZsrwtRZ2lpjU2/4nLMd+On+nA9fw7XhlH/FU8HeLcNlngeQghlA30uQsIxB
1wgBEzHohBqUSSMLPSrk1nca/JV5haSeZWGacdLQ/qLUeMV9TgAB8wAXayVXUoHN
kkSoNWf5lh8ica4BkSGEPun4GY4h3Uv0AhnwCCKiVWL1eXglVklT4QRDVlyBPdXY
nWpRN5RlQLf60Zf6vZrUoRsApy1WVFGWW+GbjBKlWWImCzEDaIJ3695C7Qmj3BJ+
4mSqKE0xkQ8M8eYpS/ilKnmlh7+xNU3za9LtebV97v31+D9TNqvdXxEh0qGuasG4
BWGPptGlxqYH3RH5PrvjFGt0EZmyJ4uD/7doYrXFrXkiv/FX1tDzTAgIWswHeeG5
c4gAw/GlGq3d+oL/aydWlWW/UQYdmfLt2U+NZ3VdkVZVuF33VprJolBC8YQuQldS
2zvgsnflfrLeFayRtDf2
=rYJ6
-----END PGP SIGNATURE-----
Merge tag 'firmware/psci-1.0' of git://git.kernel.org/pub/scm/linux/kernel/git/lpieralisi/linux into next/drivers
This pull request contains patches that enable PSCI 1.0 firmware
features for arm/arm64 platforms:
- Lorenzo Pieralisi adds support for the PSCI_FEATURES call, manages
various 1.0 specifications updates (power state id and functions return
values) and provides PSCI v1.0 DT bindings
- Sudeep Holla implements PSCI v1.0 system suspend support to enable PSCI
based suspend-to-RAM
* tag 'firmware/psci-1.0' of git://git.kernel.org/pub/scm/linux/kernel/git/lpieralisi/linux:
drivers: firmware: psci: add system suspend support
drivers: firmware: psci: define more generic PSCI_FN_NATIVE macro
drivers: firmware: psci: add PSCI v1.0 DT bindings
drivers: firmware: psci: add extended stateid power_state support
drivers: firmware: psci: add PSCI_FEATURES call
drivers: firmware: psci: move power_state handling to generic code
drivers: firmware: psci: add INVALID_ADDRESS return value
Signed-off-by: Olof Johansson <olof@lixom.net>
rockchip,capture-channels: max capture channels, 2 channels default.
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
* Remove now unused legacy pm domain code
* Add missing of_node_put to pm-rmobile
* Corresct spelling of interrupt-names in renesas-memory-controller binding
documentation
* Correct signdness of CPU id in shmobile apmu implementation
* Make some functions static as appropriate
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWHvIfAAoJENfPZGlqN0++VqsQAI+fxALXRc+tTii6UQmZJdZ4
vwHowfz2whPEbbyJfPik5yxL4/hhIaIt+xkRcheSQlF4GXrgXOKxFDio1+a0j6JA
hduM4UfAsA1FZ8ANA+9oGitqmvtz4mibNZHsQ7OyS7qas35TBJo1PfuLUoNGrewz
OqntlgY/wgw+Xrcc6YXxKx7OYTk8DEAx0ptd8szJL6/f67WWuDvf8sO7U5DwMBF1
7Ygb0dujW5e7bIIPFim4dZBwJPdhTZ8jJle0N4E/IvpGnVL+po3JaK4fD3ThcGa6
CpBrl1Uxhm4P1Zv/HNHsuwdddWRI0TzuvxC/mQz6M7ACQo6GVExoizUJVKrYGMyX
xMTK0N009dC7zWh7Ceg0jTzoXHmdb3sHfaZ5fsGnaXnB31+bCWVOeltNxUm+WxoC
1smSAWdXrc82d8CXghm4QvcVO2bGcW+t3IFTWCGt+JCQhNRbQN8XHIu5JtInBFvr
B98bDVTJBI0uZIjID8ohkMQcDUoejJNIloxUKnyn2bCeq/VNU7+WFssNbqsW6SEt
2NUdP89R4TrhWBtgbzIfphQKQ37llM/mtyIrlZz/tjuqRm6bkCFG5qTr0GqChNQL
8zo1ETyWiuE2tSm6trQPx/HgAPqsnW60gDuQUyV+QPyOJCQnuRFbglEdQ3cXu03q
wpVz9ttMdAAxIhOCWKRB
=XNZw
-----END PGP SIGNATURE-----
Merge tag 'renesas-cleanup2-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/cleanup
Second Round of Renesas ARM Based SoC Cleanup for v4.4
* Remove now unused legacy pm domain code
* Add missing of_node_put to pm-rmobile
* Corresct spelling of interrupt-names in renesas-memory-controller binding
documentation
* Correct signdness of CPU id in shmobile apmu implementation
* Make some functions static as appropriate
* tag 'renesas-cleanup2-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: R-Mobile: add missing of_node_put
ARM: shmobile: dt: Rename incorrect interrupt related binding
ARM: shmobile: apmu: correct type of CPU id
ARM: shmobile: r8a7779: Remove legacy PM Domain remainings
ARM: shmobile: r8a7778: Make r8a7778_init_irq_dt() static
ARM: shmobile: smp: Make shmobile_smp_apmu_cpu_shutdown() static
Signed-off-by: Olof Johansson <olof@lixom.net>
Add AC'97 support to fsl-asoc-card using generic
ASoC AC'97 CODEC.
The SSI controller will silently enable any TX
AC'97 slots that have their bits set in SLOTREQ
received from CODEC and then will redirect some
of playback samples there.
That's why it is important to make sure that
any of CODEC playback slots that can pull samples
are set to slots 3/4 (standard PCM playback slots).
Currently, this applies to S/PDIF slots as they
were seen to pull samples sometimes even with
S/PDIF output being disabled.
Signed-off-by: Maciej Szmigiero <mail@maciej.szmigiero.name>
Signed-off-by: Mark Brown <broonie@kernel.org>
Add CompuLab Ltd. to the list of device tree vendor prefixes.
CompuLab manufacturers ARM-based computer-on-module, system-on-module
products, and miniature fanless-PCs.
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Signed-off-by: Rob Herring <robh@kernel.org>
Update broken links to PCI bus and interrupt mapping bindings.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Move various interrupt controller bindings into the
interrupt-controller/ directory.
Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Cc: linux-mediatek@lists.infradead.org
The ina209 binding only differs from other ina2xx bindings in the
compatible string, so add it to the common binding and remove the ina209
binding file.
Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Move the Calxeda memory controller and PHY bindings to appropriate
subsystem directories.
Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Move USB PHY bindings under usb directory to phy directory which already
contains other USB PHY bindings.
The Samsung USB PHY binding is obsolete and can be removed.
Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Move various bindings in misc to appropriate subsystem directories.
Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
We have RNG bindings in hwrng/ and rng/. Consolidate them all under rng/.
Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Create a top level eeprom binding directory and move several scattered
binding files there.
Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Backlights are generally a subtype of LEDs at least from a software
point of view if not always electrically. Move the bindings from the
video directory to underneath the leds dir.
Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
This is a quite large renaming to consolidate display related bindings
into a single "display" directory from various scattered locations of
video, drm, gpu, fb, mipi, and panel. The prior location was somewhat
based on the Linux driver location, but bindings should be independent
of that.
Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Add a device tree binding for Freescale MPC512x LocalPlus Bus FIFO and
introduce the document describing that binding.
Signed-off-by: Alexander Popov <alex.popov@linux.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Each vendor may have its specific properties, they are not belonged
to common optional properties, split them from common's.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Improve the description of properties "tx-burst-size-dword"
and "rx-burst-size-dword".
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Shanw Guo <shawnguo@kernel.org>
Add an entry for the optional 'phy-clkgate-delay-us' property that is
used to describe the delay time between putting PHY into low power
mode and turning off the PHY clock.
Signed-off-by: Li Jun <jun.li@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Peter Chen <peter.chen@freescale.com>
On recent Qualcomm platforms VBUS and ID lines are not routed to
USB PHY LINK controller. Use extcon framework to receive connect
and disconnect ID and VBUS notification.
Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Signed-off-by: Peter Chen <peter.chen@freescale.com>
rcar-du support for r8a7793/4
* 'drm/next/du' of git://linuxtv.org/pinchartl/fbdev:
drm: rcar-du: Add support for the R8A7794 DU
drm: rcar-du: Add support for the R8A7793 DU
This pull request introduces the vc4 driver, for kernel modesetting on
the Raspberry Pi (bcm2835/bcm2836 architectures). It currently
supports a display plane and cursor on the HDMI output. The driver
doesn't do 3D, power management, or overlay planes yet.
[airlied: fixup the enable/disable vblank APIs]
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* tag 'drm-vc4-next-2015-10-21' of http://github.com/anholt/linux:
drm/vc4: Allow vblank to be disabled
drm/vc4: Use the fbdev_cma helpers
drm/vc4: Add KMS support for Raspberry Pi.
drm/vc4: Add devicetree bindings for VC4.
* clk-iproc:
clk: iproc: define Broadcom NS2 iProc clock binding
clk: iproc: define Broadcom NSP iProc clock binding
clk: ns2: add clock support for Broadcom Northstar 2 SoC
clk: iproc: Separate status and control variables
clk: iproc: Split off dig_filter
clk: iproc: Add PLL base write function
clk: nsp: add clock support for Broadcom Northstar Plus SoC
clk: iproc: Add PWRCTRL support
clk: cygnus: Convert all macros to all caps
ARM: cygnus: fix link failures when CONFIG_COMMON_CLK_IPROC is disabled
Document the device tree bindings for Broadcom Northstar 2 architecture
based clock controller
Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Document the device tree bindings for Broadcom Northstar Plus
architecture based clock controller
Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
The device tree should describe the chips (or chip-like subblocks) in
the system, but it generally does not describe individual registers --
it should identify, rather than describe, a programming interface.
This has not been the case with the QorIQ clockgen nodes. The
knowledge of what each bit setting of CLKCnCSR means is encoded in
three places (binding, pll node, and mux node), and the last also needs
to know which options are valid on a particular chip. All three of
these locations are considered stable ABI, making it difficult to fix
mistakes (of which I have found several), much less refactor the
abstraction to be able to address problems, limitations, or new chips.
Under the current binding, a pll clock specifier of 2 means that the
PLL is divided by 4 -- and the driver implements this, unless there
happen to be four clock-output-names rather than 3, in which case it
interprets it as PLL divided by 3. This does not appear in the binding
documentation at all. That hack is now considered stable ABI.
The current device tree nodes contain errors, such as saying that
T1040 can set a core clock to PLL/4 when only PLL and PLL/2 are options.
The current binding also ignores some restrictions on clock selection,
such as p5020's requirement that if a core uses the "wrong" PLL, that
PLL must be clocked lower than the "correct" PLL and be at most 80% of
the rated CPU frequency.
Possibly because of the lack of the ability to express such nuance in
the binding, some valid options are omitted from the device trees, such
as the ability on p4080 to run cores 0-3 from PLL3 and cores 4-7 from
PLL1 (again, only if they are at most 80% of rated CPU frequency).
This omission, combined with excessive caution in the cpufreq driver
(addressed in a subsequent patch), means that currently on a 1500 MHz
p4080 with typical PLL configuration, cpufreq can lower the frequency
to 1200 MHz on half the CPUs and do nothing on the others. With this
patchset, all CPUs can be lowered to 1200 MHz on a rev2 p4080, and on a
rev3 p4080 half can be lowered to 750 MHz and the other half to 600
MHz.
The current binding only deals with CPU clocks. To describe FMan in
the device tree, we need to describe its clock. Some chips have
additional muxes that work like the CPU muxes, but are not described in
the device tree. Others require inspecting the Reset Control Word to
determine which PLL is used. Rather than continue to extend this mess,
replace it. Have the driver bind to the chip-specific clockgen
compatible, and keep the detailed description of quirky chip variations
in the driver, where it can be easily fixed, refactored, and extended.
Older device trees will continue to work (including a workaround for
old ls1021a device trees that are missing compatible and reg in the
clockgen node, which even the old binding required). The pll/mux
details in old device trees will be ignored, but "clocks" properties
pointing at the old nodes will still work, and be directed at the
corresponding new clock.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
The R8A7794 DU has a fixed output routing configuration with one RGB
output per CRTC and thus lacks the RGB output routing register field.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
The R8A7793 DU is identical to the R8A7791 and thus only requires a new
DT compatible string.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
On some boards the energy enable detect mode leads in
trouble with some switches, so make the enabling of
this mode configurable through DT.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
add the ability to parse "phy-handle". This
is needed for phys, which have a DT node, and
need to parse DT properties.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
Neither the rockchip i2s nor the rockchip spdif binding support child
devices so #address-cells and #size-cells properties aren't required.
Remove these from the bindings.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Mark Brown <broonie@kernel.org>
VC4 is the GPU (display and 3D) subsystem present on the 2835 and some
other Broadcom SoCs.
This binding follows the model of msm, imx, sti, and others, where
there is a subsystem node for the whole GPU, with nodes for the
individual HW components within it.
v2: Extend the commit message, fix several nits from Stephen Warren.
v3: Rename the compatibility strings, clean up node names, drop the
unnecessary lists of components. Use compatibility strings for
choosing CRTC HVS channel numbers. Document the HDMI clock usage.
v4: Whitespace fix, expand acronyms, move to display/ instead of gpu/,
rename "hpd-gpio" to "hpd-gpios".
Signed-off-by: Eric Anholt <eric@anholt.net>
On Renesas ARM SoCs (SH/R-Mobile, R-Car, RZ), the CPG (Clock Pulse
Generator) and MSSR (Module Standby and Software Reset) blocks are
intimately connected, and share the same register block.
Hence it makes sense to describe these two blocks using a
single device node in DT, instead of using a hierarchical structure with
multiple nodes, using a mix of generic and SoC-specific bindings.
These new DT bindings are intended to replace the existing DT bindings
for CPG core clocks ("renesas,*-cpg-clocks", "renesas,cpg-div6-clock")
and module clocks ("renesas,*-mstp-clocks"), at least for new SoCs.
This will make it easier to add module reset support later, which is
currently not implemented, and difficult to achieve using the existing
bindings due to the intertwined register layout.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Michael Turquette <mturquette@baylibre.com>
Reviewed-by: Magnus Damm <damm+renesas@opensource.se>
Enable the I2C core for this SoC. It is compitable to Gen2 SoCs, so
reuse the settings.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Enable the I2C core for this SoC. I add a new type because this version
has new features (e.g. DMA) which will be added somewhen later.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
According to "KeyStone Architecture Inter-IC Control Bus User Guide", fixed
additive part of frequency divisors (referred as "d" in the code and datasheet)
always equals to 6, independent of module clock prescaler.
module clock frequency
master clock frequency = ----------------------
(ICCL + 6) + (ICCH + 6)
It was not the case with original Davinci IP. Introduce new compatible property
"ti,keystone-i2c", which triggers special handling in the driver.
Without this change Keystone-based systems (having 204.8MHz input clock) choose
prescaler 29 (PSC=28). Using d=5 in this case leads to bus bitrate ~353kHz
instead of requested 400kHz. After correction, assuming d=6 bus rate is ~392kHz.
This gives ~11% transfer rate increase.
Signed-off-by: Alexander Sverdlin <alexander.sverdlin@nokia.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Tested-by: Hemanth Guruva Reddy <hemanth.guruva_reddy@nokia.com>
Tested-by: Lukasz Gemborowski <lukasz.gemborowski@nokia.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Document the bindings used by exynos-rng Pseudo Random Number Generator
driver.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Conflicts:
drivers/net/usb/asix_common.c
net/ipv4/inet_connection_sock.c
net/switchdev/switchdev.c
In the inet_connection_sock.c case the request socket hashing scheme
is completely different in net-next.
The other two conflicts were overlapping changes.
Signed-off-by: David S. Miller <davem@davemloft.net>
This patch adds the vendor prefix for Boundary Devices Inc. which is a
supplier of ARM-based single board computers and System-on-Modules for
the general embedded market.
Website: http://boundarydevices.com/
Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This change adds functionality to operate on reserved SRAM partitions
described in device tree file. Two partition properties are added,
"pool" and "export", the first one allows to share a specific partition
for usage by a kernel consumer in the same manner as it is done for
the whole SRAM device, and "export" property provides access to some
SRAM area from userspace over sysfs interface. Practically it is
possible to specify both properties for an SRAM partition, however
simultaneous access from a kernel consumer and from userspace is not
serialized, but still the combination may be useful for debugging
purpose.
The change opens the following scenarios of SRAM usage:
* updates in a particular SRAM area specified by offset and size are
done by bootloader, then this information is utilized by the kernel,
* a particular SRAM area is rw accessed from userspace, the stored
data is persistent on soft reboots,
* a device driver secures SRAM area for its purposes,
* etc.
Note, strictly speaking the added optional properties describe policy
of SRAM usage, rather than hardware, but here the policy mostly
resembles flash partitions in devicetree, which is undoubtedly
a very popular option but it does not describe hardware.
Signed-off-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
The R8 is a new Allwinner SoC based on the A13. While both are very
similar, there's still a few differences. Introduce a new compatible to
deal with them.
In order to have a consistent naming, instead of mentioning the Allwinner
A series as the machine name, switch to sun4i/sun5i like what is done for
the other families.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
DS26522 is used for tdm, configured by SPI bus.
Add nodes under spi node to t104xd4rdb.dtsi.
Signed-off-by: Zhao Qiang <qiang.zhao@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
FT5506 is essentially the same as other FT5x06 devices other than
supporting 10 support points.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Some encoders have both outputs low in stable states, others also have
a stable state with both outputs high (half-period mode) and some have
a stable state in all steps (quarter-period mode). The driver used to
support the former states and with this change it can also support the
later.
This commit also deprecates the 'half-period' property and introduces
a new property 'steps-per-period'. This property specifies the
number of steps (stable states) produced by the rotary encoder
for each GPIO period.
Signed-off-by: Guido Martínez <guido@vanguardiasur.com.ar>
Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
The anatop regulators are SoC internal LDO regulators usually supplied
by an external PMIC. This patch adds support for specifying the supply
from the device tree using the vin-supply property.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
Add berlin4ct to existing berlin pinctrl device tree binding.
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Currently msi-parent is used by a few bindings to describe the
relationship between a PCI root complex and a single MSI controller, but
this property does not have a generic binding document.
Additionally, msi-parent is insufficient to describe more complex
relationships between MSI controllers and devices under a root complex,
where devices may be able to target multiple MSI controllers, or where
MSI controllers use (non-probeable) sideband information to distinguish
devices.
This patch adds a generic binding for mapping PCI devices to MSI
controllers. This document covers msi-parent, and a new msi-map property
(specific to PCI*) which may be used to map devices (identified by their
Requester ID) to sideband data for each MSI controller that they may
target.
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: David Daney <david.daney@cavium.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
the bindings documentation to reflect this from Vladimir Zapolskiy.
"The change adds support of ARM PrimeCell PL175 MPMC and PL176 MPMC,
the static memory controllers on devices are similar to one found on
ARM PrimeCell PL172, add support to the existing driver."
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQEcBAABCAAGBQJWFtaVAAoJEF5zSH4+/j/ajj4H/1Yi5EZXpfSnSrLzETEkJbXF
VH0RLMA2ODgAgZEJt1y2mS0OW2ImDz2UIUDK86BbPP6cvyTxJft56nAMm8JHRrNU
M6PkOVIgkcSflqIW3LwJlW/TsXYvuaZQ+JJREZeeZT82IxQYAWyfnrKEyypfRTp2
1HTwTJv3E0RR0oefRF4kXnfHuRUlRcFbRjm4NyjH/mIj4HGIK+Vwjirkjq9U6xYn
7dGYj89soxVtlaSH/TTG9F4LnmGk/vOsvXlLBxgvYUWfOHvQDxgxPErVrj7GE2vv
tZ0iLs2tv4dbVo6D/YdQfLP576fKoVbjN3iKvlhP22w67b/QxVPXSgFxier5HK0=
=/iBk
-----END PGP SIGNATURE-----
Merge tag 'drivers_pl172_for_4.4' of https://github.com/manabian/linux-lpc into next/drivers
Merge "PL172 driver updates for v4.4" from Joachim Eastwood:
Support for additional ARM MPMCs to the PL172 driver and an update to
the bindings documentation to reflect this from Vladimir Zapolskiy.
"The change adds support of ARM PrimeCell PL175 MPMC and PL176 MPMC,
the static memory controllers on devices are similar to one found on
ARM PrimeCell PL172, add support to the existing driver."
* tag 'drivers_pl172_for_4.4' of https://github.com/manabian/linux-lpc:
doc: dt: arm,pl172: add description of PL175 and PL176 controllers
memory: pl172: add ARM PrimeCell PL176 MPMC support
memory: pl172: add ARM PrimeCell PL175 MPMC support
memory: pl172: correct MPMC peripheral ID register bits
Documentation and support to be able to load the PDSP
firmware necessary for accumulator operation.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWHW8iAAoJEHJsHOdBp5c/9ywP/3Qpvy+kcnwMvwrnq/jxLlGk
qc+gQTAMMguenYGZmIqnyLVHG9B4UUNZ6e/uiukzCxMP1SWx8KmgKNFSQonJuFVV
wLufo+wYBTH4P8VIM5OJNkJVPqZ8YXwtVJ09LhVxYNh1vF/l6aOEQ/kaEC22f5sD
jycgKdKx3yRn67VrWiuXS1MGXIDkGR3ABCxv6iJHSKyP15HArQ6fAhyrkfP/mNkr
9YXIrX+vmMdsICfXG19R2z/lCuM+JadXz9Rjo9yMQwvUw+3QAHYy8m4JXb9cZFZq
jNZnzWQj5azuxaGnLVS1UNggsEXuxmd0S1PJvdF1N2ISHVYqwCtFuLjQ2r+z4WQm
uzo9DyPTaYtASO6iSq9MQVzKKW0r0a5dPlAJIYTJHR11xi8kOpu04KUkJUR4c1ly
X5I9zJ7ishV1VxFUZaMJtl/nX7B18WiKZyHhtO4MqRLPFA1fjH1psA/s8vRk6l6e
unawCOM5oT8KvuSyijTNq2sQlxgRJJW7S4F1P1iUxsA6nocaPdTV+Oi/aECt8mFQ
Q9gFVgCTEMWBYPuVqVisfU/mmZFPRDiotknMAeM+mUF6D/DkA0NSPvNWH0LP4rrA
kIGRHQWtJMBTdxdBhjKoCsEEk1DR0wOCTUqow77SR/H3wl1FL1EYDB2J15JD7vzM
lVTrZzd1wRXSsHINdnY6
=T5UX
-----END PGP SIGNATURE-----
Merge tag 'keystone-driver-soc_v2' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/soc
Merge "ARM Keystone SOC driver updates for 4.4" from Santosh Shilimkar:
Documentation and support to be able to load the PDSP
firmware necessary for accumulator operation.
* tag 'keystone-driver-soc_v2' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
soc: ti: qmss: make acc queue support optional in the driver
soc: ti: add firmware file name as part of the driver
Documentation: dt: soc: Add description for knav qmss driver
L2 caches optimization for Armada XP
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iEYEABECAAYFAlYX5kYACgkQCwYYjhRyO9XRAACgh9ZuCj/Bxgsql5tHL2fLPhMw
OzwAn3RJqjzRRMLcZ/TmgTPNbNwz3hEB
=bO2O
-----END PGP SIGNATURE-----
Merge tag 'mvebu-soc-4.4-1' of git://git.infradead.org/linux-mvebu into next/soc
Merge "mvebu soc for 4.4 (part 1)" from Gregory CLEMENT:
L2 caches optimization for Armada XP
* tag 'mvebu-soc-4.4-1' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: add support to clear shared L2 bit on Armada XP
Despite being a platform device, the SMMUv3 is capable of signaling
interrupts using MSIs. Hook it into the platform MSI framework and
enjoy faults being reported in a new and exciting way.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
[will: tidied up the binding example and reworked most of the code]
Signed-off-by: Will Deacon <will.deacon@arm.com>
This changAdd support for EV_ABS / EV_REL events to the gpio-keys-polled driver.
The driver already allows specifying what type of events (key / rel / abs)
a button generates when pressed, but for rel / abs axis we also need to
specify which value this specific gpio represents.
One use case is digital joysticks / direction-pads which are hooked up to
gpio, in this case we've left and right buttons which we want to map to
EV_ABS, ABS_X and we want generate events for left with a value of -1 and
for right with a value of +1 (and similar for up / down and ABS_Y).
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
- New board support
: add exynos5250-snow-rev5 DT file to support Snow Rev5+ board
: add exynos5422-odroidxu4 DT file to support Odroid XU4 board
: split exynos5422-odroidxu3-audio DT file from odroidxu3-common
- USE GPIO constants for flags cells for exynos boards
- fix cpu compatible value to 'arm926ej-s' for s3c2416
- add DMA support for serial ports for exynos4
- add suspend opp for exynos4412
- remove regulator-compatible usage for exynos4412-trats2
- enable EC vboot context support for Peach boards
- move display-timings node to DP for exynos5250-arndale, smdk5250 and smdk5420
- for exynos4412-odroid/odroidu3
: unify voltage regulator style and
: remove redundant pinctrl settings
: add pwm-fan node and use it as a colling device
- for exynos5422-odroidxu3
: fix power off method and LEDs
- dt-bindings
: grounded AC0KB pin on S2MPS11
: entry how to use PWM FAN as a cooling device
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJWHBBhAAoJEA0Cl+kVi2xqTYEP/jutsYKeQE2/A3g3zOMHfuYv
p6Q9m0RB5rug7KOmT10nqAJmBpj3FZZgSTWf3AUfPCNxzei1DY9LNknHPqOIHY4S
HfbDx0qA2U5Jta02Bo9SE3pgkODJX/p1YAmiEbVOwiKS6vuFysykX0QvidBSCYbk
tqfqb6LRsdglIItKs2acUyLoZeldaYdDOvkL6hrHiwjz8njUGoSYLITkorfrBSIv
jcppiOXAZqxsjgmEho86u7jbqbC66a3yH9bMgge45t98rE5vu3WIoA8082jlQXpt
JnGtNfaTb8DECwL7T0++Ohk8hsDHood3WEmuoYAHUEq5DMotS//LZ4n2xDNWXVbN
s//cRrETBIMWk/AUZdNYbtbNGVOKYz78xL7EiJSBYby+YdYFi3tpRJ0/+9bHEglD
URwxOUb1320S2QlFULN+50x6VxPPbbAU1EmFH708RXDFQIJMLFUIANGfck0CuFah
PJaAChyAMLbqV9K7y/FfqDobxZAa1y2eAYWyL4eLYfxeOhY+PhhRfMD8pWgY1ZW4
vgHqpVADJvuZ5d7U3JgYclTQ0J6ILrDoCP5/E5C9TvYkBP5SV4KiEqvZ2Hklzxv7
9vdsfWppnYRTH2moo0tokLNRYXewzW7svq/gKYXY0VjERjnmCfrjMRXZ76q3WQ7Y
gy2KJDH/jxwlIdsGEDG6
=FqOp
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt
Merge "Samsung DT updates for v4.4" from Kukjin Kim:
- New board support
: add exynos5250-snow-rev5 DT file to support Snow Rev5+ board
: add exynos5422-odroidxu4 DT file to support Odroid XU4 board
: split exynos5422-odroidxu3-audio DT file from odroidxu3-common
- USE GPIO constants for flags cells for exynos boards
- fix cpu compatible value to 'arm926ej-s' for s3c2416
- add DMA support for serial ports for exynos4
- add suspend opp for exynos4412
- remove regulator-compatible usage for exynos4412-trats2
- enable EC vboot context support for Peach boards
- move display-timings node to DP for exynos5250-arndale, smdk5250 and smdk5420
- for exynos4412-odroid/odroidu3
: unify voltage regulator style and
: remove redundant pinctrl settings
: add pwm-fan node and use it as a colling device
- for exynos5422-odroidxu3
: fix power off method and LEDs
- dt-bindings
: grounded AC0KB pin on S2MPS11
: entry how to use PWM FAN as a cooling device
* tag 'samsung-dt-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (22 commits)
ARM: dts: Use GPIO constants for flags cells in exynos5440 boards
ARM: dts: Use GPIO constants for flags cells in exynos5420/5422/5800 boards
ARM: dts: Use GPIO constants for flags cells in exynos4412 boards
ARM: dts: Use GPIO constants for flags cells in exynos4120 boards
ARM: dts: Use GPIO constants for flags cells in exynos3250 boards
ARM: dts: Enable EC vboot context support on Peach boards
ARM: dts: Remove regulator-compatible usage in exynos4412-trats2
ARM: dts: Move display-timings node from fimd to dp in exynos5250-arndale, smdk5250 and smdk5420
ARM: dts: Add Exynos5250 Snow Rev5+ support on exynos5250-snow-rev5
ARM: dts: Unify voltage regulator style in exynos4412-odroid
ARM: dts: Remove redundant pinctrl settings in exynos4412-odroid
ARM: dts: Fix cpu compatible value for s3c2416
ARM: dts: Add support Odroid XU4 board for exynos5422-odroidxu4
ARM: dts: Split audio configuration to separate exynos5422-odroidxu3-audio
ARM: dts: Fix power off method for exynos5422-odroidxu3-common
dt-bindings: Document grounded ACOKB pin on S2MPS11
ARM: dts: use pwm-fan device as a cooling device for exynos4412-odroidu3
ARM: dts: Add pwm-fan node for exynos4412-odroidu3
dt-bindings: Documentation entry to explain how to use PWM FAN as a cooling device
ARM: dts: add suspend opp to exynos4412
...
It adds support for the following features provided by SCP firmware
using different subsystems in Linux:
1. SCPI mailbox protocol driver which using mailbox framework
2. Clocks provided by SCP using clock framework
3. CPU DVFS(cpufreq) using existing arm-big-little driver
4. SCPI based sensors including temperature sensors
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABCAAGBQJWF7ifAAoJEABBurwxfuKYAfMP/34ka/n4+U/aPQXzStNIwr3v
Nme9WSf3mUPv26MstRDrWRYi1G2WLOTlc196MpdIt6m6QLOjxzEl3tSq5ILrj7yN
KoLojtISmu/pbhVcJN5fllxgpcJzufLoEWBa5T/Y/4GoIhh1NCYa82QpNgzPmsMd
rPCkYHqwT6I3sIS+/mbDkGA/QnwJ2qtJ8sp3+fL+dyJbI7Aa1zJZP6ectPsxK22+
HFoFTY45rdFv/ojZZFZL8E/gcblYwRWKzIgwdASHuDXxIhd/IPwjrex2Iyv75AQK
zusRQ5Xv82GaYWHVa9GXmZqXkTsvBg4AJwc4Uq2JdB0qOi2a4tc8PkK7Ts5YdHgS
YVGxbY1POtMBi2bJUjsviMY7dGR3I+iEXJTYnbPnkVa+GTv8/FViVmOOLQnnBF4R
fN5FN0vfuL6zaQzOPYLGx3SuEHix3ko2DCAcMg6idIxuBHArlJuS7XKECWdHuc0+
+qn6Iqf8YSKIZ1zrWMggqY/sXuxjtABUBXe3jP3iTKQh8h+9SLfN3wgQM4GFJJcB
gNfvk3Hl5aPFy/7gsgSDlaYbhGKPwTup+R8Fqd6nSBQO+rpRXvQQftwigYQiIEcE
IiOS3BntVQWjoVr9WIifguf6rHG1ZoSMTHdtVVEaqsspT/OGJyq/ynEFJYSFqcqX
NRPdQJNuoXGolGhyoWxD
=9u+p
-----END PGP SIGNATURE-----
Merge tag 'arm-scpi-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/drivers
Merge "ARM System Control and Power Interface(SCPI) support" from Sudeep Holla
It adds support for the following features provided by SCP firmware
using different subsystems in Linux:
1. SCPI mailbox protocol driver which using mailbox framework
2. Clocks provided by SCP using clock framework
3. CPU DVFS(cpufreq) using existing arm-big-little driver
4. SCPI based sensors including temperature sensors
* tag 'arm-scpi-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
hwmon: Support thermal zones registration for SCP temperature sensors
hwmon: Support sensors exported via ARM SCP interface
firmware: arm_scpi: Extend to support sensors
Documentation: add DT bindings for ARM SCPI sensors
cpufreq: arm_big_little: add SCPI interface driver
clk: scpi: add support for cpufreq virtual device
clk: add support for clocks provided by SCP(System Control Processor)
firmware: add support for ARM System Control and Power Interface(SCPI) protocol
Documentation: add DT binding for ARM System Control and Power Interface(SCPI) protocol
This adds documentation of device tree bindings for the STM32 hardware
random number generator.
Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
Acked-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
The DSP processor sub-systems on DRA7xx have two MMU instances
each, one for the processor core and the other for an internal
EDMA block. These MMUs need an additional shared register to be
programmed in the DSP_SYSTEM sub-module to be enabled properly.
The OMAP IOMMU bindings is updated to account for this additional
syscon property required for these DSP IOMMU instances on DRA7xx
SoCs. A new compatible "ti,dra7-dsp-iommu" is also defined to
distinguish these devices specifically from other DRA7 IOMMU
devices.
An example of the DRA7 DSP IOMMU nodes is also added to the
document for clarity.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
This patch adds wake up support to GPIO rotary encoders.
Signed-off-by: Sylvain Rochet <sylvain.rochet@finsecur.com>
Reviewed-by: Johan Hovold <johan@kernel.org>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Add the Qualcomm Switch-Mode Battery Charger and Boost device tree
binding.
Signed-off-by: Courtney Cavin <courtney.cavin@sonymobile.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Andy Gross <agross@codeaurora.org>
clock controller nodes which also support power domains (gdscs') need
to have a #power-domain-cells property. Add these for gcc and mmcc
nodes of msm8974, gcc of apq8084 and msm8916.
Also update gcc and mmcc bindings for it.
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
Currently firmware file name is included in the DTS. This is not scalable
as user has to change the DTS if they need upgrade to a new firmware.
Instead, add the firmware file name in the driver itself. As long as there
is no API change, new firmware upgrade is easy and require no driver
change. User is expected to copy the firmware image to the file system
and add a sym link to the new firmware for doing an upgrade. Driver add
a array of firmware file names to search for the available firmware blobs.
This scheme also prepare the driver for future changes to API if ever
happens. In such case it is assumed that driver needs to change to
accommodate the new firmware and new firmware file name will get added to
the array.
Also update the DT document to remove the firmware attribute and add
description about firmware in the driver documentation.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
Add documentation for the PXA LCD controller devicetree binding.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Reviewed-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Remove "mrvl,lpss-ssp" property from documentation because LPSS SSP type is
for certain Intel platforms. I believe commit a6e56c28a1
("ARM: pxa: ssp: add DT bindings") added it by accident by copying all
enum pxa_ssp_type types from include/linux/pxa2xx_ssp.h.
Please note this was removed from arch/arm/plat-pxa/ssp.c by the
commit b692cb83b1 ("ARM: pxa: ssp: Fix build error by removing originally
incorrect DT binding").
Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Fix typos in the st,stih4xx binding, in particular replacing
"pinctrl-name" by "pinctrl-names".
Fix minor typos in the descriptions too.
Signed-off-by: Michael Opdenacker <michael.opdenacker@free-electrons.com>
Signed-off-by: Rob Herring <robh@kernel.org>
When referencing other DT bindings documentation, use relative
path rather than absolute.
Suggested-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
Acked-by: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
* clk-bcm2835:
clk: bcm2835: Add support for programming the audio domain clocks
clk: bcm2835: Add binding docs for the new platform clock driver.
clk: bcm2835: Move under bcm/ with other Broadcom SoC clk drivers.
We want the tty fixes and reverts in here as well so that people can
properly test and use it.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit add new cpu enable method "mediatek,mt65xx-smp" and
"mediatek,mt81xx-tz-smp".
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Add clocks needed by Mediatek VENC and VENC_LT power domianis.
These clocks were needed by accessing subsystem's registers,
so they need to be enabled before power on these subsystems.
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>