The build scripts inadvertently dropped this down to 29-bit, fix it
back up.
Reported-by: Raul Porcel <armin76@gentoo.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
kfr2r09 board has a micro-SD card slot, therefore card write-protection
detection cannot work there, disable it.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Acked-by: Ian Molton <ian@mnementh.co.uk>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Add a list of SCIF and SDHI DMA slave definitions to sh7724.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
SuperH SDHI controllers can use DMA, add slave definitions to sh7722.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Now that DMA slave IDs are only used used in platform specific code and have
become opaque cookies for the rest of the code, we can make the, CPU specific
too.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Ecovec uses the AK8813 video envoder similarly to the ms7724se platform with
the only difference, that on ecovec GPIOs are used for resetting and powering
up and down the chip.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* git://git.infradead.org/iommu-2.6:
intel-iommu: Set a more specific taint flag for invalid BIOS DMAR tables
intel-iommu: Combine the BIOS DMAR table warning messages
panic: Add taint flag TAINT_FIRMWARE_WORKAROUND ('I')
panic: Allow warnings to set different taint flags
intel-iommu: intel_iommu_map_range failed at very end of address space
intel-iommu: errors with smaller iommu widths
intel-iommu: Fix boot inside 64bit virtualbox with io-apic disabled
intel-iommu: use physfn to search drhd for VF
intel-iommu: Print out iommu seq_id
intel-iommu: Don't complain that ACPI_DMAR_SCOPE_TYPE_IOAPIC is not supported
intel-iommu: Avoid global flushes with caching mode.
intel-iommu: Use correct domain ID when caching mode is enabled
intel-iommu mistakenly uses offset_pfn when caching mode is enabled
intel-iommu: use for_each_set_bit()
intel-iommu: Fix section mismatch dmar_ir_support() uses dmar_tbl.
Implement kgdb_arch_pc() which adjusts the pc if it needs to be
adjusted after a software breakpoint trap.
Implement kgdb_arch_set_pc() which is a new required function in the
kgdb debug core.
When processing a single step return zero in the error exception field
so that the debug core can distinguish between a single step trap and
a breakpoint trap generically.
Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
Acked-by: Paul Mundt <lethal@linux-sh.org>
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (44 commits)
vlynq: make whole Kconfig-menu dependant on architecture
add descriptive comment for TIF_MEMDIE task flag declaration.
EEPROM: max6875: Header file cleanup
EEPROM: 93cx6: Header file cleanup
EEPROM: Header file cleanup
agp: use NULL instead of 0 when pointer is needed
rtc-v3020: make bitfield unsigned
PCI: make bitfield unsigned
jbd2: use NULL instead of 0 when pointer is needed
cciss: fix shadows sparse warning
doc: inode uses a mutex instead of a semaphore.
uml: i386: Avoid redefinition of NR_syscalls
fix "seperate" typos in comments
cocbalt_lcdfb: correct sections
doc: Change urls for sparse
Powerpc: wii: Fix typo in comment
i2o: cleanup some exit paths
Documentation/: it's -> its where appropriate
UML: Fix compiler warning due to missing task_struct declaration
UML: add kernel.h include to signal.c
...
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (127 commits)
sh: update defconfigs.
sh: Fix up the NUMA build for recent LMB changes.
sh64: provide a stub per_cpu_trap_init() definition.
sh: fix up CONFIG_KEXEC=n build.
sh: fixup the docbook paths for clock framework shuffling.
driver core: Early dev_name() depends on slab_is_available().
sh: simplify WARN usage in SH clock driver
sh: Check return value of clk_get on ms7724
sh: Check return value of clk_get on ecovec24
sh: move sh clock-cpg.c contents to drivers/sh/clk-cpg.c
sh: move sh clock.c contents to drivers/sh/clk.
sh: move sh asm/clock.h contents to linux/sh_clk.h V2
sh: remove unused clock lookup
sh: switch boards to clkdev
sh: switch sh4-202 to clkdev
sh: switch shx3 to clkdev
sh: switch sh7757 to clkdev
sh: switch sh7763 to clkdev
sh: switch sh7780 to clkdev
sh: switch sh7786 to clkdev
...
WARN() is used in some places to report firmware or hardware bugs that
are then worked-around. These bugs do not affect the stability of the
kernel and should not set the flag for TAINT_WARN. To allow for this,
add WARN_TAINT() and WARN_TAINT_ONCE() macros that take a taint number
as argument.
Architectures that implement warnings using trap instructions instead
of calls to warn_slowpath_*() now implement __WARN_TAINT(taint)
instead of __WARN().
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Acked-by: Helge Deller <deller@gmx.de>
Tested-by: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* 'perf-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (311 commits)
perf tools: Add mode to build without newt support
perf symbols: symbol inconsistency message should be done only at verbose=1
perf tui: Add explicit -lslang option
perf options: Type check all the remaining OPT_ variants
perf options: Type check OPT_BOOLEAN and fix the offenders
perf options: Check v type in OPT_U?INTEGER
perf options: Introduce OPT_UINTEGER
perf tui: Add workaround for slang < 2.1.4
perf record: Fix bug mismatch with -c option definition
perf options: Introduce OPT_U64
perf tui: Add help window to show key associations
perf tui: Make <- exit menus too
perf newt: Add single key shortcuts for zoom into DSO and threads
perf newt: Exit browser unconditionally when CTRL+C, q or Q is pressed
perf newt: Fix the 'A'/'a' shortcut for annotate
perf newt: Make <- exit the ui_browser
x86, perf: P4 PMU - fix counters management logic
perf newt: Make <- zoom out filters
perf report: Report number of events, not samples
perf hist: Clarify events_stats fields usage
...
Fix up trivial conflicts in kernel/fork.c and tools/perf/builtin-record.c
Now that the node 0 initialization code has been overhauled, kill off the
now obsolete setup_memory() bits.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This is needed to fix up the build at the moment. Gradually this will be
reworked to follow the 32-bit initialization path and deal with delayed
VBR initialization.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The reserve_crashkernel() definition is in asm/kexec.h which is only
dragged in via linux/kexec.h if CONFIG_KEXEC is set. Just switch over to
asm/kexec.h unconditionally to fix up the build.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
In preparation for removing volatile from the atomic_t definition, this
patch adds a volatile cast to all the atomic read functions.
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Move the CPG helpers to drivers/sh/clk-cpg.c V2.
This to allow SH-Mobile ARM to share the code with
SH. All functions except the legacy CPG stuff is moved.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch is V2 of the SH clock framework move from
arch/sh/kernel/cpu/clock.c to drivers/sh/clk.c. All
code except the following functions are moved:
clk_init(), clk_get() and clk_put().
The init function is still kept in clock.c since it
depends on the SH-specific machvec implementation.
The symbols clk_get() and clk_put() already exist in
the common ARM clkdev code, those symbols are left in
the SH tree to avoid duplicating them for SH-Mobile ARM.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch is V2 of the clock framework move from
arch/sh/include/asm/clock.h to include/linux/sh_clk.h
and updates the include paths for files that will be
shared between SH and SH-Mobile ARM.
The file asm/clock.h is still kept in this version,
this to depend on as few files as possible at this
point. We keep SH specific stuff in there.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Now when all clocks are registered using clkdev,
get rid of the special SH-specific clock lookup.
Also ditch the unused module ref counting code.
This patch syncs the SH behaviour with ARM.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch converts the remaining board clocks
to use clkdev for lookup if needed. The unused
name and id from struct clk are also removed.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch converts the remaining sh4-202 clocks
to use clkdev for lookup. The now unused name
and id from struct clk are also removed.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch converts the remaining shx3 clocks
to use clkdev for lookup. The now unused name
and id from struct clk are also removed.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch converts the remaining sh7757 clocks
to use clkdev for lookup. The now unused name
and id from struct clk are also removed.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch converts the remaining sh7763 clocks
to use clkdev for lookup. The now unused name
and id from struct clk are also removed.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch converts the remaining sh7780 clocks
to use clkdev for lookup. The now unused name
and id from struct clk are also removed.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch converts the remaining sh7786 clocks
to use clkdev for lookup. The now unused name
and id from struct clk are also removed.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch converts the remaining sh7785 clocks
to use clkdev for lookup. The now unused name
and id from struct clk are also removed.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch converts the remaining sh7366 clocks
to use clkdev for lookup. The now unused name
and id from struct clk are also removed.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch converts the remaining sh7343 clocks
to use clkdev for lookup. The now unused name
and id from struct clk are also removed.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch converts the remaining sh7722 clocks
to use clkdev for lookup. The now unused name
and id from struct clk are also removed.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch converts the remaining sh7723 clocks
to use clkdev for lookup. The now unused name
and id from struct clk are also removed.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch converts the remaining sh7724 clocks
to use clkdev for lookup. The now unused name
and id from struct clk are also removed.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch converts the legacy clocks to register
using clkdev. Also the clock name is removed.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Remove the name parameter from SH_CLK_DIV4() and
adjust the processor specific code. The lookup
happens using clkdev so the name is unused.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Update the div4 set_parent() callback to use the
flags instead of name to determine parent index.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Remove the name and the id from SH_CLK_MSTP32().
Now when lookups are handled by clkdev they are
not needed anymore.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch adds sh7786 MSTP enums for mstp_clks[] index.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch adds sh7785 MSTP enums for mstp_clks[] index.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch adds sh7366 MSTP enums for mstp_clks[] index.
The MSTP bit for the SIU is removed as well since it is
not included in the documentation. Most likely an old
copy paste error from sh7722.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch adds sh7343 MSTP enums for mstp_clks[] index.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
In the NUMA or memory hot-add case where system memory has been
partitioned up, we immediately run in to a situation where the existing
PMB entry doesn't cover the new range (primarily as a result of the entry
size being shrunk to match the node size early in the initialization). In
order to fix this up it's necessary to preload a PMB mapping for the new
range prior to activation in order to circumvent reset by MMU.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The minimum section size for the PMB is 16M, so just always error
out early if the specified size is too small. This permits us to
unconditionally call in to pmb_bolt_mapping() with variable sizes
without wasting a TLB and cache flush for the range.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This reworks much of the bootmem setup and initialization code allowing
us to get rid of duplicate work between the NUMA and non-NUMA cases. The
end result is that we end up with a much more flexible interface for
supporting more complex topologies (fake NUMA, highmem, etc, etc.) which
is entirely LMB backed. This is an incremental step for more NUMA work as
well as gradually enabling migration off of bootmem entirely.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Rewinding each debugfs entries to unregister if an error happens.
Based on the commit ca4caa4e1d
Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Get rid of div6 clock names on
sh7343/sh7366/sh7722/sh7723/sh7724
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Use clkdev for div6 lookup on SH-Mobile processors:
sh7343/sh7366/sh7722/sh7723/sh7724
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Remove the clock name from sh7722/sh7723/sh7724
hwblk clocks. Lookup is handled by clkdev.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Modify the SuperH clock code to support struct clk
with NULL as name. Such clocks will not be hooked
up to debugfs.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Use clkdev for lookup of hwblk clocks on
sh7722/sh7723/sh7724.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Modify sh7722/sh7723/sh7724 to use clkdev for
TMU and SCIF clock lookups.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Rework the sh7722/sh7723/sh7724 hwblk code to use the
hwblk id as index in the mstp clock array.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This reworks the memory limit handling to tie in through the available
LMB infrastructure. This requires a bit of reordering as we need to have
all of the LMB reservations taken care of prior to establishing the
limits.
While we're at it, the crash kernel reservation semantics are reworked
so that we allocate from the bottom up and reduce the risk of having
to disable the memory limit due to a clash with the crash kernel
reservation.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This plugs in a memory init callback in the machvec to permit boards to
wire up various bits of memory directly in to LMB. A generic machvec
implementation is provided that simply wraps around the normal
Kconfig-derived memory start/size.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The elfcorehdr parsing was just tossed in setup.c, but nothing outside of
the crash dump code/vmcore bits require it, so we just move it out of the
way, as per ppc.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
There's still quite a bit of shootdown logic that needs to be hacked up
to support SMP for kdump properly, so just add in a BROKEN_ON_SMP
dependency for now.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This bumps up the extra LMB reservations in ordering so that they're
accounted for prior to iterating over the region list. This ensures that
reservations are visible both within the LMB and bootmem context.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Various boot loaders go to various extents to thwart the initrd detection
logic (mostly on account of not being able to be bothered with adhering
to the established boot ABI), so we make the detection logic a bit more
robust. This makes it possible to work around the SDK7786's firmware's
attempts to thwart compressed image booting. Victory is mine.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The breakpoint generic layer assumes that archs always know in advance
the static number of address registers available to host breakpoints
through the HBP_NUM macro.
However this is not true for every archs. For example Arm needs to get
this information dynamically to handle the compatiblity between
different versions.
To solve this, this patch proposes to drop the static HBP_NUM macro
and let the arch provide the number of available slots through a
new hw_breakpoint_slots() function. For archs that have
CONFIG_HAVE_MIXED_BREAKPOINTS_REGS selected, it will be called once
as the number of registers fits for instruction and data breakpoints
together.
For the others it will be called first to get the number of
instruction breakpoint registers and another time to get the
data breakpoint registers, the targeted type is given as a
parameter of hw_breakpoint_slots().
Reported-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Frederic Weisbecker <fweisbec@gmail.com>
Acked-by: Paul Mundt <lethal@linux-sh.org>
Cc: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
Cc: K. Prasad <prasad@linux.vnet.ibm.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Jason Wessel <jason.wessel@windriver.com>
Cc: Ingo Molnar <mingo@elte.hu>
There are two outstanding fashions for archs to implement hardware
breakpoints.
The first is to separate breakpoint address pattern definition
space between data and instruction breakpoints. We then have
typically distinct instruction address breakpoint registers
and data address breakpoint registers, delivered with
separate control registers for data and instruction breakpoints
as well. This is the case of PowerPc and ARM for example.
The second consists in having merged breakpoint address space
definition between data and instruction breakpoint. Address
registers can host either instruction or data address and
the access mode for the breakpoint is defined in a control
register. This is the case of x86 and Super H.
This patch adds a new CONFIG_HAVE_MIXED_BREAKPOINTS_REGS config
that archs can select if they belong to the second case. Those
will have their slot allocation merged for instructions and
data breakpoints.
The others will have a separate slot tracking between data and
instruction breakpoints.
Signed-off-by: Frederic Weisbecker <fweisbec@gmail.com>
Acked-by: Paul Mundt <lethal@linux-sh.org>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
Cc: K. Prasad <prasad@linux.vnet.ibm.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Ingo Molnar <mingo@elte.hu>
The current policies of breakpoints in x86 and SH are the following:
- task bound breakpoints can only break on userspace addresses
- cpu wide breakpoints can only break on kernel addresses
The former rule prevents ptrace breakpoints to be set to trigger on
kernel addresses, which is good. But as a side effect, we can't
breakpoint on kernel addresses for task bound breakpoints.
The latter rule simply makes no sense, there is no reason why we
can't set breakpoints on userspace while performing cpu bound
profiles.
We want the following new policies:
- task bound breakpoint can set userspace address breakpoints, with
no particular privilege required.
- task bound breakpoints can set kernelspace address breakpoints but
must be privileged to do that.
- cpu bound breakpoints can do what they want as they are privileged
already.
To implement these new policies, this patch checks if we are dealing
with a kernel address breakpoint, if so and if the exclude_kernel
parameter is set, we tell the user that the breakpoint is invalid,
which makes a good generic ptrace protection.
If we don't have exclude_kernel, ensure the user has the right
privileges as kernel breakpoints are quite sensitive (risk of
trap recursion attacks and global performance impacts).
[ Paul Mundt: keep addr space check for sh signal delivery and fix
double function declaration]
Signed-off-by: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
Cc: K. Prasad <prasad@linux.vnet.ibm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Jason Wessel <jason.wessel@windriver.com>
Cc: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Tag ptrace breakpoints with the exclude_kernel attribute set. This
will make it easier to set generic policies on breakpoints, when it
comes to ensure nobody unpriviliged try to breakpoint on the kernel.
Signed-off-by: Frederic Weisbecker <fweisbec@gmail.com>
Acked-by: Paul Mundt <lethal@linux-sh.org>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
Cc: K. Prasad <prasad@linux.vnet.ibm.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Ingo Molnar <mingo@elte.hu>
arch/sh/kernel/smp.c:164: error: conflicting types for 'native_cpu_disable'
/home/matt/src/kernels/sh-2.6/arch/sh/include/asm/smp.h:48: error: previous declaration of 'native_cpu_disable' was here
Signed-off-by: Matt Fleming <matt@console-pimps.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Add CONFIG_VIRTUALIZATION to the SH architecture
and include the virtio code there. Used to enable
the virtio drivers under QEMU.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The UP dependency was inherited from ARM, which seems to have run in to
it due to the stacktrace code not being available for SMP in certain
cases, as we don't have this particular limitation there is no specific
need to block on the SMP dependency.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This wires up CPU hotplug for SH-X3 SMP CPUs. Presently only secondary
cores can be hotplugged given that the boot CPU has to contend with the
broadcast timer. When real local timers are implemented this restriction
can be lifted.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This provides a cache of the secondary CPUs idle loop for the cases where
hotplug simply enters a low power state instead of resetting or powering
off the core.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
smp_store_cpu_info() is presently flagged as __init, but is called by
start_secondary() which is __cpuinit, fix it up.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This iterates over the maximum number of CPUs we plan to support and
makes sure they're all set in the present CPU map.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This converts from cpu_set() for the online map to set_cpu_online().
The two online map modifiers were the last remaining manual map
manipulation bits, with this in place everything now goes through
cpumask.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
With the platform ops migration, the definitions still need to be
included in the CONFIG_SMP=n case, so make the asm/smp.h include
explicit.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
When registering CPUs in the topology initialization ensure that all of
the present CPUs are flagged as hotpluggable.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Now that compressed image loading is possible for sdk7786, drop the
vmlinux.bin default image target and update the defconfig accordingly.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch updates the sh7751 pci code to handle io ports
correctly. The code is based on the sh7788x implementation.
Tested on a R2D-1 board with CONFIG_8139TOO_PIO=y.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Update the R2D defconfigs to bump up the maximum
number of SCIF ports on the system.
Fixes a broken serial console regression added
by cd5f107628.
Reported-by: Shin-ichiro KAWASAKI <kawasaki@juno.dti.ne.jp>
Signed-off-by: Magnus Damm <damm@opensource.se>
Tested-by: Alexandre Courbot <alex@dcl.info.waseda.ac.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
CHCR_TS_HIGH_SHIFT is defined as a shift of TS high bits in CHCR register,
relative to low bits. The TS_INDEX2VAL() macro has to take this into account.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* 'master' of master.kernel.org:/pub/scm/linux/kernel/git/mfleming/sh-2.6:
sh: Use correct mask when comparing PMB DATA array values
sh: Do not try merging two 128MB PMB mappings
sh: Fix zImage load address when CONFIG_32BIT=y
sh: Fix address to decompress at when CONFIG_32BIT=y
sh: Assembly friendly __pa and __va definitions
Lists of DMA channels and slaves are not changed, make them constant. Besides,
SH7724 channel and slave configuration of both DMA controllers is identical,
remove the extra copy of the configuration data.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
As explained in commit 1c0fe6e3bd, we want to call the architecture independent
oom killer when getting an unexplained OOM from handle_mm_fault, rather than
simply killing current.
Cc: linux-sh@vger.kernel.org
Cc: linux-arch@vger.kernel.org
Signed-off-by: Nick Piggin <npiggin@suse.de>
Acked-by: David Rientjes <rientjes@google.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Previously we were masking the PMB DATA array values with the value of
__MEMORY_START | PMB_V, which misses some PFN bits off the mask.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
There is a logic error in pmb_merge() that means we will incorrectly try
to merge two 128MB PMB mappings into one mapping. However, 256MB isn't a
valid PMB map size and pmb_merge() will actually drop the second 128MB
mapping.
This patch allows my SDK7786 board to boot when configured with
CONFIG_MEMORY_SIZE=0x10000000.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
We can't necessarily use the P1SEG region to access RAM when running in
32BIT mode, so use CONFIG_MEMORY_START as the base address.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
When running in 32BIT mode the P1SEG region doesn't necessarily provide
a window onto RAM (it depends how the bootloader setup the PMB). The
correct location to place the decompressed kernel is the physical
address of _text.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
This patch defines ___pa and ___va which return the physical and virtual
address of an address, respectively. These macros are suitable for
calling from assembly because they don't include the C casts required by
__pa and __va.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
This cribs the MIPS plat_smp_ops approach for wrapping up the platform
ops. This will allow for mixing and matching different ops on the same
platform in the future.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This does a detect_cpu_and_cache_system() -> cpu_probe() rename, tidies
up the unused return value, and stuffs it under __cpuinit in preparation
for CPU hotplug.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This follows the x86 change and kills off the unthrottle stub. As the x86
change killed off the generic callback it isn't used anymore anyways.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This zeroes out the number of cache aliases in the cache info descriptors
when hardware alias avoidance is enabled. This cuts down on the amount of
flushing taken care of by common code, and also permits coherency control
to be disabled for the single CPU and 4k page size case.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Previously the struct module definition was pulled in from other headers,
but we want the reference to be explicit. Fixes up randconfig build
issues.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This enables support for the hardware synonym avoidance handling on SH-X3
CPUs for the case where dcache aliases are possible. icache handling is
retained, but we flip on broadcasting of the block invalidations due to
the lack of coherency otherwise on SMP.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This implements support for hardware-managed IRQ balancing as implemented
by SH-X3 cores (presently only hooked up for SH7786, but can probably be
carried over to other SH-X3 cores, too).
CPUs need to specify their distribution register along with the mask
definitions, as these follow the same format. Peripheral IRQs that don't
opt out of balancing will be automatically distributed at the whim of the
hardware block, while each CPU needs to verify whether it is handling the
IRQ or not, especially before clearing the mask.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Make sure that the timer IRQs and IPIs aren't enabled for IRQ balancing.
IPIs are disabled as a result of being percpu while the timers simply
disable balancing outright.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This adds support for hardware-assisted userspace irq masking for
special priority levels. Due to the SR.IMASK interactivity, only some
platforms implement this in hardware (including but not limited to
SH-4A interrupt controllers, and ARM-based SH-Mobile CPUs). Each CPU
needs to wire this up on its own, for now only SH7786 is wired up as an
example.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Presently address translation is default-enabled regardless of whether
CONFIG_MMU is set or not in the SH-4 case, this fixes it up, and also
makes the control init word a bit more readable in the process.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
While the MMUCR.URB and ITLB/UTLB differentiation works fine for all SH-4
and later TLBs, these features are absent on SH-3. This splits out
local_flush_tlb_all() in to SH-4 and PTEAEX copies while restoring the
old SH-3 one, subsequently fixing up the build.
This will probably want some further reordering and tidying in the
future, but that's out of scope at present.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
Now with the lookup aliases in place there is no longer any need to
provide the clock string, kill it off for all legacy CPG CPUs.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
For the CPUs that have not yet been converted off of legacy CPG we
provide some pclk aliases in order to make driver migration easier.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This plugs in clkdev lookups for the SH7786 clocks and migrates off of
clock string usage for the TMU clocks.
Previously the TMU clocks were aliased to the peripheral clock, so this
gets the driver actually toggling the proper clocks now as well.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Export the status of the utlb and itlb entries through debugfs.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
For the boot, enable_mmu() is called from setup_arch() but we don't call
setup_arch() for any of the other cpus. So turn on the non-boot cpu's
mmu inside of start_secondary().
I noticed this bug on an SMP board when trying to map I/O memory
(smsc911x registers) into the kernel address space. Since the Address
Translation bit in MMUCR wasn't set, accessing the virtual address where
the smsc911x registers were supposedly mapped actually performed a
physical address access.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
Cc: stable@kernel.org
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Ensure that the aux table is properly initialized, even when optional
features are missing. Without this, the FDPIC loader did not work.
Signed-off-by: Andrew Stubbs <ams@codesourcery.com>
Cc: stable@kernel.org
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Use set_cpus_allowed_ptr rather than set_cpus_allowed.
The semantic patch that makes this change is as follows:
(http://coccinelle.lip6.fr/)
// <smpl>
@@
expression E1,E2;
@@
- set_cpus_allowed(E1, cpumask_of_cpu(E2))
+ set_cpus_allowed_ptr(E1, cpumask_of(E2))
@@
expression E;
identifier I;
@@
- set_cpus_allowed(E, I)
+ set_cpus_allowed_ptr(E, &I)
// </smpl>
Signed-off-by: Julia Lawall <julia@diku.dk>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Presently the TLB wiring code depends on MMUCR.URB for working out where
to place the wired entry, but fails to take the replacment counter in to
consideration. This fixes up the wiring logic and ensures that wired
entries remain so.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Create a common platform data header file for the
shdma dmaengine driver. This is done by moving
common structures from sh asm/dmaengine.h to
linux/sh_dma.h. DMA registers are also copied from
sh asm/dma-register.h to make the code architecture
independent.
The sh header file asm/dmaengine.h is still kept
with the slave id enum. This allows us to keep the
old processor specific code as is and slowly move
over to slave id enums in per-processor headers.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Move SHDMA_SLAVE_NUMBER from asm/dmaengine.h to
shdma.h. Set it to 256 to support a wide range
of processors. The amount of memory consumed by
this change is limited to 256 bits.
While at it, rename to SH_DMA_SLAVE_NUMBER to
match with the rest of the file.
Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch replaces the sh_dmae_slave_chan_id enum
with an unsigned int. The purpose of this chainge is
to make it possible to separate the slave id enums
from the dmaengine header.
The slave id enums varies with processor model, so in
the future it makes sense to put these in the processor
specific headers together with the pinmux enums.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The parent rb_node needs to be initialized to shut up the compiler, even
though we're unlikely to ever hit this issue at run time.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
select_idle_routine() and register_sh_pmu() both needed their annotations
fixed up to silence section mismatch warnings.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
set_pmb_entry() is now only used by a function that is wrapped in #ifdef
CONFIG_PM, so wrap set_pmb_entry() in CONFIG_PM too.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Setting the TI in MMUCR causes all the TLB bits in MMUCR to be
cleared. Unfortunately, the TLB wired bits are also cleared when setting
the TI bit, causing any wired TLB entries to become unwired.
Use local_flush_tlb_all() which implements TLB flushing in a safer
manner by using the memory-mapped TLB registers. As each CPU has its own
PMB the modifications in pmb_init() only affect the local CPU, so only
flush the local CPU's TLB.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
flush_tlb_page() can be used to flush TLB entries that map executable
pages. Therefore, we need to ensure that the ITLB is also flushed in
local_flush_tlb_page().
Signed-off-by: Matt Fleming <matt@console-pimps.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
interruptible_sleep_on() is referenced for use in the mid_sched macro
which is not used anywhere. Remove reference and macro as well as the
comment which appears to belong with them.
Signed-off-by: Andreas Bombe <aeb@debian.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
i2c_put_adapter is needed after i2c_get_adapter
Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6:
serial: sh-sci: remove duplicated #include
sh: Export uncached helper symbols.
sh: Fix up NUMA build for 29-bit.
serial: sh-sci: Fix build failure for non-sh architectures.
sh: Fix up uncached offset for legacy 29-bit mode.
sh: Support CPU affinity masks for INTC controllers.
* 'perf-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (35 commits)
perf: Fix unexported generic perf_arch_fetch_caller_regs
perf record: Don't try to find buildids in a zero sized file
perf: export perf_trace_regs and perf_arch_fetch_caller_regs
perf, x86: Fix hw_perf_enable() event assignment
perf, ppc: Fix compile error due to new cpu notifiers
perf: Make the install relative to DESTDIR if specified
kprobes: Calculate the index correctly when freeing the out-of-line execution slot
perf tools: Fix sparse CPU numbering related bugs
perf_event: Fix oops triggered by cpu offline/online
perf: Drop the obsolete profile naming for trace events
perf: Take a hot regs snapshot for trace events
perf: Introduce new perf_fetch_caller_regs() for hot regs snapshot
perf/x86-64: Use frame pointer to walk on irq and process stacks
lockdep: Move lock events under lockdep recursion protection
perf report: Print the map table just after samples for which no map was found
perf report: Add multiple event support
perf session: Change perf_session post processing functions to take histogram tree
perf session: Add storage for seperating event types in report
perf session: Change add_hist_entry to take the tree root instead of session
perf record: Add ID and to recorded event data when recording multiple events
...
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (56 commits)
doc: fix typo in comment explaining rb_tree usage
Remove fs/ntfs/ChangeLog
doc: fix console doc typo
doc: cpuset: Update the cpuset flag file
Fix of spelling in arch/sparc/kernel/leon_kernel.c no longer needed
Remove drivers/parport/ChangeLog
Remove drivers/char/ChangeLog
doc: typo - Table 1-2 should refer to "status", not "statm"
tree-wide: fix typos "ass?o[sc]iac?te" -> "associate" in comments
No need to patch AMD-provided drivers/gpu/drm/radeon/atombios.h
devres/irq: Fix devm_irq_match comment
Remove reference to kthread_create_on_cpu
tree-wide: Assorted spelling fixes
tree-wide: fix 'lenght' typo in comments and code
drm/kms: fix spelling in error message
doc: capitalization and other minor fixes in pnp doc
devres: typo fix s/dev/devm/
Remove redundant trailing semicolons from macros
fix typo "definetly" -> "definitely" in comment
tree-wide: s/widht/width/g typo in comments
...
Fix trivial conflict in Documentation/laptops/00-INDEX
All the architectures properly set NEED_DMA_MAP_STATE now so we can safely
add linux/pci-dma.h to linux/pci.h and remove the linux/pci-dma.h
inclusion in arch's asm/pci.h
Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
While in theory user_enable_single_step/user_disable_single_step/
user_enable_blockstep could also be provided as an inline or macro there's
no good reason to do so, and having the prototype in one places keeps code
size and confusion down.
Roland said:
The original thought there was that user_enable_single_step() et al
might well be only an instruction or three on a sane machine (as if we
have any of those!), and since there is only one call site inlining
would be beneficial. But I agree that there is no strong reason to care
about inlining it.
As to the arch changes, there is only one thought I'd add to the
record. It was always my thinking that for an arch where
PTRACE_SINGLESTEP does text-modifying breakpoint insertion,
user_enable_single_step() should not be provided. That is,
arch_has_single_step()=>true means that there is an arch facility with
"pure" semantics that does not have any unexpected side effects.
Inserting a breakpoint might do very unexpected strange things in
multi-threaded situations. Aside from that, it is a peculiar side
effect that user_{enable,disable}_single_step() should cause COW
de-sharing of text pages and so forth. For PTRACE_SINGLESTEP, all these
peculiarities are the status quo ante for that arch, so having
arch_ptrace() itself do those is one thing. But for building other
things in the future, it is nicer to have a uniform "pure" semantics
that arch-independent code can expect.
OTOH, all such arch issues are really up to the arch maintainer. As
of today, there is nothing but ptrace using user_enable_single_step() et
al so it's a distinction without a practical difference. If/when there
are other facilities that use user_enable_single_step() and might care,
the affected arch's can revisit the question when someone cares about
the quality of the arch support for said new facility.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Roland McGrath <roland@redhat.com>
Acked-by: David Howells <dhowells@redhat.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Add generic implementations of the old and really old uname system calls.
Note that sh only implements sys_olduname but not sys_oldolduname, but I'm
not going to bother with another ifdef for that special case.
m32r implemented an old uname but never wired it up, so kill it, too.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Jeff Dike <jdike@addtoit.com>
Cc: Hirokazu Takata <takata@linux-m32r.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Al Viro <viro@zeniv.linux.org.uk>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: "Luck, Tony" <tony.luck@intel.com>
Cc: James Morris <jmorris@namei.org>
Cc: Andreas Schwab <schwab@linux-m68k.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Add a generic implementation of the ipc demultiplexer syscall. Except for
s390 and sparc64 all implementations of the sys_ipc are nearly identical.
There are slight differences in the types of the parameters, where mips
and powerpc as the only 64-bit architectures with sys_ipc use unsigned
long for the "third" argument as it gets casted to a pointer later, while
it traditionally is an "int" like most other paramters. frv goes even
further and uses unsigned long for all parameters execept for "ptr" which
is a pointer type everywhere. The change from int to unsigned long for
"third" and back to "int" for the others on frv should be fine due to the
in-register calling conventions for syscalls (we already had a similar
issue with the generic sys_ptrace), but I'd prefer to have the arch
maintainers looks over this in details.
Except for that h8300, m68k and m68knommu lack an impplementation of the
semtimedop sub call which this patch adds, and various architectures have
gets used - at least on i386 it seems superflous as the compat code on
x86-64 and ia64 doesn't even bother to implement it.
[akpm@linux-foundation.org: add sys_ipc to sys_ni.c]
Signed-off-by: Christoph Hellwig <hch@lst.de>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Jeff Dike <jdike@addtoit.com>
Cc: Hirokazu Takata <takata@linux-m32r.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@elte.hu>
Reviewed-by: H. Peter Anvin <hpa@zytor.com>
Cc: Al Viro <viro@zeniv.linux.org.uk>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: "Luck, Tony" <tony.luck@intel.com>
Cc: James Morris <jmorris@namei.org>
Cc: Andreas Schwab <schwab@linux-m68k.org>
Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: David Howells <dhowells@redhat.com>
Acked-by: Kyle McMartin <kyle@mcmartin.ca>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Remove the hw_perf_event_*() hotplug hooks in favour of per PMU hotplug
notifiers. This has the advantage of reducing the static weak interface
as well as exposing all hotplug actions to the PMU.
Use this to fix x86 hotplug usage where we did things in ONLINE which
should have been done in UP_PREPARE or STARTING.
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: paulus@samba.org
Cc: eranian@google.com
Cc: robert.richter@amd.com
Cc: fweisbec@gmail.com
Cc: Arnaldo Carvalho de Melo <acme@infradead.org>
LKML-Reference: <20100305154128.736225361@chello.nl>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
This fixes up some of the I/D/F clock ambiguity in the sh-sci driver.
The interface clock in most cases just wraps back to the peripheral
clock, while the function clock wraps in to the MSTP bits. As the logic
was somewhat inverted, this cleans that up, and also enables all CPUs
with SCI MSTP bits to match function clocks through clkdev lookup.
As a result, this gets rid of the clk string abuse on the sh side, and
the clock string will be killed off once the ARM code has had a chance to
sync up. This also enables MSTP gating on CPUs like 7786 which had never
wired it up before. Impacted CPUs are primarily all SH-Mobiles, SH7785,
and SH7786.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
pmb_bolt_mapping() is undefined on 29-bit builds, so provide a stub.
This fixes up the NUMA build on platforms lacking PMB support.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Now that dev_name() can be used early, we no longer require a static
string. Kill off all of the superfluous timer names.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
early platform devices and the like may need to set up clock aliases,
which require an allocation at a time well before the slab allocators
are available. The clock framework comes up after bootmem, so using
bootmem as a fallback should be sufficient.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This rolls in the remainder of the clkdev API bits from the ARM tree.
This can more or less be used verbatim, so we just copy it over and nuke
our local version.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The uncached_start was being set up properly for 32-bit but managed to
break 29-bit in the process, fix it up.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Constify struct sysfs_ops.
This is part of the ops structure constification
effort started by Arjan van de Ven et al.
Benefits of this constification:
* prevents modification of data that is shared
(referenced) by many other structure instances
at runtime
* detects/prevents accidental (but not intentional)
modification attempts on archs that enforce
read-only kernel data at runtime
* potentially better optimized code as the compiler
can assume that the const data cannot be changed
* the compiler/linker move const data into .rodata
and therefore exclude them from false sharing
Signed-off-by: Emese Revfy <re.emese@gmail.com>
Acked-by: David Teigland <teigland@redhat.com>
Acked-by: Matt Domsch <Matt_Domsch@dell.com>
Acked-by: Maciej Sosnowski <maciej.sosnowski@intel.com>
Acked-by: Hans J. Koch <hjk@linutronix.de>
Acked-by: Pekka Enberg <penberg@cs.helsinki.fi>
Acked-by: Jens Axboe <jens.axboe@oracle.com>
Acked-by: Stephen Hemminger <shemminger@vyatta.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This patch converts the sh architecture to use the generic
read_persistent_clock and update_persistent_clock interfaces, reducing
the amount of arch specific code we have to maintain, and allowing for
further cleanups in the future.
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: John Stultz <johnstul@us.ibm.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
... so the "sh_debugfs_root" is already available. Previously it
wasn't and in result its path was "/sys/kernel/debug/pmb" instead of
"/sys/kernel/debug/sh/pmb".
Signed-off-by: Pawel Moll <pawel.moll@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
flush_cache_all() uses broadcast IPIs, so we can't wrap in to that when
IRQs are disabled. The local cache flush manages to do what we need here
anyways, so just switch to that.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Presently we run in to issues with the MMU resetting the CPU when
variable sized mappings are employed. This takes a slightly more
aggressive approach to keeping the TLB and cache state sane before
establishing the mappings in order to cut down on races observed on
SMP configurations.
At the same time, we bump the VMA range up to the 0xb000...0xc000 range,
as there still seems to be some undocumented behaviour in setting up
variable mappings in the 0xa000...0xb000 range, resulting in reset by the
TLB.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
In the case of NUMA emulation when in range PPNs are being used for
secondary nodes, we need to make sure that the PMB has a mapping for it
before setting up the pgdat. This prevents the MMU from resetting.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
When entries are being bolted unconditionally it's possible that the boot
loader has established mappings that are within range that we don't want
to clobber. Perform some basic validation to ensure that the new mapping
is out of range before allowing the entry setup to take place.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This moves the pmb_remap_caller() mapping logic out in to
pmb_bolt_mapping(), which enables us to establish fixed mappings in
places such as the NUMA code.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This plugs in an early_param for permitting transparent PMB-backed
ioremapping to be enabled/disabled. For the time being, we use a
default-disabled policy.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This implements a fairly significant overhaul of the dynamic PMB mapping
code. The primary change here is that the PMB gets its own VMA that
follows the uncached mapping and we attempt to be a bit more intelligent
with dynamic sizing, multi-entry mapping, and so forth.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch extends the .device_terminate_all() method of the shdma driver
to return number of bytes transfered in the current descriptor.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
DMA CHCR register layout is equal on sh7722 and sh7724, reuse definitions.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Separate SH DMA headers into ones, commonly used by both drivers, and ones,
specific to each of them. This will make the future development of the
dmaengine driver easier.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The shdma dmaengine driver currently uses numerous macros to support various
platforms, selected by ifdef's. Convert it to use platform device resources and
lists of channel descriptors to specify register locations, interrupt numbers
and other system-specific configuration variants. Unavoidably, we have to
simultaneously convert all shdma users to provide those resources.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Configure SIU port B pins and register the WM8978 audio codec.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch is required to use the SIU ASoC driver on sh7722 systems.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound-2.6: (252 commits)
ASoC: Check progress when reporting periods from i.MX FIQ handler
ASoC: Remove a unused variables from i.MX FIQ runtime data
ALSA: hda - Add/fix ALC269 FSC and Quanta models
ALSA: hda - Add ALC670 codec support
OMAP4: PMIC: Add support for twl6030 codec
ALSA: hda - remove unnecessary msleep on power state transitions
usb/gadget/{f_audio,gmidi}.c: follow recent changes in audio.h
ASoC: fsi: Modify over/under run error settlement
ASoC: OMAP4: Add McPDM platform driver
ASoC: OMAP4: Add support for McPDM
ASoC: OMAP: data_type and sync_mode configurable in audio dma
ALSA: hda - Add missing description in HD-Audio-Models.txt
ALSA: add support for Macbook Air 2,1 internal speaker
ALSA: usbaudio: consolidate header files
ALSA: usbmixer: bail out early when parsing audio class v2 descriptors
ALSA: usbaudio: implement basic set of class v2.0 parser
ALSA: usbaudio: introduce new types for audio class v2
ALSA: usbaudio: parse USB descriptors with structs
ALSA: hda - enable snoop for Intel Cougar Point
ALSA: hda - Remove identical definitions for macmini3 model
...
Since <linux/spinlock.h> already includes <linux/rwlock.h>, and the
latter file will warn about not having included the former file
anyway, there is no value in including rwlock.h explicitly.
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
arch/sh/boot/compressed/cache.c:8: WARNING: space prohibited between function name and open parenthesis '('
Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
arch/sh/lib/libgcc.h:21: ERROR: open brace '{' following union go on the same line
Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This follows the x86 change 84d7109267
("hw-breakpoints: Accept breakpoints on NULL address") and restores the
previous expected ptrace behaviour.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* 'tracing-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (28 commits)
ftrace: Add function names to dangling } in function graph tracer
tracing: Simplify memory recycle of trace_define_field
tracing: Remove unnecessary variable in print_graph_return
tracing: Fix typo of info text in trace_kprobe.c
tracing: Fix typo in prof_sysexit_enable()
tracing: Remove CONFIG_TRACE_POWER from kernel config
tracing: Fix ftrace_event_call alignment for use with gcc 4.5
ftrace: Remove memory barriers from NMI code when not needed
tracing/kprobes: Add short documentation for HAVE_REGS_AND_STACK_ACCESS_API
s390: Add pt_regs register and stack access API
tracing/kprobes: Make Kconfig dependencies generic
tracing: Unify arch_syscall_addr() implementations
tracing: Add notrace to TRACE_EVENT implementation functions
ftrace: Allow to remove a single function from function graph filter
tracing: Add correct/incorrect to sort keys for branch annotation output
tracing: Simplify test for function_graph tracing start point
tracing: Drop the tr check from the graph tracing path
tracing: Add stack dump to trace_printk if stacktrace option is set
tracing: Use appropriate perl constructs in recordmcount.pl
tracing: optimize recordmcount.pl for offsets-handling
...
* 'v4l_for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-2.6: (362 commits)
V4L-DVB: cx88-dvb: remove extra attribution for core
V4L/DVB: v4l: soc_camera: fix bound checking of mbus_fmt[] index
V4L/DVB: Add support for SMT7020 to cx88
V4L/DVB: radio-si470x: Use UTF-8 encoding on a comment
V4L/DVB: MAINTAINERS: Telegent tlg2300 section fix
V4L/DVB: gspca_stv06xx: Add support for camera button
V4L/DVB: gspca_ov519: add support for the button on ov511 based cams
V4L/DVB: gspca_ov519: Add support for the button on ov518 based cams
V4L/DVB: gspca_ov519: add support for the button on ov519 based cams
V4L/DVB: gspca_main: Fix a compile error when CONFIG_INPUT is not set
V4L/DVB: gspca_main: some input error handling fixes
V4L/DVB: gspca_main: Allow use of input device creation code for non int. inputs
V4L/DVB: gspca_pac7302: much improved exposure control
V4L/DVB: gspca_sonixb: Make sonixb driver handle pas106 and pas202 cameras
V4L/DVB: gspca_sonixb: pas106: fixup bright ctrl and add gain and exposure ctrls
V4L/DVB: Documentation: gspca.txt: update known mr97310a cams
V4L/DVB: gspca_mr97310a: add support for the Sakar 1638x CyberPix
V4L/DVB: gscpa_sonixb: limit ov7630 max framerate at 640x480
V4L/DVB: gspca_sonixb: pas202: fixup brightness ctrl and add gain and exposure ctrls
V4L/DVB: gscpa_sonixb: Differentiate between sensors with a coarse and fine expo ctrl
...
* git://git.kernel.org/pub/scm/linux/kernel/git/jejb/xfs-vipt:
xfs: fix xfs to work with Virtually Indexed architectures
sh: add mm API for DMA to vmalloc/vmap areas
arm: add mm API for DMA to vmalloc/vmap areas
parisc: add mm API for DMA to vmalloc/vmap areas
mm: add coherence API for DMA to vmalloc/vmap areas
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (187 commits)
sh: remove dead LED code for migo-r and ms7724se
sh: ecovec build fix for CONFIG_I2C=n
sh: ecovec r-standby support
sh: ms7724se r-standby support
sh: SH-Mobile R-standby register save/restore
clocksource: Fix up a registration/IRQ race in the sh drivers.
sh: ms7724: modify scan_timing for KEYSC
sh: ms7724: Add sh_sir support
sh: mach-ecovec24: Add sh_sir support
sh: wire up SET/GET_UNALIGN_CTL.
sh: allow alignment fault mode to be configured at kernel boot.
sh: sh7724: Update FSI/SPU2 clock
sh: always enable sh7724 vpu_clk and set to 166MHz on Ecovec
sh: add sh7724 kick callback to clk_div4_table
sh: introduce struct clk_div4_table
sh: clock-cpg div4 set_rate() shift fix
sh: Turn on speculative return for SH7785 and SH7786
sh: Merge legacy and dynamic PMB modes.
sh: Use uncached I/O helpers in PMB setup.
sh: Provide uncached I/O helpers.
...
This patch removes "buswidth" struct member, and sets the default buswidth
to the natively supported 10 bit. You can select 8 bit buswidth by new flag.
This patch also modify ap325rxa/migor setup.c
Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com>
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
CONFIG_PM is always set on SH-Mobile these days so
get rid of the unused LED setup code.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Allow building the ecovec board support code
even though I2C support is disabled.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch adds board specific r-standby resume code
for ecovec.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch adds board specific r-standby resume code
for ms7724se.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Add code to save/restore registers during
R-standby sleep on SH-Mobile processors.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
KEYSC::SCN register of SH7724 is 3bit.
Thus, scan_timing should be 0 - 7 here.
Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This hooks up the SET/GET_UNALIGN_CTL knobs cribbing the bulk of it from
the PPC and ia64 implementations. The thread flags happen to be the
logical inverse of what the global fault mode is set to, so this works
out pretty cleanly. By default the global fault mode is used, with tasks
now being able to override their own settings via prctl().
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Now that we return the new resource start position, there is no
need to update "struct resource" inside the align function.
Therefore, mark the struct resource as const.
Cc: Bjorn Helgaas <bjorn.helgaas@hp.com>
Cc: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
As suggested by Linus, align functions should return the start
of a resource, not void. An update of "res->start" is no longer
necessary.
Cc: Bjorn Helgaas <bjorn.helgaas@hp.com>
Cc: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
When FSI and Network (= NFS file system) were used at the same time,
the I/O of FSI was unstable. This patch updates the SPU2 clock (which
is used for FSI) to solve this issue. Special thanks to Jeremy.
Signed-off-by: Jeremy Baker <Jeremy.Baker@renesas.com>
Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Update the sh7724 processor code to always enable vpu_clk.
On the Ecovec board, set the vpu_clk to 166 Mhz.
The 166MHz setting results in a divide-by-6 setup for
vpu_clk and improves the VPU performance compared to the
power-on-reset/bootloader configuration.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch adds a ->kick() callback to clk_div4_table
and ties it into sh_clk_div4_set_rate(). A sh7724
specific kick function is also added that updates the
KICK bit whenever div4 clocks in FRQCRA and FRQCRB
have been set. Allows us to set the VPU clock.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch introduces struct clk_div4_table. The structure
will be used to keep div4 specific data, and is with this
patch replacing the struct clk_div_mult_table pointer arg
used by the sh_clk_div4_register() functions.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Make sure the div4 bitfield is shifted according
to the enable_bit value in sh_clk_div4_set_rate().
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
On VIVT ARM, when we have multiple shared mappings of the same file
in the same MM, we need to ensure that we have coherency across all
copies. We do this via make_coherent() by making the pages
uncacheable.
This used to work fine, until we allowed highmem with highpte - we
now have a page table which is mapped as required, and is not available
for modification via update_mmu_cache().
Ralf Beache suggested getting rid of the PTE value passed to
update_mmu_cache():
On MIPS update_mmu_cache() calls __update_tlb() which walks pagetables
to construct a pointer to the pte again. Passing a pte_t * is much
more elegant. Maybe we might even replace the pte argument with the
pte_t?
Ben Herrenschmidt would also like the pte pointer for PowerPC:
Passing the ptep in there is exactly what I want. I want that
-instead- of the PTE value, because I have issue on some ppc cases,
for I$/D$ coherency, where set_pte_at() may decide to mask out the
_PAGE_EXEC.
So, pass in the mapped page table pointer into update_mmu_cache(), and
remove the PTE value, updating all implementations and call sites to
suit.
Includes a fix from Stephen Rothwell:
sparc: fix fallout from update_mmu_cache API change
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This implements a bit of rework for the PMB code, which permits us to
kill off the legacy PMB mode completely. Rather than trusting the boot
loader to do the right thing, we do a quick verification of the PMB
contents to determine whether to have the kernel setup the initial
mappings or whether it needs to mangle them later on instead.
If we're booting from legacy mappings, the kernel will now take control
of them and make them match the kernel's initial mapping configuration.
This is accomplished by breaking the initialization phase out in to
multiple steps: synchronization, merging, and resizing. With the recent
rework, the synchronization code establishes page links for compound
mappings already, so we build on top of this for promoting mappings and
reclaiming unused slots.
At the same time, the changes introduced for the uncached helpers also
permit us to dynamically resize the uncached mapping without any
particular headaches. The smallest page size is more than sufficient for
mapping all of kernel text, and as we're careful not to jump to any far
off locations in the setup code the mapping can safely be resized
regardless of whether we are executing from it or not.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The PMB code is an example of something that spends an absurd amount of
time running uncached when only a couple of operations really need to be.
This switches over to the shiny new uncached helpers, permitting us to
spend far more time running cached.
Additionally, MMUCR twiddling is perfectly safe from cached space given
that it's paired with a control register barrier, so fix that up, too.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
There are lots of registers that can only be updated from the uncached
mapping, so we add some helpers for those cases in order to make it
easier to ensure that we only make the jump when it's absolutely
necessary.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This implements some locking for the PMB code. A high level rwlock is
added for dealing with rw accesses on the entry map while a per-entry
data structure spinlock is added to deal with the PMB entry changing out
from underneath us.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Most implementations of arch_syscall_addr() are the same, so create a
default version in common code and move the one piece that differs (the
syscall table) to asm/syscall.h. New arch ports don't have to waste
time copying & pasting this simple function.
The s390/sparc versions need to be different, so document why.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: David S. Miller <davem@davemloft.net>
Acked-by: Paul Mundt <lethal@linux-sh.org>
Acked-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
LKML-Reference: <1264498803-17278-1-git-send-email-vapier@gentoo.org>
Signed-off-by: Frederic Weisbecker <fweisbec@gmail.com>
Write-through PMB mappings still require the cache bit to be set, even if
they're to be flagged with a different cache policy and bufferability
bit. To reduce some of the confusion surrounding the flag encoding we
centralize the cache mask based on the system cache policy while we're at
it.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This plugs in entry sizing support for existing mappings and then builds
on top of that for linking together entries that are mapping contiguous
areas. This will ultimately permit us to coalesce mappings and promote
head pages while reclaiming PMB slots for dynamic remapping.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This adds some helper routines for uncached mapping support. This
simplifies some of the cases where we need to check the uncached mapping
boundaries in addition to giving us a centralized location for building
more complex manipulation on top of.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Some overdue cleanup of the PMB code, killing off unused functionality
and duplication sprinkled about the tree.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Both the store queue API and the PMB remapping take unsigned long for
their pgprot flags, which cuts off the extended protection bits. In the
case of the PMB this isn't really a problem since the cache attribute
bits that we care about are all in the lower 32-bits, but we do it just
to be safe. The store queue remapping on the other hand depends on the
extended prot bits for enabling userspace access to the mappings.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Update the sh7723 INTC tables with force_enable support
to mask out pending unsupported SDHI interrupt sources.
Without this patch the kernel locks up due to a pending
SDHI interrupt that the tmio_mmc driver cannot handle.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Update the sh7722 INTC tables with force_enable support
to mask out pending unsupported SDHI interrupt sources.
Without this patch the kernel locks up due to a pending
SDHI interrupt that the tmio_mmc driver cannot handle.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
vmemmap and the vmsplit code amongst others need to be able to take page
faults much earlier than trap_init() time, so move this in to the early
CPU initialization. VBR setup for secondary CPUs is already handled
through start_secondary(), so we only need to do this for the boot CPU.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The __va()/__pa() offsets and the boot memory offsets are consistent for
all PMB users, so there is no need to special case these for legacy PMB.
Kill the special casing off and depend on CONFIG_PMB across the board.
This also fixes up yet another addressing bug for sh64.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This merges the code for iterating over the legacy PMB mappings and the
code for synchronizing software state with the hardware mappings. There's
really no reason to do the same iteration twice, and this also buys us
the legacy entry logging facility for the dynamic PMB case.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The PMB initialization code walks the entries and synchronizes the
software PMB state with the hardware mappings, preserving the slot index.
Unfortunately pmb_alloc() only tested the bit position in the entry map
and failed to set it, resulting in subsequent remaps being able to be
dynamically assigned a slot that trampled an existing boot mapping with
general badness ensuing.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Update the sh7724 INTC tables with force_enable support
to mask out pending unsupported SDHI interrupt sources.
Without this patch the kernel locks up due to a pending
SDHI interrupt that the tmio_mmc driver cannot handle.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This follows the parisc change to ensure that tracehook_signal_handler()
is aware of when we are single-stepping in order to ptrace_notify()
appropriately. While this was implemented for 32-bit SH, sh64 neglected
to make use of TIF_SINGLESTEP when it was folded in with the 32-bit code,
resulting in ptrace_notify() never being called.
As sh64 uses all of the other abstractions already, this simply plugs in
the thread flag in the appropriate enable/disable paths and fixes up the
tracehook notification accordingly. With this in place, sh64 is brought
in line with what 32-bit is already doing.
Reported-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The linker script offsets were broken by the recent 29/32-bit
integration, so this fixes it up for sh64.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This splits out the uncached mapping support under its own config option,
presently only used by 29-bit mode and 32-bit + PMB. This will make it
possible to optionally add an uncached mapping on sh64 as well as booting
without an uncached mapping for 32-bit.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This reworks some of the SH7786 PCIe initialization code to dynamically
setup and size the various resource windows, as opposed to the original
code that simply wired in a couple of them statically.
At the same time, we tidy up the initialization code a bit, kill off some
read-only register twiddling that was gleaned from the bus analyzer, and
also propagate the physical slot/channel mapping.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Break out sh7723 div4 clocks for SIU and IRDA as
reparent / enable clocks. Similar to the SIU clock
patch for sh7722 by Guennadi.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Merge the SDHI vectors in the sh7724 INTC table
and update the SDHI platform data for Ecovec24,
KFR2R09 and MS7724SE.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Merge the SDHI vectors in the sh7723 INTC table
and update the SDHI platform data for AP325.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Merge the SDHI vectors in the sh7722 INTC table
and update the SDHI platform data for Migo-R.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This adds in some of the missing memory resources for channels 1/2 and
gets the code building again for the recent changes.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Now that the DWARF unwinder is being used to provide perf callstacks
unwinding speed is an issue. It is no longer being used in exceptional
circumstances where we don't care about runtime performance, e.g. when
panicing, so it makes sense improve performance is possible.
With this patch I saw a 42% improvement in unwind time when calling
return_address(1). Greater improvements will be seen as the number of
levels unwound increases as each unwind is now cheaper.
Note that insertion time has doubled but that's just the price we pay
for keeping the trees balanced. However, this is a one-time cost for
kernel boot/module load and so the improvements in lookup time dominate
the extra time we spend keeping the trees balanced.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
There's no need to setup the frame pointer again in
call_handle_tlbmiss. The frame pointer will already have been setup in
handle_interrupt.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Unfortunately, due to poor DWARF info in current toolchains, unwinding
through interrutps cannot be done reliably. The problem is that the
DWARF info for function epilogues is wrong.
Take this standard epilogue sequence,
80003cc4: e3 6f mov r14,r15
80003cc6: 26 4f lds.l @r15+,pr
80003cc8: f6 6e mov.l @r15+,r14
<---- interrupt here
80003cca: f6 6b mov.l @r15+,r11
80003ccc: f6 6a mov.l @r15+,r10
80003cce: f6 69 mov.l @r15+,r9
80003cd0: 0b 00 rts
If we take an interrupt at the highlighted point, the DWARF info will
bogusly claim that the return address can be found at some offset from
the frame pointer, even though the frame pointer was just restored. The
worst part is if the unwinder finds a text address at the bogus stack
address - unwinding will continue, for a bit, until it finally comes
across an unexpected address on the stack and blows up.
The only solution is to stop unwinding once we've calculated the
function that was executing when the interrupt occurred. This PC can be
easily calculated from pt_regs->pc.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
In order to allow the DWARF unwinder to unwind through exceptions we
need to setup the frame pointer register (r14).
Signed-off-by: Matt Fleming <matt@console-pimps.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The address that ret_from_exception and ret_from_irq will return to is
found in the stack slot for SPC, not PR. This error was causing the
DWARF unwinder to pick up the wrong return address on the stack and then
unwind using the unwind tables for the wrong function.
While I'm here I might as well add CFI annotations for the other
registers since they could be useful when unwinding.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Tested to work with a SIU ASoC driver on sh7722 (migor).
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Acked-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Both the original arch/sh/drivers/dma/dma-sh.c and the new SH dmaengine drivers
do not take into account bits 3:2 of the Transfer Size field in the CHCR
register, besides, bit-field defines set bit 2, but the mask only passes bits
1:0 through. TS_16BLK and TS_32BLK macros are bogus too. This patch fixes all
these issues for sh7722 and sh7724, other CPUs stay unchanged and might need to
be fixed too.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Acked-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
With the sparseirq conversion there was a stray irq_desc reference left
over, this tidies it up and brings the demuxer in line with what the
solution engine boards are doing.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This adds support for handling early PERR/SERR triggering in between
controller registration and the initial bus scan. Buggy cards end up
asserting these as soon as the M66EN scan is undertaken, resulting in
an early crash.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
IRQ autoprobing hasn't actually worked for us at all since very early in
2.6, but no one seems to have noticed given that none of the drivers
that use it see much testing.
yenta_socket is the odd one out, and that depends on PCI IRQs which are
fixed on all SH platforms anyways. Consequently, turning off autoprobing
fixes up crashes triggered by yenta_socket and at least gets it working
again on r7785rp.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
highlander and r2d are the only remaining ones that were blocking
sparseirq being turned on by default, but it turns out that they already
work fine with it by virtue of register_intc_controller(). As such, we
can kill off the dependencies and turn it on by default.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This uses the new create_irq_nr() to build up the FPGA's desired virtual
IRQ mapping and permits us to finally flip on sparseirq for this board.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This improves power management for the SIUA controller on sh7722. Similar
patches might be desired for other SIU-enabled SH platforms.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The SH7780 PCI controller supports 3 different ranges of PCI memory in
addition to its PCI I/O window. In the case of 29-bit mode, only 2 memory
windows are supported, while in 32-bit mode all 3 are visible. This
attempts to make the resource handling completely dynamic and to permit
platforms to map in as many apertures as they can handle.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
These were never handled before, so implement some common infrastructure
to support them, then make use of that in the SH7780-specific code. In
practice there is little here that can not be generalized for SH4 parts,
which will be an incremental change as the 7780/7751 code is gradually
unified.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
register_pci_controller() can fail, but presently is a void function.
Change this over to an int so that we can bail early before continuing on
with post-registration initialization (such as throwing the controller in
to 66MHz mode in the case of the SH7780 host controller).
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This adds some helper glue for scanning the bus and determining if all
of the devices are 66MHz capable or not before flipping on 66MHz mode.
This isn't quite to spec, but it's fairly consistent with what other
embedded controllers end up having to do.
Scanning code cribbed from the MIPS txx9 PCI code.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
For systems that have more than 512MB we need to set up an additional
mapping, this fixes up the rounding to the next power of two and splits
out the mapping accordingly between the two local bus mapping windows.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Presently headers_check complains about linux/kdebug.h being unexported,
so just bump the __KERNEL__ ifdef up, as per the x86 change.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The irq_desc needs to be accessed with irq_to_desc(), this fixes up a
build error with irq_desc being undefined.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The host controllers only support type 1, so there's not much else to
test for. Some of the older controllers also supported type 2 accesses,
but we've never supported those, and likely never will. Beyond that, the
P1SEG test is meaningless for 32-bit mode, so rather than refactoring it,
just kill the type 1 test off completely.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
'flush_old_exec()' is the point of no return when doing an execve(), and
it is pretty badly misnamed. It doesn't just flush the old executable
environment, it also starts up the new one.
Which is very inconvenient for things like setting up the new
personality, because we want the new personality to affect the starting
of the new environment, but at the same time we do _not_ want the new
personality to take effect if flushing the old one fails.
As a result, the x86-64 '32-bit' personality is actually done using this
insane "I'm going to change the ABI, but I haven't done it yet" bit
(TIF_ABI_PENDING), with SET_PERSONALITY() not actually setting the
personality, but just the "pending" bit, so that "flush_thread()" can do
the actual personality magic.
This patch in no way changes any of that insanity, but it does split the
'flush_old_exec()' function up into a preparatory part that can fail
(still called flush_old_exec()), and a new part that will actually set
up the new exec environment (setup_new_exec()). All callers are changed
to trivially comply with the new world order.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Cc: stable@kernel.org
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Newer SH parts are now commonly shipping with multiple controllers, so
we wire up PCI domain support to deal with them. Shamelessly cloned from
the MIPS implementation.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Presently we just call in to request_resource() for the ioport and iomem
resources without checking for errors. This has already hidden a couple
of bugs, so add some error handling in for good measure.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This consolidates the PCI initialization code for all of the pci-sh7780
users, and sets up the memory window dynamically as opposed to using
hardcoded window positions.
A number of bugs were fixed at the same time, including the PIO handling
and master abort timeout settings being incorrect.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This kills off the deprected fixed memory range accessors for
the cases of non-translatable ioremapping.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
When running perf across all cpus with backtracing (-a -g), sometimes we
get samples without associated backtraces:
23.44% init [kernel] [k] restore
11.46% init eeba0c [k] 0x00000000eeba0c
6.77% swapper [kernel] [k] .perf_ctx_adjust_freq
5.73% init [kernel] [k] .__trace_hcall_entry
4.69% perf libc-2.9.so [.] 0x0000000006bb8c
|
|--11.11%-- 0xfffa941bbbc
It turns out the backtrace code has a check for the idle task and the IP
sampling does not. This creates problems when profiling an interrupt
heavy workload (in my case 10Gbit ethernet) since we get no backtraces
for interrupts received while idle (ie most of the workload).
Right now x86 and sh check that current is not NULL, which should never
happen so remove that too.
Idle task's exclusion must be performed from the core code, on top
of perf_event_attr:exclude_idle.
Signed-off-by: Anton Blanchard <anton@samba.org>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mundt <lethal@linux-sh.org>
LKML-Reference: <20100118054707.GT12666@kryten>
Signed-off-by: Frederic Weisbecker <fweisbec@gmail.com>
The VBR value needs to be initialized in order for any of the bios
trapping to work, and as we don't do that until slightly later in the
boot process, this has no real chance of working.
The only reason for using this in the past was due to the fact that early
serial initialization wasn't possible, but now that early sh-sci is
supported by everyone, there's no longer any reason to support the
sh_bios hacks in the first place. Given that, we just kill off the
references completely.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
IRQs are re-enabled at a later stage when doing the unmapping on R2D via
the sm501 USB coherent DMA, resulting in the irqs_disabled() check
producing considerable noise for this configuration. Just kill off the
check, which was blindly copied from x86 anyways.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Nothing is using this, kill it off. Fixing up access sizes can be done
with trapped I/O for anyone wanting to make use of this for devices that
need it, everything else is already pure MMIO.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch fixes a bug within the cmpxchg GRB version.
A problem was notices while running some tests to stress
the priority inheritance, for example pi_stress
(http://rt.wiki.kernel.org/index.php/PI_Mutex_Test).
Also, without this patch, after applying the latest work to
consolidate atomic_cmpxchg() definitions (commit:
8c0b8139c8)
the Kernel doesn't boot at all.
Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Presently trapped I/O is only registered if it's not explicitly disabled
for the platforms that select it openly. From the fault path this runs
through an address lookup before figuring out that nothing matches and
falls back through the error path, but we can forego the lookup
completely by testing if it's been explicitly disabled. This provides a
measurable speedup for things like qemu that rely on runtime disabling.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
These routines are unsuitable for cross-platform use and no new code
should be using them, flag them as deprecated in order to give drivers
sufficient time to migrate over.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The old ctrl in/out routines are non-portable and unsuitable for
cross-platform use. While drivers/sh has already been sanitized, there
is still quite a lot of code that is not. This converts the arch/sh/ bits
over, which permits us to flag the routines as deprecated whilst still
building with -Werror for the architecture code, and to ensure that
future users are not added.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Several SuperH platforms, including sh7722, sh7343, sh7354, sh7367 include
a Sound Interface Unit (SIU). This patch adds DAI and platform / DMA
drivers for this interface.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Presently the IOREMAP_FIXED fixmaps are always defined, even if the
platform isn't capable of supporting it. Since we already have an ifdef
for it, ifdef the entries, too.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Now that cached_to_uncached works as advertized in 32-bit mode and we're
never going to be able to map < 16MB anyways, there's no need for the
special uncached section. Kill it off.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This provides a variable for tracking the uncached mapping size, and uses
it for pretty printing the uncached lowmem range. Beyond this, we'll also
be building on top of this for figuring out from where the remainder of
P2 becomes usable when constructing unrelated mappings.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This effectively neutralizes P2 by getting rid of P1 identity mapping
for all available memory and instead only establishes a single unbuffered
PMB entry (16MB -- the smallest available) that covers the kernel.
As using segmentation for abusing caching attributes in drivers is no
longer supported (and there are no drivers that can be enabled in 32-bit
mode that do this), this provides us with all of the uncached access
needs by the kernel itself.
Drivers and their ilk need to specify their caching attributes when
remapping through page tables, as usual.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
All of the cached/uncached mapping setup is duplicated for each size, and
also misses out on the 16MB case. Rather than duplicating the same iter
code for that we just consolidate it in to a helper macro that builds an
iter for each size. The 16MB case is then trivially bolted on at the end.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This cribs the pretty printing from arch/x86/mm/init_32.c to dump the
virtual memory layout on boot. This is primarily intended as a debugging
aid, given that the newer CPUs have full control over their address space
and as such have little to nothing in common with the legacy layout.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This implements dynamic probing for the system FPGA. The system reset
controller contains a fixed magic read word in order to identify the
FPGA. This just utilizes a simple loop that scans across all of the fixed
physical areas (area 0 through area 6) to locate the FPGA.
The FPGA also contains register information detailing the area mappings
and chip select settings for all of the other blocks, so this needs to be
done before we can set up anything else.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
iounmap_fixed() had a couple of bugs in it that caused it to effectively
fail at life. The total number of pages to unmap factored in the mapping
offset and aligned up to the next page boundary, which doesn't match the
ioremap_fixed() behaviour.
When ioremap_fixed() pegs a slot, the address in the mapping data already
contains the offset displacement, and the size is recorded verbatim given
that we're only interested in total number of pages required. As such, we
need to calculate the total number from the original size in the unmap
path as well.
At the same time, there was also an off-by-1 problem in the fixmap index
calculation which has also been corrected.
Previously subsequent remaps of an identical fixmap index would trigger
the pte_ERROR() in set_pte_phys():
arch/sh/mm/init.c:77: bad pte 8053ffb0(0000781003fff506).
arch/sh/mm/init.c:77: bad pte 8053ffb0(0000781003fff506).
arch/sh/mm/init.c:77: bad pte 8053ffb0(0000781003fff506).
arch/sh/mm/init.c:77: bad pte 8053ffb0(0000781003fff506).
arch/sh/mm/init.c:77: bad pte 8053ffb0(0000781003fff506).
arch/sh/mm/init.c:77: bad pte 8053ffb0(0000781003fff506).
With this patch in place, the iounmap-driven fixmap teardown actually
does what it's supposed to do.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This provides a machine_ops-based reboot interface loosely cloned from
x86, and converts the native sh32 and sh64 cases over to it.
Necessary both for tying in SMP support and also enabling platforms like
SDK7786 to add support for their microcontroller-based power managers.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Presently __in_29bit_mode() is only defined for the PMB case, but
it's also easily derived from the CONFIG_29BIT and CONFIG_32BIT &&
CONFIG_PMB=n cases.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This moves out the FPGA IRQ controller setup code to its own file, in
preparation for switching off of IRL mode and having it provide its own
irq_chip.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This does a bit of refactoring of the FPGA management code. The primary
FPGA initialization is moved out to its own file in preparation for
implementing some of the more complex capabilities, a complete set of
register definitions is provided, and all of the existing users in the
board code are moved over to use the new interface instead of setting up
overlapping mappings. This also corrects the FPGA size, which previously
was chomped off at the SDIF control register.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Usually we can look to the CVR to work out whether we have an FPU or not.
Unfortunately not all parts comply with this, so just set the flag
manually for all SH-4 parts and clear it on the only SH-4 that doesn't
have one (SH4-501).
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Implement .set_rate() for all SH "div4 clocks," .enable(), .disable(), and
.set_parent() for those, that support them. This allows, among other uses,
reparenting of SIU clocks to the external source, and enabling and
disabling of the IrDA clock on sh7722.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This uses the mode pins exposed through the FPGA to work out whether
we're driven from EXTAL or not and does the appropriate setup and
propagation through the clock framework.
This will also -EINVAL out for anyone adding in their own oscillators,
forcing proper configuration with the clock framework instead of
proceeding on with bogus clock values.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This rewrites the SH7786 clock framework support completely. It's
reworked to provide all of the DIV4 and MSTP function clocks. This brings
it in line with the current clock framework code and lets us drop SH7786
from the list of CPUs that require legacy CPG handling.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
sh64 on the other hand provides both direct broken out syscalls as well
as socketcall access. As there are binaries that use both socketcall has
to stay around. The current ABI prefers direct syscalls.
It was pointed out that when sys_recvmmsg was added in, sys_accept4 was
overlooked. This takes care of wiring it up.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
sh32 at the moment only uses sys_socketcall to reach these, so unwire
recvmmsg for now. While we're at it, add it to the ignore list, as per
the s390 change.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Presently the build bails with the following:
CC arch/sh/mm/alignment.o
cc1: warnings being treated as errors
arch/sh/mm/alignment.c: In function 'unaligned_fixups_notify':
arch/sh/mm/alignment.c:69: warning: cast to pointer from integer of different size
arch/sh/mm/alignment.c:74: warning: cast to pointer from integer of different size
make[2]: *** [arch/sh/mm/alignment.o] Error 1
This is due to the fact that regs->pc is always 64-bit, while the pointer size
depends on the ABI. Wrapping through instruction_pointer() takes care of the
appropriate casting for both configurations.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This updates the sh64 processor info with the sh32 changes in order to
tie in to the generic task_xstate management code.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The plans for _PAGE_WIRED were detailed in a comment with the fixmap
code, but as it's now all taken care of, we no longer have any reason for
keeping it around, particularly since it's no longer accurate. Kill it
off.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Presently this is duplicated between tlb-sh4 and tlb-pteaex. Split the
helpers out in to a generic tlb-urb that can be used by any parts
equipped with MMUCR.URB.
At the same time, move the SH-5 code out-of-line, as we require single
global state for DTLB entry wiring.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This provides a dummy value for legacy parts which permits the entry
wiring to be open-coded. The compiler takes care of optimizing the entry
wiring away in these cases.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Presently ioremap_prot() uses an unsigned long to pass the pgprot value
around. This results in the upper half of the pgprot being chomped when
using 64-bit pgprots on a 32-bit ABI (X2TLB and SH-5).
As the only users of ioremap_prot() are presently legacy parts, this
doesn't cause too much of an issue. In the future when the interface is
converted to use pgprot_t directly this can be re-enabled for the other
parts, too.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This is already taken care of in the top-level ioremap, and now that
no one should be calling ioremap_fixed() directly we can simply throw the
mapping displacement in as an additional argument.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Presently 'flags' gets passed around a lot between the various ioremap
helpers and implementations, which is only 32-bits. In the X2TLB case
we use 64-bit pgprots which presently results in the upper 32bits being
chopped off (which handily include our read/write/exec permissions).
As such, we convert everything internally to using pgprot_t directly and
simply convert over with pgprot_val() where needed. With this in place,
transparent fixmap utilization for early ioremap works as expected.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The mem_init_done test makes sure that this path is only entered in
__init cases, so leaving ioremap_fixed() as __init and flagging the
caller __init_refok is sufficient.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
iounmap() should balance whatever is done by ioremap(). Presently
ioremap() can do any of fixed mappings, PMB mappings, or page table
mappings. Presently only the latter two are handled through the standard
unmap path, so tie in the fixed unmapping, too.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This converts iounmap_fixed() to return success/error if it handled the
unmap request or not. At the same time, drop the __init label, as this
can be called in to later.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
There is nothing of interest in the _64 version anymore, so the _32 one
can be renamed and used unconditionally.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Presently the fixed ioremap API is only defined when CONFIG_IOREMAP_FIXED
is set. As we want to call in to it unconditionally, provide a stubbed
out interface.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This adds in a mem_init_done to work out when a standard ioremap() is
possible, falling back to the fixmap based ioremap otherwise.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This converts the cpu_relax() to a udelay(1), which fixes up issues with
the EEPROM polling occasionally timing out.
Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This tosses in a local_irq_enable()/disable() pair around the init_fpu()
callsite in the FPU state restore exception handler. Fixes up a slab BUG
triggered by making a slab cache allocation that can sleep whilst
irqs_disabled(). This follows the behaviour undertaken by the x86
implementation.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
More and more boards are going to start shipping that boot with the MMU
in 32BIT mode by default. Previously we relied on the bootloader to
setup PMB mappings for use by the kernel but we also need to cater for
boards whose bootloaders don't set them up.
If CONFIG_PMB_LEGACY is not enabled we have full control over our PMB
mappings and can compress our address space. Usually, the distance
between the the cached and uncached mappings of RAM is always 512MB,
however we can compress the distance to be the amount of RAM on the
board.
pmb_init() now becomes much simpler. It no longer has to calculate any
mappings, it just has to synchronise the software PMB table with the
hardware.
Tested on SDK7786 and SH7785LCR.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This tidies up the iounmap path with consolidated checks for
nontranslatable mappings. This is in preparation of unifying
the implementations.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Use the fixmap-based memory mapping implementation for SH-5's ioremap()
functions and delete the old static allocator that was borrowed from
sparc.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
We need to write to the DRAM config register very early and at such an
early stage ioremap() is not available. So use ioremap_fixed() to map
the register.
The reason that we are avoiding using the legacy P2 mapping is that
there will come a day when the legacy P2 mappings no longer exist.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
Some devices need to be ioremap'd and accessed very early in the boot
process. It is not possible to use the standard ioremap() function in
this case because that requires kmalloc()'ing some virtual address space
and kmalloc() may not be available so early in boot.
This patch provides fixmap mappings that allow physical address ranges
to be remapped into the kernel address space during the early boot
stages.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
Generalise the code for setting and clearing pte's and allow TLB entries
to be pinned and unpinned if the _PAGE_WIRED flag is present.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
We need some more page flags to hook up _PAGE_WIRED (and eventually
other things). So use the unused PTE bits above the PPN field as no
implementations use these for anything currently.
Now that we have _PAGE_WIRED let's provide the SH-5 functions for wiring
up TLB entries.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
Provide a new extended page flag, _PAGE_WIRED and an SH4 implementation
for wiring TLB entries and use it in the fixmap code path so that we can
wire the fixmap TLB entry.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
Previously this was only built in for Urquell boards, but the same
approach can be used on SDK7786 now that the mode pin reading is
supported, so make it generic to SH7786.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This wires up the mode pins support on the SDK7786. The pins are
standard SH7786 pins, and all are fixed in software. Needed for the
clock framework, PCIe, and so forth.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Presently the secondary CPU entry point is only aimed at 29bit phys mode,
causing it to point to a stray virtual address in 32bit mode. Fix it up
after consulting with our shiny new __in_29bit_mode().
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
flush_cache_all() gets called in to when we do some early ioremapping.
Unfortunately on SDK7786 the interrupt controller itself requires
ioremapping, leading to a bit of a chicken and egg scenario. For now,
don't bother with IPI crosscalls if there aren't any other CPUs online.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This updates the existing boards that specify the register width through
platform data to use the resource flags instead. This eliminates platform
data completely in most cases, and permits further improvement in the
heartbeat driver as well as shrinking the overall private data size.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This permits the resource access size to be handed off through the
resource flags, which saves platforms from having to establish
platform data only to specify the register width.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch adds support for the lis3lv02d motion sensor connected via
i2c on the Ecovec board. Tested with evtest.
Signed-off-by: NISHIMOTO Hiroki <nishimoto.hiroki@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The last commit introduced the following breakage
arch/sh/include/asm/mmu.h: In function 'pmb_remap':
arch/sh/include/asm/mmu.h:79: error: expected ';' before '}' token
and...
arch/sh/include/asm/mmu.h:78: error: 'EINVAL' undeclared (first use in this function)
arch/sh/include/asm/mmu.h:78: error: (Each undeclared identifier is reported only once
arch/sh/include/asm/mmu.h:78: error: for each function it appears in.)
arch/sh/include/asm/mmu.h: In function 'pmb_init':
arch/sh/include/asm/mmu.h:87: error: 'ENODEV' undeclared (first use in this function)
Signed-off-by: Matt Fleming <matt@console-pimps.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This stubs in some preliminary board support for the RTE SDK7786.
This is quite stunted at the moment, and primarily builds on top of the
system FPGA. FPGA IRQs are handled via CPU IRL masking for simplicity,
with initial peripheral support restricted to the debug ethernet.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Setting LC_CTYPE=C breaks localized messages in some setups. With only
LC_COLLATE=C and LC_NUMERIC=C, we get almost all we need, except for not
so defined character classes and tolower()/toupper(). The former is not
a big issue, because we can assume that e.g. [:alpha:] will always
include a-zA-Z and we only ever process ASCII input. The latter seems
only affect arch/sh/tools/gen-mach-types, which we can handle separately.
So after this patch the meaning of ranges like [a-z], the behavior of
sort and join, etc. should be the same everywhere and at the same time
gcc should be able to print localized waring and error messages.
LC_NUMERIC=C might not be necessary, but setting it doesn't hurt.
Reported-by: Simon Horman <horms@verge.net.au>
Reported-by: Sergei Trofimovich <slyfox@inbox.ru>
Acked-by: H. Peter Anvin <hpa@zytor.com>
Tested-by: Simon Horman <horms@verge.net.au>
Tested-by: Masami Hiramatsu <mhiramat@redhat.com>
Signed-off-by: Michal Marek <mmarek@suse.cz>
These were originally named _nopmd and _pmd to follow their asm-generic
counterparts, but we rename them to -2level and -3level for general
consistency.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
All SH-X2 and SH-X3 parts support an extended TLB mode, which has been
left as experimental since support was originally merged. Now that it's
had some time to stabilize and get some exposure to various platforms,
we can drop it as an option and default enable it across the board.
This is also good future proofing for newer parts that will drop support
for the legacy TLB mode completely.
This will also force 3-level page tables for all newer parts, which is
necessary both for the varying page sizes and larger memories.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This stubs out all of the PxSEGADDR() wrappers for non-legacy code.
29-bit will continue to work with these, while 32-bit code will now blow
up on compile rather than at runtime.
The vast majority of the in-tree offenders are gone, with the only
remaining culprits being unable to support 32-bit mode.
Hopefully this will prevent anyone from ever using these again.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This introduces some much overdue chainsawing of the fixed PMB support.
fixed PMB was introduced initially to work around the fact that dynamic
PMB mode was relatively broken, though they were never intended to
converge. The main areas where there are differences are whether the
system is booted in 29-bit mode or 32-bit mode, and whether legacy
mappings are to be preserved. Any system booting in true 32-bit mode will
not care about legacy mappings, so these are roughly decoupled.
Regardless of the entry point, PMB and 32BIT are directly related as far
as the kernel is concerned, so we also switch back to having one select
the other.
With legacy mappings iterated through and applied in the initialization
path it's now possible to finally merge the two implementations and
permit dynamic remapping overtop of remaining entries regardless of
whether boot mappings are crafted by hand or inherited from the boot
loader.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The mass produced cuts use an updated PVR value, add them to the list.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This makes vmlinux.bin generation an explicit make target, as opposed to
just a dependency for some of the other targets.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The legacy P2 area may not always be mapped (for example when using
PMB). So perform an icbi on an address that we know will always be
mapped.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This follows the x86 xstate changes and implements a task_xstate slab
cache that is dynamically sized to match one of hard FP/soft FP/FPU-less.
This also tidies up and consolidates some of the SH-2A/SH-4 FPU
fragmentation. Now fpu state restorers are commonly defined, with the
init_fpu()/fpu_init() mess reworked to follow the x86 convention.
The fpu_init() register initialization has been replaced by xstate setup
followed by writing out to hardware via the standard restore path.
As init_fpu() now performs a slab allocation a secondary lighterweight
restorer is also introduced for the context switch.
In the future the DSP state will be rolled in here, too.
More work remains for math emulation and the SH-5 FPU, which presently
uses its own special (UP-only) interfaces.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Presently this has a BUG_ON() for failure cases, as powerpc does. Switch
this over to a SLAB_PANIC instead.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Presently the thread_info allocators are special cased, depending on
THREAD_SHIFT < PAGE_SHIFT. This provides a sensible definition for them
regardless of configuration, in preparation for extended CPU state.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
start_thread() will become a bit heavier with the xstate freeing to be
added in, so move it out-of-line in preparation.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This adds some VBR sanity checks in the sh_bios code to ensure that the
BIOS VBR is in range before blindly trapping in to it. This permits
boards with varying boot loader configurations to always leave support
for sh-bios enabled and it will just be disabled at run-time if not
found.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This splits out the unaligned access counters and userspace bits in to
their own generic interface, which will allow them to be wired up on sh64
too.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Now that the sh-sci earlyprintk is taken care of by the sh-sci driver
directly, there's no longer any reason for having a split-out
early_printk framework. sh_bios is the only other thing that uses it, so
we just migrate the leftovers in to there. As it's possible to have
multiple early_param()'s for the same string, there's not much point in
having this split out anymore anyways, particularly since the sh_bios
dependencies are still special-cased within sh-sci itself.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This was conditionalized on CONFIG_EARLY_PRINTK, which has subsequently
gone away. Now that the serial driver always supports the early console,
make sure we always establish the mapping.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This moves the VBR handling out of the main trap handling code and in to
the sh-bios helper code. A couple of accessors are added in order to
permit other kernel code to get at the VBR value for state save/restore
paths.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
As SH has a very sparse IRQ map by default, all new CPUs and boards
benefit from using sparseirq by default. Despite this, there are still a
few stragglers (mostly due to using a fixed IRQ range for their FPGA
IRQ mappings), and these still need to be converted over one by one. As
these are now in the minority, and we do not want to encourage this sort
of brain-damage in newer board ports, we force sparseirq on.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This gets rid of the arbitrary set of vectors used by the SE7722 FPGA
interrupt controller and switches over to a completely dynamic set.
No assumptions regarding a contiguous range are made, and the platform
resources themselves need to be filled in lazily.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The LL/SC and IRQ versions were using generic stubs while the GRB version
was just reimplementing what it already had for the standard cmpxchg()
code. As we have optimized cmpxchg() implementations that are decoupled
from the atomic code, simply falling back on the generic wrapper does the
right thing. With this in place the GRB case is unaffected while the
LL/SC case gets to use its optimized cmpxchg().
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
All SH CPUs (with the exception of sh64) support the UBC, so select
HW_BREAKPOINT support by default. This fixes up the build for non-SH4A
targets.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
pgtable_cache_init() has been moved out-of-line, so we also need a dummy
definition for it on nommu to fix up the build.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This was used by the old hw-breakpoints API, but now there is nothing
is using it anymore, so just kill it off.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This is the next big chunk of hw_breakpoint support. This decouples
the SH-4A support from the core and moves it out in to its own stub,
following many of the conventions established with the perf events
layering.
In addition to extending SH-4A support to encapsulate the remainder
of the UBC channels, clock framework support for handling the UBC
interface clock is added as well, allowing for dynamic clock gating.
This also fixes up a regression introduced by the SIGTRAP handling that
broke the ksym_tracer, to the extent that the current support works well
with all of the ksym_tracer/ptrace/kgdb. The kprobes singlestep code will
follow in turn.
With this in place, the remaining UBC variants (SH-2A and SH-4) can now
be trivially plugged in.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
We previously had 2 quicklists, one for the PGD case and one for PTEs.
Now that the PGD/PMD cases are handled through slab caches due to the
multi-level configurability, only the PTE quicklist remains. As such,
reduce NR_QUICK to its appropriate size and bump down the PTE quicklist
index.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This has the adverse effect of converting many 29bit configs to 32bit
mode, while this is a change that needs to be done manually for each
platform. Turn it off by default in order to cut down on spurious bug
reports.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
While the PMB is available on SH-4A parts, SH4AL-DSP parts exclude it
altogether. As such, explicitly disable PMB support for these parts. If
this changes in the future for newer subtypes, this will have to be made
more fine-grained.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
We also switched away from quicklists and instead moved to slab
caches. After benchmarking both implementations the difference is
negligible. The slab caches suit us better though because the size of a
pgd table is just 4 entries when we're using a 3-level page table layout
and quicklists always deal with pages.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
If the page is not mapped into any process's address space then aliases
cannot exist in the cache. So reduce the amount of flushing we perform.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
The previous expressions were wrong which made free_pmd_range() explode
when using anything other than 4KB pages (which is why 8KB and 64KB
pages were disabled with the 3-level page table layout).
The problem was that pmd_offset() was returning an index of non-zero
when it should have been returning 0. This non-zero offset was used to
calculate the address of the pmd table to free in free_pmd_range(),
which ended up trying to free an object that was not aligned on a page
boundary.
Now 3-level page tables should work with 4KB, 8KB and 64KB pages.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
As CPUs are migrated over to more fully-featured clock frameworks of
their own and off of the legacy CPG code, they no longer have any real
need for defining the PCLK value. The PCLK define in itself is already
fairly misleading, as many boards get their input clocks from different
sources, making this value fairly arbitrary anyways.
Outside of the legacy CPG clock framework, the only place where this
value is used is for deriving CLOCK_TICK_RATE, which we set back to the
legacy PIT value that it was before the PCLK definitions were added in
the first place.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
With some of the cache rework an address aliasing optimization was added,
but this managed to fail on certain mappings resulting in pages with
PG_dcache_dirty set never writing back their dcache lines. This patch
reverts to the earlier behaviour of simply always writing back when the
dirty bit is set.
Signed-off-by: Markus Pietrek <Markus.Pietrek@emtrion.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
o remove unused define
o add device name comment
Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Presently the hw_breakpoint code is the primary notifier dispatch for
breakpoint traps, although it's only UBC traps that are of particular
interest there. This patches in a check to allow non-UBC generated
breakpoints to pass through down the remainder of the notifier chain,
giving things like kgdb a chance at getting notified.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This follows the x86 change to select perf events when hw_breakpoint
support is enabled. This fixes up build issues where perf events can
otherwise be disabled on their own.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The event callback handling has been removed in favour of going through a
generic event handler to handle overflows. Follows the x86 change.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
We don't actually require this in the cpu_relax() polling case, so just
cuddle these around the sleeping version.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* 'for-33' of git://repo.or.cz/linux-kbuild: (29 commits)
net: fix for utsrelease.h moving to generated
gen_init_cpio: fixed fwrite warning
kbuild: fix make clean after mismerge
kbuild: generate modules.builtin
genksyms: properly consider EXPORT_UNUSED_SYMBOL{,_GPL}()
score: add asm/asm-offsets.h wrapper
unifdef: update to upstream revision 1.190
kbuild: specify absolute paths for cscope
kbuild: create include/generated in silentoldconfig
scripts/package: deb-pkg: use fakeroot if available
scripts/package: add KBUILD_PKG_ROOTCMD variable
scripts/package: tar-pkg: use tar --owner=root
Kbuild: clean up marker
net: add net_tstamp.h to headers_install
kbuild: move utsrelease.h to include/generated
kbuild: move autoconf.h to include/generated
drop explicit include of autoconf.h
kbuild: move compile.h to include/generated
kbuild: drop include/asm
kbuild: do not check for include/asm-$ARCH
...
Fixed non-conflicting clean merge of modpost.c as per comments from
Stephen Rothwell (modpost.c had grown an include of linux/autoconf.h
that needed to be changed to generated/autoconf.h)
If using 64-bit PTEs and 4K pages then each page table has 512 entries
(as opposed to 1024 entries with 32-bit PTEs). Unlike MIPS, SH follows
the convention that all structures in the page table (pgd_t, pmd_t,
pgprot_t, etc) must be the same size. Therefore, 64-bit PTEs require
64-bit PGD entries, etc. Using 2-levels of page tables and 64-bit PTEs
it is only possible to map 1GB of virtual address space.
In order to map all 4GB of virtual address space we need to adopt a
3-level page table layout. This actually works out better for
CONFIG_SUPERH32 because we only waste 2 PGD entries on the P1 and P2
areas (which are untranslated) instead of 256.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Keep the dimensions of the page tables in a separate header file in
preparation for allowing a three level page table structure.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
MAX_DMA_CHANNELS is tested for the total number of channels in order to
populate an IRQ map. Stub this out completely when no DMA support is
enabled -- as used to be the default behaviour before this was
generalized for use by the dmaengine code.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (33 commits)
sh: Fix test of unsigned in se7722_irq_demux()
sh: mach-ecovec24: Add FSI sound support
sh: mach-ecovec24: Add mt9t112 camera support
sh: mach-ecovec24: Add tw9910 support
sh: MSIOF/mmc_spi platform data for the Ecovec24 board
sh: ms7724se: Add ak4642 support
sh: Fix up FPU build for SH5
sh: Remove old early serial console code V2
sh: sh5 scif pdata (sh5-101/sh5-103)
sh: sh4a scif pdata (sh7757/sh7763/sh7770/sh7780/sh7785/sh7786/x3)
sh: sh4a scif pdata (sh7343/sh7366/sh7722/sh7723/sh7724)
sh: sh4 scif pdata (sh7750/sh7760/sh4-202)
sh: sh3 scif pdata (sh7705/sh770x/sh7710/sh7720)
sh: sh2a scif pdata (sh7201/sh7203/sh7206/mxg)
sh: sh2 scif pdata (sh7616)
sh-sci: Extend sh-sci driver with early console V2
sh: Stub in P3 ioremap support for nommu parts.
sh: wire up vmallocinfo support in ioremap() implementations.
sh: Make the unaligned trap handler always obey notification levels.
sh: Couple kernel and user write page perm bits for CONFIG_X2TLB
...
* 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-2.6: (116 commits)
V4L/DVB (13698): pms: replace asm/uaccess.h to linux/uaccess.h
V4L/DVB (13690): radio/si470x: #include <sched.h>
V4L/DVB (13688): au8522: modify the attributes of local filter coefficients
V4L/DVB (13687): cx231xx: use NULL when pointer is needed
V4L/DVB: Davinci VPFE Capture: remove unused #include <linux/version.h>
V4L/DVB (13685): Correct code taking the size of a pointer
V4L/DVB (13684): Fix some cut-and-paste noise in dib0090.h
V4L/DVB (13683): sanio-ms: clean up init, exit and id_table
V4L/DVB (13682): dib8000: make some constant static
V4L/DVB: lgs8gxx: Use shifts rather than multiply/divide when possible
V4L/DVB (13680b): DocBook/media: create links for included sources
V4L/DVB (13680a): DocBook/media: copy images after building HTML
V4L/DVB (13678): Add support for yet another DvbWorld, TeVii and Prof USB devices
V4L/DVB (13676): configurable IRQ mode on NetUP Dual DVB-S2 CI; IRQ from CAM processing (CI interface works faster)
V4L/DVB (13674): stv090x: Add DiSEqC envelope mode
V4L/DVB (13673): lnbp21: Implement 22 kHz tone control
V4L/DVB (13671): sh_mobile_ceu_camera: Remove frame size page alignment
V4L/DVB (13670): soc-camera: Add mt9t112 camera driver
V4L/DVB (13669): tw9910: Add sync polarity support
V4L/DVB (13668): tw9910: remove cropping
...
Currently all architectures but microblaze unconditionally define
USE_ELF_CORE_DUMP. The microblaze omission seems like an error to me, so
let's kill this ifdef and make sure we are the same everywhere.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Hugh Dickins <hugh.dickins@tiscali.co.uk>
Cc: <linux-arch@vger.kernel.org>
Cc: Michal Simek <michal.simek@petalogix.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
It has been experimentally found out, that the sensor only supports up to
512x384 video output and also has some restrictions on minimum scale. We
disable non-working size ranges until, maybe, someone finds out how to properly
set them up. Also add cropping support, an auto white balance control, platform
data to specify master clock frequency and polarity of the IOCTL pin.
create mode 100644 include/media/rj54n1cb0c.h
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Convert soc-camera core and all soc-camera drivers to the new mediabus
API. This also takes soc-camera client drivers one step closer to also be
usable with generic v4l2-subdev host drivers.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Acked-by: Hans Verkuil <hverkuil@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
