Commit Graph

19 Commits

Author SHA1 Message Date
Josh Wu
7f457160da ARM: at91: sama5d3: add support for sama5d36 chip
The SAMA5D36 chip is the superset product of SAMA5D3x family.

For detail information please refer to:
  http://www.atmel.com/Microsite/sama5d3/default.aspx

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
2013-12-10 09:56:14 -08:00
Nicolas Ferre
13ab6aeb49 ARM: at91: change "Unknown" qualifier SoC subtype handling
An AT91 SoC that doesn't have a subtype is shown as "Unknown"
in the Linux log message which is not correct.
This was leading to confusion so, add a "none" qualifier to
the subtype property and set this one in the appropriate cases.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-04-09 14:26:56 +02:00
Ludovic Desroches
8f4b47949f ARM: at91: introduce SAMA5 support
This patch introduces the SAMA5 support and a generic board file for SAMA5
devices. It also updates the PMC driver to manage clock division which is a
requirement since some peripherals can't work at the bus frequency on SAMA5.

Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-03-26 12:18:04 +01:00
Hong Xu
0205968427 ARM: at91: Add machine header file for AT91SAM9N12 SoC
Signed-off-by: Hong Xu <hong.xu@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-04-28 01:39:43 +08:00
Jean-Christophe PLAGNIOL-VILLARD
1e3ce2b854 ARN: at91: introduce SOC_AT91xxx define to allow to compile SoC core support
We can now compile all SoC core support together and DT boards.
We still can not compile together the non DT board.
So We keep the ARCH_AT91xxx for the non DT board and for backward defconfig
compatibility. This will enable the plaform_device ressources.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-04-17 14:47:21 +02:00
Jean-Christophe PLAGNIOL-VILLARD
9918ceafd4 ARM: at91: code removal of CAP9 SoC
Following removal announce and addition to feature-removal-schedule.txt,
here is the actual source code deletion for Atmel CAP9 family.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-02-03 13:33:05 +01:00
Jean-Christophe PLAGNIOL-VILLARD
8c3583b634 at91: use structure to store the current soc
instead of reading the registers everytime

the current implementation respect the following constrain:
 - allow 1 to n soc to be enabled
 - allow to have a virtual cpu type and subtype
 - always detect the cpu type and subtype and report it
 - detect if the soc support is enabled
 - prepare for sysfs export support
 - drop soc specific code via compiler when the soc not enabled
   (via cpu_is_xxx)

Today if we read the exid we will have the same value for 9g35 and 9m11
and we will need to check the cidr too

with the new implementation we just need to check the soc subtype

this will also allow to have specific virtual subtype for rm9200 which the
board will have to specify via at91rm9200_set_type(int) as we have no way to
detect it.

this implementation is inspired by the SH cpu detection support

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-07-28 15:07:28 +00:00
Jean-Christophe PLAGNIOL-VILLARD
1ff5b1b411 at91: remove AT91_DBGU offset from dbgu register macro
to make the soc base specified at runtime instead of compiled time

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2011-07-28 15:07:28 +00:00
Jean-Christophe PLAGNIOL-VILLARD
7a2207a0e1 at91: drop at572d940hf support
no-one use it and it's nearly impossible get a board to work on it
and the Mainline implementation was never finished

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
Cc: Andrew Victor <linux@maxim.org.za>
2011-05-25 23:04:35 +08:00
Jean-Christophe PLAGNIOL-VILLARD
e57556e3b6 at91rm9200: introduce at91rm9200_set_type to specficy cpu package
as we can not detect it
by defaut the type will be bga
introduce cpu_is_at91rm9200_bga and cpu_is_at91rm9200_pqfp

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-05-25 23:04:35 +08:00
Jean-Christophe PLAGNIOL-VILLARD
9baeb7e47a at91: Add ARCH_ID and basic cpu macros definition for 5series chips family.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2011-04-23 11:03:07 +08:00
Nicolas Ferre
5f9f0a412f ARM: 6169/1: AT91: add new at91 chips in at91sam9g45 family
This is the basic support for at91sam9g46, at91sam9m10 and at91sam9m11. Those
are just very basic cpu macros and clock definition.

Signed-off-by: Patrice Vilchez <patrice.vilchez@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-06-16 23:00:02 +01:00
Nicolas Ferre
e2941054ed ARM: 6056/1: AT91: at91sam9g10 chip identification changed
A bit in the at91sam9g10 identification number changed between Engineering
Sample and final product. This patch will identify both as being at91sam9g10.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-04-14 16:56:27 +01:00
Andrew Victor
5e38efae96 ARM: 5850/1: [AT91] AT572D940HF processor support
Add support for the Atmel AT572D940HF processor (DIOPSIS range).
This processor integrates an ARM926 core, a DSP and the SoC
peripherals usually found on an AT91 processor (USART, SSC, SPI, TWI,
CAN, etc)

Signed-off-by: Antonio R. Costa <costa.antonior@gmail.com>
Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-01-20 12:34:06 +00:00
Nicolas Ferre
d8951adeba at91: at91sam9g45 family: identify several chip versions
cpu_is_xxx() macros are identifying generic at91sam9g45 chip. This patch adds
the capacity to differentiate Engineering Samples and final lots through the
inclusion of  at91_cpu_fully_identify() and the related chip IDs with chip
version field preserved.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
2009-11-03 18:42:31 +01:00
Nicolas Ferre
b784b7c037 [ARM] 5568/1: at91: Basic support for at91sam9g10: header files
From: Hong Xu <hong.xu@atmel.com>

AT91sam9g10 is an ARM 926ej-s SOC. It is an evolution of the at91sam9261 with a
faster clock speed: 266/133MHz.

Here is the basic header file support for this product.

Signed-off-by: Hong Xu <hong.xu@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-07-02 15:59:55 +01:00
Nicolas Ferre
fddcc0ae58 [ARM] 5571/1: at91: Basic support for at91sam9g45 series: header files.
AT91sam9g45 series is an ARM 926ej-s SOC family clocked at 400/133MHz.
It embedds USB high speed host and device, LCD, DDR2 RAM, and a full set of
peripherals.

Here is the basic header file support for this product series.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-06-27 11:05:21 +01:00
Stelian Pop
7be90a6ba9 [ARM] 5319/1: AT91: support AT91CAP9 revC CPUs
The AT91CAP9 revC CPU has a few differences over the previous,
revB CPU which was distributed in small quantities only (revA was
an internal Atmel product only).

This patch adds the detection routines to recognize the different
AT91CAP9 revisions (based on the PMC subsystem version number), and
uses them to:
	- activate a workaround for the external interrupts levels
	  (on revB CPUs)
	- set the UDPHS_BYPASS bit (on revB CPUs)
	- set AT91_GPBR register address to the correct offset
	  (0xfffffd50 on revB, 0xfffffd60 on revC)

For debugging usage, the CPU revision can be found in /proc/cpuinfo
on the 'Revision' line.

This patch is extracted from Andrew Victor's -at91 patch (2.6.27-at91.patch)
where it has been tested for the last 6 months.

Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-12-01 17:22:07 +00:00
Russell King
a09e64fbc0 [ARM] Move include/asm-arm/arch-* to arch/arm/*/include/mach
This just leaves include/asm-arm/plat-* to deal with.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-08-07 09:55:48 +01:00