Commit Graph

11 Commits

Author SHA1 Message Date
Jisheng Zhang
47d56462fc arm64: dts: berlin4ct: add missing unit name to /soc node
This patch fixes the following DTC warning with W=1:

"Node /soc has a reg or ranges property, but no unit name"

Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
2016-11-25 17:13:44 +08:00
Jisheng Zhang
139787f426 arm64: dts: berlin4ct: Add L2 cache topology
This patch adds the L2 cache topology for berlin4ct which has 1MB L2
cache.

[Sebastian: rename cache node from "l2-cache" to "cache"]

Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2016-09-28 20:37:06 +02:00
Jisheng Zhang
7091eb9699 arm64: dts: berlin4ct: enable all wdt nodes unconditionally
After commit f29a72c24a ("watchdog: dw_wdt: Convert to use watchdog
infrastructure"), the dw_wdt driver can support multiple variants, so
unconditionally enable all dw_wdt nodes now.

Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2016-09-28 20:36:59 +02:00
Jisheng Zhang
7e38b27056 arm64: dts: berlin4ct: switch to Cortex-A53 specific pmu nodes
Commit ac82d12772 ("arm64: perf: add Cortex-A53 support") adds the
cortex A53 PMU support, thus instead of using the generic armv8-pmuv3
compatibility use the more specific Cortex A53 compatibility.

Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2016-09-28 20:36:51 +02:00
Jisheng Zhang
1544f99c0a arm64: dts: berlin4ct: support cpuidle-dt
This patch adds an idle-states node to describe the berlin4ct idle
states and also adds references to the idle-states node in all CPU
nodes. After this patch cpuidle is enabled.

Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2015-12-06 10:25:28 +01:00
Jisheng Zhang
5fbb15316f arm64: dts: berlin: PSCI-1.0 support
The firmware can support PSCI-1.0 in fact. This change also enables
suspend to ram on Marvell berlin arm64 SoC.

Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2015-11-28 12:30:08 +01:00
Jisheng Zhang
d2318f3402 arm64: dts: berlin4ct: add watchdog nodes
The Marvell Berlin BG4CT has 3 watchdogs which are compatible with the
snps,dw-wdt driver sit in the sysmgr domain. This patch adds the
corresponding device tree nodes.

Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2015-11-28 12:30:07 +01:00
Jisheng Zhang
d9c1567f84 arm64: dts: berlin4ct: add default pinmux for uart0
Add urt0 txd and rxd muxing setup in the dtsi because uart0 always uses
them to work, no other possibilities.

Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2015-11-19 20:41:57 +01:00
Jisheng Zhang
cb27c89b78 arm64: dts: berlin4ct: add the pinctrl node
Add the avio, soc, sm pinctrl nodes for Marvell berlin4ct SoC.

Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2015-11-19 20:41:54 +01:00
Jisheng Zhang
8884d8c7cc arm64: dts: berlin4ct: add GPIO nodes
Marvell berlin4ct SoC has 6 GPIO ports powered by snps,dw-apb-gpio. This
patch adds the corresponding device tree nodes.

Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2015-09-20 20:32:29 +02:00
Jisheng Zhang
d93ac74ad1 arm64: dts: Add dts files for Marvell Berlin4CT SoC
Add initial dtsi file to support Marvell Berlin4CT SoC with
quad Cortex-A53 CPUs.

It also adds dts file for Marvell Berlin4CT DMP board which is
based on Berlin4CT SoC.

Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2015-08-03 20:45:54 +02:00