Commit Graph

7 Commits

Author SHA1 Message Date
Edward Cragg
279fef50b6
ASoC: tegra: i2s: Fix typo/broken macro
Fix typo in macro TEGRA30_I2S_SLOT_CTRL_TOTAL_SLOTS_MASK.

Signed-off-by: Edward Cragg <edward.cragg@codethink.co.uk>
Signed-off-by: Jorge Sanjuan <jorge.sanjuan@codethink.co.uk>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2018-07-30 11:18:28 +01:00
Stephen Warren
5608bd3ed2 ASoC: tegra: convert to standard DMA DT bindings
By passing no flags when calling snd_dmaengine_pcm_register() from
tegra_pcm.c, we end up using dma_request_slave_channel() rather than
dmaengine_pcm_compat_request_channel(), and hence rely on the standard
DMA DT bindings and stashing the DMA slave ID away during channel
allocation. This means there's no need to use a custom DT property to
store the slave ID. So, remove all the code that parsed it.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Mark Brown <broonie@linaro.org>
2013-12-11 16:43:57 -07:00
Stephen Warren
5e049fce36 ASoC: tegra: support new register layouts in Tegra124
Tegra124 introduces some small changes to the layout of some registers.
Modify the affected drivers to program those registers appropriately
based on which SoC they're running on.

Tegra124 also introduced some new modules on the AHUB configlink register
bus. These will require new entries in configlink_clocks[] in the AHUB
driver. However, supporting that change likely relies on switching Tegra
to the common reset framework, so I'll defer that change for now.

Based-on-work-by: Arun Shamanna Lakshmi <aruns@nvidia.com>
Based-on-work-by: Songhee Baek <sbaek@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
2013-10-14 14:56:27 +01:00
Lars-Peter Clausen
3489d5067a ASoC: tegra: Use common DAI DMA data struct
Use the common DAI DMA data struct for tegra, this allows us to use the common
helper function to configure the DMA slave config based on the DAI DMA data.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2013-04-03 18:13:34 +01:00
Stephen Warren
0af18c5cc9 ASoC: tegra: fix I2S bit count mask
This register field is 11 bits wide, not 15 bits wide. Given the way
this value is currently, used, this patch has no practical effect.
However, it's still best if the value is correct.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2013-03-05 10:42:11 +08:00
Stephen Warren
0f163546a7 ASoC: tegra: use regmap more directly
Stop open-coding the caching of the ctrl registers; instead, use
regmap_update_bits() to update parts of the register from different
places. The removal of the open-coded cache will allow controls to be
created which touch registers, which will be necessary if any of these
modules are converted to CODECs.

Get rid of tegra*_read/write; just call regmap_read/write directly.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2012-06-08 07:03:14 +08:00
Stephen Warren
4fb0384f3d ASoC: tegra: add tegra30-i2s driver
This provides an ASoC DAI interface for Tegra 30's I2S controller.

Includes a squashed bugfix from Sumit Bhattacharya <sumitb@nvidia.com>

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2012-04-13 11:29:23 +01:00