Commit Graph

14 Commits

Author SHA1 Message Date
Markus Elfring
8ac6e995ac PowerPC-83xx: Deletion of an unnecessary check before the function call "of_node_put"
The of_node_put() function tests whether its argument is NULL and then
returns immediately. Thus the test around the call is not needed.

This issue was detected by using the Coccinelle software.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2015-01-29 23:16:19 -06:00
Joe Perches
28f65c11f2 treewide: Convert uses of struct resource to resource_size(ptr)
Several fixes as well where the +1 was missing.

Done via coccinelle scripts like:

@@
struct resource *ptr;
@@

- ptr->end - ptr->start + 1
+ resource_size(ptr)

and some grep and typing.

Mostly uncompiled, no cross-compilers.

Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2011-06-10 14:55:36 +02:00
Ilya Yanok
fd066e8503 powerpc/mpc8308: fix USB DR controller initialization
MPC8308 has ULPI pin muxing settings in SICRH register, bits 17-18
which is different from both MPC8313 and MPC8315.
Also MPC8308 doesn't have REFSEL, UTMI_PHY_EN and OTG_PORT fields
in the USB DR controller CONTROL register.

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Tested-by: Wolfgang Denk <wd@denx.de>
Acked-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-01-12 18:00:29 -06:00
Peter Korsgaard
b7d66c88c9 powerpc/mpc83xx: Fix usb mux setup for mpc834x
usb0 and usb1 mux settings in the sicrl register were swapped (twice!)
in mpc834x_usb_cfg(), leading to various strange issues with fsl-ehci
and full speed devices.

The USB port config on mpc834x is done using 2 muxes: Port 0 is always
used for MPH port 0, and port 1 can either be used for MPH port 1 or DR
(unless DR uses UTMI phy or OTG, then it uses both ports) - See 8349 RM
figure 1-4..

mpc8349_usb_cfg() had this inverted for the DR, and it also had the bit
positions of the usb0 / usb1 mux settings swapped. It would basically
work if you specified port1 instead of port0 for the MPH controller (and
happened to use ULPI phys), which is what all the 834x dts have done,
even though that configuration is physically invalid.

Instead fix mpc8349_usb_cfg() and adjust the dts files to match reality.

Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-15 21:45:31 -05:00
Anton Vorontsov
c026c98739 powerpc/83xx: Do not configure or probe disabled FSL DR USB controllers
On MPC837X CPUs Dual-Role USB isn't always available (for example DR
USB pins can be muxed away to eSDHC).

U-Boot adds status = "disabled" property into the DR USB nodes to
indicate that we must not try to configure or probe Dual-Role USB,
otherwise we'll break eSDHC support on targets with MPC837X CPUs.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-03-09 09:25:37 -05:00
Anton Vorontsov
c0a2015965 powerpc/83xx: fix ULPI setup for MPC8315 processors
We must not use MPC831X_SICR[HL]_* definitions for the MPC8315 processors,
because SICR USB bits locations are not compatible with MPC8313.

This patch fixes ULPI workability on MPC8315E-RDB boards.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-16 17:57:37 -05:00
Anton Vorontsov
1a9ebc0cd2 [POWERPC] 83xx: mpc8315 - fix USB UTMI Host setup
Currently USB Host isn't functional on the MPC8315E boards, for two
reasons as described below.

MPC8315 Reference Manual says:
"The USB DR unit must have the same clock ratio as the encryption core
unit, unless one of them has its clock disabled."

The encryption core also drives I2C clock, so it is enabled and is equal
to 01. That means USBDRCM should be 01 here.

Plus, according to MPC8315E-RDB schematics, USB unit consumes CLK_IN
clock from the 24.00MHz oscillator, which means we must adjust REFSEL
bits as well.

p.s.
Idially we should rework whole 83xx/usb.c code, in two steps:
1. Move SCCR code to the U-Boot;
2. Implement fsl,usb-clock property in the device tree, so usb.c could
   decide what clock exactly to use on per-board basis.

Though, today we're not in a hurry since there is just one 8315e board
out there.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-04-17 09:52:50 -05:00
Kim Phillips
b74a7e50cc [POWERPC] 83xx: configure USB clock for MPC8315E
SCCR USB bits are in a different location on the mpc8315.

Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-02-05 23:19:03 -06:00
Kumar Gala
b38308ac8e [POWERPC] 83xx: rework platform Kconfig
* Allow multiple boards to be selected in a single build
* Removed Kconfig option '83xx' which existed only for compat with arch/ppc
* Removed Kconfig option 'PPC_MPC836x' since its not used
* Renamed Kconfig option 'MPC834x' to 'PPC_MPC834x' to match others
* Added a multiplatform 83xx defconfig (mpc83xx_defconfig).

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-28 13:15:24 -06:00
Li Yang
866b6ddd28 [POWERPC] 83xx: USB device tree cleanups
Remove device_type = "usb" for 83xx SoC USB controller

Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-23 19:33:05 -06:00
Li Yang
e10241d8a1 [POWERPC] 83xx: Add MPC837x USB platform support
Add chip specific and board specific initialization for MPC837x USB.

Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-23 19:33:03 -06:00
Cyrill Gorcunov
7ac33417ec [POWERPC] Fix potential NULL dereference
This patch does fix potential NULL pointer dereference that could take
place inside of strcmp() if of_get_property() call failed.

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-11-19 22:03:00 -06:00
jacmet@sunsite.dk
39db0fd9db [POWERPC] Fix mpc834x USB-MPH configuration.
mpc834x USB-MPH configuration got broken by commit
6f44256002. The selection bits in SICRL
should be cleared rather than set to configure the USB MUXes for the MPH.

Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-09-28 10:26:35 -05:00
Li Yang
e5a94af847 [POWERPC] 83xx: USB platform code rework
Add 831x USB platform setup code and rework 834x USB platform setup code.
Move USB platform code to usb.c for different boards with CPU of the same
series to share the USB initialization code.

Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-10 00:30:04 -05:00