2 Commits

Author	SHA1	Message	Date
Vignesh R	b9e23f3219	ARM: OMAP2+: DRA7: clockdomain: change l4per2_7xx_clkdm to SW_WKUP ... Legacy IPs like PWMSS, present under l4per2_7xx_clkdm, cannot support smart-idle when its clock domain is in HW_AUTO on DRA7 SoCs. Hence, program clock domain to SW_WKUP. Signed-off-by: Vignesh R <vigneshr@ti.com> Acked-by: Tero Kristo <t-kristo@ti.com> Reviewed-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: <stable@vger.kernel.org>	2015-07-15 13:57:28 -06:00
Ambresh K	11fadcfab9	ARM: OMAP: DRA7: clockdomain: Add DRA7XX data and update header ... Add the data file to describe all clock domains inside the DRA7XX SoC Signed-off-by: Ambresh K <ambresh@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> [paul@pwsan.com: added generation notation to comments] Signed-off-by: Paul Walmsley <paul@pwsan.com>	2013-08-23 04:28:36 -06:00