Commit Graph

1318 Commits

Author SHA1 Message Date
Marek Szyprowski
45d882daf8 clk: samsung: Add explicit MPLL, EPLL clkdev aliases in S3C2443 driver
S3C2443 platform still use non-dt based lookup in some of its drivers
to get MPLL and EPLL clocks. Till now it worked only because PLL()
macro implicitly created aliases for all instantiated clocks. This
feature will be removed, so explicitly create aliases for MPLL and
EPLL clocks.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2017-10-09 11:32:56 +02:00
Jerome Brunet
e891a5a401 pinctrl: meson-gx: TEST_N belongs to the AO controller
On meson-gx platforms, TEST_N has been incorrectly declared in the EE
controller while it belongs to AO controller.

Move the pin to the appropriate controller

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-05 23:11:02 +02:00
Sean Wang
7f4fbf79f4 reset: mediatek: add reset controller dt-bindings required header for MT7622 SoC
Add the reset controller dt-bindings exported from infracfg, pericfg,
hifsys and ethsys which could be found on MT7622 SoC. So that we can
reference them from within a device-tree file.

Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2017-10-04 12:13:29 +02:00
Andrew F. Davis
130c28daf0 ARM: dts: am43xx: Introduce additional pinmux definitions for DS0
AM43xx platform pinmux registers contain bits to set state during
suspend (DS0), add these bit definitions here.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-10-02 12:54:20 -07:00
Chen-Yu Tsai
80815004a4 clk: sunxi-ng: sun6i: Export video PLLs
The 2x outputs of the 2 video PLL clocks are directly used by the
HDMI controller block.

Export them so they can be referenced in the device tree.

Fixes: c6e6c96d8f ("clk: sunxi-ng: Add A31/A31s clocks")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-09-29 10:46:10 +02:00
Sergei Shtylyov
ecadea00f5 dt-bindings: clock: Add R8A77970 CPG core clock definitions
Add macros usable by the device tree sources to reference the R8A77970
CPG core clocks by index. The data come from the table 8.2c of R-Car
Series, 3rd Generation User's Manual: Hardware (Rev. 0.55, Jun. 30, 2017).

Based on the original (and large) patch by Daisuke Matsushita
<daisuke.matsushita.ns@hitachi.com>.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-09-19 10:57:35 +02:00
Vineet Gupta
13541226dc ARC: reset: remove the misleading v1 suffix all over
There is no plan yet to do a v2 board. And even if we were to do it only
some IPs would actually change, so it be best to add suffixes at that
point, not now !

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2017-09-18 13:02:03 +02:00
Sergei Shtylyov
833bdb47c8 dt-bindings: power: add R8A77970 SYSC power domain definitions
Add macros usable by the device tree sources to reference R8A77970 SYSC
power domains by index.

Based on the original (and large) patch by Daisuke Matsushita
<daisuke.matsushita.ns@hitachi.com>.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-09-18 08:07:58 +02:00
Linus Torvalds
7318413077 Merge branch '4.14-features' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS updates from Ralf Baechle:
 "This is the main pull request for 4.14 for MIPS; below a summary of
  the non-merge commits:

  CM:
   - Rename mips_cm_base to mips_gcr_base
   - Specify register size when generating accessors
   - Use BIT/GENMASK for register fields, order & drop shifts
   - Add cluster & block args to mips_cm_lock_other()

  CPC:
   - Use common CPS accessor generation macros
   - Use BIT/GENMASK for register fields, order & drop shifts
   - Introduce register modify (set/clear/change) accessors
   - Use change_*, set_* & clear_* where appropriate
   - Add CM/CPC 3.5 register definitions
   - Use GlobalNumber macros rather than magic numbers
   - Have asm/mips-cps.h include CM & CPC headers
   - Cluster support for topology functions
   - Detect CPUs in secondary clusters

  CPS:
   - Read GIC_VL_IDENT directly, not via irqchip driver

  DMA:
   - Consolidate coherent and non-coherent dma_alloc code
   - Don't use dma_cache_sync to implement fd_cacheflush

  FPU emulation / FP assist code:
   - Another series of 14 commits fixing corner cases such as NaN
     propgagation and other special input values.
   - Zero bits 32-63 of the result for a CLASS.D instruction.
   - Enhanced statics via debugfs
   - Do not use bools for arithmetic. GCC 7.1 moans about this.
   - Correct user fault_addr type

  Generic MIPS:
   - Enhancement of stack backtraces
   - Cleanup from non-existing options
   - Handle non word sized instructions when examining frame
   - Fix detection and decoding of ADDIUSP instruction
   - Fix decoding of SWSP16 instruction
   - Refactor handling of stack pointer in get_frame_info
   - Remove unreachable code from force_fcr31_sig()
   - Convert to using %pOF instead of full_name
   - Remove the R6000 support.
   - Move FP code from *_switch.S to *_fpu.S
   - Remove unused ST_OFF from r2300_switch.S
   - Allow platform to specify multiple its.S files
   - Add #includes to various files to ensure code builds reliable and
     without warning..
   - Remove __invalidate_kernel_vmap_range
   - Remove plat_timer_setup
   - Declare various variables & functions static
   - Abstract CPU core & VP(E) ID access through accessor functions
   - Store core & VP IDs in GlobalNumber-style variable
   - Unify checks for sibling CPUs
   - Add CPU cluster number accessors
   - Prevent direct use of generic_defconfig
   - Make CONFIG_MIPS_MT_SMP default y
   - Add __ioread64_copy
   - Remove unnecessary inclusions of linux/irqchip/mips-gic.h

  GIC:
   - Introduce asm/mips-gic.h with accessor functions
   - Use new GIC accessor functions in mips-gic-timer
   - Remove counter access functions from irq-mips-gic.c
   - Remove gic_read_local_vp_id() from irq-mips-gic.c
   - Simplify shared interrupt pending/mask reads in irq-mips-gic.c
   - Simplify gic_local_irq_domain_map() in irq-mips-gic.c
   - Drop gic_(re)set_mask() functions in irq-mips-gic.c
   - Remove gic_set_polarity(), gic_set_trigger(), gic_set_dual_edge(),
     gic_map_to_pin() and gic_map_to_vpe() from irq-mips-gic.c.
   - Convert remaining shared reg access, local int mask access and
     remaining local reg access to new accessors
   - Move GIC_LOCAL_INT_* to asm/mips-gic.h
   - Remove GIC_CPU_INT* macros from irq-mips-gic.c
   - Move various definitions to the driver
   - Remove gic_get_usm_range()
   - Remove __gic_irq_dispatch() forward declaration
   - Remove gic_init()
   - Use mips_gic_present() in place of gic_present and remove
     gic_present
   - Move gic_get_c0_*_int() to asm/mips-gic.h
   - Remove linux/irqchip/mips-gic.h
   - Inline __gic_init()
   - Inline gic_basic_init()
   - Make pcpu_masks a per-cpu variable
   - Use pcpu_masks to avoid reading GIC_SH_MASK*
   - Clean up mti, reserved-cpu-vectors handling
   - Use cpumask_first_and() in gic_set_affinity()
   - Let the core set struct irq_common_data affinity

  microMIPS:
   - Fix microMIPS stack unwinding on big endian systems

  MIPS-GIC:
   - SYNC after enabling GIC region

  NUMA:
   - Remove the unused parent_node() macro

  R6:
   - Constify r2_decoder_tables
   - Add accessor & bit definitions for GlobalNumber

  SMP:
   - Constify smp ops
   - Allow boot_secondary SMP op to return errors

  VDSO:
   - Drop gic_get_usm_range() usage
   - Avoid use of linux/irqchip/mips-gic.h

  Platform changes:

  Alchemy:
   - Add devboard machine type to cpuinfo
   - update cpu feature overrides
   - Threaded carddetect irqs for devboards

  AR7:
   - allow NULL clock for clk_get_rate

  BCM63xx:
   - Fix ENETDMA_6345_MAXBURST_REG offset
   - Allow NULL clock for clk_get_rate

  CI20:
   - Enable GPIO and RTC drivers in defconfig
   - Add ethernet and fixed-regulator nodes to DTS

  Generic platform:
   - Move Boston and NI 169445 FIT image source to their own files
   - Include asm/bootinfo.h for plat_fdt_relocated()
   - Include asm/time.h for get_c0_*_int()
   - Include asm/bootinfo.h for plat_fdt_relocated()
   - Include asm/time.h for get_c0_*_int()
   - Allow filtering enabled boards by requirements
   - Don't explicitly disable CONFIG_USB_SUPPORT
   - Bump default NR_CPUS to 16

  JZ4700:
   - Probe the jz4740-rtc driver from devicetree

  Lantiq:
   - Drop check of boot select from the spi-falcon driver.
   - Drop check of boot select from the lantiq-flash MTD driver.
   - Access boot cause register in the watchdog driver through regmap
   - Add device tree binding documentation for the watchdog driver
   - Add docs for the RCU DT bindings.
   - Convert the fpi bus driver to a platform_driver
   - Remove ltq_reset_cause() and ltq_boot_select(
   - Switch to a proper reset driver
   - Switch to a new drivers/soc GPHY driver
   - Add an USB PHY driver for the Lantiq SoCs using the RCU module
   - Use of_platform_default_populate instead of __dt_register_buses
   - Enable MFD_SYSCON to be able to use it for the RCU MFD
   - Replace ltq_boot_select() with dummy implementation.

  Loongson 2F:
   - Allow NULL clock for clk_get_rate

  Malta:
   - Use new GIC accessor functions

  NI 169445:
   - Add support for NI 169445 board.
   - Only include in 32r2el kernels

  Octeon:
   - Add support for watchdog of 78XX SOCs.
   - Add support for watchdog of CN68XX SOCs.
   - Expose support for mips32r1, mips32r2 and mips64r1
   - Enable more drivers in config file
   - Add support for accessing the boot vector.
   - Remove old boot vector code from watchdog driver
   - Define watchdog registers for 70xx, 73xx, 78xx, F75xx.
   - Make CSR functions node aware.
   - Allow access to CIU3 IRQ domains.
   - Misc cleanups in the watchdog driver

  Omega2+:
   - New board, add support and defconfig

  Pistachio:
   - Enable Root FS on NFS in defconfig

  Ralink:
   - Add Mediatek MT7628A SoC
   - Allow NULL clock for clk_get_rate
   - Explicitly request exclusive reset control in the pci-mt7620 PCI driver.

  SEAD3:
   - Only include in 32 bit kernels by default

  VoCore:
   - Add VoCore as a vendor t0 dt-bindings
   - Add defconfig file"

* '4.14-features' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (167 commits)
  MIPS: Refactor handling of stack pointer in get_frame_info
  MIPS: Stacktrace: Fix microMIPS stack unwinding on big endian systems
  MIPS: microMIPS: Fix decoding of swsp16 instruction
  MIPS: microMIPS: Fix decoding of addiusp instruction
  MIPS: microMIPS: Fix detection of addiusp instruction
  MIPS: Handle non word sized instructions when examining frame
  MIPS: ralink: allow NULL clock for clk_get_rate
  MIPS: Loongson 2F: allow NULL clock for clk_get_rate
  MIPS: BCM63XX: allow NULL clock for clk_get_rate
  MIPS: AR7: allow NULL clock for clk_get_rate
  MIPS: BCM63XX: fix ENETDMA_6345_MAXBURST_REG offset
  mips: Save all registers when saving the frame
  MIPS: Add DWARF unwinding to assembly
  MIPS: Make SAVE_SOME more standard
  MIPS: Fix issues in backtraces
  MIPS: jz4780: DTS: Probe the jz4740-rtc driver from devicetree
  MIPS: Ci20: Enable RTC driver
  watchdog: octeon-wdt: Add support for 78XX SOCs.
  watchdog: octeon-wdt: Add support for cn68XX SOCs.
  watchdog: octeon-wdt: File cleaning.
  ...
2017-09-15 20:43:33 -07:00
Linus Torvalds
f60a2abfdb The diff is dominated by the Allwinner A10/A20 SoCs getting converted to
the sunxi-ng framework. Otherwise, the heavy hitters are various drivers
 for SoCs like AT91, Amlogic, Renesas, and Rockchip. There are some other
 new clk drivers in here too but overall this is just a bunch of clk
 drivers for various different pieces of hardware and a collection of
 non-critical fixes for clk drivers.
 
 New Drivers:
  - Allwinner R40 SoCs
  - Renesas R-Car Gen3 USB 2.0 clock selector PHY
  - Atmel AT91 audio PLL
  - Uniphier PXs3 SoCs
  - ARC HSDK Board PLLs
  - AXS10X Board PLLs
  - STMicroelectronics STM32H743 SoCs
 
 Removed Drivers:
  - Non-compiling mb86s7x support
 
 Updates:
  - Allwinner A10/A20 SoCs converted to sunxi-ng framework
  - Allwinner H3 CPU clk fixes
  - Renesas R-Car D3 SoC
  - Renesas V2H and M3-W modules
  - Samsung Exynos5420/5422/5800 audio fixes
  - Rockchip fractional clk approximation fixes
  - Rockchip rk3126 SoC support within the rk3128 driver
  - Amlogic gxbb CEC32 and sd_emmc clks
  - Amlogic meson8b reset controller support
  - IDT VersaClock 5P49V5925/5P49V6901 support
  - Qualcomm MSM8996 SMMU clks
  - Various 'const' applications for struct clk_ops
  - si5351 PLL reset bugfix
  - Uniphier audio on LD11/LD20 and ethernet support on LD11/LD20/Pro4/PXs2
  - Assorted Tegra clk driver fixes
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2.0.22 (GNU/Linux)
 
 iQIcBAABCAAGBQJZuIAQAAoJEK0CiJfG5JUlUMQQAKFwCZRfTzz0m9jJ9s1XZSR/
 vldNAEUGm+Mz0W84xIzFqaT0UI1+SJK4e9Du+EN6phcCD5yVB0JS2EtRa84Bku/i
 Zy6AYSUNbGjx94HPwIq1hKt+UOIfBiNbJKMnkoCbEyYPA/TiWzr8JR5GyLjwYhPq
 IZHSvKqUKM3h2nr+MtpFJIIk8DlkLARRca4CCqa5i2Oqj6B8rjQQAq7TaLAM3ASN
 tSFIW2vdmWD+om2L57WHhwBgaYnUB4jBCRWkFZRsO4ZIRgm4VpePmosy2UTZ7fqb
 kEaW2bPuv65zUHpvjHG6yXo+yh0yk1fBsXG/joXgJ4oOmNzsIgnCZzPnGUC1ccms
 QdK/qhdIXsdgiR2DZtYuzUHji8+TNIPPjfAFyJjUwxDBXpqzXvsvltx2a1hg/rUP
 VDvTL2OnoGtrW2bXPufCkxBsyejJ4RqC5riMJws5xgMkqKKUajiLovPeuL6+8kU+
 ncqWYiIkEvHNKpmW511G/g+ClLk89zgXfxKFWWR+iDjSvA0hgaiRj1V3C2HIyS8f
 CLpalf6ao2+O008rUiaiqJyxWuwLujcdYokay2HXvTYc45rXrVwvlaDajxqs2eer
 lekUA4ZbX2g6qvB0lna6PNlv8JLQ1XPdzhWD2eeQIi7JgVSgwg++kUJqglsuai56
 eg5zNo6891GL9zFW10/A
 =0JbT
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "The diff is dominated by the Allwinner A10/A20 SoCs getting converted
  to the sunxi-ng framework. Otherwise, the heavy hitters are various
  drivers for SoCs like AT91, Amlogic, Renesas, and Rockchip. There are
  some other new clk drivers in here too but overall this is just a
  bunch of clk drivers for various different pieces of hardware and a
  collection of non-critical fixes for clk drivers.

  New Drivers:
   - Allwinner R40 SoCs
   - Renesas R-Car Gen3 USB 2.0 clock selector PHY
   - Atmel AT91 audio PLL
   - Uniphier PXs3 SoCs
   - ARC HSDK Board PLLs
   - AXS10X Board PLLs
   - STMicroelectronics STM32H743 SoCs

  Removed Drivers:
   - Non-compiling mb86s7x support

  Updates:
   - Allwinner A10/A20 SoCs converted to sunxi-ng framework
   - Allwinner H3 CPU clk fixes
   - Renesas R-Car D3 SoC
   - Renesas V2H and M3-W modules
   - Samsung Exynos5420/5422/5800 audio fixes
   - Rockchip fractional clk approximation fixes
   - Rockchip rk3126 SoC support within the rk3128 driver
   - Amlogic gxbb CEC32 and sd_emmc clks
   - Amlogic meson8b reset controller support
   - IDT VersaClock 5P49V5925/5P49V6901 support
   - Qualcomm MSM8996 SMMU clks
   - Various 'const' applications for struct clk_ops
   - si5351 PLL reset bugfix
   - Uniphier audio on LD11/LD20 and ethernet support on LD11/LD20/Pro4/PXs2
   - Assorted Tegra clk driver fixes"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (120 commits)
  clk: si5351: fix PLL reset
  ASoC: atmel-classd: remove aclk clock
  ASoC: atmel-classd: remove aclk clock from DT binding
  clk: at91: clk-generated: make gclk determine audio_pll rate
  clk: at91: clk-generated: create function to find best_diff
  clk: at91: add audio pll clock drivers
  dt-bindings: clk: at91: add audio plls to the compatible list
  clk: at91: clk-generated: remove useless divisor loop
  clk: mb86s7x: Drop non-building driver
  clk: ti: check for null return in strrchr to avoid null dereferencing
  clk: Don't write error code into divider register
  clk: uniphier: add video input subsystem clock
  clk: uniphier: add audio system clock
  clk: stm32h7: Add stm32h743 clock driver
  clk: gate: expose clk_gate_ops::is_enabled
  clk: nxp: clk-lpc32xx: rename clk_gate_is_enabled()
  clk: uniphier: add PXs3 clock data
  clk: hi6220: change watchdog clock source
  clk: Kconfig: Name RK805 in Kconfig for COMMON_CLK_RK808
  clk: cs2000: Add cs2000_set_saved_rate
  ...
2017-09-13 11:04:14 -07:00
Linus Torvalds
e90937e756 ARM: arm64: Devicetree updates for v4.14
As usual, device tree updates is the bulk of our material in this merge
 window. This time around, 559 patches affecting both 32- and 64-bit
 platforms.
 
 Changes are too many to list individually, but some of the larger ones:
 
 New platform/SoC support:
 
  - Automotive:
    + Renesas R-Car D3 (R8A77995)
    + TI DT76x
    + MediaTek mt2712e
  - Communication-oriented:
    + Qualcomm IPQ8074
    + Broadcom Stingray
    + Marvell Armada 8080
  - Set top box:
    + Uniphier PXs3
 
 Besides some vendor reference boards for the SoC above, there are also several
 new boards/machines:
 
  - TI AM335x Moxa UC-8100-ME-T open platform
  - TI AM57xx Beaglebone X15 Rev C
  - Microchip/Atmel sama5d27 SoM1 EK
  - Broadcom Raspberry Pi Zero W
  - Gemini-based D-Link DIR-685 router
  - Freescale i.MX6:
    + Toradex Apalis module + Apalis and Ixora carrier boards
    + Engicam GEAM6UL Starter Kit
  - Freescale i.MX53-based Beckhoff CX9020 Embedded PC
  - Mediatek mt7623-based BananaPi R2
  - Several Allwinner-based single-board computers:
   + Cubietruck plus
   + Bananapi M3, M2M and M64
   + NanoPi A64
   + A64-OLinuXino
   + Pine64
  - Rockchip RK3328 Pine64/Rock64 board support
  - Rockchip RK3399 boards:
   + RK3399 Sapphire module on Excavator carrier (RK3399 reference design)
   + Theobroma Systems RK3399-Q7 SoM
  - ZTE ZX296718 PCBOX Board
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJZtdtjAAoJEIwa5zzehBx3PzgP/iCQyUk5wklG9E5YNl8a9m/o
 djBkelabTm52s5ZTu6Awsq5rx8jUMqcb0vo+9v9yPWFG6On2oTZyZ/rE1Wbj3+gG
 +ENVyRgxmzYDTXqQLiu1UOV9wSA0gHwQCRZvE7i32NNfLu+tAsvu9e/AuznQ1xhR
 4G7dGCRRlRkZkrVKrJ7JjklmW578pFQkZLmz8K2nWqwh1tKpK3fY19SrwUKx+YCR
 tnMPYAPjB5zxR9tfcDS4FUKdiC7dMiMzZNGiYl5a26X6wsNR7xYtNzFMaGZn1ecG
 PwOS+DAnj8J+AfpQBLWu9xytHbJdqITRuNcF+OXNVW9TKmb0syf7VgRUDkhjIMxP
 aGZc4Q6PwgTRwnX+w6fTzJTyk+uXtieCicZaaZ1jlgcQq0pfbzJ1vZMpq4aoVlxU
 mS84i1bd8AiavmHuyIRNB3/T4aAsVhTUIBndXluKV8yWroXhAukfI1YmGr1Eux7C
 fy5pPeDqk9lXR3bqIhfnaLoVsApEXTOWMC8X48vwfaQHiCGR9JJwpfsGcaNi1bri
 Col1qRzkXWGA6KqTWtpo+o12rYuMGc0mpZTCmejKuBoxMXOU+wLyJYgaxa7pyesX
 S5rLaIe2l9ppXHjjEERp7AzczzLS5W20Tez5vYnZAQb1dYuJzwXwiATt8NT+XG3V
 Wu92UwUfjxYk8vGz48ph
 =R45j
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM/arm64 Devicetree updates from Olof Johansson:
 "As usual, device tree updates is the bulk of our material in this
  merge window. This time around, 559 patches affecting both 32- and
  64-bit platforms.

  Changes are too many to list individually, but some of the larger
  ones:

  New platform/SoC support:

   - Automotive:
     + Renesas R-Car D3 (R8A77995)
     + TI DT76x
     + MediaTek mt2712e
   - Communication-oriented:
     + Qualcomm IPQ8074
     + Broadcom Stingray
     + Marvell Armada 8080
   - Set top box:
     + Uniphier PXs3

  Besides some vendor reference boards for the SoC above, there are also
  several new boards/machines:

   - TI AM335x Moxa UC-8100-ME-T open platform
   - TI AM57xx Beaglebone X15 Rev C
   - Microchip/Atmel sama5d27 SoM1 EK
   - Broadcom Raspberry Pi Zero W
   - Gemini-based D-Link DIR-685 router
   - Freescale i.MX6:
     + Toradex Apalis module + Apalis and Ixora carrier boards
     + Engicam GEAM6UL Starter Kit
   - Freescale i.MX53-based Beckhoff CX9020 Embedded PC
   - Mediatek mt7623-based BananaPi R2
   - Several Allwinner-based single-board computers:
  + Cubietruck plus
  + Bananapi M3, M2M and M64
  + NanoPi A64
  + A64-OLinuXino
  + Pine64
   - Rockchip RK3328 Pine64/Rock64 board support
   - Rockchip RK3399 boards:
  + RK3399 Sapphire module on Excavator carrier (RK3399 reference design)
  + Theobroma Systems RK3399-Q7 SoM
   - ZTE ZX296718 PCBOX Board"

* tag 'armsoc-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (559 commits)
  ARM: dts: at91: at91sam9g45: add AC97
  arm64: dts: marvell: mcbin: enable more networking ports
  arm64: dts: marvell: add a reference to the sysctrl syscon in the ppv2 node
  arm64: dts: marvell: add TX interrupts for PPv2.2
  arm64: dts: uniphier: add PXs3 SoC support
  ARM: dts: uniphier: add pinctrl groups of ethernet phy mode
  ARM: dts: uniphier: fix size of sdctrl nodes
  ARM: dts: uniphier: add AIDET nodes
  arm64: dts: uniphier: fix size of sdctrl node
  arm64: dts: uniphier: add AIDET nodes
  Revert "ARM: dts: sun8i: h3: Enable dwmac-sun8i on the Beelink X2"
  arm64: dts: uniphier: add reset controller node of analog amplifier
  arm64: dts: marvell: add Device Tree files for Armada-8KP
  arm64: dts: rockchip: add Haikou baseboard with RK3399-Q7 SoM
  arm64: dts: rockchip: add RK3399-Q7 (Puma) SoM
  dt-bindings: add rk3399-q7 SoM
  ARM: dts: rockchip: enable usb for rv1108-evb
  ARM: dts: rockchip: add usb nodes for rv1108 SoCs
  dt-bindings: update grf-binding for rv1108 SoCs
  ARM: dts: aspeed-g4: fix AHB window size of the SMC controllers
  ...
2017-09-10 20:54:48 -07:00
Linus Torvalds
ae46654bcf ARM: SoC driver updates for v4.14
This branch contains platform-related driver updates for ARM and ARM64.
 
 Among them:
 
  - Reset driver updates:
   + New API for dealing with arrays of resets
   + Make unimplemented {de,}assert return success on shared resets
   + MSDKv1 driver
   + Removal of obsolete Gemini reset driver
   + Misc updates for sunxi and Uniphier
 
  - SoC drivers:
   + Platform SoC driver registration on Tegra
   + Shuffle of Qualcomm drivers into a submenu
   + Allwinner A64 support for SRAM
   + Renesas R-Car R3 support
   + Power domains for Rockchip RK3366
 
  - Misc updates and smaller fixes for TEE and memory driver subsystems
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJZtdt7AAoJEIwa5zzehBx3EboP/jR2T9lrMavXR1zL48L14yJb
 S+fiJlrX1Kr42UF4PQvsfs+uTqOLmycrPVFkMb6IwoUPzQ9UCOSoiMzYm2b7ZPvt
 uIesHhdM3/xun6wKfieN8GmNA1yDVynTxo0TTYDw5ha7I6s2GHgw0GSFzy3wm0Qg
 KzerAO3gzf3L5XsKR0cai3IXNjHO9ubpFG1ReR09da28nPElP8ggWg0KnqdO76Ch
 BGpFj78EC875ZNqwHgnspUqgGDJnBjig3m/uA4FWA0G9Jl38tCyKTZfUR7cEraoV
 kyCgBlR/UrI8eXVTyEy5k5iTsQ3A1VhX4rGjyH+5NZHTs1yWr4+RDND/qeGl9tSo
 VASuOtH6Rc3vdUDpHPBNAFNQH8fwwDoKf96dvN1tiffsx6LSKb//NyOfkXzKOtR6
 CP5raYfX4YktLtHq0XVTZ/6r3XmLcTHzElR/dCFpQOFcTOYii0pWtfcWouahbZ1w
 dhoBX/dbNq37MfzrxtHN2VTIEHpn2GU7u+ZGkp2ArokD58BAft/M3Xee1cDnF75g
 ZDwe5eNFT8aBZKaY7zwG8cdxiw9kACAivDRwW+zgpfUr39c+d0+QmVfnfJh4EGXK
 Ri6yr2EfBWK6jw3cwkdSyyt7iSzIkB+RiuuD1MjpYhWzAvoDpzqkXYukFGbpXnuy
 vUFHNuP1ocUsRtCs8mm1
 =yBzS
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver updates from Olof Johansson:
 "This branch contains platform-related driver updates for ARM and ARM64.

  Among them:

   - Reset driver updates:
     + New API for dealing with arrays of resets
     + Make unimplemented {de,}assert return success on shared resets
     + MSDKv1 driver
     + Removal of obsolete Gemini reset driver
     + Misc updates for sunxi and Uniphier

   - SoC drivers:
     + Platform SoC driver registration on Tegra
     + Shuffle of Qualcomm drivers into a submenu
     + Allwinner A64 support for SRAM
     + Renesas R-Car R3 support
     + Power domains for Rockchip RK3366

   - Misc updates and smaller fixes for TEE and memory driver
     subsystems"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (54 commits)
  firmware: arm_scpi: fix endianness of dev_id in struct dev_pstate_set
  soc/tegra: fuse: Add missing semi-colon
  soc/tegra: Restrict SoC device registration to Tegra
  drivers: soc: sunxi: add support for A64 and its SRAM C
  drivers: soc: sunxi: add support for remapping func value to reg value
  drivers: soc: sunxi: fix error processing on base address when claiming
  dt-bindings: add binding for Allwinner A64 SRAM controller and SRAM C
  bus: sunxi-rsb: Enable by default for ARM64
  soc/tegra: Register SoC device
  firmware: tegra: set drvdata earlier
  memory: Convert to using %pOF instead of full_name
  soc: Convert to using %pOF instead of full_name
  bus: Convert to using %pOF instead of full_name
  firmware: Convert to using %pOF instead of full_name
  soc: mediatek: add SCPSYS power domain driver for MediaTek MT7622 SoC
  soc: mediatek: add header files required for MT7622 SCPSYS dt-binding
  soc: mediatek: reduce code duplication of scpsys_probe across all SoCs
  dt-bindings: soc: update the binding document for SCPSYS on MediaTek MT7622 SoC
  reset: uniphier: add analog amplifiers reset control
  reset: uniphier: add video input subsystem reset control
  ...
2017-09-10 20:40:00 -07:00
Linus Torvalds
4dfc278803 IOMMU Updates for Linux v4.14
Slightly more changes than usual this time:
 
 	- KDump Kernel IOMMU take-over code for AMD IOMMU. The code now
 	  tries to preserve the mappings of the kernel so that master
 	  aborts for devices are avoided. Master aborts cause some
 	  devices to fail in the kdump kernel, so this code makes the
 	  dump more likely to succeed when AMD IOMMU is enabled.
 
 	- Common flush queue implementation for IOVA code users. The
 	  code is still optional, but AMD and Intel IOMMU drivers had
 	  their own implementation which is now unified.
 
 	- Finish support for iommu-groups. All drivers implement this
 	  feature now so that IOMMU core code can rely on it.
 
 	- Finish support for 'struct iommu_device' in iommu drivers. All
 	  drivers now use the interface.
 
 	- New functions in the IOMMU-API for explicit IO/TLB flushing.
 	  This will help to reduce the number of IO/TLB flushes when
 	  IOMMU drivers support this interface.
 
 	- Support for mt2712 in the Mediatek IOMMU driver
 
 	- New IOMMU driver for QCOM hardware
 
 	- System PM support for ARM-SMMU
 
 	- Shutdown method for ARM-SMMU-v3
 
 	- Some constification patches
 
 	- Various other small improvements and fixes
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABAgAGBQJZtCFNAAoJECvwRC2XARrjZnQP/AxC/ezQpq82HbegF4sM/cVE
 Ep7TeTqodEl75FS/6txe2wU0pwodqk/LB9ajfQZUbE1w8vKsNEqi5qf4ZYHGoxYI
 5bWyjJBzKIlwENH5lsBpQNt6XLevrYmRsFy7F0tRYy+qPQq8k+js2i7/XkCL3q7L
 3xklF847RRoITaTOhhaROx1pF23dSMEsS2XGuWHcZfjORtep4wcFKzd/2SvlCWCo
 P2bRU7jBzfJuuGSA80gaiUbDmrULTUfYuZNp7njASzCgsDmagERtvDEpdoXPNNSp
 u6s4LjU1Dp3fgr6g6cFRO7B6JUbWd619nwo9so/c/wZN54yEngBF9EyeeF3mv2O5
 ZbM2mOW3RlZcjxFT/AC8G4cZwwP6MpCEQOdqknoqc6ZQwcDqwN0o9I4+po0wsiAU
 89ijZZe9Mx0p9lNpihaBEB1erAUWPo5Obh62zo80W3h6x9WzkGQWM+PyFK2DYoaC
 8biEZzcc21sLEHvXQkcEGJSKrihHr9sluOqvxmCw5QAkYIFAeZRoeH7JtZWjVCnr
 T3XvaG1G1Aw6tS7ErxufdKawREAGki0Rm9i1baiH9sqNj5rllM01Y+PgU6E21Nbg
 iZp9gJLjfwM4vhYLlovvQK5PRoOBsCkyCpEI4GJqjLeam5p/WN06CFFf0ifQofYr
 qDPCVDkWHWV8nugFFKE7
 =EVh9
 -----END PGP SIGNATURE-----

Merge tag 'iommu-updates-v4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu

Pull IOMMU updates from Joerg Roedel:
 "Slightly more changes than usual this time:

   - KDump Kernel IOMMU take-over code for AMD IOMMU. The code now tries
     to preserve the mappings of the kernel so that master aborts for
     devices are avoided. Master aborts cause some devices to fail in
     the kdump kernel, so this code makes the dump more likely to
     succeed when AMD IOMMU is enabled.

   - common flush queue implementation for IOVA code users. The code is
     still optional, but AMD and Intel IOMMU drivers had their own
     implementation which is now unified.

   - finish support for iommu-groups. All drivers implement this feature
     now so that IOMMU core code can rely on it.

   - finish support for 'struct iommu_device' in iommu drivers. All
     drivers now use the interface.

   - new functions in the IOMMU-API for explicit IO/TLB flushing. This
     will help to reduce the number of IO/TLB flushes when IOMMU drivers
     support this interface.

   - support for mt2712 in the Mediatek IOMMU driver

   - new IOMMU driver for QCOM hardware

   - system PM support for ARM-SMMU

   - shutdown method for ARM-SMMU-v3

   - some constification patches

   - various other small improvements and fixes"

* tag 'iommu-updates-v4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (87 commits)
  iommu/vt-d: Don't be too aggressive when clearing one context entry
  iommu: Introduce Interface for IOMMU TLB Flushing
  iommu/s390: Constify iommu_ops
  iommu/vt-d: Avoid calling virt_to_phys() on null pointer
  iommu/vt-d: IOMMU Page Request needs to check if address is canonical.
  arm/tegra: Call bus_set_iommu() after iommu_device_register()
  iommu/exynos: Constify iommu_ops
  iommu/ipmmu-vmsa: Make ipmmu_gather_ops const
  iommu/ipmmu-vmsa: Rereserving a free context before setting up a pagetable
  iommu/amd: Rename a few flush functions
  iommu/amd: Check if domain is NULL in get_domain() and return -EBUSY
  iommu/mediatek: Fix a build warning of BIT(32) in ARM
  iommu/mediatek: Fix a build fail of m4u_type
  iommu: qcom: annotate PM functions as __maybe_unused
  iommu/pamu: Fix PAMU boot crash
  memory: mtk-smi: Degrade SMI init to module_init
  iommu/mediatek: Enlarge the validate PA range for 4GB mode
  iommu/mediatek: Disable iommu clock when system suspend
  iommu/mediatek: Move pgtable allocation into domain_alloc
  iommu/mediatek: Merge 2 M4U HWs into one iommu domain
  ...
2017-09-09 15:03:24 -07:00
Linus Torvalds
5f9cc57036 LED updates for 4.14
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABCAAGBQJZsZswAAoJEL1qUBy3i3wm2cwQANp9Hufui0BYxD7X9bB3sBvX
 LJ2lbwQlZ93gmQo176fvE22wYw90wmf4CG12pdx8CB4TIBOuaEl1EUptaIxHjBkP
 +MOmiGxT0YZgUDmSo+sCL+LHEDWU8gcs8MI5ZkAxgALUb0kYiQySH5UlCJJOJIJv
 ww1A4K1bo6VONli+y8ZDa3eKgkArg1/pXYl2VejNMSkr88fyzf35fOKD44lMUGos
 5KFVWdPMnz1OuVbh199x9vAPZygb4PNzJL1Tf2ntklBfU3mX+582e6uvIPqh4Tuy
 D5ZianpBNtA0IBV4G0UE+n/9rOy9oAr34+Tq9Gv0BRLlQXsC8FMEM5xcCDd1kFCI
 L6FeiGc1YnEtJpUVEhcWzmpww2EBBRKIB9lJK5c8VUlWf/yZME72Al5R8c7uffcE
 hc78eUVwM2fHNmBhmCmK49flC67/LMzHMiaEQ/lSGtGnd8ratclshFuooiPzsJN/
 MSTX2B3yxWvBjwmZMNixY6WasduKKJs4K5xHnHJzyLt0mvClLiwgOvi1Dks0t+Ko
 imE6cdU3LCUeJJb4I9SgHTTjp33CTqq5ZBhbFsgqjNsfj4o/6GmnWxvSZ4ywqJMW
 HwU4iyBKlx2AVfhzIPozuoE67+HJyRYIexsUZi4vt0Pw2qHxwp1RvH+BMQbXGLLg
 rJ/H9ef5BAPRkPWxe1HM
 =E1ff
 -----END PGP SIGNATURE-----

Merge tag 'leds_for_4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/j.anaszewski/linux-leds

Pull LED updates from Jacek Anaszewski:
 "LED class drivers improvements:

  leds-pca955x:
   - add Device Tree support and bindings
   - use devm_led_classdev_register()
   - add GPIO support
   - prevent crippled LED class device name
   - check for I2C errors

  leds-gpio:
   - add optional retain-state-shutdown DT property
   - allow LED to retain state at shutdown

  leds-tlc591xx:
   - merge conditional tests
   - add missing of_node_put

  leds-powernv:
   - delete an error message for a failed memory allocation in
     powernv_led_create()

  leds-is31fl32xx.c
   - convert to using custom %pOF printf format specifier

  Constify attribute_group structures in:
   - leds-blinkm
   - leds-lm3533

  Make several arrays static const in:
   - leds-aat1290
   - leds-lp5521
   - leds-lp5562
   - leds-lp8501"

* tag 'leds_for_4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/j.anaszewski/linux-leds:
  leds: pca955x: check for I2C errors
  leds: gpio: Allow LED to retain state at shutdown
  dt-bindings: leds: gpio: Add optional retain-state-shutdown property
  leds: powernv: Delete an error message for a failed memory allocation in powernv_led_create()
  leds: lp8501: make several arrays static const
  leds: lp5562: make several arrays static const
  leds: lp5521: make several arrays static const
  leds: aat1290: make array max_mm_current_percent static const
  leds: pca955x: Prevent crippled LED device name
  leds: lm3533: constify attribute_group structure
  dt-bindings: leds: add pca955x
  leds: pca955x: add GPIO support
  leds: pca955x: use devm_led_classdev_register
  leds: pca955x: add device tree support
  leds: Convert to using %pOF instead of full_name
  leds: blinkm: constify attribute_group structures.
  leds: tlc591xx: add missing of_node_put
  leds: tlc591xx: merge conditional tests
2017-09-07 14:33:13 -07:00
Olof Johansson
b884026a2b Merge branch 'next/dt64' into next/dt
* next/dt64: (233 commits)
  arm64: dts: marvell: mcbin: enable more networking ports
  arm64: dts: marvell: add a reference to the sysctrl syscon in the ppv2 node
  arm64: dts: marvell: add TX interrupts for PPv2.2
  arm64: dts: uniphier: add PXs3 SoC support
  arm64: dts: uniphier: fix size of sdctrl node
  arm64: dts: uniphier: add AIDET nodes
  arm64: dts: uniphier: add reset controller node of analog amplifier
  arm64: dts: marvell: add Device Tree files for Armada-8KP
  arm64: dts: rockchip: add Haikou baseboard with RK3399-Q7 SoM
  arm64: dts: rockchip: add RK3399-Q7 (Puma) SoM
  dt-bindings: add rk3399-q7 SoM
  arm64: dts: rockchip: add rk3328-rock64 board
  arm64: dts: rockchip: add rk3328 pdm node
  ARM64: dts: meson-gxl-libretech-cc: Add GPIO lines names
  ARM64: dts: meson-gx: Add AO CEC nodes
  ARM64: dts: meson-gx: update AO clkc to new bindings
  arm64: dts: rockchip: add more rk3399 iommu nodes
  arm64: dts: rockchip: add rk3368 iommu nodes
  arm64: dts: rockchip: add rk3328 iommu nodes
  arm64: zynqmp: Add generic compatible string for I2C EEPROM
  ...
2017-09-05 20:41:43 -07:00
Martin Blumenstingl
126534141b MIPS: lantiq: Add a GPHY driver which uses the RCU syscon-mfd
Compared to the old xrx200_phy_fw driver the new version has multiple
enhancements. The name of the firmware files does not have to be added
to all .dts files anymore - one now configures the GPHY mode (FE or GE)
instead. Each GPHY can now also boot separate firmware (thus mixing of
GE and FE GPHYs is now possible).
The new implementation is based on the RCU syscon-mfd and uses the
reeset_controller framework instead of raw RCU register reads/writes.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Cc: john@phrozen.org
Cc: p.zabel@pengutronix.de
Cc: kishon@ti.com
Cc: mark.rutland@arm.com
Cc: linux-mips@linux-mips.org
Cc: linux-mtd@lists.infradead.org
Cc: linux-watchdog@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-spi@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/17128/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-09-04 21:19:02 +02:00
Gabriel Fernandez
3e4d618b07 clk: stm32h7: Add stm32h743 clock driver
This patch enables clocks for STM32H743 boards.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>

for MFD changes:
Acked-by: Lee Jones <lee.jones@linaro.org>

for DT-Bindings
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-08-31 18:35:47 -07:00
Stephen Boyd
056db9d7c4 Allwinner clock changes for 4.14, part 3
Conversion of the last two SoCs (A10, A20) to the sunxi-ng framework.
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJZno1VAAoJEBx+YmzsjxAgJ4gQALqulaGhH4rEjW5oouZ8JJwd
 O3s4FFazKMXlgV1q/LYbf1eYrUQhJbr4tHTbCbqm3klaMTz6jOAnRlTjSKkoIssA
 jrtbP6MzHcWE6RnaIA96z45T2p5ZyMGt18/ZgpdQlmmQ9GcV27I+gQs0VsLLPMY0
 PGlG+r6qDnwHbCaEymvbLG16/xLVXHmqXrWQ/9GRWRK1fQ7ffgGw80X1ASuflSnE
 fJCqfhUc1SG3ZGho0xZXFKUvifoaHg1gyFQrrP5mVhYSeUogYSMrvQim/RwwxSVx
 6GkHmNj6O15UvD2A7Y71VqjvjNi5gB054J18Nl8PxFJyHPa33ocC5DkbOXEJI6jL
 PESH29A6myS+v2cY6lm1PVdWIGrDNcCgocjsZSeyn4xKU6oPmFHzlISt0hZPPoQ3
 lxqWZrH9rUeVLVAkX2XzMhi4xHc6wZF2eTsp+e0ylDL09c//Dt2ojKgWoN7DeUlN
 sRgjcPlGB5KRYMYi1ChH5RSsH8h8S4wzF2mSESkGjLCZ82r1BerRBjvaF1MaIEGd
 xm5yNBw4Y3HL+AoRSEZiZ9FjERfejiI3Q/oqgcLdAGiYD0pDWMU+wjrfHXnQ1yOj
 HITZaabZRf19D+pNdLpMlzp1UmQQbflCDfOnXaz1r1q6yuWdXvXmgIL2CfQGPqCD
 Yn+FyX0JEE6yq4lvJ4fA
 =Wce+
 -----END PGP SIGNATURE-----

Merge tag 'sunxi-clk-for-4.14-3' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-next

Pull more Allwinner clock changes from Maxime Ripard:

 * Conversion of the last two SoCs (A10, A20) to the sunxi-ng framework

* tag 'sunxi-clk-for-4.14-3' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  clk: sunxi-ng: Add sun4i/sun7i CCU driver
  dt-bindings: List devicetree binding for the CCU of Allwinner A10
  dt-bindings: List devicetree binding for the CCU of Allwinner A20
2017-08-31 10:57:34 -07:00
Arnd Bergmann
c32e176ac1 A lot of attention for the rv1108 soc targetted at media-processing
(usb, operating points, spi, pwm, adc, watchdog, i2c and devices for
 its evb).
 
 RK3228/3229 gets iommu and spi nodes. Similar to the rk3288 which
 also gets some more iommu nodes as well as getting converted to 64
 bit addresses due to wanting to address more than 4GB of memory
 via LPAE.
 -----BEGIN PGP SIGNATURE-----
 
 iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAlmdoA4QHGhlaWtvQHNu
 dGVjaC5kZQAKCRDzpnnJnNEdgeBtB/9oM4MmVRJ0YX7hk4NuU9c4HHdvCW0f1rJe
 Q6rE6dP7fW3J27d6PuySVWzvIBmD+3xVA2t0dDm85DIP8f1DFz3vyNhkEsu1VG89
 MULTektihczugCy+sh3iHILs4fLXJ8QUjCKJWOcWmZHOaXNXXjJIVjC97m5F4ZAj
 KVOYXNnCKdaHYIeP0lkjStL8Z9Ua7svkjfgsSPTGTSJQQ+bGcd/8JnmlkzjfHWLw
 qNz6M7FPoJ1rAffskr1At27oRs7UAVSKNAejl8DWKvLXml6NQPRRRu99sLLanxII
 3b6LsC6Vwea4a1Rjwx0LZWdDUtB1W34/ZIEw4JceK/i6HfV5K2Oi
 =di6U
 -----END PGP SIGNATURE-----

Merge tag 'v4.14-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

Pull "second round of Rockchip dts32 changes for 4.14" from Heiko Stübner:

A lot of attention for the rv1108 soc targetted at media-processing
(usb, operating points, spi, pwm, adc, watchdog, i2c and devices for
its evb).

RK3228/3229 gets iommu and spi nodes. Similar to the rk3288 which
also gets some more iommu nodes as well as getting converted to 64
bit addresses due to wanting to address more than 4GB of memory
via LPAE.

* tag 'v4.14-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: dts: rockchip: enable usb for rv1108-evb
  ARM: dts: rockchip: add usb nodes for rv1108 SoCs
  dt-bindings: update grf-binding for rv1108 SoCs
  ARM: dts: rockchip: add cpu power supply for rv1108 evb
  ARM: dts: rockchip: add cpu opp table for rv1108
  ARM: dts: rockchip: add rk322x iommu nodes
  ARM: dts: rockchip: add accelerometer bma250e dt node for rv1108 evb
  ARM: dts: rockchip: add pmic rk805 dt node for rv1108 evb
  ARM: dts: rockchip: add pwm backlight for rv1108 evb
  ARM: dts: rockchip: add pwm dt nodes for rv1108
  ARM: dts: rockchip: add spi dt node for rv1108
  ARM: dts: rockchip: add saradc support for rv1108
  ARM: dts: rockchip: add watchdog dt node for rv1108
  ARM: dts: rockchip: add i2c dt nodes for rv1108
  clk: rockchip: fix up indentation of some RV1108 clock-ids
  clk: rockchip: rename the clk id for HCLK_I2S1_2CH
  clk: rockchip: add more clk ids for rv1108
  ARM: dts: rockchip: add more iommu nodes on rk3288
  ARM: dts: rockchip: convert rk3288 device tree files to 64 bits
  ARM: dts: rockchip: add spi node and spi pinctrl on rk3228/rk3229

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2017-08-24 15:49:06 +02:00
Priit Laes
c84f5683f6 clk: sunxi-ng: Add sun4i/sun7i CCU driver
Introduce a clock controller driver for sun4i A10 and sun7i A20
series SoCs.

Signed-off-by: Priit Laes <plaes@plaes.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-08-24 10:15:54 +02:00
Srinivas Kandagatla
69a6beab08 clk: msm8996-gcc: add missing smmu clks
This patch adds missing LPASS smmu clks which are required by the audio driver.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-08-23 16:07:18 -07:00
Stephen Boyd
535b1100d1 clk: renesas: Updates for v4.14
- Add more module clocks for R-Car V2H and M3-W,
   - Add support for the R-Car Gen3 USB 2.0 clock selector PHY,
   - Add support for the new R-Car D3 SoC,
   - Allow compile-testing of all (sub)drivers now all dummy infrastructure
     is available,
   - Small fixes and cleanups.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJZlVHhAAoJEEgEtLw/Ve77wqwP/1/RgfVlAoAHDL+aIo5FacVk
 uL5XPembCm7lCB+9OIU7GIrZQbZGWFBRUfL4oqOSfxqsTLv9gAKyZNUBETOKijXo
 NW0m6gkpN2+AZvZlTsZUzYLgdakNdOXi5atYn41zvAy2wbtww2aUqUHvwHz2PKjz
 k4ucRJEjljVGzTMu5/yqaADioEnTnb9FZ+uRGiy0/W+sD4UoEum75Ay6u3t7s0bL
 cmA2rtCFg52GlvC+BsZHntAjTHlSFXn7W8LddP1sb0oVvc9spC3k8q4DR8zVGNU2
 VCk6XKyOnWTpHjyw/IYBAjQ+nNainklLyIusnEnG0VyUZY0pvFcC/SOAHxO4NSBS
 AJqD7ylhkc6gnYL0lqp+n6RJaoY4GOhpSFz+NNtPXFXaDUfuf+WTiYzHnrrCCZ4z
 jTGcmiynl229jAxN5fYudjfnbydBfvdKGINtVRI7ApP+oZa5K0Wzbd4ZDx4Q2mML
 90mCdy+BVFGUcosh91kpL9vKazEm8EBYArMVhRDTFog6c4VyUrzL77fWleoptc4M
 yWlWB/KwfAhr0/NM1cxguax9bG1eOJbwq5FxHGwUqUCjxUxUWItNM9E1RMJ89drm
 zIsRO3CseOVFJcsm/75owYc/vXNbWcZ09wHyt8RExygPUPxRj3iCCvI5Y+tDqDIG
 zb2H5/e0HI7PjHt+hLEW
 =77l6
 -----END PGP SIGNATURE-----

Merge tag 'clk-renesas-for-v4.14-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-next

Pull Renesas clk driver updates from Geert Uytterhoeven:

  * Add more module clocks for R-Car V2H and M3-W,
  * Add support for the R-Car Gen3 USB 2.0 clock selector PHY,
  * Add support for the new R-Car D3 SoC,
  * Allow compile-testing of all (sub)drivers now all dummy infrastructure
    is available,
  * Small fixes and cleanups.

* tag 'clk-renesas-for-v4.14-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
  clk: renesas: r8a7796: Add USB3.0 clock
  clk: renesas: rcar-usb2-clock-sel: Add R-Car USB 2.0 clock selector PHY
  clk: renesas: cpg-mssr: Add R8A77995 support
  clk: renesas: rcar-gen3: Add support for SCCG/Clean peripheral clocks
  clk: renesas: rcar-gen3: Add divider support for PLL1 and PLL3
  clk: renesas: Add r8a77995 CPG Core Clock Definitions
  clk: renesas: rcar-gen3-cpg: Refactor checks for accessing the div table
  clk: renesas: rcar-gen3-cpg: Drop superfluous variable
  clk: renesas: Allow compile-testing of all (sub)drivers
  clk: renesas: r8a7792: Add IMR-LX3/LSX3 clocks
  clk: renesas: div6: Document fields used for parent selection
2017-08-23 15:39:58 -07:00
Stephen Boyd
cf657bb940 The biggest change is fixing the jitter on the fractional clock-type
Rockchip socs experience with the default approximation. For that we
 introduce the ability to override it with a clock-specific approximation
 and use that to create the needed rate settings as described in the
 Rockchip soc manuals (same for all Rockchip socs).
 
 Apart from that we have support for the rk3126 clock controller
 which is similar to the rk3128 with some minimal differences
 and a lot of improvements and fixes for the rv1108 clock controller
 (missing clocks, some clock-ids, naming fixes, register fixes).
 -----BEGIN PGP SIGNATURE-----
 
 iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAlmcl8sQHGhlaWtvQHNu
 dGVjaC5kZQAKCRDzpnnJnNEdgeiBB/wIf5LHDu09HuOb1bjtYASMc//ve2ymhpd7
 QsccJ0nteJTWnYQlrJUPYN8YhRVqPNrz7Fq8PkMMkzm89fQQ6lr5DxOy6olKTPM4
 sGf+242eE3XttHjJxcshNPS98A56zBa9OgNC9sUsTex8r7NaJn+Gvlf0sXEgQRQi
 5FprJf49/4rlHZypVMg1j+aMEWM8ZAmXLP3F77Qch+rfxE74POV9/HI7EEoSQ9MX
 TxwEewmM8IGXY9aVTvtADPmX31CgdOD3qm4giwGkBf2F8SajP8R63wi+BYpNfUTX
 +TrexLXEfeKEVtU+xPXsNYmEnAOW6sRvfyUnq4oA1hVSnFoexFA1
 =Upwy
 -----END PGP SIGNATURE-----

Merge tag 'v4.14-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next

Pull Rockchip clk driver updates from Heiko Stuebner:

The biggest change is fixing the jitter on the fractional clock-type
Rockchip socs experience with the default approximation. For that we
introduce the ability to override it with a clock-specific approximation
and use that to create the needed rate settings as described in the
Rockchip soc manuals (same for all Rockchip socs).

Apart from that we have support for the rk3126 clock controller
which is similar to the rk3128 with some minimal differences
and a lot of improvements and fixes for the rv1108 clock controller
(missing clocks, some clock-ids, naming fixes, register fixes).

* tag 'v4.14-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  clk: rockchip: fix the rv1108 clk_mac sel register description
  clk: rockchip: rename rv1108 macphy clock to mac
  clk: rockchip: add rv1108 ACLK_GMAC and PCLK_GMAC clocks
  clk: rockchip: add rk3228 SCLK_SDIO_SRC clk id
  clk: rockchip: add rv1108 ACLK_GAMC and PCLK_GMAC ID
  clk: rockchip: add rk3228 sclk_sdio_src ID
  clk: rockchip: add special approximation to fix up fractional clk's jitter
  clk: fractional-divider: allow overriding of approximation
  clk: rockchip: modify rk3128 clk driver to also support rk3126
  dt-bindings: add documentation for rk3126 clock
  clk: rockchip: add some critical clocks for rv1108 SoC
  clk: rockchip: rename some of clks for rv1108 SoC
  clk: rockchip: fix up some clks describe error for rv1108 SoC
  clk: rockchip: support more clks for rv1108
  clk: rockchip: fix up the pll clks error for rv1108 SoC
  clk: rockchip: support more rates for rv1108 cpuclk
  clk: rockchip: fix up indentation of some RV1108 clock-ids
  clk: rockchip: rename the clk id for HCLK_I2S1_2CH
  clk: rockchip: add more clk ids for rv1108
2017-08-23 15:33:45 -07:00
Stephen Boyd
1fea70bc18 Allwinner clock changes for 4.14, round 2
Usual improvements:
 
   - Added support for fixed post-divider on divider and NKM-style clocks
 
   - Added driver for R40 CCU
 
 Non critical fixes (from round 1):
 
   - Fix sunxi-ng/ccu-sunxi-r.h header file guard macro typo
 
   - Make fractional clock modes really used and correctly configured
 
   - Make H3 cpu clock rate change correctly to be used with cpufreq
 -----BEGIN PGP SIGNATURE-----
 
 iQJCBAABCgAsFiEE2nN1m/hhnkhOWjtHOJpUIZwPJDAFAlmaR6AOHHdlbnNAY3Np
 ZS5vcmcACgkQOJpUIZwPJDC8YA//aLULoosISnyHs+wKowVHuDb7/mQ82O1gOAxC
 oE/vscd/WCRm7A5tfy+xHfajX/YRf32Qc09wB7fxUF4R0lgkO9QjUO0yX74a6bPh
 HCh/+bcmeNl9TZAYpTs72Q4nfc1x63OZwxMqTRnBmh3cevyIBJiFvqPjoMeD+Ari
 n32QEBgGE+A8bWshVFpNFyId6iyfMfozSYninIkVkwMGr7QgBgJRK1/5sftyZMR+
 NQ2IGkaUfICnXofF//pNKsH7TN770gyDtFVWjrKZMrEKoP+gp3mawzMpfePKH/O6
 4ihcm5LOo1Kdg5UzRTpQ2B/9fNUn2EvFYT6RuIBfddQcaflT1AzWtNK52j2L/crD
 tFyamcCSsNY5LzeySbVW+pQMRfrq6UCYtssiL7HYEcwMzvv61PfyDtKq5dxtJd0Q
 W8S6wPE/foj0i0JQWs0K70AacGU6XdEanUAtc5r3AsniCwwOtlwnaQqOlE5CiwAo
 HOSItOxX4Y/9QglnntsDyhNUaKpaSiG21XdE3ho3xq1/CS9ED3p5Ljbshem5fnPi
 mPisF6Ca6NVvCZ+sjH2RVvmGyh3d+BPfQLWC/sTamC4rnpDalrMq6IsCOivzbxqQ
 ltkYwUO1nmz5NMloeWYCUWWmLUOECCQu7Mppf2UQxpidrEEY0mbBYFdOlehrlHZT
 bWt2NdQ=
 =DKSp
 -----END PGP SIGNATURE-----

Merge tag 'sunxi-clk-for-4.14-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-next

Pull Allwinner clock changes from Chen-Yu Tsai:

 * Added support for fixed post-divider on divider and NKM-style clocks
 * Added driver for R40 CCU
 * Fix sunxi-ng/ccu-sunxi-r.h header file guard macro typo
 * Make fractional clock modes really used and correctly configured
 * Make H3 cpu clock rate change correctly to be used with cpufreq

* tag 'sunxi-clk-for-4.14-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  clk: sunxi-ng: support R40 SoC
  dt-bindings: add compatible string for Allwinner R40 CCU
  clk: sunxi-ng: nkm: add support for fixed post-divider
  clk: sunxi-ng: div: Add support for fixed post-divider
  dt-bindings: clock: sunxi-ccu: Add compatibles for sun5i CCU driver
  clk: sunxi-ng: allow set parent clock (PLL_CPUX) for CPUX clock on H3
  clk: sunxi-ng: h3: gate then ungate PLL CPU clk after rate change
  clk: sunxi-ng: Wait for lock when using fractional mode
  clk: sunxi-ng: Make fractional helper less chatty
  clk: sunxi-ng: multiplier: Fix fractional mode
  clk: sunxi-ng: Fix fractional mode for N-M clocks
  clk: sunxi-ng: Fix header guard of ccu-sun8i-r.h
2017-08-23 15:31:48 -07:00
Yong Wu
a9467d9542 iommu/mediatek: Move MTK_M4U_TO_LARB/PORT into mtk_iommu.c
The definition of MTK_M4U_TO_LARB and MTK_M4U_TO_PORT are shared by
all the gen2 M4U HWs. Thus, Move them out from mt8173-larb-port.h,
and put them into the c file.

Suggested-by: Honghui Zhang <honghui.zhang@mediatek.com>
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2017-08-22 16:37:58 +02:00
Elaine Zhang
c7d0045b08 clk: rockchip: rename rv1108 macphy clock to mac
This MAC has no internal phy for rv1108 and the whole clock
infrastructure hasn't been used yet, so is safe to fix.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Reviewed-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-08-22 02:53:55 +02:00
Elaine Zhang
1858698e0a clk: rockchip: add rv1108 ACLK_GAMC and PCLK_GMAC ID
This patch exports gmac aclk and pclk for dts reference.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Reviewed-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-08-22 00:38:03 +02:00
Elaine Zhang
9762e7ff16 clk: rockchip: add rk3228 sclk_sdio_src ID
This patch exports sdio src clock for dts reference.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-08-22 00:36:50 +02:00
Icenowy Zheng
cd030a78f7 clk: sunxi-ng: support R40 SoC
Allwinner R40 SoC have a clock controller module in the style of the
SoCs beyond sun6i, however, it's more rich and complex.

Add support for it.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2017-08-19 17:04:37 +08:00
Arnd Bergmann
e517030e26 Reset controller changes for v4.14
- constify zx2967 reset_ops
 - add a convenience API to manage an array of resets
 - let deassert report success and let assert report success for shared resets
   if the reset controller driver does not implement (de)assert.
 - add HSDKv1 reset driver
 - remove Gemini reset controller, the driver is made obsolete
   by a combined clock/reset driver in drivers/clk
 - fix the total number of reset lines in the sunxi driver
 - various uniphier updates and fixes:
   - remove sLD3 SoC support
   - simplify system reset register and bit definitions
   - add audio systems, video input subsystem, and analog amplifiers reset
     controls
 -----BEGIN PGP SIGNATURE-----
 
 iQJMBAABCAA2FiEEBsBxhV1FaKwXuCOBUMKIHHCeYOsFAlmWg5MYHHBoaWxpcHAu
 emFiZWxAZ21haWwuY29tAAoJEFDCiBxwnmDrEqoQAKSQDhwA5ZyBd216PoUSaLqf
 tTGrJc/atfs+cDiqSyQDQ5vN0dTMnPV+YjGmwITg55ZGQTJRTq5nVhwM6y0CaASN
 PE7U/9Ma/8GWOjtC+6hun6tAHeuX3fMq2cYK8BSL+D7MQr+zkIgEQx3YsbR/0Np7
 qmawpZSKAvIxrpVkQiVrsxmVvxi23GdncGUPDHtKhAW4N1T3ywogpW/7t6AcDZZl
 XIa09fIRxfB9VECIXPfe/CDkTHPcKgrxP80/AQJksRmWKBtFU3dRktYVscqUplz7
 gS3EelAJ3NYscqWQevCXSvGsSpiNJfePKNLRrDSTKX+eKbAignHvcRhJ6YuP4QrY
 t7ZGm7VZf+HSY/XYXbcXEO8zcaf3LFT1lO3KAQ3/nmFie/CuVCC+Dpl74OPsBvcD
 +3uhQHqvm8AwnxBmTRtMNH3AtaDFPxT9hbebhsoJKujSb5+5aC4ygDAnY0E6QWfJ
 wYG/qKz6+dtrFVIOZG3TFjz2/kgjXRd8zegYtxn20KH1Qk/i+JqaIofbwPvPWAKS
 A5vi6sLt6AruRUh213E9+Pi+EWQs1Qhexqjk1rtna9RUkMmu2Qbx50hKkgdgE4Q7
 EWcQSB43bpGRo5xt4zhy7fnBPj3zxjJK9gAzeGNrbN16z5gulHarpLWb9X5ujli4
 9zv7wk00SQIaSqlVFKBM
 =YW4N
 -----END PGP SIGNATURE-----

Merge tag 'reset-for-4.14' of git://git.pengutronix.de/git/pza/linux into next/drivers

Pull "Reset controller changes for v4.14" from Philipp Zabel:

- constify zx2967 reset_ops
- add a convenience API to manage an array of resets
- let deassert report success and let assert report success for shared resets
  if the reset controller driver does not implement (de)assert.
- add HSDKv1 reset driver
- remove Gemini reset controller, the driver is made obsolete
  by a combined clock/reset driver in drivers/clk
- fix the total number of reset lines in the sunxi driver
- various uniphier updates and fixes:
  - remove sLD3 SoC support
  - simplify system reset register and bit definitions
  - add audio systems, video input subsystem, and analog amplifiers reset
    controls

* tag 'reset-for-4.14' of git://git.pengutronix.de/git/pza/linux:
  reset: uniphier: add analog amplifiers reset control
  reset: uniphier: add video input subsystem reset control
  reset: uniphier: add audio systems reset control
  reset: sunxi: fix number of reset lines
  reset: uniphier: do not use per-SoC macro for system reset block
  reset: uniphier: remove sLD3 SoC support
  Revert "reset: Add a Gemini reset controller"
  ARC: reset: introduce HSDKv1 reset driver
  reset: make (de)assert report success for self-deasserting reset drivers
  reset: Add APIs to manage array of resets
  reset: zx2967: constify zx2967_reset_ops.
2017-08-19 00:04:27 +02:00
Arnd Bergmann
9da95d8f5b - add mt7623a smp support
- scpsys: reduce code duplication
 - scpsys: add mt7622 support
 - pmic wrapper: make of_device_ids constant
 -----BEGIN PGP SIGNATURE-----
 
 iQJLBAABCAA1FiEEiUuSfQSYnG8EMsBltDliWyzx00MFAlmVfMEXHG1hdHRoaWFz
 LmJnZ0BnbWFpbC5jb20ACgkQtDliWyzx00MGyw//b1Ax9tAl+eX1phkU5r/sdyd6
 KS72i4pMo4yyyuoPCLKhpwH2rL1UrgY/T6f6bEyVf6KNhzgUvx1P4Y5PSpo2R+Jv
 AJ9lIypXCxUvmrQL5FOuQ+8SY694SSm1IBsoJ70pNA+/m7//Yfk0eiueUa7epNI0
 dhrHOvNaZPQbnCUjFa+qdkK8x04MoAKUQcq9sp1vpcvYTL7V6OrW2V6kc0iqwaN1
 G91QW2r+XAgO1KA1PIMqC8E9v06dhYWuaPI3SMCIqp/NFnNZA8j58KySzW7+nB/B
 7IlDARYDyzokw/JTUuWSlOOPh425xVSExidkTbCgb7m0Lt8i3CvW89yXsqKSL/+U
 Ezek9w/rJNGb5OoLhT1xQfy6XrXFCW78gl9HKZhbrM1eBiEeJctLlmQula57nyJH
 qIlCMjuueKYHUKTGT5LXidNbGesfx4vLt6v803XouF4D3NCIqPahdFqtBnEfsOEO
 l1xwbTSq44VSFtUKSdRrgt6e8Uxa25ftOkbKlS8vIPcsYJ7gnK7r2/ERWNJF8F+f
 x4toGOKhOVRTRwAZIx9ncKnQp08g6jegiRHW4JrJNmPnUwwC00I06+Jiltg5KJIP
 ZqgfjXesdjD660pWl70YGMRtdUNLuNgZRnyXg1CM94CfOimUBZi2PXhoK1Wm/7sj
 Db0QrPV4DQHti15Q0ig=
 =IW3o
 -----END PGP SIGNATURE-----

Merge tag 'v4.13-next-soc' of https://github.com/mbgg/linux-mediatek into next/drivers

Pull "arm: mediatek: soc updates for v4.14" from Matthias Brugger:

- add mt7623a smp support
- scpsys: reduce code duplication
- scpsys: add mt7622 support
- pmic wrapper: make of_device_ids constant

* tag 'v4.13-next-soc' of https://github.com/mbgg/linux-mediatek:
  soc: mediatek: add SCPSYS power domain driver for MediaTek MT7622 SoC
  soc: mediatek: add header files required for MT7622 SCPSYS dt-binding
  soc: mediatek: reduce code duplication of scpsys_probe across all SoCs
  dt-bindings: soc: update the binding document for SCPSYS on MediaTek MT7622 SoC
  soc: mtk-pmic-wrap: make of_device_ids const.
  ARM: mediatek: add MT7623a smp bringup code
2017-08-18 23:27:22 +02:00
Arnd Bergmann
2de8161251 ARM: Keystone DTS for 4.14
Contents:
 - ti-sci power domain, clock and reset controller support
 - DSP nodes for k2h/k2l/k2e evms
 - DSP CMA memory pools for k2h/k2l/k2e/keg evms
 - MMC/hsmmc suport for k2g
 - eDMA support for k2g
 - DCAN support for k2g
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJZlOAZAAoJEHJsHOdBp5c/ZNIP/3wCj+qddu92u7PKknIKptKQ
 zMKfXnSI01DnjBiuUM3qD6N/ELJCmYrFs2mdYhxjSPNNzKIhMwfg6fSHMWoAmFIN
 juP5VGCs61e2PWOOL74vw93f1+GEWawgG8VpreeFOgkmDXM1t2jHGFdNkOQH64to
 B6ONt423UodLIUp8VQzEcH5sluVHErv2OwizO/EWBKAnioQDlKUIS9KDG3eXb98E
 oVuoso4v8WIoZQj7Rtwpj7gAjnFxCl6DbEWsD5upJ1XLmUtAjqbnGe5PZihYQolJ
 Klc1qqk0gJPQxfkVzesEOn6k0J5y9+SwYELX9DGnno1yDCA98InCtYdTEDENKqlr
 dWAvlsbC0JjaHJnC9hU83Y62rMLZsO/fTV7EZU6Cu1M2Suu8O66LFjlnx77uB21g
 pES0y8bPFdre5JdHXwtvLtyeaDQR2HnTwhzS3Ul1VeMP6gjsiD4FoHAYeqE7tfOE
 dIaYnORlvMbDE5qP7aeFR3blIPIGXtMyI1ARD+NY4uLUtOUevttCQh+pSasaJ/pF
 HcYdL9aH1EvTGCS+WY+oes8+6oII1YQo/ASmV200OFHrg1Ucme9iEiaeFAqrR4rO
 tIXtcOSR4LMjiDHqRBtw5/Ei8hiprRz4070oVAHaKQ190XpmmQe2AkgthrgsKmXM
 THbU5V8bDRTvNKLmYU7U
 =9ZLH
 -----END PGP SIGNATURE-----

Merge tag 'keystone_dts_for_4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/dt

Pull "ARM: Keystone DTS for 4.14" from Santosh Shilimkar:

Contents:
- ti-sci power domain, clock and reset controller support
- DSP nodes for k2h/k2l/k2e evms
- DSP CMA memory pools for k2h/k2l/k2e/keg evms
- MMC/hsmmc suport for k2g
- eDMA support for k2g
- DCAN support for k2g

* tag 'keystone_dts_for_4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone: (22 commits)
  ARM: dts: keystone-k2g-ice: Add and enable DSP CMA memory pool
  ARM: dts: keystone-k2g-evm: Add and enable DSP CMA memory pool
  ARM: dts: keystone-k2g: Add DSP node
  ARM: dts: k2g: Add DCAN nodes
  dt-bindings: net: c_can: Update binding for clock and power-domains property
  ARM: dts: keystone-k2g-evm: Enable MMC0 and MMC1
  ARM: dts: keystone-k2g: add MMC0 and MMC1 nodes
  ARM: dts: keystone-k2g: Add eDMA nodes
  dt-bindings: ti,omap-hsmmc: Add 66AK2G mmc controller
  dt-bindings: ti,edma: Add 66AK2G specific information
  ARM: dts: keystone-k2g: Add gpio nodes
  ARM: dts: keystone-k2e-evm: Add and enable DSP CMA memory pool
  ARM: dts: keystone-k2l-evm: Add and enable common DSP CMA memory pool
  ARM: dts: keystone-k2hk-evm: Add and enable common DSP CMA memory pool
  ARM: dts: keystone-k2e: Add DSP node
  ARM: dts: keystone-k2l: Add DSP nodes
  ARM: dts: keystone-k2hk: Add DSP nodes
  ARM: dts: keystone-k2g: Add TI SCI reset-controller node
  ARM: dts: keystone-k2g: Add ti-sci clock provider node
  ARM: dts: keystone-k2g: Add ti-sci power domain node
  ...
2017-08-17 10:56:37 +02:00
Arnd Bergmann
f822e60085 Renesas ARM Based SoC Drivers Updates for v4.14
Add R-Car D3 (r8a77995) support to the Renesas-specific SoC drivers
 - SoC identification
 - System controller
 - Reset controller
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJZf0DrAAoJENfPZGlqN0++LacP/jcymVeUMDpkkPTcoM6b37Qq
 ADSDdiR+1Szu29wtfNDTFUoAlh4UvlpAN93GGJLZ/iYsMDyZYIhcUhnE4l119fdy
 6iMwDhctXHlQ8VNhY0Z9MUXZyyN2Fu/9L2ZDJ2briM2xoNiMgdUYvMlsZI8ZaN1/
 JRmfP+lzCM25Rkdi9sLYolj8szaxbW9RgLBgvXD7ERJ5bsJRKGs6aDrJ2AXMZpwn
 BVOeughlPTxvv+NVFA1qZXWh63/7RjW5t6OMgHw3eNOABKv+o5YfdqOZAa8PHgn9
 LhNAkR90Il9hsGesWwHMKPuCgGHE0R/2nQppWM0xBWO/HfMRnpx8DEt+em/Kjpep
 uxex+bqMOJB0GksVWPM73ci1CQmQxKS6xrTXeTE9kiN+6WD+b0Fsntoz2XN62uJO
 df0z46N6T3I4jFc00vOBnXxCdgDCBCJLxtU8NFg8jzmGP+NkKxxYiwCEs1auKlLF
 CUVX+o8H4V9FKnD3h0/mNsNyw/gCw6TWXlyr/Ba6AjBuZ8TghhMjQ+zbY+xCN9sb
 IFONbr69pVBJ9N2ssGWdf2iLfa+JNcaJdEPZUkumgUlZ9M5RgS+yg3YoTFtlAO6R
 JN2uP1E20qBLlrvAu7pv9HQEim80RyDT2DU2a1qFNx32vhqfl6g3sccJJvGpzodj
 7y7per6KkpvUGrck0kAI
 =AO//
 -----END PGP SIGNATURE-----

Merge tag 'renesas-drivers-for-v4.14' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers

Pull "Renesas ARM Based SoC Drivers Updates for v4.14" from Simon Horman:

Add R-Car D3 (r8a77995) support to the Renesas-specific SoC drivers
- SoC identification
- System controller
- Reset controller

* tag 'renesas-drivers-for-v4.14' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  soc: renesas: rcar-rst: Add support for R-Car D3
  soc: renesas: rcar-sysc: Add support for R-Car D3 power areas
  soc: renesas: Add r8a77995 SYSC PM Domain Binding Definitions
  soc: renesas: Identify R-Car D3
2017-08-16 21:55:03 +02:00
Geert Uytterhoeven
714c53aa2e clk: renesas: Add r8a77995 CPG Core Clock Definitions
Add all R-Car D3 Clock Pulse Generator Core Clock Outputs, as listed
in Table 8.2f ("List of Clocks [R-Car D3]") of the R-Car Series, 3rd
Generation Hardware User's Manual (Rev. 0.55, Jun. 30, 2017).

Note that internal CPG clocks (S0, S1, S2, S3, S1C, S3C, SDSRC, and
SSPSRC) are not included, as they are used as internal clock sources
only, and never referenced from DT.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
2017-08-16 09:51:46 +02:00
Fenglin Wu
d7b5f5cc5e pinctrl: qcom: spmi-gpio: Add support for GPIO LV/MV subtype
GPIO LV (low voltage)/MV (medium voltage) subtypes have different
features and register mappings than 4CH/8CH subtypes. Add support
for LV and MV subtypes.

Signed-off-by: Fenglin Wu <fenglinw@codeaurora.org>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-08-15 11:16:36 +02:00
Cédric Le Goater
561099a1a2 leds: pca955x: add GPIO support
The PCA955x family of chips are I2C LED blinkers whose pins not used
to control LEDs can be used as general purpose I/Os (GPIOs).

The following adds such a support by defining different operation
modes for the pins (See bindings documentation for more details). The
pca955x driver is then extended with a gpio_chip when some of pins are
operating as GPIOs. The default operating mode is to behave as a LED.

The GPIO support is conditioned by CONFIG_LEDS_PCA955X_GPIO.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Jacek Anaszewski <jacek.anaszewski@gmail.com>
2017-08-14 22:22:37 +02:00
Chen Zhong
4f04ff03dc soc: mediatek: add header files required for MT7622 SCPSYS dt-binding
Add relevant header files required for dt-bindings of SCPSYS power domain
control for all subsystems found on MT7622 SoC.

Signed-off-by: Chen Zhong <chen.zhong@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2017-08-14 17:28:34 +02:00
Tony Lindgren
eba6130b31 ARM: dts: Add dra7 iodelay configuration
Add dra7 iodelay configuration.

Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-08-10 09:56:36 -07:00
Elaine Zhang
a376a4b045 clk: rockchip: fix up indentation of some RV1108 clock-ids
Make the code look better.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-08-06 19:45:19 +02:00
Elaine Zhang
1b6428a286 clk: rockchip: rename the clk id for HCLK_I2S1_2CH
i2s1 has 2 channels but not 8 channels.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

[and the clock id hasn't been used in either clock-driver nor dts,
 so is safe to rename]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-08-06 19:43:35 +02:00
Elaine Zhang
cbbd6c2f55 clk: rockchip: add more clk ids for rv1108
Add new clk ids for the peripherals on rv1108 soc.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-08-06 19:42:43 +02:00
Neil Armstrong
596f2b78da dt-bindings: clock: gxbb-aoclk: Add CEC 32k clock
This patchadds the clock binding entry for the CEC 32K AO Clock.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-08-04 17:49:35 +02:00
Jerome Brunet
a5841de691 clk: meson: gxbb: Add sd_emmc clk0 clkids
Add the clkids for the clocks feeding the input0 of the mmc controllers

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-08-04 17:49:34 +02:00
Jerome Brunet
90640fd05e clk: meson-gxbb: expose almost every clock in the bindings
Expose all clocks which maybe used as DT bindings
Only clock ids internal the controller remain un-exposed

Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-08-04 17:49:33 +02:00
Jerome Brunet
31128822ce clk: meson8b: expose every clock in the bindings
Expose all clocks which maybe used as DT bindings
Only clock ids internal the controller remain un-exposed (none on this
particular controller at the moment)

Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-08-04 17:49:33 +02:00
Martin Blumenstingl
0f9b973b65 dt-bindings: clock: meson8b: describe the embedded reset controller
The Amlogic Meson8/Meson8b/Meson8m2 clock controller provides some reset
lines. These are used for example to boot the secondary CPU cores.

This patch describes the reset controller which is embedded into the
clock controller on these SoCs.
A header file is provided which provides preprocessor macros for each
reset line (to make the .dts files easier to read).

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-07-31 10:48:39 +02:00
Geert Uytterhoeven
ee011c5b4c soc: renesas: Add r8a77995 SYSC PM Domain Binding Definitions
Add power domain indices for R-Car D3.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-27 17:07:07 +02:00
Dave Gerlach
d16645054d dt-bindings: Drop k2g genpd device ID macros
Commit 7cc119f29b ("dt-bindings: Add TI SCI PM Domains") introduced a
number of K2G_DEV_x macros to represent each device ID available on the
K2G platform for use by the genpd, clock, and reset drivers. Rather than
use these macros, which are only used in the device tree for property
values and not actually used by the drivers, let's just use the device
ID number directly in the device tree to avoid macro bloat.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
2017-07-21 09:38:36 -07:00
Elaine Zhang
8bf3560f6c dt-bindings: power: add RK3366 SoCs header for power-domain
According to a description from TRM, add all the power domains.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-07-20 22:40:48 +02:00
Eugeniy Paltsev
e0be864f14 ARC: reset: introduce HSDKv1 reset driver
The HSDK v1 periphery IPs can be reset by accessing some registers
from the CGU block.

The list of available reset lines is documented in the DT bindings.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2017-07-20 11:48:16 +02:00
Krzysztof Kozlowski
ff60dcedbd pinctrl: samsung: dt-bindings: Use better name for external interrupt function
On Exynos, 0xf is always used as value of external interrupt in pin mux
function thus a more descriptive macro name can be used.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2017-07-18 19:20:42 +02:00
Linus Torvalds
568d135d33 Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS updates from Ralf Baechle:
 "Boston platform support:
   - Document DT bindings
   - Add CLK driver for board clocks

  CM:
   - Avoid per-core locking with CM3 & higher
   - WARN on attempt to lock invalid VP, not BUG

  CPS:
   - Select CONFIG_SYS_SUPPORTS_SCHED_SMT for MIPSr6
   - Prevent multi-core with dcache aliasing
   - Handle cores not powering down more gracefully
   - Handle spurious VP starts more gracefully

  DSP:
   - Add lwx & lhx missaligned access support

  eBPF:
   - Add MIPS support along with many supporting change to add the
     required infrastructure

  Generic arch code:
   - Misc sysmips MIPS_ATOMIC_SET fixes
   - Drop duplicate HAVE_SYSCALL_TRACEPOINTS
   - Negate error syscall return in trace
   - Correct forced syscall errors
   - Traced negative syscalls should return -ENOSYS
   - Allow samples/bpf/tracex5 to access syscall arguments for sane
     traces
   - Cleanup from old Kconfig options in defconfigs
   - Fix PREF instruction usage by memcpy for MIPS R6
   - Fix various special cases in the FPU eulation
   - Fix some special cases in MIPS16e2 support
   - Fix MIPS I ISA /proc/cpuinfo reporting
   - Sort MIPS Kconfig alphabetically
   - Fix minimum alignment requirement of IRQ stack as required by
     ABI / GCC
   - Fix special cases in the module loader
   - Perform post-DMA cache flushes on systems with MAARs
   - Probe the I6500 CPU
   - Cleanup cmpxchg and add support for 1 and 2 byte operations
   - Use queued read/write locks (qrwlock)
   - Use queued spinlocks (qspinlock)
   - Add CPU shared FTLB feature detection
   - Handle tlbex-tlbp race condition
   - Allow storing pgd in C0_CONTEXT for MIPSr6
   - Use current_cpu_type() in m4kc_tlbp_war()
   - Support Boston in the generic kernel

  Generic platform:
   - yamon-dt: Pull YAMON DT shim code out of SEAD-3 board
   - yamon-dt: Support > 256MB of RAM
   - yamon-dt: Use serial* rather than uart* aliases
   - Abstract FDT fixup application
   - Set RTC_ALWAYS_BCD to 0
   - Add a MAINTAINERS entry

  core kernel:
   - qspinlock.c: include linux/prefetch.h

  Loongson 3:
   - Add support

  Perf:
   - Add I6500 support

  SEAD-3:
   - Remove GIC timer from DT
   - Set interrupt-parent per-device, not at root node
   - Fix GIC interrupt specifiers

  SMP:
   - Skip IPI setup if we only have a single CPU

  VDSO:
   - Make comment match reality
   - Improvements to time code in VDSO"

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (86 commits)
  locking/qspinlock: Include linux/prefetch.h
  MIPS: Fix MIPS I ISA /proc/cpuinfo reporting
  MIPS: Fix minimum alignment requirement of IRQ stack
  MIPS: generic: Support MIPS Boston development boards
  MIPS: DTS: img: Don't attempt to build-in all .dtb files
  clk: boston: Add a driver for MIPS Boston board clocks
  dt-bindings: Document img,boston-clock binding
  MIPS: Traced negative syscalls should return -ENOSYS
  MIPS: Correct forced syscall errors
  MIPS: Negate error syscall return in trace
  MIPS: Drop duplicate HAVE_SYSCALL_TRACEPOINTS select
  MIPS16e2: Provide feature overrides for non-MIPS16 systems
  MIPS: MIPS16e2: Report ASE presence in /proc/cpuinfo
  MIPS: MIPS16e2: Subdecode extended LWSP/SWSP instructions
  MIPS: MIPS16e2: Identify ASE presence
  MIPS: VDSO: Fix a mismatch between comment and preprocessor constant
  MIPS: VDSO: Add implementation of gettimeofday() fallback
  MIPS: VDSO: Add implementation of clock_gettime() fallback
  MIPS: VDSO: Fix conversions in do_monotonic()/do_monotonic_coarse()
  MIPS: Use current_cpu_type() in m4kc_tlbp_war()
  ...
2017-07-15 10:59:54 -07:00
Paul Burton
7461279bba dt-bindings: Document img,boston-clock binding
Add device tree binding documentation for the clocks provided by the
MIPS Boston development board from Imagination Technologies, and a
header file describing the available clocks for use by device trees &
driver.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Cc: Frank Rowand <frowand.list@gmail.com>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: linux-clk@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/16482/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-07-11 14:13:06 +02:00
Linus Torvalds
c7d28eca1d This is the bulk of GPIO changes for the v4.13 series:
Core:
 - Export add/remove for lookup tables so that modules can export GPIO
   descriptor tables.
 - Handle GPIO sleep states: it is now possible to flag that a GPIO line
   may loose its state during suspend/resume of the system to save
   power. This is used in the Wolfson Micro Arizona driver.
 - ACPI-based GPIO was tightened up a lot around the edges.
 - Use bitmap_fill() to speed up a loop.
 
 New drivers:
 - Exar XRA1403 SPI-based GPIO.
 - MVEBU driver now supports Armada 7K and 8K.
 - LP87565 PMIC GPIO.
 - Renesas R-CAR R8A7743 (RZ/G1M).
 - The new IOT2040 8250 serial/GPIO also comes in through this
   changeset.
 
 Substantial driver changes:
 - Seriously fix the Exar 8250 GPIO portions to work.
 - The MCP23S08 was moved out to a pin control driver.
 - Convert MEVEBU to use regmap for register access.
 - Drop Vulcan support from the Broadcom driver.
 - Serious cleanup and improvement of the mockup driver, giving us a
   better test coverage.
 
 Misc:
 - Lots of janitorial clean up.
 - A bunch of documentation fixes.
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJZX1MjAAoJEEEQszewGV1zEYUQALFsjJH7D2mRN4TSSEeVAcYr
 Uz52uupsou8tgW0IupRb/khO+V6zgd7j+kHDJLMxX+rCTw3pTq5+XGyi5+iNpxof
 TIIT1XBx4eq7Q/n4nWdGodHbHN9BXw7cGsNmTb1TS/G/6h1wOKxfzjvUNhDAC+2v
 idPy6B5G+WrDsYpBtTWlKHKQKVqbUlhLFyJYoglzqIeM5L9Ry/UoZ6sGleho3hKn
 Vlg/hMtkCexnVO9zopBe5CuEfseLrkcCgCvtQ713egzVXApryp4hqm3Xti20Ntgy
 OxnKhmVyloqd0kU0qLSpvDAf7B1invbHHbeZsag6wluTMrxgUYJONuonrqGeGiwB
 FBDtw9SGn2GlEXcs7sg8ANmAyr2XxxezKXD9XLBL5jadNB2KCY5yKMv1IK3VnYdq
 gEpFAiZ5cmlpZxIXqlyeZP6LKHNTci4amb33x1I/ghH2BTkGQ/3E3anXEbPNWF8G
 DDE6nrSgU0oQcNqRHyZaWNZpUIz4aFUgJtOEO4lYYP4+VzYSKTdrHseTiiJ91J7E
 WBz9p5JvSnB22+60RhyTAPjVjXgWa30nidf7WGCK0UHiIYffihCxGZRTlrhoEEUB
 fXgveJpqxLopYvxpUxi1OqlPYYo7zKRF5BzHsjKMpdVYXfdMdvs7eq2g/X889i1D
 WpbE9LyAH9FY5BM8YjFX
 =TpW1
 -----END PGP SIGNATURE-----

Merge tag 'gpio-v4.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio

Pull GPIO updates from Linus Walleij:
 "This is the bulk of GPIO changes for the v4.13 series.

  Some administrativa:

  I have a slew of 8250 serial patches and the new IOT2040 serial+GPIO
  driver coming in through this tree, along with a whole bunch of Exar
  8250 fixes. These are ACKed by Greg and also hit drivers/platform/*
  where they are ACKed by Andy Shevchenko.

  Speaking about drivers/platform/* there is also a bunch of ACPI stuff
  coming through that route, again ACKed by Andy.

  The MCP23S08 changes are coming in here as well. You already have the
  commits in your tree, so this is just a result of sharing an immutable
  branch between pin control and GPIO.

  Core:
   - Export add/remove for lookup tables so that modules can export GPIO
     descriptor tables.
   - Handle GPIO sleep states: it is now possible to flag that a GPIO
     line may loose its state during suspend/resume of the system to
     save power. This is used in the Wolfson Micro Arizona driver.
   - ACPI-based GPIO was tightened up a lot around the edges.
   - Use bitmap_fill() to speed up a loop.

  New drivers:
   - Exar XRA1403 SPI-based GPIO.
   - MVEBU driver now supports Armada 7K and 8K.
   - LP87565 PMIC GPIO.
   - Renesas R-CAR R8A7743 (RZ/G1M).
   - The new IOT2040 8250 serial/GPIO also comes in through this
     changeset.

  Substantial driver changes:
   - Seriously fix the Exar 8250 GPIO portions to work.
   - The MCP23S08 was moved out to a pin control driver.
   - Convert MEVEBU to use regmap for register access.
   - Drop Vulcan support from the Broadcom driver.
   - Serious cleanup and improvement of the mockup driver, giving us a
     better test coverage.

  Misc:
   - Lots of janitorial clean up.
   - A bunch of documentation fixes"

* tag 'gpio-v4.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (70 commits)
  serial: exar: Add support for IOT2040 device
  gpio-exar/8250-exar: Make set of exported GPIOs configurable
  platform: Accept const properties
  serial: exar: Factor out platform hooks
  gpio-exar/8250-exar: Rearrange gpiochip parenthood
  gpio: exar: Fix iomap request
  gpio-exar/8250-exar: Do not even instantiate a GPIO device for Commtech cards
  serial: uapi: Add support for bus termination
  gpio: rcar: Add R8A7743 (RZ/G1M) support
  gpio: gpio-wcove: Fix GPIO control register offset calculation
  gpio: lp87565: Add support for GPIO
  gpio: dwapb: fix missing first irq for edgeboth irq type
  MAINTAINERS: Take maintainership for GPIO ACPI support
  gpio: exar: Fix reading of directions and values
  gpio: exar: Allocate resources on behalf of the platform device
  gpio-exar/8250-exar: Fix passing in of parent PCI device
  gpio: mockup: use devm_kcalloc() where applicable
  gpio: mockup: add myself as author
  gpio: mockup: improve the error message
  gpio: mockup: don't return magic numbers from probe()
  ...
2017-07-07 12:40:27 -07:00
Linus Torvalds
dddd564dbb This time we've got one core change to introduce a bulk clk_get API,
some new clk drivers and updates for old ones. The diff is pretty
 spread out across a handful of different SoC clk drivers for Broadcom, TI,
 Qualcomm, Renesas, Rockchip, Samsung, and Allwinner, mostly due to the
 introduction of new drivers.
 
 Core:
  - New clk bulk get APIs
  - Clk divider APIs gained the ability to consider a different parent than
    the current one
 
 New Drivers:
  - Renesas r8a779{0,1,2,4} CPG/MSSR
  - TI Keystone SCI firmware controlled clks and OMAP4 clkctrl
  - Qualcomm IPQ8074 SoCs
  - Cortina Systems Gemini (SL3516/CS3516)
  - Rockchip rk3128 SoCs
  - Allwinner A83T clk control units
  - Broadcom Stingray SoCs
  - CPU clks for Mediatek MT8173/MT2701/MT7623 SoCs
 
 Removed Drivers:
  - Old non-DT version of the Realview clk driver
 
 Updates:
  - Renesas Kconfig/Makefile cleanups
  - Amlogic CEC EE clk support
  - Improved Armada 7K/8K cp110 clk support
  - Rockchip clk id exposing, critical clk markings
  - Samsung converted to clk_hw registration APIs
  - Fixes for Samsung exynos5420 audio clks
  - USB2 clks for Hisilicon hi3798cv200 SoC and video/camera clks for hi3660
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2.0.22 (GNU/Linux)
 
 iQIcBAABCAAGBQJZXujtAAoJEK0CiJfG5JUl8vIQAKbcH3rX+CS4jrg7Hs2Ghnhn
 ZbTf7vZYa6K7iuL7JHITEScAQ8+l0Bl7eWSfJZRt4oUW3Jt4F+AIs8qBofZAWn4M
 m+kDHs/IfAUITZp/unM/ogFfVcboZObjAK/A2yyRVyMxRkIyyUb6r7SDVpCpGyxU
 1YDAdis2M3F5J9CGV/tpmobnksMUlCnJlI0OGtMUnvY6mDkf8Re89sayMnQ/1Mgp
 CL1YwnqZ0L6rT664IMo74bB7UNjXdMZsuCeITkU+hMVq4NMXErKCcn8lHvP9P+uP
 AoZ8bf9WaQ/CglGFeeFrNQGUf+tiTlYxlVvvNFXR5+rmhu/yKxNI67APaupeERVl
 jMISKAC/A+C1j6JVMCqjM3d75F47SzuZQuQY0ZD0DWoqP9PBzV6IyThHIqWrN5O4
 IceLmD8BrwW+h8bs2SIubIygOGMMqGhVi2XaAAWpmRke7JzmSFOOyE3YGPisaBAq
 EcIF2i2jJ6Ja4rClgfQKOsx25MOILsIp/sMU6iC7U1h4NDj8yP5A13n60U6DuZhu
 ttjN+bXugR81R+bWyzC6Zl/KXF83Ka3ZSJs+XblunPRGKt2q6Kj12HBspkWL1QjY
 aLEEg3fpI/ovQoTMXHj7/G1MD60rxoHCuOjBwSWEQBzA1MiHol+ab/mZKfPsy50C
 116G1XJgtgrLxE00iZ6K
 =Yar+
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "This time we've got one core change to introduce a bulk clk_get API,
  some new clk drivers and updates for old ones. The diff is pretty
  spread out across a handful of different SoC clk drivers for Broadcom,
  TI, Qualcomm, Renesas, Rockchip, Samsung, and Allwinner, mostly due to
  the introduction of new drivers.

  Core:
   - New clk bulk get APIs
   - Clk divider APIs gained the ability to consider a different parent
     than the current one

  New Drivers:
   - Renesas r8a779{0,1,2,4} CPG/MSSR
   - TI Keystone SCI firmware controlled clks and OMAP4 clkctrl
   - Qualcomm IPQ8074 SoCs
   - Cortina Systems Gemini (SL3516/CS3516)
   - Rockchip rk3128 SoCs
   - Allwinner A83T clk control units
   - Broadcom Stingray SoCs
   - CPU clks for Mediatek MT8173/MT2701/MT7623 SoCs

  Removed Drivers:
   - Old non-DT version of the Realview clk driver

  Updates:
   - Renesas Kconfig/Makefile cleanups
   - Amlogic CEC EE clk support
   - Improved Armada 7K/8K cp110 clk support
   - Rockchip clk id exposing, critical clk markings
   - Samsung converted to clk_hw registration APIs
   - Fixes for Samsung exynos5420 audio clks
   - USB2 clks for Hisilicon hi3798cv200 SoC and video/camera clks for
     hi3660"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (147 commits)
  clk: gemini: Read status before using the value
  clk: scpi: error when clock fails to register
  clk: at91: Add sama5d2 suspend/resume
  gpio: dt-bindings: Add documentation for gpio controllers on Armada 7K/8K
  clk: keystone: TI_SCI_PROTOCOL is needed for clk driver
  clk: samsung: audss: Fix silent hang on Exynos4412 due to disabled EPLL
  clk: uniphier: provide NAND controller clock rate
  clk: hisilicon: add usb2 clocks for hi3798cv200 SoC
  clk: Add Gemini SoC clock controller
  clk: iproc: Remove __init marking on iproc_pll_clk_setup()
  clk: bcm: Add clocks for Stingray SOC
  dt-bindings: clk: Extend binding doc for Stingray SOC
  clk: mediatek: export cpu multiplexer clock for MT8173 SoCs
  clk: mediatek: export cpu multiplexer clock for MT2701/MT7623 SoCs
  clk: mediatek: add missing cpu mux causing Mediatek cpufreq can't work
  clk: renesas: cpg-mssr: Use of_device_get_match_data() helper
  clk: hi6220: add acpu clock
  clk: zx296718: export I2S mux clocks
  clk: imx7d: create clocks behind rawnand clock gate
  clk: hi3660: Set PPLL2 to 2880M
  ...
2017-07-07 12:26:13 -07:00
Linus Torvalds
a9ceea2674 ARM: 64-bit DT updates
Device-tree updates for arm64 platforms. For the first time I can
 remember, this is actually larger than the corresponding branch for
 32-bit platforms overall, though that has more individual changes.
 
 A significant portion this time is due to added machine support:
 
 - Initial support for the Realtek RTD1295 SoC, along with the Zidoo
   X9S set-top-box
 
 - Initial support for Actions Semi S900 and the Bubblegum-96
   single-board-cёmputer.
 
 - Rockchips support for the rk3399-Firefly single-board-computer
   gets added, this one stands out for being relatively fast,
   affordable and well₋supported, compared to many boards that
   only fall into one or two of the above categories.
 
 - Mediatek gains support for the mt6797 mobile-phone SoC platform
   and corresponding evaluation board.
 
 - Amlogic board support gets added for the NanoPi K2 and S905x
   LibreTech CC single-board computers and the R-Box Pro set-top-box
 
 - Allwinner board support gets added for the OrangePi Win,
   Orangepi Zero Plus 2, NanoPi NEO2 and Orange Pi Prime single
   board computers and the SoPine system-on-module.
 
 - Renesas board support for Salvator-XS and H3ULCB
   automotive development systems.
 
 - Socionext Uniphier board support for LD11-global and LD20-global,
   whatever those may be.
 
 - Broadcom adds support for the new Stingray communication processor
   in its iProc family, along with two reference boards.
 
 Other updates include:
 
 - For the hisicon platform, support for Hi3660-Hikey960 gets
   extended significantly.
 
 - Lots of smaller updates for Renesas, Amlogic, Rockchip, UniPhier,
   Broadcom, Allwinner, Hisilicon, Qualcomm, Marvell, and NXP.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIVAwUAWVpZnmCrR//JCVInAQJYsBAAhuoRK5WZawkeAMEbkGeyOXYbnp6qUlKm
 w1lwXXdStLjkOUmQXo5KNDmWiHbPnuhwHprX9HMPDI0G1+DSaOlxIezNFIlKOUyW
 fQxZjt4+L3eRXQCetj3P+QAp37ifmFxSg0RmM+fGBwAhNcyf6nH98cn4ZaauZrfu
 F3cJz9t9MTdIlxXXF1uTAk9g9tR8sCoD4ekmM15MwtLZZTqmZNP1OelRDwwzNoOn
 6pp4BUDOFhesynsI7uYoKdj0lt0fGg348FAlt9w1g9xQ819wrdaz/eAmV49eUZQ+
 Ps8FY1OvJsVaoe3yGeEG0Ps87VTRCzSOFqstNDftYsz+q5Mm8ImEwG8JhuoqyDQD
 /VW+DamdXyN4tuUFQfg+Cz8+6WZRwfTeOVmuvC4aRuKNDWV5CC5qP1B7oZ/a2nYR
 6M8+1W+RJOgjJ9wa/125Z6edEpzCRzfxDSLKyHbQ2q//0NK0kRrS9+Rdi6FlReV3
 mVGtK5gFLVzcCyBSaMY48KnRe0/cjOZ5YXw5o/DIeYJkyPnOlN1pXOEMalQCf+uI
 6D8pjO307lt6TLCiq3i2C8bN5k0FBqD4rirsp9PlRw3vTx1LI+KnhJQ8NOrrTheW
 gtDevoDMssnJdmVj3Wbv8DPWJOGSF6vA/xvsQBe0MglHFtuR/0jp9YC8ncvIP1RC
 CkFTqmpZXYg=
 =E8pa
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM 64-bit DT updates from Arnd Bergmann:
 "Device-tree updates for arm64 platforms. For the first time I can
  remember, this is actually larger than the corresponding branch for
  32-bit platforms overall, though that has more individual changes.

  A significant portion this time is due to added machine support:

   - Initial support for the Realtek RTD1295 SoC, along with the Zidoo
     X9S set-top-box

   - Initial support for Actions Semi S900 and the Bubblegum-96
     single-board-cёmputer.

   - Rockchips support for the rk3399-Firefly single-board-computer gets
     added, this one stands out for being relatively fast, affordable
     and well₋supported, compared to many boards that only fall into one
     or two of the above categories.

   - Mediatek gains support for the mt6797 mobile-phone SoC platform and
     corresponding evaluation board.

   - Amlogic board support gets added for the NanoPi K2 and S905x
     LibreTech CC single-board computers and the R-Box Pro set-top-box

   - Allwinner board support gets added for the OrangePi Win, Orangepi
     Zero Plus 2, NanoPi NEO2 and Orange Pi Prime single board computers
     and the SoPine system-on-module.

   - Renesas board support for Salvator-XS and H3ULCB automotive
     development systems.

   - Socionext Uniphier board support for LD11-global and LD20-global,
     whatever those may be.

   - Broadcom adds support for the new Stingray communication processor
     in its iProc family, along with two reference boards.

  Other updates include:

   - For the hisicon platform, support for Hi3660-Hikey960 gets extended
     significantly.

   - Lots of smaller updates for Renesas, Amlogic, Rockchip, UniPhier,
     Broadcom, Allwinner, Hisilicon, Qualcomm, Marvell, and NXP"

* tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (243 commits)
  ARM64: dts: marvell: armada37xx: Fix timer interrupt specifiers
  Revert "arm64: dts: marvell: add dma-mask in crypto nodes for 7k/8k"
  arm64: dts: mediatek: don't include missing file
  ARM64: dts: meson-gxl: Add Libre Technology CC support
  dt-bindings: arm: amlogic: Add Libre Technology CC board
  dt-bindings: add Libre Technology vendor prefix
  arm64: dts: marvell: enable GICP and ICU on Armada 7K/8K
  arm64: dts: zte: Use - instead of @ for DT OPP entries
  arm64: dts: marvell: add gpio support for Armada 7K/8K
  arm64: dts: marvell: add pinctrl support for Armada 7K/8K
  arm64: dts: marvell: use new binding for the system controller on cp110
  arm64: dts: marvell: remove *-clock-output-names on cp110
  arm64: dts: marvell: use new bindings for xor clocks on ap806
  arm64: dts: marvell: mcbin: enable the mdio node
  arm64: dts: Add Actions Semi S900 and Bubblegum-96
  dt-bindings: Add vendor prefix for uCRobotics
  arm64: dts: marvell: add xmdio nodes for 7k/8k
  arm64: dts: marvell: add a comment on the cp110 slave node status
  arm64: dts: marvell: remove cpm crypto nodes from dts files
  arm64: dts: marvell: cp110: enable the crypto engine at the SoC level
  ...
2017-07-04 14:50:59 -07:00
Linus Torvalds
e854711291 ARM: SoC driver updates
- New SoC specific drivers
   - NVIDIA Tegra PM Domain support for newer SoCs (Tegra186 and later)
     based on the "BPMP" firmware
   - Clocksource and system controller drivers for the newly added
     Action Semi platforms (both arm and arm64).
 
 - Reset subsystem, merged through arm-soc by tradition:
   - New drivers for Altera Stratix10, TI Keystone and Cortina Gemini SoCs
   - Various subsystem-wide cleanups
 
 - Updates for existing SoC-specific drivers
   - TI GPMC (General Purpose Memory Controller)
   - Mediatek "scpsys" system controller support for MT6797
   - Broadcom "brcmstb_gisb" bus arbitrer
   - ARM SCPI firmware
   - Renesas "SYSC" system controller
 
 One more driver update was submitted for the Freescale/NXP DPAA
 data path acceleration that has previously been used on PowerPC
 chips. I ended up postponing the merge until some API questions
 for its unusual MMIO access are resolved.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIVAwUAWVpDFmCrR//JCVInAQKoihAAosgC3+3IHppOhHid+HepkOcp2teyKknw
 42fSXVpTdfWa8Oe7q80Kzmz2CPNfFq2SzHz6oXb9WCcDFqSGr0b9aSE7NnksRjTf
 2euHVJ4MnJpkRewvorRmcpK8dPXDcHwEw/8hU3yZtJUGI0IKtlrqXis+evgkz9cn
 YDynuVdAZgZiEfiNeSeadyNLcxaQCc3x9ovvsBXxBa1/x1pfeRnTbp+6hiHilCJu
 Szts/yAzZzZE9Jkf9dLKfNlsT6m2SgtjukqqOR+zHAhi7/BdTFSVUP6L8u7QjrR+
 +ijTICg8FMJGiWLAOe6ED2qZVByN92EJ2AGwriYlSles9ouoGfRkJ2rwxyjbete7
 avy0HP+PSBFXWdwbOcq8HX8CrbuBltagl5fkMokct6biWLLMshNZ33WWdQ6/DsM2
 b9mAAZuhbs0g1qWUBD3+q6qBytSuGme6Px6fMoVEc4GQ2YVFUQOoEfZOGKRv1U1o
 aMWGt/6qeF8SG288rYAnQ/TuYWpOLtksV6yhotA00HUHhkTCy0xVCdyWGZtNyKhG
 o/x4YnhWFzHsXmqKcR1sM7LzfZY/WNmbrOLvK6i83Z0P7QptqrdaLAylL3iSPEyX
 ZDUgExf6PYXkWIewc3KwC5sJjuD05z3ZCgIR+mCezwbuD+3Z2fOdjodY/VBZ74hq
 URcM/BqtuWE=
 =5L6n
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "New SoC specific drivers:

   - NVIDIA Tegra PM Domain support for newer SoCs (Tegra186 and later)
     based on the "BPMP" firmware

   - Clocksource and system controller drivers for the newly added
     Action Semi platforms (both arm and arm64).

  Reset subsystem, merged through arm-soc by tradition:

   - New drivers for Altera Stratix10, TI Keystone and Cortina Gemini
     SoCs

   - Various subsystem-wide cleanups

  Updates for existing SoC-specific drivers

   - TI GPMC (General Purpose Memory Controller)

   - Mediatek "scpsys" system controller support for MT6797

   - Broadcom "brcmstb_gisb" bus arbitrer

   - ARM SCPI firmware

   - Renesas "SYSC" system controller

  One more driver update was submitted for the Freescale/NXP DPAA data
  path acceleration that has previously been used on PowerPC chips. I
  ended up postponing the merge until some API questions for its unusual
  MMIO access are resolved"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (35 commits)
  clocksource: owl: Add S900 support
  clocksource: Add Owl timer
  soc: renesas: rcar-sysc: Use GENPD_FLAG_ALWAYS_ON
  firmware: tegra: Fix locking bugs in BPMP
  soc/tegra: flowctrl: Fix error handling
  soc/tegra: bpmp: Implement generic PM domains
  soc/tegra: bpmp: Update ABI header
  PM / Domains: Allow overriding the ->xlate() callback
  soc: brcmstb: enable drivers for ARM64 and BMIPS
  soc: renesas: Rework Kconfig and Makefile logic
  reset: Add the TI SCI reset driver
  dt-bindings: reset: Add TI SCI reset binding
  reset: use kref for reference counting
  soc: qcom: smsm: Improve error handling, quiesce probe deferral
  cpufreq: scpi: use new scpi_ops functions to remove duplicate code
  firmware: arm_scpi: add support to populate OPPs and get transition latency
  dt-bindings: reset: Add reset manager offsets for Stratix10
  memory: omap-gpmc: add error message if bank-width property is absent
  memory: omap-gpmc: make dts snippet include semicolon
  reset: Add a Gemini reset controller
  ...
2017-07-04 14:47:47 -07:00
Linus Torvalds
1849f800fb ARM: Device-tree updates
Device-tree continues to see lots of updates. The majority of patches
 here are smaller changes for new hardware on existing platforms, and
 there are a few larger changes worth pointing out.
 
 New machines:
 
 - The new Action Semi S500 platform is added along with initial
   support for the LeMaker Guitar board.
 
 - STM32 gains support for three new boards: stm32h743-disco,
   stm32f746-disco, and stm32f769-disco, along with new device
   support for the existing stm32f429 boards.
 
 - Renesas adds two new boards, the tiny GR-Peach based on RZ/A1H
   with 10MB on-chip SRAM, and the iWave G20D-Q7 System-on-Module
   plus board.
 
 - On Marvell "mvebu", we gain support for the Linksys WRT3200ACM
   wireless router.
 
 - For NXP i.MX, we gain support for the Gateworks Ventana GW5600
   and the Technexion Pico i.MX7D single-board computers.
 
 - The BeagleBone Blue is added for OMAP, it's the latest variation
   of the popular Beaglebone Black single-board computer.
 
 - The Allwinner based Lichee Pi Zero and NanoPi M1 Plus boards
   are added, these are the latest variations of a seemingly endless
   supply of similar single-board computers.
 
 Other updates:
 
 - Linus Walleij improves support for the "Faraday" based SoC platforms
   from various SoC makers (Moxart, Aspeed, Gemini)
 
 - The ARM Mali GPU is now describe on Rockchips SoCs
 
 - Mediatek MT7623 is extended significantly, making it much
   more useful.
 
 - Lots of individual updates on Renesas, OMAP, Rockchips, Broadcom,
   Allwinner, Qualcomm, iMX
 
 - For Amlogic, the clock support is extended a lot on meson8b.
 
 - We now build the devicetree file for the Raspberry Pi 3 on 32-bit
   ARM, in addition to the existing ARM64 support, to help users
   wanting to run a 32-bit system on it.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIVAwUAWVpLH2CrR//JCVInAQK5hxAAj8u8Y1RFWsfEXqAeGBme7PdiilEfm1ZR
 U6wu6unW/zUb+QwQj52hzmYB9+FEd/bcNgw4AqEzypqMA+vJ6AP5tpujCrOXREsG
 sk2LBnhOi/QbYfzIH6MYqjnrMbjSZ3LZpJ8+PSO+DpGwMkSKhWG5Jjjf1V69IbYJ
 8eTpsnDbpo1OA4mtj+7fDxKGdH2WFx4922UuqTSzgoIqaTV1X2wcicpiJsfKynXY
 3I9Apwhf/gKbtkWkVlNW7gxaAHONZOHEJ9rgIu6XoUCKbQrtbjZWEbKDUM1nJq5J
 4ZYbd9r1HZvujuLk2/IuKTidmXj/4Q1FiIn4jqHINVqNj8dPKKYIoW5nU8rlbxG/
 Ymy9WRY97YznWai49dnURGRbPNuiGyd9oaVsw7Wi1G2F4PgkAMgHs1rpERtIgnZg
 ZzPxlXZdowYUgL6Qawk3//81QqGG/YL8VZ+VltPkjFNNYtEk0U+j3xW/n2ORAdvT
 8EuNlTKid0Cq045nKkpAd5AWcgHIJe7IE3KiX/SpBtgH5PINlnUnwnm2f2TjRZCh
 bw3g32er1JLSW9lAl6agu58lxox7NC1AV4Qy7Qk23IsR2mAv5gb5zad5GXwE41nT
 qcyJ4OnDUpv/3f0LmH3WATQeHNnG8l8RgY8B6fH2GLlTQdmO7W7UTJ8tWU8E2sZ8
 5xPePuor0JM=
 =onXv
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM device-tree updates from Arnd Bergmann:
 "Device-tree continues to see lots of updates. The majority of patches
  here are smaller changes for new hardware on existing platforms, and
  there are a few larger changes worth pointing out.

  New machines:

   - The new Action Semi S500 platform is added along with initial
     support for the LeMaker Guitar board.

   - STM32 gains support for three new boards: stm32h743-disco,
     stm32f746-disco, and stm32f769-disco, along with new device support
     for the existing stm32f429 boards.

   - Renesas adds two new boards, the tiny GR-Peach based on RZ/A1H with
     10MB on-chip SRAM, and the iWave G20D-Q7 System-on-Module plus
     board.

   - On Marvell "mvebu", we gain support for the Linksys WRT3200ACM
     wireless router.

   - For NXP i.MX, we gain support for the Gateworks Ventana GW5600 and
     the Technexion Pico i.MX7D single-board computers.

   - The BeagleBone Blue is added for OMAP, it's the latest variation of
     the popular Beaglebone Black single-board computer.

   - The Allwinner based Lichee Pi Zero and NanoPi M1 Plus boards are
     added, these are the latest variations of a seemingly endless
     supply of similar single-board computers.

  Other updates:

   - Linus Walleij improves support for the "Faraday" based SoC
     platforms from various SoC makers (Moxart, Aspeed, Gemini)

   - The ARM Mali GPU is now describe on Rockchips SoCs

   - Mediatek MT7623 is extended significantly, making it much more
     useful.

   - Lots of individual updates on Renesas, OMAP, Rockchips, Broadcom,
     Allwinner, Qualcomm, iMX

   - For Amlogic, the clock support is extended a lot on meson8b.

   - We now build the devicetree file for the Raspberry Pi 3 on 32-bit
     ARM, in addition to the existing ARM64 support, to help users
     wanting to run a 32-bit system on it"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (345 commits)
  ARM: dts: socfpga: set the i2c frequency
  ARM: dts: socfpga: Add second ethernet alias to VINING FPGA
  ARM: dts: socfpga: Drop LED node from VINING FPGA
  ARM: dts: socfpga: Remove I2C EEPROMs from VINING FPGA
  ARM: dts: socfpga: Enable QSPI support on VINING FPGA
  ARM: dts: socfpga: Fix the ethernet clock phandle
  ARM: pxa: Use - instead of @ for DT OPP entries
  ARM: dts: owl-s500: Add SPS node
  ARM: dts: owl-s500: Set CPU enable-method
  dt-bindings: arm: cpus: Add S500 enable-method
  ARM: dts: Add Actions Semi S500 and LeMaker Guitar
  dt-bindings: arm: Document Actions Semi S900
  dt-bindings: timer: Document Owl timer
  ARM: dts: imx6q-cm-fx6: add sdio wifi/bt nodes
  dt-bindings: arm: Document Actions Semi S500
  dt-bindings: Add vendor prefix for Actions Semi
  ARM: dts: turris-omnia: Add generic compatible string for I2C EEPROM
  ARM: dts: mvebu: add support for Linksys WRT3200ACM (Rango)
  ARM: dts: armada-385-linksys: fixup button node names
  ARM: dts: armada-385-linksys: group pins in pinctrl
  ...
2017-07-04 14:37:25 -07:00
Linus Torvalds
8ca302e9c6 ARM: SoC platform updates
SoC platform changes (arch/arm/mach-*). This merge window, the bulk is
 for a few platforms:
 
 - Andres Färber adds initial support for the Actions Semi S500 (a.k.a.
   'owl') platform, a close relative of the S900 platform he adds for arm64.
 
 - in mach-omap2, we remove more legacy code
 
 - Rockchips gains support for the RV1108 SoC designed for camera
   applications.
 
 - For Atmel, we gain support for MMU-less SoCs (SAME70/V71/S70/V70)
 
 - Minor updates for other platforms, including davinci, s3c64xx,
   prima2, stm32, broadcom nsp, amlogic, pxa, imx and renesas
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIVAwUAWVo7+GCrR//JCVInAQKbMA//WeEPEDUt0boJCUfuzXfZ35S5ksBMBGQa
 NaOJvcW3T//7Tfa88YlBEB7h1w22u1Sv4/CfcistdSPbUwZLyYo6aUz53AwlUnLs
 bVHnd8+h1xN6qSDjzOPIEQQHg9OVIRBD49moBgJ1BkXzyqR/RI1jPPyyRl5vucSW
 MYRxhPkplmjFL5+6uvFoSOdd3Z/FLoEYRrkIk4iu+KgKtnNlj4P1FNSdm6Yb29dj
 yzmXoSpxEzbq0ahGlkjrekEJxTWvW1vOq9d+xTKwTbXoM7pbzXnBRzx4q2Fg9GAT
 BJseMx+uDEG/+eYrFZA7jX/HgpKB1fAlCGp+dK6GIcJoEM6lFKJRsJrP702KPzg0
 PqOMM/htq/4hZ7Waz+Yj3lyVF2C+A6Dn/fXPaHJGdTLj4r0OLgZayhBXFHp1VX2G
 9ERx1UCnfxeY91VBUM99qo21ECT7j0C/bZLln8MFjwX8tk3OATkElIAtnsEHxJ5d
 v4TEkI/AcpMW4lMj/u/hp1PJMCvhlSreWPGx1PRax6va+YB5Ov19DshVgyfoTTq9
 kArUJWQdKo4aKqB+feg9NHNC01xSLw5ywKb+oIyYP3jZzMexzRyP5L7EAVOu6Cel
 iHeIRpo8VjX63gltE+9u4aZ/aEMREGVcgkzuwBTKqbVQ3ismrmGYe54VnFAushJS
 m+XSB250Vz8=
 =8F3w
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC platform updates from Arnd Bergmann:
 "SoC platform changes (arch/arm/mach-*). This merge window, the bulk is
  for a few platforms:

   - Andres Färber adds initial support for the Actions Semi S500 (aka
     'owl') platform, a close relative of the S900 platform he adds for
     arm64.

   - in mach-omap2, we remove more legacy code

   - Rockchips gains support for the RV1108 SoC designed for camera
     applications.

   - For Atmel, we gain support for MMU-less SoCs (SAME70/V71/S70/V70)

   - Minor updates for other platforms, including davinci, s3c64xx,
     prima2, stm32, broadcom nsp, amlogic, pxa, imx and renesas"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (74 commits)
  ARM: owl: smp: Drop bogus holding pen
  ARM: owl: Drop custom machine
  ARM: owl: smp: Implement SPS power-gating for CPU2 and CPU3
  soc: actions: owl-sps: Factor out owl_sps_set_pg() for power-gating
  soc: actions: Add Owl SPS
  dt-bindings: power: Add Owl SPS power domains
  MAINTAINERS: Update Actions Semi section with SPS
  ARM: owl: Implement CPU enable-method for S500
  MAINTAINERS: Add Actions Semi Owl section
  ARM: Prepare Actions Semi S500
  ARM: socfpga: Increase max number of GPIOs
  ARM: stm32: Introduce MACH_STM32F469 flag
  ARM: prima2: remove redundant select CPU_V7
  ARM: davinci: fix const warnings
  ARM: shmobile: pm-rmobile: Use GENPD_FLAG_ALWAYS_ON
  ARM: OMAP4: hwmod_data: add SHAM crypto accelerator
  ARM: OMAP4: hwmod data: add des
  ARM: OMAP4: hwmod data: add aes2
  ARM: OMAP4: hwmod data: add aes1
  ARM: pxa: Delete an error message for a failed memory allocation in pxa3xx_u2d_probe()
  ...
2017-07-04 14:34:51 -07:00
Linus Torvalds
f4dd029ee0 Char/Misc patches for 4.13-rc1
Here is the "big" char/misc driver patchset for 4.13-rc1.
 
 Lots of stuff in here, a large thunderbolt update, w1 driver header
 reorg, the new mux driver subsystem, google firmware driver updates, and
 a raft of other smaller things.  Full details in the shortlog.
 
 All of these have been in linux-next for a while with the only reported
 issue being a merge problem with this tree and the jc-docs tree in the
 w1 documentation area.  The fix should be obvious for what to do when it
 happens, if not, we can send a follow-up patch for it afterward.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCWVpXKA8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+ynLrQCdG9SxRjAbOd6pT9Fr2NAzpUG84YsAoLw+I3iO
 EMi60UXWqAFJbtVMS9Aj
 =yrSq
 -----END PGP SIGNATURE-----

Merge tag 'char-misc-4.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char/misc updates from Greg KH:
 "Here is the "big" char/misc driver patchset for 4.13-rc1.

  Lots of stuff in here, a large thunderbolt update, w1 driver header
  reorg, the new mux driver subsystem, google firmware driver updates,
  and a raft of other smaller things. Full details in the shortlog.

  All of these have been in linux-next for a while with the only
  reported issue being a merge problem with this tree and the jc-docs
  tree in the w1 documentation area"

* tag 'char-misc-4.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (147 commits)
  misc: apds990x: Use sysfs_match_string() helper
  mei: drop unreachable code in mei_start
  mei: validate the message header only in first fragment.
  DocBook: w1: Update W1 file locations and names in DocBook
  mux: adg792a: always require I2C support
  nvmem: rockchip-efuse: add support for rk322x-efuse
  nvmem: core: add locking to nvmem_find_cell
  nvmem: core: Call put_device() in nvmem_unregister()
  nvmem: core: fix leaks on registration errors
  nvmem: correct Broadcom OTP controller driver writes
  w1: Add subsystem kernel public interface
  drivers/fsi: Add module license to core driver
  drivers/fsi: Use asynchronous slave mode
  drivers/fsi: Add hub master support
  drivers/fsi: Add SCOM FSI client device driver
  drivers/fsi/gpio: Add tracepoints for GPIO master
  drivers/fsi: Add GPIO based FSI master
  drivers/fsi: Document FSI master sysfs files in ABI
  drivers/fsi: Add error handling for slave
  drivers/fsi: Add tracepoints for low-level operations
  ...
2017-07-03 20:55:59 -07:00
Linus Torvalds
03ffbcdd78 Merge branch 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull irq updates from Thomas Gleixner:
 "The irq department delivers:

   - Expand the generic infrastructure handling the irq migration on CPU
     hotplug and convert X86 over to it. (Thomas Gleixner)

     Aside of consolidating code this is a preparatory change for:

   - Finalizing the affinity management for multi-queue devices. The
     main change here is to shut down interrupts which are affine to a
     outgoing CPU and reenabling them when the CPU comes online again.
     That avoids moving interrupts pointlessly around and breaking and
     reestablishing affinities for no value. (Christoph Hellwig)

     Note: This contains also the BLOCK-MQ and NVME changes which depend
     on the rework of the irq core infrastructure. Jens acked them and
     agreed that they should go with the irq changes.

   - Consolidation of irq domain code (Marc Zyngier)

   - State tracking consolidation in the core code (Jeffy Chen)

   - Add debug infrastructure for hierarchical irq domains (Thomas
     Gleixner)

   - Infrastructure enhancement for managing generic interrupt chips via
     devmem (Bartosz Golaszewski)

   - Constification work all over the place (Tobias Klauser)

   - Two new interrupt controller drivers for MVEBU (Thomas Petazzoni)

   - The usual set of fixes, updates and enhancements all over the
     place"

* 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (112 commits)
  irqchip/or1k-pic: Fix interrupt acknowledgement
  irqchip/irq-mvebu-gicp: Allocate enough memory for spi_bitmap
  irqchip/gic-v3: Fix out-of-bound access in gic_set_affinity
  nvme: Allocate queues for all possible CPUs
  blk-mq: Create hctx for each present CPU
  blk-mq: Include all present CPUs in the default queue mapping
  genirq: Avoid unnecessary low level irq function calls
  genirq: Set irq masked state when initializing irq_desc
  genirq/timings: Add infrastructure for estimating the next interrupt arrival time
  genirq/timings: Add infrastructure to track the interrupt timings
  genirq/debugfs: Remove pointless NULL pointer check
  irqchip/gic-v3-its: Don't assume GICv3 hardware supports 16bit INTID
  irqchip/gic-v3-its: Add ACPI NUMA node mapping
  irqchip/gic-v3-its-platform-msi: Make of_device_ids const
  irqchip/gic-v3-its: Make of_device_ids const
  irqchip/irq-mvebu-icu: Add new driver for Marvell ICU
  irqchip/irq-mvebu-gicp: Add new driver for Marvell GICP
  dt-bindings/interrupt-controller: Add DT binding for the Marvell ICU
  genirq/irqdomain: Remove auto-recursive hierarchy support
  irqchip/MSI: Use irq_domain_update_bus_token instead of an open coded access
  ...
2017-07-03 16:50:31 -07:00
Arnd Bergmann
ffe3744a59 Actions Semi SoC drivers for 4.13
This adds clock source and power domain drivers for S500/S900.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABAgAGBQJZTUdyAAoJEPou0S0+fgE/cxIQALU/QhWWSaHwbGnavU9gKbar
 lOwfoSmdwlrCR7hUCxH14o11fF03fXxWdEGz825DJjZghEIVn7VEW521DzXzA1dy
 bF6s95seZXYKUwtcPERgxbRP89itr/cTZiIGnEeKFfAIU1lmd5KNYHme05+e2bcQ
 G6St+8NbtqKzMaXSaDIHiHpA2ewiMmnsg9exOCcFFYCe2qUzKVOYFtbqeb+cldML
 yUIfgRQnGHiVqhbzx/aSwwkmZic+j7VCwScaZEL6THJ0pem+ayuTCBdvk9LYk/aM
 cksZf1Jc5RwFi6ErybpWkVBE0U2voSyNHoK10dmUy0kyS2hj3ttXjtu1yFHV/K/5
 /Ebe+aUP37sMoDQn/ZcAEY1+LV4RieL/8ePeUgH1dZ/+57T4Zapq2jE2iUazotF5
 VleN1Gn6UDUnPDTXUzwTSPaE2Kw85TMKVeubOy/mbJ71E1ggB02xzHkI8nhw9xMX
 SzRXykR/lIrWyDufmRDiyczMhNcClgiVrxcwU0VrkgJKXrWa5Nj2xyo06GsPjftd
 27P11Hi7aWFwZADw57k7h61yxVzJT9FpSp2ekYipDkgw6VAWiPvkbe90nolGI0zb
 3gzWWxOZnqxk1gdfY3eTdLxAhFXituC/iSxAFSmWeLtL6OcFVQqZaJgi5MDL7vPg
 afrLMF5xasvqA2+zudak
 =FpP/
 -----END PGP SIGNATURE-----

Merge tag 'actions-drivers-for-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions into next/drivers

Pull "Actions Semi SoC drivers for 4.13" from Andreas Färber:

This adds clock source and power domain drivers for S500/S900.

* tag 'actions-drivers-for-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions:
  soc: actions: owl-sps: Factor out owl_sps_set_pg() for power-gating
  soc: actions: Add Owl SPS
  dt-bindings: power: Add Owl SPS power domains
  clocksource: owl: Add S900 support
  clocksource: Add Owl timer
2017-06-29 17:34:57 +02:00
Arnd Bergmann
6d599c8d35 Amlogic 64-bit DT changes for v4.13 (round 2)
- support new SPI controller driver
 - several more leaf clocks exposed to DT
 - New board: S905x LibreTech CC board
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIbBAABCAAGBQJZTDXpAAoJEFk3GJrT+8ZlErwP9RKRooWK3NkF+v9fFz9vCEdR
 3RsF67B1TUc9STkTN5XieHVh07qGkEWpBwbAFItuim/sZZKth6cfCX45nRXh0Rjm
 cz56GHUeuAoY6uVvZUlFz9Oa7vi44XShNc3tztQQ9Bq5Nx1JHDgHRi3TrzjUgUEt
 zbKHESOAkPMEYu0kDIhQguiKoPjF1uMuyC/8advIa9DJLmx4XeMqDReRcrRzCOs9
 AejuT+ZMA6K4YuzBFURpXsNYhKw8LS/K0tt/Qw5tWGN1iq+/JXaOKmY/e5UEo1we
 +PnwX0QZT96Lhidz1Ha7MmYfxI1MqAC6YifN//w4//ChazgTb0mz6Qokv1jjPNzE
 FK6c8aDdjHx8yMX1ldOKZ0tRO5IXWotHJU0Ds007WSOVuOyMrDfA0olANCCtBxuc
 R7j6xIM4OVp53RMVuCXte59MXeJXUwfpS91GQCMUDo+KFsO/ysfs1yaUQXawvLKO
 hZM5Ojw1ZuK1KekTUCbI3CJ1ALfY4KbHa3fCdLtrAKModqb0MP+hOlU0swt0SOcP
 vA2XgZxynKVJ2+RmleUxiI48Gkk8e8zDij4qgPCsIZoPjxOnZ2SI9UquHPA2upAi
 cMKtRX5Vt5I6lC0tGQAuZ32MiKvBslkBgrZI90f4yebMHgz8TzWEXNhaPPNnRFpO
 Tnt1tBWIh3DWYoi8vnI=
 =J5Ux
 -----END PGP SIGNATURE-----

Merge tag 'amlogic-dt64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt64

Pull "Amlogic 64-bit DT changes for v4.13 (round 2)" from Kevin Hilman:

- support new SPI controller driver
- several more leaf clocks exposed to DT
- New board: S905x LibreTech CC board

* tag 'amlogic-dt64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  ARM64: dts: meson-gxl: Add Libre Technology CC support
  dt-bindings: arm: amlogic: Add Libre Technology CC board
  dt-bindings: add Libre Technology vendor prefix
  ARM64: dts: meson-gx: Add SPICC nodes
  clk: meson-gxbb: un-export the CPU clock
  clk: meson-gxbb: expose UART clocks
  clk: meson-gxbb: expose SPICC gate
  clk: meson-gxbb: expose spdif master clock
  clk: meson-gxbb: expose i2s master clock
  clk: meson-gxbb: expose spdif clock gates
2017-06-29 16:59:54 +02:00
Arnd Bergmann
1964babb26 Amlogic 32-bit DT changes for v4.13 (round 2)
- greatly expands DT clock support for meson8b
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABCAAGBQJZTDWYAAoJEFk3GJrT+8ZlGwsP/0K7Mb81/wkne6Yr7FOQ/PTm
 QcPG9QGhj/2QyafiAEu5REeg/oraHxt/HCAC9uz7jM0CfrdYLD0imoMTOgqaIGZc
 BtvdJthSRUZPc91ou6vP527MB46ipTtP/69Ed/hmkSALm9QAhs430HsXfmmU7KnS
 M0dbQ1KOqQ4Hd/zup3D1LfUlsaOcuiiu73Ys3Xg5zBAq8QWJypLhZL7f9dvVYCQ+
 lqEtsjUt/qNvky72oKsSZX6Eb2gHKtC38fOVeYq3Z5xatU2UNWlEBGxmfTyFQP+E
 T3wBvCVgSPmqW0wD9yGdfqKtH7ZXJ1OBE/21pxjPLq1Rb45kC26jC9FMDOb0RS3w
 jaPzinjCcJ0AR5wUojmy7xbaVBrAESaldtj32Fxz4LIe6qPUB8AAiUsTAzwve/Bk
 17RP5Zf2BsBcmfsai+HYc6zGCwqC2pbmotuX3Sfw/CeE3sRhWqtpkixV9xsidM5f
 oR7bBsAjAhzRJ+SvMiJ0kPa9iNQdCgE3C2quIns7F35jwuWMAckGe6BeJ6RbX1ZK
 Mrzq4r7Q1utYldYfBgus/1Tf/RW+iwqGcyarhq6GAFcjx9siKF4lb5tXt237xwK2
 vP+KTRAAqii3F0+sUkzKZV2/RpqRDslmCPuq2mQNRfCtm+Px97vl+saRduz2R2jd
 vcKSfM8Vj2voxITL3nNz
 =o8Zj
 -----END PGP SIGNATURE-----

Merge tag 'amlogic-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt

Merge "Amlogic 32-bit DT changes for v4.13 (round 2)" from Kevin Hilman:

- greatly expands DT clock support for meson8b

* tag 'amlogic-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: (22 commits)
  ARM: dts: meson: use the real ethernet clock on Meson8 and Meson8b
  ARM: dts: meson8b: add the SCU device node
  ARM: dts: meson: add USB support on Meson8 and Meson8b
  ARM: dts: meson: add the hardware random number generator
  ARM: dts: meson8: add reserved memory zones
  ARM: dts: meson: add the SAR ADC
  ARM: dts: meson8: add the pins for the SDIO controller
  ARM: dts: meson8: add the PWM_E and PWM_F pins
  ARM: dts: meson: use GIC_SPI and IRQ_TYPE_EDGE_RISING macros
  ARM: dts: meson: use C preprocessor friendly include syntax
  ARM: dts: meson8: fix the IR receiver pins
  clk: meson8b: export the ethernet gate clock
  clk: meson8b: export the USB clocks
  clk: meson8b: export the gate clock for the HW random number generator
  clk: meson8b: export the SDIO clock
  clk: meson8b: export the SAR ADC clocks
  clk: meson-gxbb: un-export the CPU clock
  clk: meson-gxbb: expose UART clocks
  clk: meson-gxbb: expose SPICC gate
  clk: meson-gxbb: expose spdif master clock
  ...
2017-06-29 16:58:33 +02:00
Andreas Färber
4ca3fbd981 dt-bindings: power: Add Owl SPS power domains
Define power domains for all non-reserved S500 power gates.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2017-06-23 17:42:31 +02:00
Thomas Petazzoni
e0de91a977 irqchip/irq-mvebu-icu: Add new driver for Marvell ICU
The Marvell ICU unit is found in the CP110 block of the Marvell Armada
7K and 8K SoCs. It collects the wired interrupts of the devices located
in the CP110 and turns them into SPI interrupts in the GIC located in
the AP806 side of the SoC, by using a memory transaction.

Until now, the ICU was configured in a static fashion by the firmware,
and Linux was relying on this static configuration. By having Linux
configure the ICU, we are more flexible, and we can allocate dynamically
the GIC SPI interrupts only for devices that are actually in use.

The driver was initially written by Hanna Hawa <hannah@marvell.com>.

Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2017-06-23 09:14:57 +01:00
Jiancheng Xue
0d84659619 clk: hisilicon: add usb2 clocks for hi3798cv200 SoC
Add usb2 clocks for hi3798cv200 SoC.

Signed-off-by: Jiancheng Xue <xuejiancheng@hisilicon.com>
Reviewed-by: Daniel Thompson <daniel.thompson@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-06-21 10:46:45 -07:00
Sandeep Tripathy
25146e1e8f dt-bindings: clk: Extend binding doc for Stingray SOC
Update iproc clock dt-binding documentation with
Stingray pll and clock details.

Signed-off-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Reviewed-by: Scott Branden <scott.branden@broadcom.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-06-19 19:02:45 -07:00
Sean Wang
567bf2ed86 clk: mediatek: export cpu multiplexer clock for MT8173 SoCs
The patch enables CPU multiplexer clock on MT8173 SoC which fixes up
cpufreq driver fails at acquiring intermediate clock source when driver
probe is called.

Signed-off-by: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-06-19 19:02:44 -07:00
Sean Wang
43ed50ee5a clk: mediatek: export cpu multiplexer clock for MT2701/MT7623 SoCs
The patch enables CPU multiplexer clock on MT2701/MT7623 SoC which fixes
up cpufreq driver fails at acquiring intermediate clock source when driver
probe is called.

Signed-off-by: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-06-19 19:02:44 -07:00
Zhangfei Gao
3ff77275f7 clk: hi6220: add acpu clock
Add acpu clock, including sft clock controlling hi6220 coresight module

Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Li Pengcheng <lipengcheng8@huawei.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-06-19 19:02:42 -07:00
Shawn Guo
6454504c80 clk: zx296718: export I2S mux clocks
Export I2S mux clocks, so that device tree can refer to them for setting
a better parent clock for I2S work clock.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-06-19 19:02:42 -07:00
Stefan Agner
22039d150f clk: imx7d: create clocks behind rawnand clock gate
The rawnand clock gate gates two clocks, NAND_USDHC_BUS_CLK_ROOT
and NAND_CLK_ROOT. However, the gate has been in the chain of the
latter only. This does not allow to use the NAND_USDHC_BUS_CLK_ROOT
only, e.g. as required by APBH-Bridge-DMA.

Add new clocks which represent the clock after the gate, and use a
shared clock gate to correctly model the hardware.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Han Xu <han.xu@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-06-19 19:02:41 -07:00
Chen Jun
9357c150e6 clk: hi3660: add clocks for video encoder, decoder and ISP
This patch adds more clocks for hi3660, including:
 - video encoder and decoder
 - ISP (Image Signal Processing)

Signed-off-by: Chen Jun <chenjun14@huawei.com>
Signed-off-by: Zhong Kaihua <zhongkaihua@huawei.com>
Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
Reviewed-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Acked-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-06-19 18:00:34 -07:00
Abhishek Sahu
bcb486f026 clk: qcom: Add DT bindings for ipq8074 gcc clock controller
Add the compatible strings and the include file for ipq8074 gcc
clock controller.

Acked-by: Rob Herring <robh@kernel.org> (bindings)
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-06-19 17:29:39 -07:00
Linus Walleij
8b979d6258 clk: add DT bindings header for Gemini clock controller
This adds the DT binding macros used by the clock controller.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-06-19 17:25:01 -07:00
Linus Walleij
d8e349af86 reset: add DT bindings header for Gemini reset controller
This adds the DT binding macros used by the reset controller.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-06-19 17:24:58 -07:00
Olof Johansson
1161a0d50a Second Round of Renesas ARM Based SoC DT Bindings Updates for v4.13
* Document:
   - Add Renesas H3-based Salvator-XS board DT bindings
   - Add iW-RainboW-G20D-Qseven-RZG1M board
   - Add iW-RainboW-G20M-Qseven-RZG1M system on module
   - Update R-Car Gen3 ULCB board part numbers
 * Add clock bit definitions for r7s72100 SoC
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJZQ9XOAAoJENfPZGlqN0++V18P/jrDqg6e6qmE+K36sQqIuagE
 jgkBXt/NUcuwY6pGcE14LA2tQCYZb1bd8/iZmBNb15zC5wDVGvFjtYUnL4GIkcd4
 WvSPbaeMcfhIdufwlRToEVe1pIeEPltYK+csFstyYEdwB+kUGNIkDdUvSg4BljCO
 ZUEjHCAml6bN7MN0le3uMHvagKc7H0idsfg2K7zZxYLg96N6gGAHR+Tml8FhaZ4Y
 RCYfiOCMixUKhgqHXmsb1Z9ux+/3nWrRrCpugULjiipZq1KrayWhEWJgUYIrAuW/
 6PfEvIGPAJN6m5k9fALsiVC3zQl6OJgDovjJe7DagrOnkl4TDsUhrc9mEqGN30Gm
 jRD2hj7EvxWFWzFa7IcfwldZvkHpf1dJ+EENhprS8RX9yit/CCkgkOAViuym8jew
 nnWTQw7C/mtvUhOqCpfWAPlT8NRE2yanqGtH2ouUqPMKInDCwH5v7ZKPhs4VUfqk
 B/59CUxMhsU9orvZFnhqp58sMcqAoovCROq4xMjupOo7Y4Du9qvozF+x0IgO27Ie
 nB/v96+ezyNl2YBIXRme3t3/UR7TaUYmEuzYeO3fU7tYQpQXLTJ1xNmmQqTI0e/E
 0lMUVEO57SNakvYGu8pd0Z6YivWalfTwfZkpZizEaEdVIVEu32oE/0fzJYp/HrId
 WSDZSJP1363mCHwRmacW
 =eilq
 -----END PGP SIGNATURE-----

Merge tag 'renesas-dt-bindings2-for-v4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Second Round of Renesas ARM Based SoC DT Bindings Updates for v4.13

* Document:
  - Add Renesas H3-based Salvator-XS board DT bindings
  - Add iW-RainboW-G20D-Qseven-RZG1M board
  - Add iW-RainboW-G20M-Qseven-RZG1M system on module
  - Update R-Car Gen3 ULCB board part numbers
* Add clock bit definitions for r7s72100 SoC

* tag 'renesas-dt-bindings2-for-v4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: Document Renesas H3-based Salvator-XS board DT bindings
  ARM: shmobile: Update R-Car Gen3 ULCB board part numbers
  ARM: shmobile: document iW-RainboW-G20D-Qseven-RZG1M board
  ARM: shmobile: document iW-RainboW-G20M-Qseven-RZG1M system on module
  ARM: dts: r7s72100: add clock bit definitions

Signed-off-by: Olof Johansson <olof@lixom.net>
2017-06-18 22:50:49 -07:00
Olof Johansson
7a699a85e1 - enhance scpsys to support mt6797
- add mt6797 support to scpsys
 - fix error path in pmic-wrapper
 - fix possible NULL pointer dereference in pmic-wrapper
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABAgAGBQJZPms9AAoJELQ5Ylss8dNDrlEP/iKVAHxBG3uNijaHKMD6U+sJ
 gGoppjbj2/l3xC4K7ngyUOsidsNRJk5jXWuklIlRJ+XcJSLFRJ1eJTKv00dJdwdf
 QvN41hGKQ0GFSetXorxyMtHpAVi2VWM0FReFbccrvf8Gwu9e0WhfBzfKb/l+pzb8
 ttawydaAst7SRE7Qlbgks7lafRfjSJWnguLKllhGHdlmdn8SiKxR9uD2isgb7BaN
 gTPgsRtwuKCjYrlIXPg/y/3ykXL1A5CYvwGCJzbIyM9Oz4DmfQkuonzfg5o87ysA
 UpX+bpMjheAAmjDUXy5MYEoRKyiRVE43ccQnX+wiw82p1onGL7hWeXngX7gtajlb
 gAoGnxZByJlEOHCJVCnGEWZuzxaR0PbZygKKAUEWU/2sLDTQX9ThmbaWplis3Dde
 pkKXdoENAaSEiAhTRrHfhMR3IGZQ0B/LVK4Uoc9Lfa87kmDS/RTd/SpYz5/HZQ/b
 8Qggg44V99RwAQbU9jke3PYTDYqOGop4By1CfZiw9394aOVussCf8wVKy1bqcjsj
 5wcF2YB0IUDEoqCivp4GpR/pbBpvKeL88rFGrebXBIEGDLLV/6PHTmV0YJw4hj8D
 vsb2hZyLdTBzyBhZ4Md7jnvFr726VfdDWcjgTsq0JRrAaGeCa3ll9tEuOQW2mVKa
 nNQOtQgFrEmY9ihz//NW
 =0f1S
 -----END PGP SIGNATURE-----

Merge tag 'v4.12-next-soc' of https://github.com/mbgg/linux-mediatek into next/drivers

- enhance scpsys to support mt6797
- add mt6797 support to scpsys
- fix error path in pmic-wrapper
- fix possible NULL pointer dereference in pmic-wrapper

* tag 'v4.12-next-soc' of https://github.com/mbgg/linux-mediatek:
  soc: mediatek: PMIC wrap: Fix possible NULL derefrence.
  soc: mediatek: PMIC wrap: Fix error handling
  soc: mediatek: add MT6797 scpsys support
  soc: mediatek: add vdec item for scpsys
  soc: mediatek: avoid using fixed spm power status defines

Signed-off-by: Olof Johansson <olof@lixom.net>
2017-06-18 19:35:48 -07:00
Olof Johansson
63a677bca2 A bunch of changes including mali gpu nodes for rk3288 boards
following (and including) the new Mali Midgard binding; a lot of
 improvements for the rk3228/rk3229 socs (tsadc, operating points,
 usb, clock-rates, pinctrl, watchdog); finalizing the rk1108->rv1108
 rename and adc buttons for the rk3288 firefly boards.
 -----BEGIN PGP SIGNATURE-----
 
 iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAlk5x+gQHGhlaWtvQHNu
 dGVjaC5kZQAKCRDzpnnJnNEdgVOmB/sHN5YBQCwdlermcO75CiLktacneQ6qcom2
 GCBHfKwXxmey7puB8cKfQ1IgvvsKmXU1+QbUDjxD13p7b139WVRM3VEokOiSR7cl
 XjGFFy9u6ECfPRpJfPBN/8oENcZ1N94S3gfhCwgcF6JDkumMI4DWVTLD4lZLeIcR
 LTfZMddSevITXMzrWh0+Q9/TgnJbD58x4lSxs5m85h/8JDSfqdsijs/j2HJrBHPv
 01NwQBm8w6rmTNL3UGfqDeUZTnmaczXRf2sgEr5ORLln2Qn++FpUaJiRPUdtYRs7
 NEWLppFQeykoxgTQnttkt8oOyaKfNS3PsvwgA7R35w5HnbEtXcDK
 =b2HZ
 -----END PGP SIGNATURE-----

Merge tag 'v4.13-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

A bunch of changes including mali gpu nodes for rk3288 boards
following (and including) the new Mali Midgard binding; a lot of
improvements for the rk3228/rk3229 socs (tsadc, operating points,
usb, clock-rates, pinctrl, watchdog); finalizing the rk1108->rv1108
rename and adc buttons for the rk3288 firefly boards.

* tag 'v4.13-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: dts: rockchip: enable usb for rk3229 evb board
  ARM: dts: rockchip: add usb nodes on rk322x
  ARM: dts: rockchip: add adc button for Firefly
  ARM: dts: rockchip: enable ARM Mali GPU on rk3288-veyron
  ARM: dts: rockchip: enable ARM Mali GPU on rk3288-firefly
  ARM: dts: rockchip: enable ARM Mali GPU on rk3288-rock2-som
  ARM: dts: rockchip: add ARM Mali GPU node for rk3288
  dt-bindings: gpu: add bindings for the ARM Mali Midgard GPU
  ARM: dts: rockchip: set a sane frequence for tsadc on rk322x
  ARM: dts: rockchip: add operating-points-v2 for cpu on rk322x
  ARM: dts: rockchip: set default rates for core clocks on rk322x
  ARM: dts: rockchip: add second uart2 pinctrl on rk322x
  ARM: dts: rockchip: correct rk322x uart2 pinctrl
  ARM: dts: rockchip: add watchdog device node on rk322x
  clk: rockchip: add clock-ids for more rk3228 clocks
  clk: rockchip: add ids for camera on rk3399
  ARM: dts: rockchip: fix rk322x i2s1 pinctrl error
  ARM: dts: rockchip: rename RK1108-evb to RV1108-evb
  ARM: dts: rockchip: rename core dtsi from RK1108 to RV1108
  ARM: dts: rockchip: Setup usb vbus-supply on rk3288-rock2

Signed-off-by: Olof Johansson <olof@lixom.net>
2017-06-18 19:07:25 -07:00
Stephen Boyd
4dea04c1f1 * Expose more clock gate on meson8 (SAR ADC, RNG, USB, SDIO, ETH)
* Add new compatible to the meson8 clock controller for meson8b
 * Add missing parents to gxbb clk81
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABCAAGBQJZRDQVAAoJEAFRo5MEFpTRaVgQAKqGVc39PNOGuzx8P2pj4H0B
 lhedpQu7XHTGc7/2/b8ezMwzgnlHnFsAJOnzpLj4FbUNbNSlJmJFaBfybbV1cgd+
 MF1cN9D5ssqI5zjkXeIhhZO6ogoe3AUlhjqKJMQfK2jlbQdF9Y9GrCIFFdzj/xC8
 pwI4UxRg1g0SGfsF76IaGWeBsduYr9kzZJ3Xr1zUIi32bn/peTaHL+Ye/tv8ssir
 NPnIXDte8XV+gmlOk0Ir1ELqIt501UfbljKmknU4FtVmOH9B/xkuxxOZU0w0Ia1o
 6uoXKDMVENQO+LFWifdexIKh5MV7fXC1wynYoiqTd0BiOA2vKryTo4lcqPblWA5T
 V95wIqwjsk6+XHl5uEFT7HPm2V5QEmBKzeDA4ng6hlGB7GYxZFhpzZQK4lnNrML0
 pB+crpY9/5lAdQlpC/XMkOHORhJ0862ktT45TplToprowWadnmLZBbHB7QcNe+iH
 z8v26eoh800YTN5KMfiSjPXNRW6GPS8YKJmT/9vx35+ysKFMD2fW2FmM7DL5LN+M
 Bv+fgbJSJ4slniqMzFCEVWfcMESGltAYKM8G2YpPUF1uf99SnRweFwf7tshPSvJ4
 bhvnqUdKsWxMgag3aL2D5eKq+yCRlk6/3zobq5qlCAomr9XDMm97C4CGmFUn40iV
 xiIzVBXoiydjJyaBLSzX
 =0BO9
 -----END PGP SIGNATURE-----

Merge tag 'meson-clk-for-4.13-2' of git://github.com/BayLibre/clk-meson into clk-next

Pull Amlogic clk driver updates from Jerome Brunet:

 * Expose more clock gate on meson8 (SAR ADC, RNG, USB, SDIO, ETH)
 * Add new compatible to the meson8 clock controller for meson8b
 * Add missing parents to gxbb clk81

* tag 'meson-clk-for-4.13-2' of git://github.com/BayLibre/clk-meson:
  clk: meson: gxbb: add all clk81 parents
  clk: meson: meson8b: add compatibles for Meson8 and Meson8m2
  clk: meson8b: export the ethernet gate clock
  clk: meson8b: export the USB clocks
  clk: meson8b: export the gate clock for the HW random number generator
  clk: meson8b: export the SDIO clock
  clk: meson8b: export the SAR ADC clocks
2017-06-16 15:01:46 -07:00
Stephen Boyd
ef748cb39d Merge branch 'for-4.13-ti-clkctrl' of https://github.com/t-kristo/linux-pm into clk-next
* 'for-4.13-ti-clkctrl' of https://github.com/t-kristo/linux-pm:
  clk: ti: omap4: add clkctrl clock data
  dt-bindings: clk: add omap4 clkctrl definitions
  clk: ti: add support for clkctrl clocks
  Documentation: dt-bindings: Add binding documentation for TI clkctrl clocks
2017-06-16 14:52:02 -07:00
Stephen Boyd
8a02fcf8a0 Allwinner clock patches for 4.13
Some new clock units are supported, for the display clocks unsed in the
 newer SoCs, and the A83T PRCM.
 
 There is also a bunch of minor fixes for clocks that are not used by
 anyone, and reworks needed by drivers that will land in 4.13.
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJZQY1YAAoJEBx+YmzsjxAgaqkQAIzXNo0oo/M+WWl2BiDBywQT
 saAaquvpFBagelEYA7tN7hkVmbUdemZoYGSjK/FmOxWKDDGYuUphZboBiQ+UGdqf
 5EMS0V+OLjA0EVviBIMm9g1hotPx/RJOyVHW1Whi4HwRwCRHbK7t2wZgZi1Df1+p
 OPSeW+oPPEOOf8V4wI89sh2FXvqF/xY/dRUZKWA/GJNOia7tk3rxCTTA6TMl8W0M
 hBQFMKqzIfruUMIgpKx305Rc5wpZbFz7Vc/XlZCwnmtr3UTHqaQp953LLm5VHUS5
 EfbEibYRcy9ZBFLjciIJofyfO9V7mMrpkEqACG/C64gu4qbxi110mH6grUjGQtxC
 CWStTtwVCHIl16dZe0e0WsxR/ZpXH/Q9DlHmshCGlQxz2d6YKqpimo5ZygIrw6uD
 /TiFvqfoWowwGdI7ghA7FrRHHPW8HCiL7oEft+K06G4kgEo4YN74xI+xcyuAYDph
 z/GLXgJVVOE34iFsd2rndYm857OsaEmyL1XG7NBbnW/g6U4OnhI3aC7JrrEqXdKu
 iFMp80kWymoCujyWnabB7dKQbtuFxiqrCZ6OkqP+VE83Ux5JWQagumunhgr1OTUB
 VJL4PVgaP5lCV74PtUmj/H1HaaQwWxr20xaHI2yOOmCxF7jlWbISjuQI1zb3lyKu
 v9qczQNze3OiLPY14RpW
 =41iN
 -----END PGP SIGNATURE-----

Merge tag 'sunxi-clk-for-4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-next

Pull Allwinner clock patches from Maxime Ripard:

Some new clock units are supported, for the display clocks unsed in the
newer SoCs, and the A83T PRCM.

There is also a bunch of minor fixes for clocks that are not used by
anyone, and reworks needed by drivers that will land in 4.13.

* tag 'sunxi-clk-for-4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (21 commits)
  clk: sunxi-ng: Move all clock types to a library
  clk: sunxi-ng: a83t: Add support for A83T's PRCM
  dt-bindings: clock: sunxi-ccu: Add compatible string for A83T PRCM
  clk: sunxi-ng: select SUNXI_CCU_MULT for sun8i-a83t
  clk: sunxi-ng: a83t: Fix audio PLL divider offset
  clk: sunxi-ng: a83t: Fix PLL lock status register offset
  clk: sunxi-ng: Add driver for A83T CCU
  clk: sunxi-ng: Support multiple variable pre-dividers
  dt-bindings: clock: sunxi-ccu: Add compatible string for A83T CCU
  clk: sunxi-ng: de2: fix wrong pointer passed to PTR_ERR()
  clk: sunxi-ng: sun5i: Export video PLLs
  clk: sunxi-ng: mux: Re-adjust parent rate
  clk: sunxi-ng: mux: Change pre-divider application function prototype
  clk: sunxi-ng: mux: split out the pre-divider computation code
  clk: sunxi-ng: mux: Don't just rely on the parent for CLK_SET_RATE_PARENT
  clk: sunxi-ng: div: Switch to divider_round_rate
  clk: sunxi-ng: Pass the parent and a pointer to the clocks round rate
  clk: divider: Make divider_round_rate take the parent clock
  clk: sunxi-ng: explicitly include linux/spinlock.h
  clk: sunxi-ng: add support for DE2 CCU
  ...
2017-06-16 14:45:27 -07:00
Tero Kristo
70ab980fb1 dt-bindings: clk: add omap4 clkctrl definitions
Contains offsets for all omap4 clkctrl main and optional clocks.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
2017-06-15 10:47:59 +03:00
Stephen Boyd
9c861f3328 Merge branch 'clk-fixes' into clk-next
* clk-fixes:
  clk: sunxi-ng: a64: Export PLL_PERIPH0 clock for the PRCM
  clk: sunxi-ng: h3: Export PLL_PERIPH0 clock for the PRCM
  dt-bindings: clock: sunxi-ccu: Add pll-periph to PRCM's needed clocks
  clk: sunxi-ng: enable SUNXI_CCU_MP for PRCM
  clk: sunxi-ng: v3s: Fix usb otg device reset bit
  clk: sunxi-ng: a31: Correct lcd1-ch1 clock register offset
2017-06-14 16:48:21 -07:00
Stephen Boyd
7f274d54bb clk/samsung updates for 4.13
- conversion to the clk_hw API
  - definitions and fixes of exynos5420 SoC audio subsystem
    related clocks
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABCAAGBQJZOpzhAAoJEE1bIKeAnHqLPFsP/jh9z5A1eq+rlB3ivWW8OByi
 4iANs6Gd9Tnw7MNF46XV6qPHmj+9cEe1ntT/6lVs9Hlz67HwEnWuMc8dgtU6YU7d
 A7Vzx+fMpE/UwFISLhqMjn5Djh13KP4wuPYiHaJKS+00JNEfT/IsvL6kZPS5I2bZ
 teoeWzD1vOnn8QXxSnJeCCkmS91zVq5Sxyrge9Lui0gLMN+5wVxY1VTiw7erL9hi
 jDL6qSRvcJfG1lruGD9No5MkI0kBXiVgqMHi1b2mTYnUS2NUQeAhCfGsvkO71ZU7
 YjDSAOHYTccIdWHs6X4aIvzeVLjuHMVsnnXErDjI388POOQ3BCQ0JE2FDkp68UrM
 DNGQFaKE528mxOL819aH71JQ5qj1kB9Upq7NUSC6roPbahiPv1tdx9dzX2vgGslM
 pW+lXR6ysnsEYsE8HsCsOti4jpVSG6iWYyffI6GMGHVqRiDUY9d6cxHgj/Qx3YFR
 9a7QmehnmSSzJK9sC1acD6e/U1YhcZYKMmb4ygtjFP/w2N2pwNXTgEw74UmXS/Mg
 /ydVbcwJh6spaN85wXKer5lrZNio+gHDj4B+Vwnfo8yB2GW2akHYGW5cNkGeGac6
 7ysI0wp7l9AuofzmovtiPw0pvz0p41rJO2LvIOvvsGeo6i5OOZBke7aAxe7lfg8G
 hoXF2gS+r0wg/C3ljj4z
 =2bgV
 -----END PGP SIGNATURE-----

Merge tag 'clk-v4.13-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk into clk-next

Pull samsung clk driver updates from Sylwester Nawrocki

 - conversion to the clk_hw API
 - definitions and fixes of exynos5420 SoC audio subsystem
   related clocks

* tag 'clk-v4.13-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk:
  clk: samsung: exynos542x: Add EPLL rate table
  clk: samsung: Add missing exynos5420 audio related clocks
  clk: samsung: Add enable/disable operation for PLL36XX clocks
  clk: samsung: s5pv210-audss: Convert to the new clk_hw API
  clk: samsung: exynos-clkout: Convert to the new clk_hw API
  clk: samsung: exynos-audss: Convert to the new clk_hw API
  clk: samsung: Convert common drivers to the new clk_hw API
  clk: samsung: Add local variable to match its purpose
  clk: samsung: Remove dead code
2017-06-14 10:36:30 -07:00
Stephen Boyd
c96da4dd39 One new clock controller for the rk3128 soc, a fixup for the rk3228 cpuclk
table and the usual bunch of some new clock-ids and some clocks marked as
 critical.
 -----BEGIN PGP SIGNATURE-----
 
 iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAlk5xMgQHGhlaWtvQHNu
 dGVjaC5kZQAKCRDzpnnJnNEdgQhdCACyqXbTUEGQDaqKa40f0IPOQCPZ31XYuz8t
 3kQRV08ZkBQlI0tAKgxS4+tTERtpWBA3PjIlnZQ/VRogQsiJpWj6//98Z8jJ9oEx
 2lsKTw3XAb/BVsvW4Awi7VbStt5LNxRxwuIU4uXgHaapTi7wQrqAlam+2iXNOW7h
 05/piVKlKOyS52009UeiO3bzFojiTlElC1JQPqnVA65KxqhYvb/9rt3hn8Y8ZqF1
 KuLibE/AC5eDX7XaCFe+a7dbJpA6b+ciHg24jk+BMuksy53yYbngLbDwlOs7YFjo
 PjFgbdsJw25uE2i0ZwtarAOJoLOtBJiSNib6FJCmC6yHLy5Sc8l/
 =kKnC
 -----END PGP SIGNATURE-----

Merge tag 'v4.13-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next

Pull rockchip clk driver updates from Heiko Stuebner:

One new clock controller for the rk3128 soc, a fixup for the rk3228 cpuclk
table and the usual bunch of some new clock-ids and some clocks marked as
critical.

* tag 'v4.13-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  clk: rockchip: mark some special clk as critical on rk3368
  clk: rockchip: mark noc and some special clk as critical on rk3288
  clk: rockchip: mark noc and some special clk as critical on rk3228
  clk: rockchip: mark pclk_ddrupctl as critical_clock on rk3036
  clk: rockchip: add clock controller for rk3128
  dt-bindings: add bindings for rk3128 clock controller
  clk: rockchip: export more rk3228 clocks ids
  clk: rockchip: add ids for rk3399 testclks used for camera handling
  clk: rockchip: add dt-binding header for rk3128
  clk: rockchip: fix up the RK3228 clk cpu setting table
  clk: rockchip: add clock-ids for more rk3228 clocks
  clk: rockchip: add ids for camera on rk3399
2017-06-14 10:33:04 -07:00
Martin Blumenstingl
c22f06d3c0 clk: meson8b: export the ethernet gate clock
Export the ethernet gate clock to the dt-bindings.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2017-06-12 07:30:45 +00:00
Martin Blumenstingl
677f6af5d6 clk: meson8b: export the USB clocks
Export the USB related clocks (for the USB controller and the USB2 PHYs)
so they can be used in the dt-bindings.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2017-06-12 07:30:44 +00:00
Martin Blumenstingl
06eff6a792 clk: meson8b: export the gate clock for the HW random number generator
This exports the clock so it can be used in the dt-bindings.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2017-06-12 07:30:43 +00:00
Martin Blumenstingl
e2e5f3211f clk: meson8b: export the SDIO clock
Export the SDIO clock so it can be used in the dt-bindings.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2017-06-12 07:30:42 +00:00
Martin Blumenstingl
70ad0d0351 clk: meson8b: export the SAR ADC clocks
Export the clocks for the SAR ADC so they can be used in the
dt-bindings.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2017-06-12 07:30:41 +00:00
Sylwester Nawrocki
8a9cf26e30 clk: samsung: Add missing exynos5420 audio related clocks
This patch adds missing definitions of mux clocks required for using
EPLL as the audio subsystem root clock on exynos5420/exynos5422 SoCs.

Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Tested-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2017-06-09 13:12:54 +02:00
Chen-Yu Tsai
05359be117 clk: sunxi-ng: Add driver for A83T CCU
The A83T clock control unit is a hybrid of some new style clock designs
from the A80, and old style layout from the other Allwinner SoCs.

Like the A80, the SoC does not have a low speed 32.768 kHz oscillator.
Unlike the A80, there is no clock input either. The only low speed clock
available is the internal oscillator which runs at around 16 MHz,
divided by 512, yielding a low speed clock around 31.250 kHz.

Also, the MMC2 module clock supports switching to a "new timing" mode.
This mode divides the clock output by half, and disables the CCU based
clock delays. The MMC controller must be configure to the same mode,
and then use its internal clock delays.

This driver does not support runtime switching of the timing modes.
Instead, the new timing mode is enforced at probe time. Consumers can
check which mode is active by trying to get the current phase delay
of the MMC2 phase clocks, which will return -ENOTSUPP if the new
timing mode is active.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-07 15:32:16 +02:00
Maxime Ripard
0adad031ef clk: sunxi-ng: sun5i: Export video PLLs
The video PLLs are used directly by the HDMI controller. Export them so
that we can use them in our DT node.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2017-06-07 15:32:14 +02:00
Icenowy Zheng
ed74f8a8a6 dt-bindings: add binding for the Allwinner DE2 CCU
Allwinner "Display Engine 2.0" contains some clock controls in it.

In order to add them as clock drivers, we need a device tree binding.
Add the binding here.

Also add the device tree binding headers.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-07 15:32:12 +02:00
Pramod Kumar
8aa428cc1e arm64: dts: Add pinctrl DT nodes for Stingray SOC
This patch adds pinctrl and pinmux related DT nodes for
Stingray SOC.

For manageability, pinctrl and pinmum DT nodes are added
as separate DTSi file and included in main DTSi file.

Signed-off-by: Pramod Kumar <pramod.kumar@broadcom.com>
Signed-off-by: Anup Patel <anup.patel@broadcom.com>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Reviewed-by: Vikram Prakash <vikram.prakash@broadcom.com>
Reviewed-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-06-05 19:07:17 -07:00
Sandeep Tripathy
24db8c9194 dt-bindings: clk: Extend binding doc for Stingray SOC
Update iproc clock dt-binding documentation with
Stingray pll and clock details.

Signed-off-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Reviewed-by: Scott Branden <scott.branden@broadcom.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-06-05 19:07:15 -07:00
Chris Brandt
fe811e1de3 ARM: dts: r7s72100: add clock bit definitions
Add the remaining bit locations for the module stop clock registers.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-06-05 15:39:13 +02:00
Peter Rosin
256ac03750 dt-bindings: document devicetree bindings for mux-controllers and gpio-mux
Allow specifying that a single multiplexer controller can be used to
control several parallel multiplexers, thus enabling sharing of the
multiplexer controller by different consumers.

Add a binding for a first mux controller in the form of a GPIO based mux
controller.

Acked-by: Jonathan Cameron <jic23@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Peter Rosin <peda@axentia.se>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-06-03 19:25:40 +09:00